OVERVIEW ⌂ Introduced April 1, 1974. ⌂ Corporation is an American multinational corporation headquartered in ⌂ 10 times faster than 8008. Santa Clara, California. ⌂ Used in the , Traffic light controller, cruise missile. ⌂ It is the inventor of the series of , the processors found in ⌂ Characteristics most personal . • 6 mm process ⌂ Intel Corporation, founded on July 18, 1968, is a portmanteau of • 4500 Integrated Electronics (the fact that "intel" is the term for intelligence • 2 MHz information also made the name appropriate). • 8-bit word size ⌂ Intel sells its products and solutions to original equipment manufacturers • 40-pin DIP package (OEMs) and original design manufacturers (ODMs). /8088 ⌂ The 80486 architecture, for example, supports clock rates of from 33 to 66 ⌂ A 16 bit processors Introduced June 8, 1978(8086) and Introduced June 1, MHz. 1979(8088). ⌂ Because Intel discovered that it couldn't trademark its CPU numbers, it shifted ⌂ First used in the IBM PC-compatible computers. Later used to a naming scheme, starting with the processors. Intel's sixth- in portable computing, and in the IBM PS/2 Model 25 and Model 30. Also generation chip is called the . used in the AT&T PC6300 / Olivetti M24, a popular IBM PC-compatible HISTORY (predating the IBM PS/2 line). ⌂ Intel was originally founded in Mountain View, California in 1968 by Gordon . ⌂ NASA used original 8086 CPUs on equipment for ground-based maintenance Moore, , Arthur Rock and Max Palevsky. of the Space Shuttle Discovery until the end of the space shuttle program in ⌂ Intel's third employee was Andy Grove, a chemical engineer, who later ran the 2011. company through much of the 1980s and the high-growth 1990s. ⌂ The first x86 CPU. ⌂ INTEL grown from three man start up in 1968 to industrial grant by 1981. ⌂ Characteristics ⌂ It had 20,000 employees & $ 188 million revenue. • 3 mm process ⌂ Intel was distinguished by its ability to make semiconductors. • 29k transistors ⌂ In 1969, was the 3101 Schottky TTL bipolar 64-bit static random-access • 5-10 MHz memory (SRAM). • 16-bit word size ⌂ In the same year Intel also produced the 3301 Schottky bipolar 1024- • 40-pin DIP package bit readOnly memory (ROM) and the first commercial metal–oxide– semiconductor field-effect (MOSFET) silicon gate SRAM chip, the ⌂ Introduced February 2, 1982. 256-bit 1101. ⌂ Widely used in IBM-PC AT and AT clones contemporary to it. Acquisitions ⌂ It could execute 4 million . ⌂ On August 19, 2010, Intel announced that it planned to purchase McAfee. ⌂ Characteristics ⌂ On August 30, 2010, Intel and Infineon Technologies announced that Intel • 1.5 mm process would acquire Infineon's Wireless Solutions business. • 134k transistors ⌂ In March 2011, Intel bought most of the assets of Cairo-based SySDSoft. • 6-12 MHz ⌂ In July 2011, Intel announced that it had agreed to acquire Fulcrum • 16-bit word size Microsystems Inc. • 68-pin PGA ⌂ On October 1, 2011, Intel reached a deal to acquire Telmap. Intel iAPX 432 ⌂ In July 2012, Intel Corporation agreed to buy 10 percent shares of ASML ⌂ Introduced January 1, 1981 as Intel's first 32-bit Holding NV. ⌂ Multi-chip CPU; Intel's first 32-bit microprocessor ⌂ The acquisition of a Spanish natural language recognition startup named ⌂ Object/capability architecture Indisys was announced on September 13, 2013. ⌂ Microcoded primitives ⌂ In 2008, Intel spun off key assets of a solar startup business effort to form an ⌂ One terabyte virtual address space independent company, SpectraWatt Inc. However, as of 2011, SpectraWatt ⌂ Hardware support for fault tolerance has filed for bankruptcy. ⌂ Two-chip General Data (GDP), consists of 43201 and 43202 ⌂ In February 2011, Intel announced plans to build a new microprocessor ⌂ 43203 Interface Processor (IP) interfaces to I/O subsystem manufacturing facility in Chandler, Arizona, which is expected to be completed ⌂ 43204 Interface Unit (BIU) simplifies building multiprocessor systems in 2013, at a cost of $5 billion. ⌂ 43205 Memory (MCU) ⌂ In April 2011, Intel began a pilot project with ZTE Corporation to produce ⌂ Architecture and internal data base paths 32 bit using the Intel processor for China's domestic market. This ⌂ Clock rates: project is intended to challenge the domination of ARM processors in mobile • 5 MHz phones. • 7 MHz • 8 MHz ⌂ first commercially available microprocessor created in 1971. Pentium ⌂ Originally designed to be used in Busicom . ⌂ Introduced in 1993. ⌂ the designer of Intel 4004. ⌂ It was also 32 bit microprocessor. ⌂ It was also 4 bit microprocessor. ⌂ It could execute 110 million instruction per second. ⌂ It was introduced in 1974. ⌂ It was originally named 80586. ⌂ Characteristics ⌂ Handles and processes more media types such as speech, sound , and . 10 mm process photographic images. . 2300 transistors ⌂ Cache memory. . 400 – 800 kHz ⌂ 8 KB for instruction. . 4-bit word size ⌂ 8 KB for data. . 16-pin DIP package Pentium Pro ⌂ Introduced November 1, 1995 ⌂ An 8 bit microprocessor Introduced April 1, 1972. ⌂ Primarily used in systems. ⌂ Originally intended for use in the 2200 . ⌂ Able to handle more instructions per clock cycle ⌂ Characteristics ⌂ Characteristics . 10 mm process • 0.6-0.18 mm process . 3500 transistors • 5.5M-28M transistors . 500 – 800 kHz • 166-1000 MHz . 8-bit word size • 32-bit word size . 18-pin DIP package • MCM / SECC . Pentium II ⌂ Introduced May 7, 1997. . 80486DX2 - Introduced March 3, 1992 ⌂ MMX (multimedia extent ion) technology was supported. . 80486SL - Introduced November 9, 1992 ⌂ L2 cache & processor were on one circuit. . 80486DX4 - Introduced March 7, 1994 ⌂ Better capable of handling video editing, sending media via the Internet, and . Pentium with MMX Technology - Introduced January 8, 1997 reprocessing music . - Introduced May 21, 2001 ⌂ By 1998, the Pentium began to climb in processing speeds up to 450 MHz. . - Introduced April 15, 1998 ⌂ Characteristics ⌂ 64 bit processors • 0.6-0.18 mm process . -Released May 29, 2001 • 5.5M-28M transistors . Itanium 2-Released July 2002 • 166-1000 MHz . Core i3- Introduced January, 2010 • 32-bit word size . Core i5- Introduced September 8, 2009 • MCM / SECC Pentium III ARCHITECTURE ⌂ Introduced February 26, 1999. ⌂ It was also 32 bit MB. Moore’s Law states that the number of transistors on a chip will double ⌂ Its clock speed was 1GHZ. approximately every two years. Pentium IV ⌂ Introduced November 20, 2000. o 400 MHz ⌂ The Intel Pentium microprocessor was introduced on March 22, 1993 o SSE2 SIMD Extensions o Number of transistors 42 million P5, was Intel's fifth-generation and first superscalar IA-32 microarchitecture o Used in desktops and entry-level o All internal connections were made from aluminum to copper. ⌂ Superscalar architecture — The Pentium has two datapaths (pipelines) that allow it to complete two instructions per clock cycle in many cases. o Today it’s reaching upwards to a remarkable 3GHz

Intel Core Microarchitecture ⌂ Introduced January 2006 ⌂ introduced in November 1995 ⌂ It was 32 bit or 64 bit microprocessor. ⌂ Pentium Pro, Pentium II, Pentium II Xeon, Pentium III, and Pentium III Xeon ⌂ It had two cores. microprocessors ⌂ It supported SMT technology. ⌂ The P6 architecture lasted three generations from the Pentium Pro to ⌂ SMT : Simultaneously Multi threading. Pentium III, and was widely known for low power consumption, excellent ⌂ E.g. : adobe Photoshop supported SMT. integer performance, and relatively high instructions per cycle (IPC) II ⌂ Introduced July 27, 2006 P6 Variant ⌂ It was 32 bit or 64 bit microprocessor. ⌂ Updated version of Pentium III's P6 microarchitecture designed from the ⌂ First multi-core Intel processor ground up for mobile computing ⌂ Has 291 Million transistors. ⌂ Realizing their new microarchitecture wasn't the best choice for the mobile Intel Core 7 space, Intel went back to the drawing board for a design that would be ⌂ Introduced January, 2011 optimally suited for this market segment. The result was a modernized P6 ⌂ -995 million transistors design called the Pentium M ⌂ 4 physical cores/8 threads ⌂ 32+32 Kb (per core) L1 cache P6 Variant Enhanced Pentium M ⌂ 256 Kb (per core) L2 cache ⌂ The CPU was launched in January 2006 under the Core brand. ⌂ 8 MB L3 cache ⌂ Single and dual-core mobile version were sold under the Core Solo, Core Duo, Other types of microprocessors and Pentium Dual-Core brands, and a server version was released as Xeon ⌂ The 8-bit processors LV. . 8085 - Introduced March 1976 . Intel 8048 NetBurst microarchitecture . Intel 8051 ⌂ The NetBurst microarchitecture, called P68 inside Intel, was the successor to . Intel 80151 the P6 microarchitecture in the x86 family of CPUs made by Intel. . Intel 80251 ⌂ The first CPU to use this architecture was the Willamette-core , ⌂ The bit-slice processor released on November 20, 2000 3000 Family - Introduced in the third quarter of 1974 ⌂ all subsequent Pentium 4 and variants have also been based on ⌂ 16 Bit processors NetBurst. . 80186 Introduced 1982 ⌂ L1 cache- 8 KB to 16 KB per core . 80188-6mhz ⌂ L2 cache- 128 KB to 2048 KB, 256 KB to 2048 KB (Xeon) . 80286 - Introduced February 2, 1982 ⌂ L3 cache- 4 MB to 16 MB shared It had 134,000 transistor ⌂ Features o . 24-bit address bus and was able to address up to 16 MB of RAM Hyper-Pipelined Technology o . ⌂ 32 Bit processorts Rapid Execution Engine . . i960 aka 80960 - Introduced April 5, 1988 Execution Trace Cache . . i860 aka 80860 - Introduced February 26, 1989 Front-Side Bus . Xscale - Introduced August 23, 2000 . 80386DX - Introduced October 17, 1985 Inter Core . 80386SX - Introduced June 16, 1988 ⌂ previously known as the Next-Generation Micro-Architecture . 80376 - Introduced January 16, 1989; discontinued June 15, 2001 ⌂ A multi-core processor microarchitecture unveiled by Intel in Q1 2006. . 80386SL - Introduced October 15, 1990 ⌂ The first processors that used this architecture were code-named , . 80386EX - Introduced August 1994 , and Woodcrest . 80486DX - Introduced April 10, 1989 ⌂ Merom is for mobile computing, Conroe is for desktop systems, and Woodcrest is for servers and workstations. o Intel's second-generation of 32-bit x86 processors, included built in floating point unit and pipelining. ⌂ Mainstream Core-based processors are branded Pentium Dual-Core or . 80486SX - Introduced April 22, 1991 Pentium and low end branded Celeron; server and Core-based processors are branded Xeon, while desktop and mobile Core-based processors are branded as Core 2. Despite their names, processors sold as Intel® Pentium® processors Core Solo/Core Duo and Core i3/i5/i7 do not actually use the Core ⌂ Processor numbers for the Intel Pentium brand have an alpha prefix followed microarchitecture and are based on the Enhanced Pentium M and newer by a four character numerical sequence. All are desktop energy-efficient Nehalem//Haswell , respectively dual-core processors with TDP that is greater than or equal to 65W.

Penryn microarchitecture ⌂ In Intel's Tick-Tock cycle, the 2007/2008 "Tick" was the shrink of the Core microarchitecture to 45 nanometers as CPUID model 23. ⌂ In Core 2 processors, it is used with the code names (), Wolfdale (LGA 775) and (MCM, LGA 775) Intel® Celeron® processors ⌂ code name "Allendale" with product code 80557 has two cores, 2 MB L2 ⌂ Processor numbers for the Intel® Celeron® brand are expressed with either a cache and uses the desktop socket 775, but has been marketed as Celeron, three digit numerical sequence or a five character sequence with an Pentium, Core 2 and Xeon, each with different sets of features enabled. alphabetical prefix and four digits, depending on the processor type. ⌂ Wolfdale-DP and all quad-core processors except Dunnington QC are multi- chip modules combining two dies.

Intel® Xeon® Processor E3 and E7 families ⌂ The latest Intel® Xeon® processor numbering system is an alpha numeric representation of product line, product family and version. An ‘L’ suffix will be used identify a low power processor. The version number will not be used in the first processor generation. Nehalem microarchitecture ⌂ Released November 17, 2008, built on a and used in the Core i7, Core i5, Core i3 microprocessors. Incorporates the into the CPU die. ⌂ "Nehalem" is a recycled Intel codename and namesake of the Nehalem River.[ ⌂ Nehalem-based microprocessors use higher clock speeds and are more energy-efficient than Penryn microprocessors. Hyper-threading is reintroduced, along with a reduction in L2 cache size, as well as an enlarged L3 cache that is shared by all cores. ⌂ Hyper-threading is reintroduced (Pentium 4 last used this)

Westmere Intel® Xeon® and Intel® Itanium® processors ⌂ formerly Nehalem-C ⌂ Intel® Xeon® and Intel® Itanium® processor numbers are categorized in four ⌂ is the name given to the 32 nm of Nehalem. The first Westmere- digit numerical sequences, and may have an alpha prefix to indicate power based processors were launched on January 7, 2010 by Intel Corporation. and performance. Native six-core ⌂ (, Westmere-EP) and ten-core (Westmere-EX) dual-cores processors, (, Clarkdale)

Sandy Bridge ⌂ targeted a 32 nanometer manufacturing process based on planar double- gate transistors.Intel's subsequent product, codenamed Ivy Bridge, uses a 22 nanometer process. ⌂ The Ivy Bridge die shrink, known in the Intel Tick-Tock model as the "tick", is based on FinFET (non-planar, "3D") tri-gate transistors. ⌂ Intel demonstrated the Ivy Bridge processors in 2011. ⌂ Developed primarily by the Israel branch of Intel, the codename was originally "Gesher" (meaning "bridge" in Hebrew).

Haswell ⌂ The Haswell architecture is specifically designed to optimize the power Intel® Atom™ processors savings and performance benefits from the move to FinFET (non-planar, ⌂ Processor numbers for the Intel® Atom™ processor family are categorized by "3D") transistors on the improved node. a three digit numerical sequence. Network class Intel® Atom™ processors ⌂ Desktop version (LGA 1150 socket): Haswell-DT have an alpha prefix of N, and processors with an alpha prefix of ⌂ Mobile/ version (PGA socket): Haswell-MB Z indicate the processor is for Mobile Internet Devices (MIDs).

PRODUCT LINE/TAG/NUMBER ⌂ A higher number within a processor class or family generally indicates more features, but it may be more of one and less of another. Once you decide on a specific processor brand and type, compare processor numbers to verify the processor includes the features you are looking for.

Intel® Core™ processor ⌂ Processor numbers for the Previous Generation Intel Core processor family have an alpha/numerical identifier followed by a three digit numerical sequence.

Quiz: (PCH) is a family of Intel microchips, introduced circa 2008. It is the successor to the previous , which used a and instead, and first appeared in the . Cougar Point is the codename of a PCH in Intel 6 Series for mobile, desktop, and workstation / server platforms. It is most closely associated with Intel® Core™2 Quad processor Sandy Bridge processors. ⌂ Processor numbers for the Intel® Core™2 Quad family have an alpha prefix Langwell is the codename of a PCH in the Moorestown MID/ platform followed by a four digit numerical sequence. Additionally, low power Intel for Atom Lincroft microprocessors. Core2 Quad processors are identifiable by an "S" suffix which represents The Intel 5 Series chipsets were the first to introduce a PCH. This first PCH is processors having a lower . codenamed Ibex Peak. Langwell is the codename of a PCH in the Moorestown MID/smartphone platform for Atom Lincroft microprocessors. Tiger Point is the codename of a PCH in the Pine Trail platform for Atom Pineview microprocessors. Topcliff is the codename of a PCH in the Queens Bay embedded platform chipset for Atom Tunnel Creek microprocessors. Intel® Core™2 Duo processor Whitney Point is the codename of a PCH in the Oak Trail tablet platform for Atom ⌂ Processor numbers for the Intel® Core™2 processor family brands are Lincroft microprocessors. categorized with an alpha prefix followed by a four digit numerical sequence. Panther Point is the codename of a PCH in Intel 7 Series chipsets for mobile and The table below explains the alpha prefixes used for the Intel Core2 desktop. It is most closely associated with Ivy Bridge processors. processor families. Cave Creek is the codename of the PCH most closely associated with Crystal Forest platforms and Gladden[6] or Sandy Bridge-EP/EN processors. Patsburg is the codename of a PCH in Intel 7 Series chipsets for server and workstation using the LGA 2011 socket. Coleto Creek is the codename of the PCH most closely associated with Highland Forest platforms and Ivy Bridge-EP processors. Lynx Point is the codename of a PCH in Intel 8 Series chipsets, most closely associated with Haswell processors with LGA 1150 socket. Due to launch in 2014, Wellsburg is the codename for the C610 series PCH, planned for the Haswell-EP (Xeon E5-2600 v3) and Broadwell-EP (Xeon E5-2600 v4) processors. FinFET- to describe a nonplanar, double-gate transistor built on an SOI substrate, based on the earlier DELTA (single-gate) transistor design. Silicon on insulator (SOI)- technology refers to the use of a layered silicon- insulator-silicon substrate in place of conventional silicon substrates in semiconductor manufacturing, especially microelectronics, to reduce parasitic device capacitance, thereby improving performance. 2nd generation Intel® Core™ processor family Tualatin-256- These Celeron processors, released initially at 1.2 GHz on 2 October ⌂ Processor numbers¹ for the 2nd generation Intel® Core™ processor family 2001,[14] were based on the Pentium III 'Tualatin' core and made with a 0.13 have an alpha/numerical identifier followed by a four digit numerical micrometer process for the FCPGA 2 . sequence, and may have an alpha suffix depending on the processor. The table below explains the alpha suffixes used for the 2nd generation Intel Core Intel Celeron processor family processor family.

Desktop Laptop Date Code- Code- Date Core releas Core named named released ed

April

1998 January August 1999 Covington (250 nm) 1998 Mendocino (250 nm) February Mendocino (250 nm) March Coppermine (180 nm) 2000 Coppermine (180 nm) 2000 Tualatin (130 nm) April 2002 Tualatin (130 nm) Octobe Northwood (130 nm) June 2002 3rd generation Intel® Core™ processor family Willamette (180 nm) r 2001 Yonah-512 (65 nm) April 2006 ⌂ Processor numbers for the 3rd generation Intel® Core™ processors use an Northwood (130 nm) May Merom (65 nm) January alphanumeric scheme based on generation and product line following the Conroe-L (65 nm) 2002 Penryn (45 nm) 2007 brand and its modifier. The first digit in the four-number sequence indicates Septe September the generation of processor, and the next three digits are SKU numbers. mber 2008 Where applicable, an alpha suffix appears at the end of the processor name, 2002 which represents the processor line. June 4 Pentium M (Yonah) based Xeon 2007 4.1 LV (ULV), "Sossaman" 5 Core-based Xeon June 5.1 Dual-Core Prescott (90 nm) 2004 5.1.1 3000-series "Conroe" Cedar Mill (65 nm) May 5.1.2 3100-series "Wolfdale" 2006 5.1.3 5100-series "Woodcrest" January 5.1.4 5200-series "Wolfdale-DP" 2004 5.1.5 7200-series "Tigerton" Banias (130 nm) August 5.2 Quad-Core and Multi-Core Xeon Dothan (90 nm) 2004 Yonah (65 nm) 5.2.1 3200-series "Kentsfield" April 2006 Merom (65 nm) 5.2.2 3300-series "Yorkfield" January 5.2.3 5300-series "Clovertown" 2007 5.2.4 5400-series "Harpertown" Januar 5.2.5 7300-series "Tigerton" dual y 2008 5.2.6 7400-series "Dunnington" (65 nm) July 2008 Allendale dual (65 nm) August Merom 6 Nehalem-based Xeon dual June 2009 Wolfdale dual (45 nm) 2009 Penryn 6.1 3400-series "Lynnfield" (45 nm) March Clarkdale dual (32 nm) Januar Arrandale 6.2 3400-series "Clarkdale" dual 2010 Jasper single y 2010 Sandy 6.3 3500-series "Bloomfield" (32 nm) March Forest (45 nm) Februa Bridge dual 2011 6.4 5500-series "Gainestown" ry (32 nm) 6.5 C3500/C5500-series "Jasper Forest" 2010 6.6 3600/5600-series "Gulftown" & "Westmere-EP" 6.7 6500/7500-series "Beckton" Dynamic frequency scaling (also known as CPU throttling) is a technique in 6.8 E7-x8xx-series "Westmere-EX" architecture whereby the frequency of a microprocessor can be 7 Sandy Bridge– and Ivy Bridge–based Xeon automatically adjusted "on the fly," either to conserve power or to reduce the 7.1 E3-12xx-series "Sandy Bridge" amount of heat generated by the chip. 7.2 E3-12xx v2-series "Ivy Bridge" is a power management technique in computer 7.3 E5-14xx/24xx series "Sandy Bridge-EN" and E5-16xx/26xx/46xx-series "Sandy architecture, where the voltage used in a component is increased or decreased, Bridge-EP" depending upon circumstances. Dynamic voltage scaling to increase voltage is 7.4 E5-14xx v2/24xx v2 series "Ivy Bridge-EN" and E5-16xx v2/26xx v2/46xx v2 known as overvolting; dynamic voltage scaling to decrease voltage is known as series "Ivy Bridge-EP" undervolting. 7.5 E7-28xx v2/48xx v2/88xx v2 series "Ivy Bridge-EX" The Deschutes core Pentium II (80523), which debuted at 333 MHz in January 8 Haswell-based Xeon 1998, was produced with a 0.25 µm process.[ 8.1 E3-12xx v3-series "Haswell" The original Klamath Pentium II microprocessor (Intel product code 80522) ran at 8.2 E5-16xx/26xx v3-series "Haswell-EP" 233, 266, and 300 MHz and were produced in a 0.35 µm process. An MP-capable version of Paxville DP, codenamed Paxville MP, product code In 1998, the 0.25 μm Deschutes core was utilized in the creation of the Pentium II 80560, was released on 1 November 2005 Overdrive processor, which was aimed at allowing corporate Pentium Pro users to upgrade their aging servers. Combining the Deschutes core in a flip-chip package with a 512 KB full-speed L2 cache chip from the Pentium II Xeon into a - compatible module resulted in a 300 or 333 MHz processor that could run on a 60 or 66 MHz front side bus. Tonga- The 0.25 μm Tonga core was the first mobile Pentium II and had all of the features of the desktop models. Later, in 1999, the 0.25; 0.18 (400 MHz) μm Dixon core with 256 KB of on-die full speed cache was produced for the mobile market. Reviews showed that the Dixon core was the fastest type of Pentium II produced. Intel TeraHertz was Intel's new design for transistors. It uses new materials such as zirconium dioxide which is a superior insulator reducing current leakages. Using zirconium dioxide instead of silicon dioxide, this transistor can reduce the current leakage, and thus reduces power consumption while still working at higher speed and using lower voltages. A translation lookaside buffer (TLB) is a cache that hardware uses to improve virtual address translation speed.[1] The majority of desktop, laptop, and server processors includes one or more TLBs in the memory management hardware, and it is nearly always present in any hardware that utilizes paged or segmented virtual memory. The CPUs codenamed Devil's Canyon, covering the i5 and i7 K-series stock keeping units (SKUs), employ a new and improved thermal interface material (TIM) called next-generation polymer thermal interface material (NGPTIM). 3.1Ghz-Normal CPU clock rate of an Ivy Bridge Corei7 377057 Bonnell is a CPU microarchitecture used by Intel Atom processors which can execute up to two instructions per cycle. Instruction Pipeline is a technique used in the design of computers to increase their instruction throughput (the number of instructions that can be executed in a unit of time). The basic is broken up into a series called a pipeline.

3.4 Dual-Core Xeon 3.4.1 "Paxville DP" 3.4.2 7000-series "Paxville MP" 3.4.3 7100-series "Tulsa" 3.4.4 5000-series "Dempsey"