Intel® Industrial Iot Workshop Security for Industrial Platforms
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Intel® Architecture Instruction Set Extensions and Future Features Programming Reference
Intel® Architecture Instruction Set Extensions and Future Features Programming Reference 319433-037 MAY 2019 Intel technologies features and benefits depend on system configuration and may require enabled hardware, software, or service activation. Learn more at intel.com, or from the OEM or retailer. No computer system can be absolutely secure. Intel does not assume any liability for lost or stolen data or systems or any damages resulting from such losses. You may not use or facilitate the use of this document in connection with any infringement or other legal analysis concerning Intel products described herein. You agree to grant Intel a non-exclusive, royalty-free license to any patent claim thereafter drafted which includes subject matter disclosed herein. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document. The products described may contain design defects or errors known as errata which may cause the product to deviate from published specifica- tions. Current characterized errata are available on request. This document contains information on products, services and/or processes in development. All information provided here is subject to change without notice. Intel does not guarantee the availability of these interfaces in any future product. Contact your Intel representative to obtain the latest Intel product specifications and roadmaps. Copies of documents which have an order number and are referenced in this document, or other Intel literature, may be obtained by calling 1- 800-548-4725, or by visiting http://www.intel.com/design/literature.htm. Intel, the Intel logo, Intel Deep Learning Boost, Intel DL Boost, Intel Atom, Intel Core, Intel SpeedStep, MMX, Pentium, VTune, and Xeon are trademarks of Intel Corporation in the U.S. -
A Superscalar Out-Of-Order X86 Soft Processor for FPGA
A Superscalar Out-of-Order x86 Soft Processor for FPGA Henry Wong University of Toronto, Intel [email protected] June 5, 2019 Stanford University EE380 1 Hi! ● CPU architect, Intel Hillsboro ● Ph.D., University of Toronto ● Today: x86 OoO processor for FPGA (Ph.D. work) – Motivation – High-level design and results – Microarchitecture details and some circuits 2 FPGA: Field-Programmable Gate Array ● Is a digital circuit (logic gates and wires) ● Is field-programmable (at power-on, not in the fab) ● Pre-fab everything you’ll ever need – 20x area, 20x delay cost – Circuit building blocks are somewhat bigger than logic gates 6-LUT6-LUT 6-LUT6-LUT 3 6-LUT 6-LUT FPGA: Field-Programmable Gate Array ● Is a digital circuit (logic gates and wires) ● Is field-programmable (at power-on, not in the fab) ● Pre-fab everything you’ll ever need – 20x area, 20x delay cost – Circuit building blocks are somewhat bigger than logic gates 6-LUT 6-LUT 6-LUT 6-LUT 4 6-LUT 6-LUT FPGA Soft Processors ● FPGA systems often have software components – Often running on a soft processor ● Need more performance? – Parallel code and hardware accelerators need effort – Less effort if soft processors got faster 5 FPGA Soft Processors ● FPGA systems often have software components – Often running on a soft processor ● Need more performance? – Parallel code and hardware accelerators need effort – Less effort if soft processors got faster 6 FPGA Soft Processors ● FPGA systems often have software components – Often running on a soft processor ● Need more performance? – Parallel -
Intel® Quartus® Prime Design Suite Version 18.1 Update Release Notes
Intel® Quartus® Prime Design Suite Version 18.1 Update Release Notes Updated for Intel® Quartus® Prime Design Suite: 18.1.1 Standard Edition Subscribe RN-01080-18.1.1.0 | 2019.04.17 Send Feedback Latest document on the web: PDF | HTML Contents Contents 1. Intel® Quartus® Prime Design Suite Version 18.1 Update Release Notes........................ 3 2. Issues Addressed in Update 1......................................................................................... 4 2.1. Intel Quartus Prime Pro Edition Software.................................................................. 4 2.2. Intel Quartus Prime Standard Edition Software.......................................................... 7 2.3. IP and IP Cores..................................................................................................... 8 2.4. DSP Builder for Intel FPGAs...................................................................................12 2.5. Intel High Level Synthesis Compiler........................................................................12 2.6. Intel FPGA SDK for OpenCL*................................................................................. 13 3. Issues Addressed in Update 2....................................................................................... 15 3.1. Intel Quartus Prime Pro Edition Software.................................................................15 3.2. IP and IP Cores................................................................................................... 15 3.3. Intel FPGA SDK for OpenCL.................................................................................. -
Intel Atom® Processor C3000 Series for Embedded and Iot Applications: Product Brief
Product brief Internet of Things Intel Atom® Processor C3000 Series Expanding Intelligence and Flexibility at the Edge Scalable, dense-compute SoC for demanding IoT workloads From the factory foor to the energy grid, airplanes to supply chains, the sensors, controls, gateways, and other connected devices of Internet of Things (IoT) are driving the next industrial revolution. As IoT continues its explosive growth, the need for intelligent devices for more specialized applications is also growing exponentially. Industrial, energy, aerospace, robotics, public sector, and other customers with demanding IoT workloads want new ways to easily extract value from their data, reduce their time to market, and innovate connected technologies quickly and efciently. Moreover, they increasingly require reliable IoT solutions that bring maximum performance and greater capabilities to an ever-expanding array of challenging locations and operating conditions. The Intel Atom® processor C3000 series extends low-power Intel® architecture into new segments and accelerates IoT innovation across a wide range of demanding environments and use cases. With high performance per watt, low thermal design power (TDP) of 9.5W, and up to 20 confgurable high-speed input/output (HSIO) lanes, and pin-to-pin compatibility, this new system-on-a-chip (SoC) family delivers next-generation, multicore performance and scalability for a broad variety of low-power, high-density, and fanless designs. Multicore scalability With the Intel Atom processor C3000 series, customers are able to scale performance and achieve workload consolidation in situations and use cases that uP to require very low power, high density, and high I/O integration. Designed in an FCBGA 34mm x 28mm compact form factor, this SoC-based CPU is manufactured on Intel’s optimized 14nm process technology, available from 2 to 12 cores from 2.3X 1.6 to 2.0 GHz, and includes up to 256 GB DDR4 2133 MHz ECC (SODIMM, UDIMM, better PerforMANce or RDIMM) of addressable memory. -
Demystifying Internet of Things Security Successful Iot Device/Edge and Platform Security Deployment — Sunil Cheruvu Anil Kumar Ned Smith David M
Demystifying Internet of Things Security Successful IoT Device/Edge and Platform Security Deployment — Sunil Cheruvu Anil Kumar Ned Smith David M. Wheeler Demystifying Internet of Things Security Successful IoT Device/Edge and Platform Security Deployment Sunil Cheruvu Anil Kumar Ned Smith David M. Wheeler Demystifying Internet of Things Security: Successful IoT Device/Edge and Platform Security Deployment Sunil Cheruvu Anil Kumar Chandler, AZ, USA Chandler, AZ, USA Ned Smith David M. Wheeler Beaverton, OR, USA Gilbert, AZ, USA ISBN-13 (pbk): 978-1-4842-2895-1 ISBN-13 (electronic): 978-1-4842-2896-8 https://doi.org/10.1007/978-1-4842-2896-8 Copyright © 2020 by The Editor(s) (if applicable) and The Author(s) This work is subject to copyright. All rights are reserved by the Publisher, whether the whole or part of the material is concerned, specifically the rights of translation, reprinting, reuse of illustrations, recitation, broadcasting, reproduction on microfilms or in any other physical way, and transmission or information storage and retrieval, electronic adaptation, computer software, or by similar or dissimilar methodology now known or hereafter developed. Open Access This book is licensed under the terms of the Creative Commons Attribution 4.0 International License (http://creativecommons.org/licenses/by/4.0/), which permits use, sharing, adaptation, distribution and reproduction in any medium or format, as long as you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons license and indicate if changes were made. The images or other third party material in this book are included in the book’s Creative Commons license, unless indicated otherwise in a credit line to the material. -
Intel Atom® P5900 Processors for 5G Network Edge Acceleration
PRODUCT BRIEF | Intel Atom® P5900 Processors ADVANCED PERFORMANCE FOR 5G WIRELESS BASE STATIONS As the radio access network (RAN) infrastructure of wireless carriers evolves to meet the intense demands of 5G, additional compute is required at the edge of the network. Careful consideration is critical across the board—from overarching design down to the selection of key components in base transceiver station equipment—for 5G networks to reliably meet the demands of next-generation service opportunities with lower latencies, higher bandwidth, and increased network capacity. RAN INFRASTRUCTURE EVOLUTION Intel has never had a stronger or more comprehensive portfolio of solutions to enable the RAN. From Intel® Xeon® Scalable processors to Intel Atom® processors, FPGAs, ASICS, and more, Intel continues to deliver cutting-edge hardware for 5G infrastructure. Even so, it’s our significant investments in software that enable service providers to make the most of our hardware, from drivers and operating systems up through entire production-quality software stacks. This interconnected platform of hardware and software allows service providers to get to market quickly while still offering the flexibility needed to address various deployment scenarios. Furthermore, with the increasing adoption of innovations found in cloud deployments, service providers are realizing the benefits of extending a platform combining common cloud software with Intel® architecture-based hardware from the core to the edge. A common software ecosystem for platform virtualization and customer applications—using a common Intel instruction set architecture across the infrastructure—enables faster deployment of new software and features while also making new service offerings and revenue models possible. PRODUCT BRIEF | Intel Atom® P5900 Processors AN EXCITING NEW CLASS OF EDGE PROCESSORS Intel Atom P5900 processors are the first of an all-new class of high-throughput, low-latency Intel Atom P processors for high-density network edge and security solutions. -
(10) Patent No.: US 9037807 B2
US009037807B2 (12) United States Patent (10) Patent No.: US 9,037,807 B2 Vorbach (45) Date of Patent: May 19, 2015 (54) PROCESSOR ARRANGEMENT ON A CHIP Sep. 17, 2001 (DE) .................................. 101 45 792 INCLUDING DATA PROCESSING, MEMORY, Sep. 17, 2001 (DE) ... ... 101 45795 AND INTERFACE ELEMENTS Sep. 19, 2001 (DE) .................................. 101 46132 Sep. 30, 2001 (WO). ... PCT/EPO1/11299 (75) Inventor: Martin Vorbach, Munich (DE) Oct. 8, 2001 (WO) ....................... PCT/EPO1/11593 Nov. 5, 2001 (DE) .................................. 101 54. 259 (73) Assignee: srecinologies AG, Nov. 5, 2001 (DE) ... ... 101 54 260 Dec. 14, 2001 (EP) ..................................... O1129923 (*) Notice: Subject to any disclaimer, the term of this Jan. 18, 2002 (EP) ..................................... O2OO1331 patent is extended or adjusted under 35 Jan. 19, 2002 (DE). 102 O2 044 U.S.C. 154(b) by 0 days. Jan. 20, 2002 (DE) 102 O2 175 Feb. 15, 2002 (DE) 102 O2 653 (21) Appl. No.: 12/944,068 Feb. 18, 2002 (DE) ... ... 102 O6856 Feb. 18, 2002 (DE) ... ... 102 O6857 (22) Filed: Nov. 11, 2010 Feb. 21, 2002 (DE) ... ... 102 O7 224 Feb. 21, 2002 (DE) ... ... 102 O7 225 (65) Prior Publication Data Feb. 21, 2002 (DE) .................................. 102 O7 226 US 2011 FOO60942 A1 Mar. 10, 2011 (51) Int. Cl. O O G06F 3/4 (2006.01) Related U.S. Application Data G06F II/20 (2006.01) (60) Division of application No. 12/496.012, filed on Jul. 1, G06F 3/16 (2006.01) 2009, now abandoned, which is a continuation of G06F 12/00 (2006.01) application No. 10/471.061, filed as application No. -
Intel® Stratix® 10 General Purpose I/O User Guide
Intel® Stratix® 10 General Purpose I/O User Guide Updated for Intel® Quartus® Prime Design Suite: 21.2 Subscribe UG-S10GPIO | 2021.07.07 Send Feedback Latest document on the web: PDF | HTML Contents Contents 1. Intel® Stratix® 10 I/O Overview..................................................................................... 4 1.1. Intel Stratix 10 I/O and Differential I/O Buffers..........................................................5 1.2. Intel Stratix 10 I/O Migration Support...................................................................... 6 2. Intel Stratix 10 I/O Architecture and Features............................................................... 8 2.1. I/O Standards and Voltage Levels in Intel Stratix 10 Devices....................................... 8 2.1.1. Intel Stratix 10 I/O Standards Support......................................................... 9 2.1.2. Intel Stratix 10 I/O Standards Voltage Support............................................ 10 2.2. I/O Element Structure in Intel Stratix 10 Devices..................................................... 12 2.2.1. I/O Bank Architecture in Intel Stratix 10 Devices..........................................13 2.2.2. I/O Buffer and Registers in Intel Stratix 10 Devices...................................... 14 2.3. Programmable IOE Features in Intel Stratix 10 Devices............................................. 15 2.3.1. Programmable Output Slew Rate Control.....................................................17 2.3.2. Programmable IOE Delay......................................................................... -
Product Change Notification
Product Change Notification Change Notification #: 117176 - 00 Change Title: Intel® Stratix® 10, PCN 117176-00, Documentation, Intel® Stratix® 10 Device Datasheet Update Date of Publication: September 27, 2019 Key Characteristics of the Change: Documentation Forecasted Key Milestones: September 27, 2019 Availability of Intel Stratix 10 device datasheet update: Description of Change to the Customer: Intel’s Network & Custom Logic Group (formerly known as the Programmable Solutions Group) is notifying customers of an important documentation update for Intel Stratix® 10 devices. It is necessary to update the datasheet with the new specifications, as the previous specifications were determined to be inaccurate. There is no change to the Intel® Stratix 10 product silicon and materials. Please review the revision history in the Intel Stratix 10 device datasheet for the complete history of updates. The Intel Stratix 10 device datasheet can be found here: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/stratix-10/s10_datasheet.pdf Customer Impact of Change and Recommended Action: Customers are requested to take note of the changes and determine the impact on their designs. For more information, please contact your local Field Applications Engineer (FAE) or submit a Service Request at the My Intel support page. Products Affected / Intel Ordering Codes: All Intel Stratix 10 devices. The list of affected part numbers (OPNs) can be downloaded in Excel form: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/pcn/adv1915-opn-list.xlsx PCN Revision History: Date of Revision: Revision Number: Reason: September 27, 2019 00 Originally Published PCN Page 1 of 2 PCN #117176 - 00 Product Change Notification 117176 - 00 INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. -
Intel Atom Processor E3800 Product Families in Retail
White Paper Intelligent Systems Intel® Celeron® Processor and Intel® Atom™ Processor E3800 Product Families Intel® Celeron® Processor and Intel® Atom™ Processor E3800 Product Families in Retail Transform user experiences in entry retail devices with full HD video decode, improved graphics, quad-core compute performance, and built-in security Introduction Advanced features include: Intelligent devices that provide HD • Media: Scalable full HD video playback video capability, compelling graphics, includes support for 10 or more responsive performance, and security are simultaneous video streams. transforming in-store retail experiences. • Graphics: Gen 7 Intel® Graphics Today’s retail customers expect POS Architecture enables enhanced visual systems, interactive kiosks, and digital processing over previous-generation signs to support rich media and graphics Intel Atom processors. experience for timely and visually compelling digital promotions and a range • Power and Form Factor: SoC with of choices at checkout, with confidence smaller package size and industrial “The Intel Celeron processor and that the device provides security to temperature range is ideal for thin, protect transactional and personal data. light and environmentally adaptive Intel Atom processor E3800 entry retail devices. The Intel® Celeron® processor and Intel® product families provide full Atom™ processor E3800 product families • Compute: Quad-core processing1 HD simultaneous video decode for intelligent systems help bring these enables improved out-of-order compute capabilities to entry retail devices. performance for more responsive user capability, delivering interactive Compared to previous-generation Intel experiences. Celeron and Atom processors, this new 2-D and 3-D graphics with much • Security: Built-in hardware-assisted processor family provides significantly security enhancements include Intel® improved playback enabling improved media and graphics performance AES New Instructions (Intel® AES NI)2 and enables smaller, more power-efficient immersive visual experiences and Secure Boot. -
Intel® Atom™ Processor E3800 the Latest Low Power Platform E3800 Family Platform for Intelligent Systems
Intel® Atom™ Processor E3800 The Latest Low Power Platform E3800 Family Platform for Intelligent Systems tŚŝůĞĚĞƐŝŐŶĞĚƚŽďĞĂƚƌƵĞƚĞƐƚŽĨ/ŶƚĞů͛ƐƉĞƌĨŽƌŵĂŶĐĞŝŶƚŚĞƵůƚƌĂŵŽďŝůĞƐƉĂĐĞ͕^ŝůǀĞƌŵŽŶƚŝƐƚŚĞĮƌƐƚƚƌƵĞĂƌĐŚŝƚĞĐƚƵƌĞ ƵƉĚĂƚĞƚŽ/ŶƚĞů͛ƐƚŽŵƉƌŽĐĞƐƐŽƌƐŝŶĐĞŝƚƐŝŶƚƌŽĚƵĐƟŽŶŝŶϮϬϬϴ͘>ĞǀĞƌĂŐŝŶŐ/ŶƚĞů͛ƐĮƌƐƚϮϮŶŵƉƌŽĐĞƐƐĂŶĚĂǀĞƌLJůŽǁƉŽǁĞƌͲ ŵŝĐƌŽĂƌĐŚŝƚĞĐƚƵƌĞ͕^ŝůǀĞƌŵŽŶƚĂŝŵƐƐƋƵĂƌĞůLJĂƚƚŚĞůĂƚĞƐƚ<ƌĂŝƚĐŽƌĞƐĨƌŽŵYƵĂůĐŽŵŵĂŶĚZD͛ƐŽƌƚĞdžϭϱ͘ĂƐĞĚŽŶ ^ŝůǀĞƌŵŽŶƚ͕/ŶƚĞůΠŝŶƚƌŽĚƵĐĞƐϯϴϬϬƉƌŽĚƵĐƚĨĂŵŝůLJ͕ĂƐĞƌŝĞƐŽĨƐLJƐƚĞŵŽŶĐŚŝƉ;^ŽͿĚĞƐŝŐŶĞĚĨŽƌůŽǁͲƉŽǁĞƌ͕ĨĞĂƚƵƌĞͲƌŝĐŚ ĂŶĚŚŝŐŚůLJͲĐĂƉĂďůĞĂƉƉůŝĐĂƟŽŶƐ͘ ϯϴϬϬƉƌŽĚƵĐƚĨĂŵŝůLJƚĂŬĞƐƵƉƚŽĨŽƵƌ^ŝůǀĞƌŵŽŶƚĐŽƌĞƐ͕ĂŶĚĨŽƌƚŚĞĮƌƐƚƟŵĞŝŶĂŶƵůƚƌĂŵŽďŝůĞ/ŶƚĞů^Ž͕ŝƐƉĂŝƌĞĚǁŝƚŚ /ŶƚĞů͛ƐŽǁŶŐƌĂƉŚŝĐƐ/W͘/ŶŽƚŚĞƌǁŽƌĚƐ͕ƌĂƚŚĞƌƚŚĂŶƵƐŝŶŐĂ'WhďůŽĐŬĨƌŽŵ/ŵĂŐŝŶĂƟŽŶdĞĐŚŶŽůŽŐŝĞƐ͕E3800 product family leverages the same GPU architecture as the 3rdŐĞŶĞƌĂƟŽŶ/ŶƚĞůŽƌĞƉƌŽĐĞƐƐŽƌƐ;ĐŽĚĞŶĂŵĞĚ/ǀLJƌŝĚŐĞͿ͘ Silvermont Core Highlights Better Performance Better Power Efficiency 22nm Architecture 200 250 150 300 100 350 50 400 0 450 500 Out-of-order execuon engine Wider dynamic operang range 3D Tri-gate transistors tuned for New mul-core and system fabric Enhanced acve and idle power SoC products architecture management Architecture and design co-opmized with the process New IA instrucons extensions (Intel Core Westmere Level) Bay Trail: Not just for Atoms anymore E3800 product family combines a CPU based on Intel’s new Silver- mont architecture with a GPU that is architecturally similar to (but 4xPCIe* less powerful than) the HD 4000 graphics engine integrated in the 3rdŐĞŶĞƌĂƟŽŶ/ŶƚĞůΠŽƌĞƉƌŽĐĞƐƐŽƌƐůĂƵŶĐŚĞĚŝŶĞĂƌůLJϮϬϭϮ͘dŚĞƐĞ -
CHERI Concentrate: Practical Compressed Capabilities
1 CHERI Concentrate: Practical Compressed Capabilities Jonathan Woodruff, Alexandre Joannou, Hongyan Xia, Anthony Fox, Robert Norton, Thomas Bauereiss, David Chisnall, Brooks Davis, Khilan Gudka, Nathaniel W. Filardo, A. Theodore Markettos, Michael Roe, Peter G. Neumann, Robert N. M. Watson, Simon W. Moore Abstract—We present CHERI Concentrate, a new fat-pointer compression scheme applied to CHERI, the most developed capability-pointer system at present. Capability fat pointers are a primary candidate to enforce fine-grained and non-bypassable security properties in future computer systems, although increased pointer size can severely affect performance. Thus, several proposals for capability compression have been suggested elsewhere that do not support legacy instruction sets, ignore features critical to the existing software base, and also introduce design inefficiencies to RISC-style processor pipelines. CHERI Concentrate improves on the state-of-the-art region-encoding efficiency, solves important pipeline problems, and eases semantic restrictions of compressed encoding, allowing it to protect a full legacy software stack. We present the first quantitative analysis of compiled capability code, which we use to guide the design of the encoding format. We analyze and extend logic from the open-source CHERI prototype processor design on FPGA to demonstrate encoding efficiency, minimize delay of pointer arithmetic, and eliminate additional load-to-use delay. To verify correctness of our proposed high-performance logic, we present a HOL4 machine-checked proof of the decode and pointer-modify operations. Finally, we measure a 50% to 75% reduction in L2 misses for many compiled C-language benchmarks running under a commodity operating system using compressed 128-bit and 64-bit formats, demonstrating both compatibility with and increased performance over the uncompressed, 256-bit format.