Accurate Throughput Prediction of Basic Blocks on Recent Intel Microarchitectures Andreas Abel and Jan Reineke Saarland University Saarland Informatics Campus Saarbrücken, Germany abel,
[email protected] ABSTRACT been shown to be relatively low; Chen et al. [12] found that Tools to predict the throughput of basic blocks on a spe- the average error of previous tools compared to measurements cific microarchitecture are useful to optimize software per- is between 9% and 36%. formance and to build optimizing compilers. In recent work, We have identified two main reasons that contribute to several such tools have been proposed. However, the accuracy these discrepancies between measurements and predictions: of their predictions has been shown to be relatively low. (1) the microarchitectural models of previous tools are not In this paper, we identify the most important factors for detailed enough; (2) evaluations were partly based on un- these inaccuracies. To a significant degree these inaccura- suitable benchmarks, and biased and inaccurate throughput cies are due to elements and parameters of the pipelines of measurements. In this paper, we address both of these issues. recent CPUs that are not taken into account by previous tools. In the first part, we develop a pipeline model that is signif- A primary reason for this is that the necessary details are icantly more detailed than those of previous tools. It is appli- often undocumented. In this paper, we build more precise cable to all Intel Core microarchitectures released in the last models of relevant components by reverse engineering us- decade; the differences between these microarchitectures can ing microbenchmarks.