Section D2: The Common-Emitter

As stated in the introduction, we are going to concentrate on the circuits that use the linear region of BJT operation, as defined in the conditions assumed for the small-signal model. These single-stage are the simplest circuits that allow the BJT to provide voltage and/or current .

Always keep in mind that the total voltage and current are composed of a dc component and an ac component. For the small-signal model to apply, the transistor must stay in the normal active mode for the entire range of input signals (please review Section C2 for details). The dc voltages and current that characterize the bias conditions must be defined such that the transistor stays in normal active mode for all expected input signals.

A generic common-emitter (CE) amplifier circuit is shown to the right (this is a modified representation of Figure 5.1a in your text). If you compare this circuit to Figure 4.12a in Section C.5, the only difference is that the dc source, VEE, has been set to zero. This actually makes things a little simpler, since the dc analysis only involves a single source. The capacitors are open circuits for dc, so the input and output are removed for dc bias calculations, yielding the dc bias circuitry of Figure 4.13.

As we discussed earlier, the bypass capacitor (CE) and coupling capacitors (CB and CC) are large enough that they may considered short circuits for the frequency range of input signals. Using this information, the ac small-signal model for the common-emitter circuit is shown to the right (note that this is the same as Figure 5.1b of your text, merely represented as a slightly different graphic.) If you compare this with the hybrid-π model of Figure 4.5, the output resistance rO has been left out. This is often a valid assumption since rO is much greater than RC or RL (recall that equivalent resistances for parallel combinations are dominated by the smaller resistance values), and vout=œβib(RC||RL). However (major life hint), if this is not the case, rO would be placed in parallel with RC and RL and vout would be calculated by œ βib(rO||RC||RL).

A powerful tool in the design and/or analysis of BJT amplifiers is gained by realizing that, although the input (base-emitter side) and output (collector- emitter side) are coupled, operations may be performed on the two sides separately. The coupling of the input and output occurs through the dependent and is achieved either through the (gm) or the gain term β, depending on whether you‘re dealing with vbe or ib on the input side. Figure 5.1c, modified and reproduced to the right, illustrates this separation.

We‘re going to use this representation extensively in the development of amplifier characteristics. A modified version of Figure 5.2, given to the right, illustrates the small signal amplifier circuit in terms of a two-port network, where everything after the input signal and before the load is shown as a —black-box“ with amplifier characteristics Rin and Rout calculated by looking into the input and output respectively.

Note: Although this figure is shown with purely resistive input and output characteristics, occasions may arise where these parameters are complex values. Don‘t let this throw you, the process is the same but life gets a little more complicated and we will be dealing with Zin and Zout.

We‘re going to be developing expressions for the input resistance Rin, the output resistance Rout, the current gain Ai, and the voltage gain Av for each of the single-stage amplifier configurations. The procedure is the same for each configuration, so (I‘m sure you will be crushed) any extensive derivations will be limited to this first case as much as possible.

Input Resistance, Rin

By comparing Figures 5.1c and 5.2 above, we can see that the input resistance is the equivalent resistance of the input side of the circuit —looking in“ after the source. This gives us RB in parallel with rπ, or

RB rπ Rin = RB || rπ = . (Equation 5.5) RB + rπ

Note that your text derives this equation in a slightly different manner, but ends up the same place.

OK, back in section C3 I promised that impedance reflection would come back. To refresh your memory, impedance reflection is a tool that allows us to —see“ an equivalent resistance by looking into the base or emitter. Specifically, if a resistance is in the emitter, it —looks“ β times larger to the base. Alternatively, a resistance in the base, —looks“ β times smaller to the emitter.

β r = βr = π e g m (Equation 4.14: Modified) r r = π = g r e β m π

Heads up… the relationships given in the equation above are assuming that β >> 1, so that β+1 is approximately equal to β. If this is not the case, the technique still works but β must be replaced with β+1.

Using the relationship between re and rπ, we may express the input resistance in terms of the emitter resistance:

R β r R r R = B e = B e . (Equation 5.6) in R RB + β re B + r β e

Output Resistance, Rout

We use the same strategy to derive an expression for the output resistance, but now we‘re looking into the output side before the load , as illustrated in Figure 5.2 above.

Referring back to Figure 5.1a, we can see that the output resistance for this particular configuration is simply RC (it‘s the only thing left on the output side), so

Rout = RC . (Equation 5.14: Modified)

There are a couple of points that need noting however:

As stated by your author, we are formally finding the Thevenin equivalent resistance. However, if the independent source is set to zero, the dependent source is also zero (if vin=0, ib=0, and βib=0), so the simplified strategy above is valid. Be very careful to be sure that rO can be neglected! If rO is on the same order of magnitude as RC, it must be included in the small-signal model and the output resistance will be

Rout = rO || RC . (Equation 5.14: Modified)

Current Gain, Ai

By convention, gain terms are denoted by the symbol ”A‘ with a subscript that defines the particular gain of interest. Specifically, subscripts ”i‘, ”v‘, and ”p‘ indicate current, voltage and power, respectively. Also, gain refers to the ratio of the relevant output quantity over the relevant input quantity.

Using this information, the current gain is defined as the output current (the load current in the figures above) over the input current, or

iL Ai = . (Equation 5.7) iin

The load current is a portion of the collector current (ic=βib) and may be expressed in terms of circuit components using current division:

− RC β ib iL = (Equation 5.9) RL + RC

Note that the negative sign is introduced in Equation 5.9 because of the defined current directions for iL and βib. Similarly, the base current may be expressed as a portion of the input current using current division:

RBiin ib = . (Equation 5.8) RB + rπ which allows us to get an expression for iin in terms of ib:

(RB + rπ )ib iin = . RB

Using the expressions for iL and iin in Equation 5.7:

≈ ’ − RC βib ∆ ÷ i « R + R ◊ − R R β A = L = L C = B C , i ≈ ’ iin (RB + r )ib (RB + rπ )(RL + RC ) ∆ π ÷ « RB ◊ or, by factoring β out of the numerator and rearranging,

− R R − R R A = B C = B C , (Equation 5.10: Modified) i ≈ R r ’ ≈ R ’ ∆ B + π ÷(R + R ) ∆ B + r ÷(R + R ) « β β ◊ L C « β e ◊ L C where, once again, if β is not much larger than one, all β terms become β+1.

Voltage Gain, Av

The voltage gain is defined as the ratio of the output voltage to the input voltage. By using Ohm‘s law and recognizing the current gain ratio, Av becomes:

≈ ’≈ ’ vout iL RL ∆ iL ÷∆ RL ÷ RL Av = = = ∆ ÷∆ ÷ = Ai (Equations 5.11 and 5.12) vin iin Rin « iin ◊« Rin ◊ Rin

Using the relationships defined for Rin (Equation 5.6) and Ai (Equation 5.10), the voltage gain expression may be derived as follows:

≈ ’ ∆ ÷ ∆ ÷ ≈ ’ ≈ R ’ ∆ ÷∆ ÷ − R R R ∆ B + r ÷ − R R ∆ R ÷ B C L « β e ◊ A = ∆ B C ÷ L = . v ∆ ≈ R ’ ÷∆ ≈ ’ ÷ ≈ R ’ ∆ B r ÷(R R ) ∆ ÷ ∆ B r ÷(R R )(R r ) ∆ + e L + C ÷ ∆ R r ÷ + e L + C B e « « β ◊ ◊∆ ∆ B e ÷ ÷ « β ◊ R ∆ ∆ B + r ÷ ÷ « « β e ◊ ◊

Whew! Still looks pretty ugly, huh? Well, after canceling out a whole bunch of stuff, recognizing a parallel resistance relationship, and recalling that 1/re=gm, we get

− RC RL − RC || RL Av = = = −g m (RL || RC ) . (Equation 5.13) (RL + RC )re re

So, the voltage gain does not exhibit any β dependencies and is a straightforward relationship depending upon circuit components and the transconductance of the BJT.

A word of caution: These are the standard techniques for developing expressions for current and voltage gain based on Figure 5.2, however, you must be careful to include all relevant components in the expressions for Rin, iin and iL.

Finally, your author develops the gain impedance formula in this portion of your text. This relationship allows us to express the voltage gain (or current gain) in terms of the load and amplifier input characteristics. Since this relationship does not depend on specific circuit element values, it is a generalized relationship that may be used throughout our studies.

Gain Impedance Formula

We have defined the voltage gain, Av, as the ratio of the output voltage to the input voltage and the current gain, Ai, as the ratio of the output current (load current) to the input current:

vout iL Av = , Ai = . (Equation 5.3) vin iin

Using Ohm‘s law to express the input and output voltages as the product of appropriate currents and resistances,

vin = iin Rin , vout = iL RL , (Equation 5.1) and substituting into the expression for voltage gain,

≈ ’ vout iL RL ∆ iL ÷ RL RL Av = = = ∆ ÷ = Ai , (Equation 5.4) vin iin Rin « iin ◊ Rin Rin the equation for the gain impedance formula may be derived. An alternate expression may be found by rearranging Equation 5.4 as

Rin Ai = Av . RL

Power Gain, Ap

This gain term is not specifically defined in your text, but many times may be a relevant figure of merit for amplifier design. Just as power is defined as voltage times current, power gain may be defined as voltage gain times current gain, or

Ap = Av Ai .

This relationship holds true for all configurations of single and multi-stage amplifiers.

PLEASE NOTE!!!

1. Your author uses two separate notations for the input signal to an amplifier circuit, both of which are shown in the figures below. These are absolutely equivalent!

In the figure on the left, a source voltage (vsource) with an associated source resistance (Rsource) is the applied signal. The input to the circuit (vin) is the result of the voltage divider (keeping everything in terms of resistances to simplify the math):

Rckt vsource vin = . Rckt + Rsource

The figure on the right is the illustration of a direct application of vin, wherever it comes from! It may be that we are assuming an ideal source (Rsource=0, vin=vsource), or that the voltage division has already taken place.

Don‘t let this give you heartburn!

For consistency, I have modified some of the text‘s figures to conform to the representation of the figure on the right (notation will be made in the discussion when this happens). Just keep in mind what‘s going on and don‘t let it throw you when a practical source is thrown in the pot… the most important thing to remember is that whenever the input (vin) is set to zero to calculate a characteristic, we will have RSource in parallel with RB instead of just RB.

If you draw the equivalent circuits, this will be obvious!

2. A couple of things to watch for in design and/or analysis as we get into more realistic behaviors:

We will no longer be assuming that the saturation and cutoff regions are negligible. To ensure that we stay in the active region, we will be deducting 5% to account for each of these regions. For example, if a design is for maximum swing (Q- point in the center of the ac ), the multiplier will now be 1.8 = (90% )(2.0) instead of 2 for the maximum symmetric output voltage; i.e. for the CE, ER, & CB configurations, Vopp=1.8|ICQ|(RC||RL) instead of Vopp=2|ICQ|(RC||RL) that we were using before. Unless otherwise specified, implicitly or explicitly, design solutions are accomplished using the ICQ in the center of the ac load line to ensure maximum possible output swing. If values are not predefined, use RC=RL in the CE, ER, and CB configurations and RE=RL in the CC (EF) configuration (ref: Example 5.3). Design for bias stability is still RB=0.1βRE. All dc bias relationships and considerations used in the previous section still hold.