ESE319 Introduction to Microelectronics

Common Emitter BJT Amplifier Design Current Mirror Design

2008 Kenneth R. Laker (based on P. V. Lopresti 2006) update 29Sep08 KRL 1 ESE319 Introduction to Microelectronics Some Random Observations ● Conditions for stabilized voltage source biasing

● Emitter resistance, RE, is needed.

● Base voltage source will have finite resistance, RB.

● 1 R E needs to be much larger than RB.

● Small RB - relative to RS - will attenuate input signal.

● Larger RE permits larger RB, but results in lower gain.

● Gain = -RC/RE for RE >> re.

● Split RE with bypassing increases gain. ● Requires large bypass capacitor.

● Limiting case - entire RE bypassed: Gain = - gmRC. ● Simplified rule-of-thumb biasing is adequate.

2008 Kenneth R. Laker (based on P. V. Lopresti 2006) update 29Sep08 KRL 2 ESE319 Introduction to Microelectronics Conflicting Bias and Gain Issues

● Biasing

● If RB is small relative to  1    R E , VB and RE determine IE and, ap-

proximately, IC. Stable bias => RE large and high gain => RE small. ● Gain

● Want gain magnitude RC/RE to be “large.” This implies a ”small” RE. ● Gain-bias interaction

● Want RB to be large relative to RS, while still small relative to 1 R . (i.e. choose R ≥ 10R and 1 R ≥ 10 R )   E B S   E B

● Want VCG = VCC – ICRC to be roughly at mid-point between the VCC

and the emitter bias voltage, or “1/3, 1/3, 1/3” rule. RC determines bias and gain.

2008 Kenneth R. Laker (based on P. V. Lopresti 2006) update 29Sep08 KRL 3 ESE319 Introduction to Microelectronics

Design Example

Design an amplifier to meet the following specifications:

Electrical specifications: Minimize cost: v =0.1V pk 1. Minimize bypass capacitors sig−max 2. Use standard 5% resistors

RS=50

VCC=12V 0CT40C Requires simulation to verify.

vsig max More typical gain spec: A = − ≈10 @ midband ∣ V∣ v 9 ≤ |A | ≤ 11 ∣ out −max∣ V

2008 Kenneth R. Laker (based on P. V. Lopresti 2006) update 29Sep08 KRL 4 ESE319 Introduction to Microelectronics

Design Step 1 (Choose R and R ) B E

Choose an RB >> 10RS:

RB≈5000 vout 1 R   E must be ≥ 10RB:

10⋅5000 R ≈ =500 E 100 Nearest standard size*: 470 ≈100 RE=470

*RCA Lab: http://www.ese.upenn.edu/rca/components/passive/listcomponents.html#resistors

2008 Kenneth R. Laker (based on P. V. Lopresti 2006) update 29Sep08 KRL 5 ESE319 Introduction to Microelectronics Design Step 2 (Set R ) C For a gain of about -10:

RC=10 RE=4.7k 

vout Nearest standard size*:

RC=4.7k 

470 SPEC: vsig−max=0.1V pk For a gain of -10, the collector voltage v swings 1 V maximum, out =100 RB=R1∥R2=5k  so the collector resistor bias drop

RE=470 could “in principle” be as little as 1 V.

2008 Kenneth R. Laker (based on P. V. Lopresti 2006) update 29Sep08 KRL 6 ESE319 Introduction to Microelectronics Design Step 3 (Set bias point neglecting I ) B Recall v = 0.1 V pk sig-max We have plenty of room - 4.7 k choose the collector drop vout conservatively to allow for bias point changes with temperature – let's use: 470 V V CC 4.7V RC≈ = Thus: 3 I 4.7 4700 1mA. =100 RB=5k  C = / = And (ignoring I ): RE=470 RC=4.7k  B

V BG=I C RE0.7=0.470.7=1.17V.

2008 Kenneth R. Laker (based on P. V. Lopresti 2006) update 29Sep08 KRL 7 ESE319 Introduction to Microelectronics Design Step 4 (Set R and R ) 1 2

Recall: 4.7 k R2 vout RB=R1∥R2=R1 =5k  R1R2 And: 470 R2 V BG= VCC=1.17V R1R2 Or: R 5k =100 B=  R V 1.17 2 = BG = =0.098≈0.1 R R V 12 RE=470 RC=4.7k  1 2 CC

2008 Kenneth R. Laker (based on P. V. Lopresti 2006) update 29Sep08 KRL 8 ESE319 Introduction to Microelectronics Design Step 4 cont. (Set R and R ) 1 2 Substituting:

R2 R1∥R2=R1 =R1⋅0.1=5k  R1R2 4.7 k R =50 k vout 1

Standard size: R1=47k  470 R Finally: 2 =0.1 47 kR2

0.9 R2=0.147k⇒ R2=5222 =100 RB=4.6 k Standard size: R =5.1k  R =470 R =4.7k  2 E C Revised R : B 47k5.1k NOTE: 1 R ≈47 k  ≥ 10 R =46 k  R =R ∥R = =4.6 k  E B B 1 2 52.1k 2008 Kenneth R. Laker (based on P. V. Lopresti 2006) update 29Sep08 KRL 9 ESE319 Introduction to Microelectronics Design Step 5 (set C ) - Close to the Finish! B RB in parallel with rbg => RB dominates. I C=1mA =100 Estimate R as 4.2 k  . Coupling ca- 4.7 k in r =2.5k  47 k pacitor, then, should be about 420  at vout 20 Hz. 10 1 C 5.1 k 420 B ≥ 470 2 f R C b  min B ˙−4 R 1 1.1910 in C ≥ = ≈19 F B 420⋅2 20 2 Estimate R : in Using the RCA Lab Component 47 F 47 F r bg=r 1RE≈50 k List C = B Ri n=R2∣∣R1∣∣r bg=RB∣∣r bg≈4.2 k C B=23.5 F or 47 F

2008 Kenneth R. Laker (based on P. V. Lopresti 2006) update 29Sep08 KRL 10 ESE319 Introduction to Microelectronics

Final Design

4.7 k 47 k 23.5 uF vout

5.1 k 470

2008 Kenneth R. Laker (based on P. V. Lopresti 2006) update 29Sep08 KRL 11 ESE319 Introduction to Microelectronics

Multisim Simulation

20 Hz Gain

Actual |AV| = 9.3

1 Khz Gain

2008 Kenneth R. Laker (based on P. V. Lopresti 2006) update 29Sep08 KRL 12 ESE319 Introduction to Microelectronics

Multisim Oscilloscope Plots

2008 Kenneth R. Laker (based on P. V. Lopresti 2006) update 29Sep08 KRL 13 ESE319 Introduction to Microelectronics Discussion

1. We neglected re. Including the internal emitter resistance, the simulated gain becomes:

RC 4700 AV=− =− =−9.5 REr e 47025 2. There is some attenuation of the signal voltage at the base. A more accurate calculation of the input attenuation:

Rin 4200 Rin=RB∥r bg =4.2k ⇒ vbg≈ = vsig=0.988vsig RinRS 4250 Multiplying the two quantities: G=−9.5⋅0.988=−9.4 Close to 9.3! This fine-tuning of the estimate may be all that not helpful – since we will be using 5% components to build the circuit!

2008 Kenneth R. Laker (based on P. V. Lopresti 2006) update 29Sep08 KRL 14 ESE319 Introduction to Microelectronics

Common Emitter Amplifier - Current Source Biasing

1. The current mirror sets IE (IC).

2. Rb serves no purpose except to provide a path for the base current. vsig IB = I E /    1  .

3. vsig is the signal source.

2008 Kenneth R. Laker (based on P. V. Lopresti 2006) update 29Sep08 KRL 15 ESE319 Introduction to Microelectronics

Bias Setting

1. Since RB does not interfere with the bias, the signal source can be Rs connected to the base without need for a blocking capacitor.

2. Choose Rb “ large” compared to

RS to avoid attenuating vsig.

3. Choose Rref to set IC.

2008 Kenneth R. Laker (based on P. V. Lopresti 2006) update 29Sep08 KRL 16 ESE319 Introduction to Microelectronics

Bias Setting - Continued

VCC=I ref Rref V BEQref −V EE Iref

VCCV EE−0.7 I ref = Rref 23.3 R = =23.3k  ref 10−3

+ Choose standard size: V - BE(Qref) (RCA Lab Comp List) R =22k  Choose: ref

I C≈ I E≈ I ref =1mA

2008 Kenneth R. Laker (based on P. V. Lopresti 2006) update 29Sep08 KRL 17 ESE319 Introduction to Microelectronics Bias Setting - Completed With the base “grounded” and V = 0.7 V ( through R ): BE(Qamp) I B≈0 B

VCC =V R VCB Qamp −I B RB≈V R VCB 5.6 k Ohm C   C I 0 b≈ This implies that there is about a

+ 12 V drop to split across RC and

- Veg VCB. Choose 6 V each. V RC 6 RC= = −3 =6 k  I C 10 Neglect the base current Choose standard size: through R B (RCA Lab Comp List)

RC=5.6k 

2008 Kenneth R. Laker (based on P. V. Lopresti 2006) update 29Sep08 KRL 18 ESE319 Introduction to Microelectronics

Gain Setting 1. Connect the source to the base.

5.6 k Ohm 2. Provide a path for the small Rs signal emitter current.

3. Choose RE for the desired gain

(G = - RC/RE).

4. C is nearly a short circuit for f ≥ f E min RS≪RB Calculate CE to have negligible reactance at the lowest frequency of interest f . min

2008 Kenneth R. Laker (based on P. V. Lopresti 2006) update 29Sep08 KRL 19 ESE319 Introduction to Microelectronics

Gain Setting - Continued Typical Rs 18 ≤ |AV| ≥ 22 5.6 k Ohm Design for |AV| = 20: ib Choose the nearest standard

size resistors for RC and RE. ie R 5600 R = C = ≈270 E 20 20 270 Gain check: vsig ib= RS1r eRE

vout=−RC ic=−RC ib

vout  RC −5600 ≈− ≈ =−19 vsig 1 r eRE 295

2008 Kenneth R. Laker (based on P. V. Lopresti 2006) update 29Sep08 KRL 20 ESE319 Introduction to Microelectronics R and C E E

Re

i e Ce

overall circuit with bias ac circuit

2008 Kenneth R. Laker (based on P. V. Lopresti 2006) update 29Sep08 KRL 21 ESE319 Introduction to Microelectronics

Design Completed The emitter circuit impedance:

veg 1 = r R  i e E j C e   E  v eg Re Choose CE to set the break i frequency (-3dB), f , to ≤ 20 Hz: e Ce min 1 =r eRE=295 2 f minC E 1 1 1 C E ≥ = = =27 F. 295⋅2 f min 295⋅2 20 37071 If we choose standard size (RCA Lab Comp List):

C E=47 F => f = 11.5 Hz min

2008 Kenneth R. Laker (based on P. V. Lopresti 2006) update 29Sep08 KRL 22 ESE319 Introduction to Microelectronics

Multisim Bode Plots

20 Hz. Gain

1 kHz. Gain

2008 Kenneth R. Laker (based on P. V. Lopresti 2006) update 29Sep08 KRL 23