DOCSLIB.ORG

The Fabless/Foundry Supply Chain

Total Page：16

File Type：pdf, Size：1020Kb

Download full-text PDF Read full-text
The Fabless/Foundry Supply Chain Close The Fabless/Foundry Supply Chain Fabless companies are growing and evolving, driven by the need for a wider array of high performance, low power products in tablets, smartphones, and ultrabooks. Foundries are racing to meet their needs. Led by Qualcomm, Broadcom, AMD, Nvidia and Marvell, fabless companies are quickly evolving, developing high performance, low power products in tablets, smartphones, and ultrabooks. Foundries, led by TSMC, UMC, GLOBALFOUNDRIES and SMIC, are racing to meet their needs, pushing into the 22nm technology node and more advanced types of packaging, including 3D integration. Meanwhile, all eyes are on Intel's recent expansion into the foundry business. The giant microprocessor company recently landed three new fabless customers: Netronome, Tabula and Achronix. That's just a toe in the water at this point, but the potential to be a major player is explosive. Also making a major change in the conventional fabless/foundry supply chain model is the industry leader, Taiwan Semiconductor Manufacturing Company (TSMC). The company recently announced plans to offer some levels of advanced packaging – so-called 2.5 3D integration – which pits is squarely against OSATS (companies offering OutSourced Assembly and Test Services), such as Amkor, ASE and STATSChipPAC. TSMC has also expanded into solar, LEDs and MEMS, and it's a sure bet other foundries are at least contemplating similar moves. The overall supply chain is made of fabless companies – more than 1800 of them according to the Global Semiconductor Alliance (GSA) – foundries that do that do manufacturing and OSATS that do the packaging and testing of the parts. Analysts differentiate "pure play" foundries that do nothing but foundry work from other companies that offer foundry services. At one time or another, almost any company with excess manufacturing capabilities has entered the foundry business. Alternatively, when capacity is tight, it might also make sense for these same companies to outsource the manufacturing of some products. There is also a relatively new trend to a business model known as "asset lite" or "capital lite," where a company will have some limited manufacturing capability but will outsource most of the production to foundries. Why? The soaring cost of fabs. At the Common Platform Technology Forum in March Ana Hunter, vice president of technology for Samsung's System LSI foundry business, said the cost of a new, state-of-the-art fab is $7.5 billion. This means only a handful of companies can afford leading-edge manufacturing capability. Bill McClean of IC Insights notes that 27 companies now own 300mm fabs, and that only 14 companies have the potential to build a 450mm fab. Even fewer have the capability to push to 22nm and below. One such company, Intel, recently extended its relationship with Netronome, manufacturing its flow processors using its 22nm tri-gate transistor architecture. Netronome claims the 22nm technology will enable new levels of flow processor performance, power and cost in network and security applications. The fabless semiconductor company joins 2 other Intel foundry customers, Tabula (programmable logic) and Achronix (FPGAs). Intel's Custom Foundry services provide "substantial benefits" to Netronome products, with state-of- the-art transistor design; access to the 22nm process; and design for manufacturing (DFM), test (DFT), and reliability (DFR) practices, Netronome reports, anticipating reduced development costs and time to market. The semiconductor companies will engage in a joint development and manufacturing engagement on the product, sharing Intel's tools, processes, and proprietary modeling capabilities. "Intel can see expansion led in part by further monetizing its manufacturing (i.e. foundry/AAPL)," noted C.J. Muse, Barclays Capital. Foundry market According to an IHS iSuppli Semiconductor Manufacturing and Supply Market Tracker report, the pure-play semiconductor foundry business will ride the growth of mobile electronics and ultrabooks to $29.6 billion in revenues in 2012. This is a 12% increase over $26.5 billion in 2011, about 3x the rate of growth expected for the overall semiconductor industry. From 2010 to 2011, foundries saw only 3% growth, falling off after a 45% increase 2009-2010. Demand will steadily increase from late in Q1 2012 to a peak in Q3. Unlike the drop-off seen in 2011, this foundry revenue growth will carry through in the years ahead. 2013 can expect 14% revenue growth ($33.6 billion), and 2014 and 2015 will also see solid double-digit growth, according to IHS (Fig. 1). Worldwide pure-play semiconductor foundry revenue forecast. SOURCE: IHS iSuppli Research, April 2012. Consumer electronics require advanced semiconductors with high performance and low power consumption, said Len Jelinek, director and chief analyst of semiconductor manufacturing at IHS. These applications use more semiconductors per product to support these needs. Notable drivers include tablets, smartphones, and ultrabooks. Increased tablet and smartphone sales will spur revenue expansion for NAND flash memory and logic application-specific integrated circuit (ASIC) semiconductor markets. The ultrabook will revitalize notebook PCs, in turn growing revenues for microprocessors. The pure-play foundry landscape comprises 4 Tier 1 suppliers, and 16 Tier 2 companies. Rankings: Taiwan Semiconductor Manufacturing Corp. (TSMC) holds the top spot with $14 billion in 2011 revenue. TSMC remains in the unique position of having more capacity than all of its competitors combined, as well as possessing the financial strength to outspend every one of its rivals, according to IHS. TSMC recently beat its Q1 expectations. UMC is a distant #2 with $3.6 billion revenues. GLOBALFOUNDRIES follows with $3.5 billion, and Semiconductor Manufacturing International Corp. (SMIC) made $1.3 billion (see Table 1). At the top of Tier 2 is TowerJazz Semiconductor, with $613.0 million in 2011 revenues. TowerJazz also enjoys another distinction: The model used by the company to increase capacity, through fab acquisition with a multiyear foundry manufacturing agreement, remains the most viable expansion method for companies looking to grow capacity, IHS asserts. TowerJazz acquires a fab and then builds off of the expertise of an existing manufacturing facility, effectively serving demand when it is aggregated in the semiconductor market, especially as many second-tier foundries in China and Europe are finding it difficult to achieve differentiation. Fabless market The top 25 fabless IC suppliers captured 80% of a total $64.9 billion fabless IC market in 2011, according to IC Insights (Table 2). Sales topped $1 billion at 12 fabless companies; Qualcomm topped the list with nearly $10 billion in sales. US-based suppliers captured 8 of the top 10 rankings. Worldwide fabless IC sales grew 4%, outpacing total IC market growth (1%), after an anomaly year in 2010 (total IC market growth was 33% vs 27% for fabless). Overall, 15 of the top 25 fabless IC companies outperformed the total 2011 fabless IC sales growth rate of 4%. Double-digit sales increases were seen at 8 fabless companies. China-based Spreadtrum was the star performer among the fabless IC producers last year, logging an amazing 95% sales jump. Spreadtrum supplies baseband processors and highly integrated CMOS RF transceivers for wireless applications with over 90% of its sales to China-based customers. Spreadtrum and ST-Ericsson are both heavily involved in the cellphone marketplace. In contrast to Spreadtrum, ST-Ericsson's IC sales dropped 28% in 2011 after declining by 9% in 2010. The difficult times at the company led to a restructuring in March of 2012 and it is rumored that this was a prelude to eventually putting the company up for sale, IC Insights reports. The 8 top-25 fabless IC companies that registered double-digit growth in 2011 had combined sales of $20.1 billion, up 29% from their combined sales of $15.6 billion in 2010. Overall, these top eight performers increased their combined sales by $4.5 billion last year as compared to a $2.4 billion increase for total fabless IC company sales in 2011. It is obvious that these eight companies are now prime targets for the IC foundries (e.g., TSMC, GlobalFoundries, UMC, Samsung, etc.), according to IC Insights. Supply chain Much has been written about the need for collaboration across the fabless/foundry supply chain and strategies. An excellent source is the Global Semiconductor Alliance (www.gsaglobal.org). Increasingly, it is the field of 3D packaging that requires attention. The frontend, backend, and system suppliers must collaborate in chip development. Early engagement, EDA tool flow optimization, turnkey wafer-to-package assembly, and other risk reduction strategies take a design from R&D into high-volume manufacturing. Nick Yu, VP of technology development, Qualcomm, brought a fabless perspective to The ConFab last year. In "3D Through Si Stacking Technology — a Qualcomm Perspective," Yu noted that 3D packaging creates thin, small, exciting products with long battery life. All 3D packages create better form factors on the board, increased performance for the device, and higher modularity in the design. The options to create a 3D package, however, are myriad: wire bonded chip stacks, flipped stacked chips, bumped/bonded chip stacks, through silicon vias (TSV) implemented as interposers, via first, or mid-process. Leading-edge technologies, like wide I/O memory on logic, are moving from lab to fab for the best of all worlds. Solid State Technology, Volume 55, Issue 4, May 2012 More Solid State Technology Current Issue Articles More Solid State Technology Archives Issue Articles To access this Article, go to: http://www.electroiq.com/content/eiq-2/en/articles/sst/print/vol-55/issue-4/features/cover- articles/the-fabless-foundry-supply.html .
Load more

Recommended publications
  • Software-Defined Hardware Provides the Key to High-Performance Data
    Software-Defined Hardware Provides the Key to High-Performance Data Acceleration (WP019) Software-Defined Hardware Provides the Key to High- Performance Data Acceleration (WP019) November 13, 2019 White Paper Executive Summary Across a wide range of industries, data acceleration is the key to building efficient, smart systems. Traditional general-purpose processors are falling short in their ability to support the performance and latency constraints that users have. A number of accelerator technologies have appeared to fill the gap that are based on custom silicon, graphics processors or dynamically reconfigurable hardware, but the key to their success is their ability to integrate into an environment where high throughput, low latency and ease of development are paramount requirements. A board-level platform developed jointly by Achronix and BittWare has been optimized for these applications, providing developers with a rapid path to deployment for high-throughput data acceleration. A Growing Demand for Distributed Acceleration There is a massive thirst for performance to power a diverse range of applications in both cloud and edge computing. To satisfy this demand, operators of data centers, network hubs and edge-computing sites are turning to the technology of customized accelerators. Accelerators are a practical response to the challenges faced by users with a need for high-performance computing platforms who can no longer count on traditional general-purpose CPUs, such as those in the Intel Xeon family, to support the growth in demand for data throughput. The core of the problem with the general- purpose CPU is that Moore's Law continues to double the number of available transistors per square millimeter approximately every two years but no longer allows for growth in clock speeds.
    [Show full text]
  • Opencapi, Gen-Z, CCIX: Technology Overview, Trends, and Alignments
    OpenCAPI, Gen-Z, CCIX: Technology Overview, Trends, and Alignments BRAD BENTON| AUGUST 8, 2017 Agenda 2 | OpenSHMEM Workshop | August 8, 2017 AGENDA Overview and motivation for new system interconnects Technical overview of the new, proposed technologies Emerging trends Paths to convergence? 3 | OpenSHMEM Workshop | August 8, 2017 Overview and Motivation 4 | OpenSHMEM Workshop | August 8, 2017 NEWLY EMERGING BUS/INTERCONNECT STANDARDS Three new bus/interconnect standards announced in 2016 CCIX: Cache Coherent Interconnect for Accelerators ‒ Formed May, 2016 ‒ Founding members include: AMD, ARM, Huawei, IBM, Mellanox, Xilinx ‒ ccixconsortium.com Gen-Z ‒ Formed August, 2016 ‒ Founding members include: AMD, ARM, Cray, Dell EMC, HPE, IBM, Mellanox, Micron, Xilinx ‒ genzconsortium.org OpenCAPI: Open Coherent Accelerator Processor Interface ‒ Formed September, 2016 ‒ Founding members include: AMD, Google, IBM, Mellanox, Micron ‒ opencapi.org 5 5 | OpenSHMEM Workshop | August 8, 2017 NEWLY EMERGING BUS/INTERCONNECT STANDARDS Motivations for these new standards Tighter coupling between processors and accelerators (GPUs, FPGAs, etc.) ‒ unified, virtual memory address space ‒ reduce data movement and avoid data copies to/from accelerators ‒ enables sharing of pointer-based data structures w/o the need for deep copies Open, non-proprietary standards-based solutions Higher bandwidth solutions ‒ 25Gbs and above vs. 16Gbs forPCIe-Gen4 Better exploitation of new and emerging memory/storage technologies ‒ NVMe ‒ Storage class memory (SCM),
    [Show full text]
  • Program & Exhibits Guide
    FROM CHIPS TO SYSTEMS – LEARN TODAY, CREATE TOMORROW CONFERENCE PROGRAM & EXHIBITS GUIDE JUNE 24-28, 2018 | SAN FRANCISCO, CA | MOSCONE CENTER WEST Mark You Calendar! DAC IS IN LAS VEGAS IN 2019! MACHINE IP LEARNING ESS & AUTO DESIGN SECURITY EDA IoT FROM CHIPS TO SYSTEMS – LEARN TODAY, CREATE TOMORROW JUNE 2-6, 2019 LAS VEGAS CONVENTION CENTER LAS VEGAS, NV DAC.COM DAC.COM #55DAC GET THE DAC APP! Fusion Technology Transforms DOWNLOAD FOR FREE! the RTL-to-GDSII Flow GET THE LATEST INFORMATION • Fusion of Best-in-Class Optimization and Industry-golden Signoff Tools RIGHT WHEN YOU NEED IT. • Unique Fusion Data Model for Both Logical and Physical Representation DAC.COM • Best Full-flow Quality-of-Results and Fastest Time-to-Results MONDAY SPECIAL EVENT: RTL-to-GDSII Fusion Technology • Search the Lunch at the Marriott Technical Program • Find Exhibitors www.synopsys.com/fusion • Create Your Personalized Schedule Visit DAC.com for more details and to download the FREE app! GENERAL CHAIR’S WELCOME Dear Colleagues, be able to visit over 175 exhibitors and our popular DAC Welcome to the 55th Design Automation Pavilion. #55DAC’s exhibition halls bring attendees several Conference! new areas/activities: It is great to have you join us in San • Design Infrastructure Alley is for professionals Francisco, one of the most beautiful who manage the HW and SW products and services cities in the world and now an information required by design teams. It houses a dedicated technology capital (it’s also the city that Design-on-Cloud Pavilion featuring presentations my son is named after).
    [Show full text]
  • Migrating to Achronix FPGA Technology (AN023) Migrating to Achronix FPGA Technology (AN023)
    Migrating to Achronix FPGA Technology (AN023) Migrating to Achronix FPGA Technology (AN023) November 19, 2020 Application Note Introduction Many users transitioning to Achronix FPGA technology will be familiar with existing FPGA solutions from other vendors. Although Achronix technology and tools are very similar to existing FPGA technology and tools, there are some differences. Understanding these differences are needed to achieve the very best performance and quality of results (QoR). This application note discusses any differences in the Achronix tool flow, highlighting key files and methodologies that users may not be familiar with. Further this application note details the primitive components present in the Achronix fabric, and how they may differ from, or in many cases are similar to, other vendors. Finally this application note reviews the unique features, particularly focused on AI and ML workloads that are present in the Achronix FPGA devices. Related Documents This application note is intended to give an overview of any changes that a user may encounter when migrating to Achronix technology. For full details of any of the items described below, the user is directed to the appropriate user guide or application note. Instead of duplicating information, this application note highlights the changes, and refers the user to the appropriate user guide where they can obtain the full information. A number of user guides are commonly referred to throughout this document Speedster7t IP Component Library User Guide (UG086) .This user guide describes all the silicon elements on the Speedster7t family. It includes descriptions, and instantiation templates, of the memories, DSP, MLP, NAP and logic primitives.
    [Show full text]
  • Transistor-Level Programmable Fabric
    TRANSISTOR-LEVEL PROGRAMMABLE FABRIC by Jingxiang Tian APPROVED BY SUPERVISORY COMMITTEE: ___________________________________________ Carl Sechen, Chair ___________________________________________ Yiorgos Makris, Co-Chair ___________________________________________ Benjamin Carrion Schaefer ___________________________________________ William Swartz Copyright 2019 Jingxiang Tian All Rights Reserve TRANSISTOR-LEVEL PROGRAMMABLE FABRIC by JINGXIANG TIAN, BS DISSERTATION Presented to the Faculty of The University of Texas at Dallas in Partial Fulfillment of the Requirements for the Degree of DOCTOR OF PHILOSOPHY IN ELECTRICAL ENGINEERING THE UNIVERSITY OF TEXAS AT DALLAS December 2019 ACKNOWLEDGMENTS I would like to express my deep sense of gratitude to the consistent and dedicated support of my advisor, Dr. Carl Sechen, throughout my entire PhD study. You have been a great mentor, and your help in my research and career is beyond measure. I sincerely thank my co-advisor, Dr. Yiorgos Makris, who brings ideas and funds for this project. I am grateful that they made it possible for me to work on this amazing research topic that is of great interest to me. I would also like to thank my committee members, Dr. Benjamin Schaefer and Dr. William Swartz for serving as my committee members and giving lots of advice on my research. I would like to give my special thanks to the tech support staff, Steve Martindell, who patiently helped me a thousand times if not more. With the help of so many people, I have become who I am. My parents and my parents-in-law give me tremendous support. My husband, Tianshi Xie, always stands by my side when I am facing challenges. Ada, my precious little gift, is the motivation and faith for me to keep moving on.
    [Show full text]
  • A Radiation Hardened Reconfigurable FPGA Shankarnarayanan Ramaswamy1, Leonard Rockett1, Dinu Patel1, Steven Danziger1 Rajit Manohar2, Clinton W
    A Radiation Hardened Reconfigurable FPGA Shankarnarayanan Ramaswamy1, Leonard Rockett1, Dinu Patel1, Steven Danziger1 Rajit Manohar2, Clinton W. Kelly, IV2, John Lofton Holt2, Virantha Ekanayake2, Dan Elftmann2 1BAE Systems, 9300 Wellington Road, Manassas, VA, 20110, USA 2Achronix Semiconductor Corporation, 333 W. San Carlos Street, San Jose, CA, 95110, USA 703-367-4611 [email protected] Abstract—A new high density, high performance radiation As described previously BAE Systems has produced, hardened, reconfigurable Field Programmable Gate Array completed radiation testing, and qualification of a radiation (FPGA) is being developed by Achronix Semiconductor hardened 16M Static Random Access Memory (SRAM) and BAE Systems for use in space and other radiation built using the RH15 process [2]. The BAE-Achronix Proof hardened applications.12 The reconfigurable FPGA fabric of Concept (POC) RH FPGA device, to be named architecture utilizes Achronix Semiconductor novel RadRunner, currently being fabricated uses this same picoPIPE technology and it is being manufactured at BAE memory cell technology for storing the device FPGA fabric Systems using their strategically radiation hardened 150 nm configuration data [3]. epitaxial bulk CMOS technology, called RH15. Circuits built in RH15 consistently demonstrate megarad total dose hardness and the picoPIPE asynchronous technology has RH15 Technology Features been adapted for use in space with a Redundancy Voting Circuit (RVC) methodology to protect the user circuits from Rad Hard 150nm CMOS Technology (RH15) Features single event effects. Minimum Feature Size 150nm Isolation Shallow Trench Isolation Device Options 26 Å / 70 Å S/D Engineering Halo with S/D Extensions Supply Voltages 1.5V / 3.3V Gate Electrodes N+ Poly (NFET) / P+ Poly (PFET) TABLE OF CONTENTS Metal Levels 7 Levels (Planarized BEOL) Poly & Diffusion Silicide CoSi2 1.
    [Show full text]
  • Are Fpgas Suffering from the Innovator's Dilemma?
    FPGA’2013 Panel Are FPGAs Suffering from the Innovator’s Dilemma? Moderator: Jason Cong, UCLA Panelists Jonathan Bachrach, UC Berkeley Robert Blake, CEO, Achronix Misha Burich, CTO, Altera Chuck Thacker, Technical Fellow, Microsoft Research Steve Trimberger, Fellow, Xilinx Credit – Idea of the Panel Jonathan Rose at Univ. of Toronto Sabbatical in Shanghai, China 2/18/13 UCLA VLSI CAD LAB 2 FPGA Industry Has Been Innovating and Riding on Moore’s Law System BOM Extensible Processing Sub-system Agile Mixed Signal Converter Power Cost Stacked Silicon Interconnect Ethernet MAC PCI Interface System Mixed Signal System Monitor Phase Multi-Mode Clock Generators Performance Multi-Gigabit SerDes Processor LVDS Transceivers DSP I/O Termination Impedance Phase Locked Loops Multi-Standard Programmable I/O Support I/O Buffers with Programmable Drive Strength CMOS / TTL Programmable I/O Dual Port RAM Block RAM Distributed RAM Oscillator 2/18/13 UCLA VLSI CAD LAB source: 3 FPGA Has the Highest Margins in Semiconductor Symbol Gross Margin Operating Margin Pre-tax Margin Net Margin AMD 22.80% -17.60% -22.40% -21.80% ALTR 69.60% 33.20% 33.20% 31.20% INTC 62.20% 27.40% 27.90% 20.60% MU 11.80% -7.50% -12.70% -12.50% NVDA 51.40% 16.20% 16.60% 14.50% XLNX 64.90% 28.90% 26.70% 23.70% source: Morgan Stanley 2/18/13 UCLA VLSI CAD LAB 4 So, What’s the Problem? Source WSTS (January 2013) and Xilinx The FPGA fraction is only $4.5B/$300B = 1.5% of semiconductor industy, and has been that way for 10+ years! 2/18/13 UCLA VLSI CAD LAB source: 5 ASIC Product Segment Marketshare
    [Show full text]
  • Complicity of High-End SOC-FPGA's for Data Centers
    International Journal of Recent Technology and Engineering (IJRTE) ISSN: 2277-3878, Volume-9 Issue-6, March 2021 Complicity of High-End SOC-FPGA’s for Data Centers Retikal Anil Kumar Abstract: As the network traffic increasing significantly due to application user can integrate it to system through Ethernet, increase in Data streaming, Big Data Analytics, Cloud PCIe, SATA, etc., the way of the FPGA integration with the Computing, Increasing the load on Data Centers, Which leads to system defines the type of data processing. This paper demand for high computational capabilities, low latency, consists of seven sections, the section-I will gives the high-bandwidth, power efficient data accelerators. As Re-Configurability of FPGA’s are more flexible for developing introduction, Section-II briefs the role of FPGA’s in data customized applications, so the FPGA hardware based data centers and section-III to section-VI describes about high-end accelerators are the potential devices to achieve low latency and FPGA’s by various vendors and their specifications, Section power efficient requirements. The modern FPGA’s are coming up VII gives conclusion of the paper. The major vendors of with the embedded communication hard IP’s like PCIe, Ethernet, FPGS’s are: (In this paper, considered SOC-FPGA’s & DDR based memory controllers, which makes easy for the embedded with features like PCIe Gen4 or 5 / Ethernet / deployment of network attached FPGA’s in data centers. This paper presents the role of FPGA’s in datacenters and analysis of SATA / Memory Controllers). high-end FPGA’s by various vendors, which are suitable for • Xilinx (Acquired By AMD) deployment in data centers.
    [Show full text]
  • The Future of Fpgas
    The Future of FPGAs Rajit Manohar Computer Systems Lab Chief Scientist Cornell University, Ithaca, NY 14853 Achronix Semiconductor Corp. http://vlsi.cornell.edu/ http://www.achronix.com/ System complexity in VLSI Year Name Transistors 1982 80286 134,100 1985 80386 275,000 1993 Pentium 3.1 million 1995 Pentium Pro 6 million 1998 Pentium III 9.5 million 2000 Pentium IV 42 million 2002 McKinley 243 million 2005 Montecito 1.7 billion 2020 ???? ~50 billion Source: Intel, IBM CPU frequency scaling Processor Frequencies 4000 3000 2000 Frequency (MHz) Frequency 1000 0 1990 1994 1998 2002 2006 2010 Year Source: Intel, IBM What did CPUs do with the transistors? • Improved throughput while preserving a sequential programming model ❖ Multi-cycle ❖ Pipelined ❖ Superscalar ❖ Out-of-order A A A A A B B B B B A A A A A ❖ Multi-threaded B B B B B Today’s supercomputers use commodity microprocessors as building-blocks FPGA architectures LB CB LB CB CB SB CB SB LB CB LB CB CB SB CB SB LB CB LB CB CB SB CB SB LB CB LB CB CB SB CB SB FPGA frequency scaling 3000 CPU FPGA 2250 1500 Frequency (MHz) Frequency 750 0 1990 1992 1996 1998 2000 2002 2004 2006 2007 2008 Year Source: Intel, IBM, Xilinx, Altera datasheets What did FPGAs do with the transistors? • Basic lookup-table (LUT) / flip-flop (FF) / carry-chain • Embedded multiplier LUT • Embedded memory FF • Embedded processor • DSP slices • Hardened I/Os MAC / MULT • Larger LUT configurations DSP • ... more logic ... reduce logic depth MEM Seems simple compared to CPUs..
    [Show full text]
  • DTRA-NEPP TECHNICAL PROGRESS REVIEW April 6, 2010
    National Aeronautics DTRA-NEPP and Space Administration TECHNICAL PROGRESS REVIEW April 6, 2010 DTRA TASK TITLE: 3.2 Test and Evaluation of the Radiation Response of Commercial and Hardened Microelectronics SUBTASK TITLE: FPGA Test and Evaluation DTRA TASK MANAGER: Ken LaBel SUBTASK MANAGER: Melanie Berg NON-NASA CONTRIBUTORS: BAE, Achronix, Actel, Xilinx, NRL Note: Not all subtask efforts are funded under this IACRO. We are reporting for interest purposes. KAL1 DTRA Task # (3.2) FY10: FPGAs (Continuation) Description: FY10 Plans: The main goal of this task is to investigate FPGAs from various Probable Test Vehicles: vendors and to determine applicability for the space radiation -Achronix/BAE Hardened Asynchronous FPGA RADRunner environment. The following is a more detailed list of task goals. -Achronix Commercial Asynchronous FPGA SPD60 •Determine inherent radiation sensitivities of advanced complex -Xilinx Spartan 6 (45nm SRAM-Based) commercial CMOS (<100 nm) and hardened FPGAs -Actel RTAX2000s FPGA (150nm Anti-fuse Based) • Provide guidance on radiation test and qualification procedures -Actel RT ProASIC FPGA (130nm Flash -based) •As a consultant -SIRF Program support - TBD •Test and analysis FPGA guideline development • Determine SEU sensitivities for hardening approaches -Other Work: • Comparison of fault injection versus beam SEU coverage -Support of Crypto space evaluation of Actel RTAX-S (90nm) -Develop guideline for interpreting FPGA SEE data • Evaluate low proton energy sensitivity of commercial CMOS FPGAs (Low Energy test methodologies are discussed in detail in another task) Schedule: Deliverables: -Will be presented on separate slides due to number of tasks -Test reports and quarterly reports - Expected submi ssi on s to SEE Sympos iu m, MAPLD, a nd IEEE RADECS.
    [Show full text]
  • Investor Presentation January │ 2021 Disclaimers (1/2)
    Investor Presentation January │ 2021 Disclaimers (1/2) This presentation (this “Presentation”) is provided for informational purposes only and has been prepared to assist interested parties in making their own evaluation with respect to a potential business combination between Achronix Semiconductor Corporation (“Target” or “Achronix”) and ACE Convergence Acquisition Corp. (“ACE”) and related transactions (the “Potential Business Combination”) and for no other purpose. By reviewing or reading this Presentation, you will be deemed to have agreed to the obligations and restrictions set out below. Without the express prior written consent of ACE, this Presentation and any information contained within it may not be (i) reproduced (in whole or in part), (ii) copied at any time, (iii) used for any purpose other than your evaluation of Target or (iv) provided to any other person, except your employees and advisors with a need to know who are advised of the confidentiality of the information. This Presentation supersedes and replaces all previous oral or written communications between the parties hereto relating to the subject matter hereof. This Presentation and any oral statements made in connection with this Presentation do not constitute an offer to sell, or a solicitation of an offer to buy, or a recommendation to purchase, any securities in any jurisdiction, or the solicitation of any vote, consent or approval in any jurisdiction in connection with the Potential Business Combination or any related transactions, nor shall there be any sale, issuance or transfer of any securities in any jurisdiction where, or to any person to whom, such offer, solicitation or sale may be unlawful under the laws of such jurisdiction.
    [Show full text]
  • ACE Convergence Acquisition Corp. Form S-4/A Filed 2021-03-19
    SECURITIES AND EXCHANGE COMMISSION FORM S-4/A Registration of securities issued in business combination transactions [amend] Filing Date: 2021-03-19 SEC Accession No. 0001104659-21-038627 (HTML Version on secdatabase.com) FILER ACE Convergence Acquisition Corp. Mailing Address Business Address 1013 CENTRE ROAD, SUITE 1013 CENTRE ROAD, SUITE CIK:1813658| IRS No.: 000000000 | State of Incorp.:E9 | Fiscal Year End: 1231 403S 403S Type: S-4/A | Act: 33 | File No.: 333-252928 | Film No.: 21756422 WILMINGTON DE 19805 WILMINGTON DE 19805 SIC: 3674 Semiconductors & related devices (302) 633-2102 Copyright © 2021 www.secdatabase.com. All Rights Reserved. Please Consider the Environment Before Printing This Document TABLE OF CONTENTS As filed with the Securities and Exchange Commission on March 19, 2021 Registration No. 333-252928 UNITED STATES SECURITIES AND EXCHANGE COMMISSION Washington, D.C. 20549 Amendment No. 1 to FORM S-4 REGISTRATION STATEMENT UNDER THE SECURITIES ACT OF 1933 ACE Convergence Acquisition Corp.* (Exact Name of Registrant as Specified in Its Charter) Cayman Islands* 6770 N/A (State or other jurisdiction of (Primary Standard Industrial (I.R.S. Employer incorporation or organization) Classification Code Number) Identification Number) 1013 Centre Road, Suite 403S Wilmington, DE 19805 Telephone: (302) 633-2102 (Address, including zip code, and telephone number, including area code, of Registrant’s principal executive offices) Behrooz Abdi Chief Executive Officer c/o ACE Convergence Acquisition Corp. 1013 Centre Road, Suite 403S Wilmington, DE 19805 Telephone: (302) 633-2102 (Name, address, including zip code, and telephone number, including area code, of agent for service) Copies to: Matthew B.
    [Show full text]