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Computer Architecture ١ First Lec. Open System :We Mean That the Functionality of the Pc Can Be Expanded by Simply Adding Board

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Computer Architecture ١ First Lec. Open System :We Mean That the Functionality of the Pc Can Be Expanded by Simply Adding Board Computer Architecture First lec. Open system :we mean that the functionality of the pc can be expanded by simply adding boards into the system, for examples of add in hardware features are additional memory, a modem, serial communication interfaces, and local ardent work interfaces. *main frame computers. *mini computers. *micro computers. -general architecture of microcomputer. The hardware of a microcomputer system can be divided into four functional section: the input unit , micro processing unit, Memory unit and output unit in fig(1) Memory unit Primary storage memory Secondary Program Data storage storage storage memory memory memory Input unit Mpu Output unit Fig.(1) General architecture of a microcomputer system The heart of a microcomputer is its micro processing unit(mpu). The mpu of amicro computer is implemented with a(vlsi) –very large _scale integrated- device known as microprocessor. A microprocessor is a general-purpose processing unit built into a single integrated circuit(IC). The mpu used most widly in pc tday is Intel corporations Pentium processor. ١ Computer Architecture *The mpu is the part of the microcomputer that executes instructions of the program and processes data. it is responsible for performing all arithmetic operat5ions and making the logical decisions initiated by the computers program. and mpu controls over all system operation. *the input and output unit are the means by which the mpu communicates with the outside world. input units as keyboard, mouse, joystick. *the output devices of a pc are display monitor and printer, the output unit in a microcomputer is used to give feedback to the user and producing documented results. *the memory unit in a microcomputer is used to store information, such as number or character data by store we mean that memory has the ability to hold this information for processing or for outputting at a later time. programs that define how the computer is operate and process data also reside in memory. Microprocessor performance: MIPS and I COMP the microprocessor families are relative to their performance. Here performance is measured in what are called MIPS. That is how many million instruction they can execute per second. 1- 80386DX=33MHz 11MIPs 2-80486 27MIPs 3-pentium=133 MH z 100 MIPs another method called the iCOMP is provided by Intel comparison of the performances of their 32-bit microprocessor micro processors in a personal computer application. 1-80386DX=33 63 iCOMP 2-80486 166 iCOMP 3-pentium=133 MHz 1110 iCOMP ٢ Computer Architecture Second lec. *Architectural compatibility is a critical need of microprocessor developed for use in reprogrammable applications. As shown in fig(2), each of the new members of the 8086/8088 family provides a superset of the earlier devices architecture. That is, the feature offered by the 80386 microprocessor are a superset of the 8028 are a superset of the original 8086/8088 architecture. -actually, the 80286, 80386, and Pentium processors can operate in either of two modes. The real-address mode or protected-address mode. When the real-mode they operate like a high-performance instruction set , which is object code compatible with the 8086/8088. for this reason , operating systems and application 80286,8386,80486 or Pentium processor architectures without modification. Pentium ٨٠٤٨٦ ٨٠٣٨٨ ٨٠٢٨٦ 8086 Fig(2) اﻝﻤﻌﺎﻝﺠﺎت ﻤن ٨٠٢٨٦ ﺘﻌﻤل ب mode 2 ﻫذا اﻝﻤود ﻴﺤﺎﻜﻲ اﻝﻤﻌﺎﻝﺠﺎت اﻝﺘﻲ ﻗﺒﻠﻬﺎ real mode - ﻫذا اﻝﻤود ﻴﻌﻤل ﺒﻜل اﻝﻤواﺼﻔﺎت اﻝﺠدﻴدة اﻝﺨﺎﺼﺔ ﺒﻪ protected mode- ٣ Computer Architecture اﻝﻤﻌﺎﻝﺞ ﺒﺎﻨﺘﻴوم ﻴﻌﻤل ب modes 3 -real mode. -protected mode. ﻴﻘوم اﻝﻌﺎﻝﺞ ﺒﺎﻝﻌﻤل ﺒﺸﻜل ﻤﻤﺎﺜل ال virtual 8086 mode 8086- ﺒﺼورﻩ وﻫﻤﻴﺔ ﻝﻐرض ﺘﻨﻔﻴذ اﻝﺒراﻤﺞ اﻝﺘﻲ ﺘﻌﻤل ﻋﻠﻰ اﻝﻤﻌﺎﻝﺞ ٨٠٨٦ Parallel processing: they are implemented with simultaneously operating multiple processing units each has adedicated function and they operate at the same time. More parallel morpreformance. - the processor 80286 has 4 units 1- the bus unit 2- the instruction unit 3- the execution unit 4- the address unit - the processor 80386 has 6 units 1- the bus unit 2- the perfetch unit 3- the decode unit 4- the execution unit 5- the page unit 6- the segment unit The units of the processor: 1*the bus unit :. Is responsible for performing all external bus operation. This processing unit contain the latches and drivers for the address bus. 2*the prefetch unit :. Implements a mechanism known as an instruction stream queue. This queue permits the 80386 dx to prefech up to 16 bytes of instruction code. 3*the decode unit :. Accesses the out put end of the prefetch units instruction queue. It reads machine instructions form the output side of the prefetch queue and decodes them into them microcode instruction format used by the execution unit. 4*the execution unit :. include the arithmetic /logic unit (ALU). The 80386DX s registers. Special multiply, divide and shift hardware. and a ٤ Computer Architecture control ROM, the execution unit reads decoded instructions from the instruction queue and performs the operations that they specify. It is the ALU that performs the arithmetic, logic and shift operations required by an instruction . 5*the segment and page units:. provides the memory management and protection services. They off-load the responsibility for address generation , address translation . and segment checking from the bus interface unit. Page Page Unit Unit address Execution Bus Unit Unit data 6-units contro Decod unit Prefetch unit 3 instruction Queue 16-byte FIFO ٥ Computer Architecture Third lec. Computer register Computer instructions are normally stored in consecutive memory locations and are executed sequentially one at a time. The control reads an instruction from a specific address in memory and executes it. It then continues by reading the next instruction in sequence and executes it, and so on. Thos type of instruction sequencing needs a counter to calculate the address of the next instruction after execution of the current instruction is completed. It is also necessary to provide a register in the control unit for storing the instruction code after it is read from memory. The computer needs processor registers for manipulating data and a register for holding a memory addrss. Register Number Register Function Symbol of bits Name DR 16 Data Register Holds memory operand AR 12 Address Register Holds address for memory AC 16 Accumulator Processor register IR 16 Instruction Register Holds Instruction code PC 12 Program Counter Holds address of Instruction TR 16 Temporary Register Holds Temporary data INPR 8 Input Register Holds Input character OUTR 8 Output Register Holds Output character ٦ Computer Architecture Fig(_) Basic computer registers and memory 11 0 PC 11 0 AR MEMORY 16 bit per word 15 0 AR 15 0 15 0 TR DR 15 0 7 0 7 0 OUTR INPR AC Computer instructions:. The basic computer has three instruction code formats, as shown in fig.(), each format has 16 bit. The operation code (opcode) part of the instruction contains three bits and the meaning of remaining 13 bits depends on the operation code encountered. A memory-reference instruction uses 12bits to the addressing mode ii is equal to 0 for direct address and to 1 for indirect address. The register-reference instructions are recognized by the operation code 111 with a 0 in the leftmost bit (bit 15) of the instruction. A register-reference instruction specifies an operation on or a test of the AC register. An operand from memory is not needed therefore, the other 12 bits are used to specify the operation or test to be executed. Similarly, an input-output instruction does not need a reference to memory and is recognized by the operation code 111 with 12 bits are used to specify the type of input-output operation or test performed. ٧ Computer Architecture 15 14 12 11 0 I opcode Address Memory Addressing reference mode I=0 (direct address) I=1 (indirect address) Memory reference Instruction Opcode=000 through 110 15 12 11 0 0 1 1 1 Register operation Register reference Register reference Instruction Opcode=111 I=0 15 12 11 0 1 1 1 1 I/O operation Register reference ٨ .
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