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33-Ghz Monolithic Cascode Alinas/Gainas Heterojunction Bipolar Transistor Feedback Amplifier

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33-Ghz Monolithic Cascode Alinas/Gainas Heterojunction Bipolar Transistor Feedback Amplifier 1378 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 26, NO. 10, OCTOBER 1991 ductance FETs (NOTFET),” in IEEE Indium Phosphide and Re- amplifiers up to 60 GHz,” in IEEE Microwave and Millimeter-Wuue lated Materials Conf. Dig., 1990, p. 24. Monolithic Circuits Symp. Dig., 1990, pp. 23-26. [5] R. Majidi-Ahy et al., “5.100 GHz InP CPW MMIC 7-section [IO] R. Majidi-Ahy et al., “100 GHz active electronic probe for on-wafer distributed amplifier,” in IEEE Microwarv and Millimeter-War’e S-parameter measurements,” Electron. Lett., vol. 25, no. 13, pp. Monolithic Circuits Symp. Dig., 1990, pp. 31-34. 828-830, 1989. [6] R. Majidi-Ahy et al., “94 GHz InP MMIC five-section distributed [Ill R. Majidi-Ahy et al., “100 GHz high-gain InP MMIC cascode amplifier,” Electron. Lett., vol. 26, no. 2, pp. 91-92, Jan. 1990. amplifier,” in IEEE Gds IC Symp. Proc., 1990, pp. 173-176. [7] N. Camilleri et al., “A W-band monolithic amplifier,’’ in IEEE Int. [12] Y. C. Pao et al., “Impact of surface layer on InAlAs/InGaAs/InP Microwave Symp. Dig., 1990, pp. 903-906. high electron mobility transistors,” IEEE Electron Device Lett., vol. [8] K. H. G. Duh et al., “W-band InGaAs HEMT low noise amplifiers,” 11, no. 7, pp. 312-314, 1990. in IEEE Int. Microwai,e Symp. Dig.,1990, pp. 595-598. [13] L. E. Dickens et al., “A GaAs wideband cascode MMIC amplifier,” [9] C. Yuen et al., “High-gain, low-noise monolithic HEMT distributed in IEEE GdsIC Symp. Proc., 1983, pp. 112-124. 33-GHz Monolithic Cascode AlInAs/GaInAs Heterojunction Bipolar Transistor Feedback Amplifier Mark Rodwell, J. F. Jensen, W. E. Stanchina, R. A. Metzger, D. B. Rensch, M. W. Pierce, T. V. Kargodorian, and Y. K. Allen Abstract -Microwave cascode feedback amplifiers with 8.6-dB f,) GaAs/AlGaAs bipolar transistors in the Darlington gain and dc to 33-GHz bandwidth were developed. The ampli- configuration, ll-dB gain has been attained with dc to fiers utilize AIInAs/GaInAs heterojunction bipolar transistors 10 GHz [2]. having f,,, = 70 GHz and f, = 90 GHz. Active bias networks eliminate the need for on-wafer Si,N, bypass capacitors. Heterojunction bipolar transistors in the AlInAs/ GaInAs system [3] on InP substrates [4] have attained 70-GHz f,,, and 90-GHz f, [3]. Using these devices, we I. INTRODUCTION have developed cascode feedback amplifiers with 8.6-dB OMPARED to hybrid microwave integrated circuits gain and dc to 33-GHz bandwidth [5].For comparison, a C(MIC’s), monolithic microwave/millimeter-wave in- common-emitter feedback amplifier on the same wafer tegrated circuits (MIMIC’S) potentially have lower cost, attained 8.6-dB gain and dc to 14-GHz bandwidth. size, and weight, and with large-scale integration will permit low-cost integrated microwave systems. With many 11. AlInAs/GaInAs HBT TECHNOLOGY monolithic amplifier designs, these potential advantages are lost through inefficient use of the substrate area, with Heterojunction bipolar transistors (HBT’s) provide sub- transmission lines consuming 90-95% of the die. The die stantially greater power gain cutoff frequencies than ho- size per circuit function is large, resulting in high cost, mojunction devices. In AlGaAs/GaAs devices [61, the and limiting integration to 1-2 gain stages per die. wide-bandgap emitter permits larger base doping without Compared to matched amplifiers, feedback amplifiers significant charge injection into the emitter, giving low attain smaller bandwidths for a given f,,,, but occupy base resistance even with small base widths. The emitter small die areas and have well-controlled characteristics doping can be dropped, reducing base-emitter depletion set by the feedback elements. This results in lower cost, capacitance. Compared to GaAs/AlGaAs devices, the and permits higher levels of system integration per die. AlInAs/GaInAs HBT has a greater electron mobility and Feedback amplifiers dominate in broad-band applications peak electron velocity in the base and collector, with below 4 GHz, where transistors of adequate f,,, are consequent reduction in the base and collector transit readily available. times. The larger AlInAs/GaInAs bandgap discontinuity Using (20-GHz f,,,, 10-GHz f,) silicon bipolar transis- results in higher emitter injection efficiencies. GaInAs’s tors in the Darlington configuration, 8-dB gain has been smaller bandgap (than GaAs’s) results in smaller base- attained with dc to 6 GHz [l].With (20-30-GHz f,,, and emitter voltages, reducing power-delay products in digital circuits. The AIInAs/GaInAs HBT device layers were grown by Manuscript received March 21, 1991; revised July 3, 1991. M. Rodwell is with the Department of Electrical and Computer solid-source molecular beam epitaxy (MBE) on a semi- Engineering, University of California, Santa Barbara, CA 93106. insulating InP substrate. The layers were all lattice J. F. Jensen, W. E. Stanchina, R. A. Metzger, D. B. Rensch, M. W. matched to the substrate and consisted of a 800-nm N+ Pierce, T. V. Kargodorian, and Y. K. Allen are with Hughes Research Laboratories, Malibu, CA 90265. InGaAs subcollector, a 270-nm N ~ GaInAs collector IEEE Log Number 9102698. region doped at 4X 10’6/cm’, a 80-nm P+ GaInAs base 0018-9200/91/1000-1378$01 .00 01991 IEEE IEEEJOURNAL OF SOLID-STATECIRCUITS, VOL. 26, NO. in, OCTOBER IYYI 1379 OVERLAY METAL EMITTER STRIPE - GalnAs AllnAs GalnAs GalnAs GalnAs InP Fig. 1. Cross section of an AIInAs/GaInAs HBT. RWl I I and C,, are more significant parasitics, and the cascode stage becomes advantageous. A. Common-Emitter Feedback Amplifier In the common-emitter configuration (Fig. 3), in order to obtain a desired (negative) voltage gain A and input Rbbl=35 R Cbe(&pl)=124 fF and output impedances matched to 2, (usually 50 RI, Rba2=15 R Ccbl=7 fF Rex= 9.5 R ccbZ=23 fF the required total emitter circuit resistance is l/gm,extrlnslc Rcz6.6 R ao=0.98 = (Re Re, + NkT/qZ,) = 2,/(1- A),and the required &b=25 w2 ~0.96ps + %=NkT/qIE ; N=l.35 ~,=0.36ps feedback resistor is R, = Z,(1- A), where Re, is the transistor parasitic emitter resistance. Using the Miller Fig. 2. Extracted equivalent circuit of the 2-pmX5-pm emitter HBT. approximation, the bandwidth can be roughly estimated. The input pole is dominant, and has a time constant of doped at lOZ0/cm3, a 5-nm undoped GaInAs spacer approximately {Rbb,+ Z0/2}{(1 - A)C,, + 1/2.rrfT(Re + layer, a 180-nm-thick AlInAs emitter N doped at 8X Re, + NkT/ql,1); bandwidth decreases with gain. The 10i7/cm3, and two highly doped 1019/cm3 layers of Al- base spreading resistance R,,,, increases the node InAs and GaInAs to reduce emitter contact resistance. impedance at the intrinsic base, decreasing the band- The triple-mesa device structure is shown in Fig. 1. The width. Increasing the emitter stripe length decreases Rbbr device employs Ti/Pt/Au contacts. The base metal was but increases Cch,with constant collector-base time con- self-aligned to the emitter stripe by using the undercut of stant T~~,,~~~~~= CrbRbhr. An optimum emitter stripe length the emitter contact achieved through wet chemical etch- is found which maximizes the bandwidth. With the tran- ing of the emitter to access the base layer. The etch to the sistor area selected, the collector current is selected to base layer was nonselective. Evaporated SiO, and poly- maximize f,, and the external emitter resistance Re is imide were used to planarize the structure to the top of chosen to obtain the correct extrinsic transconductance the emitter contact. g,n,extr,ns,c.Circuit optimization using Touchstone@yielded Fitting measured 45-MHz to 26.5-GHz device S param- circuit parameters reasonably consistent with this elemen- eters at VCE= 1.3 V and I, = 7.5 mA, the device small- tary analysis. In the resulting design, Ql is a 2 X 10-pm signal model of Fig. 2 is derived. At this bias point, f, and emitter device biased at I, = 17 mA, Re = 5 0, and R, = f,,, are 80 and 65 GHz, and peak values are 90 and 208 R, the amplifier output is biased at 2 V, and 9.3-dB 70 GHz, respectively 151. gain and 14.4-GHz bandwidth are predicted. 111. CIRCUITDESIGN B. Darlington Feedback Amplifier The common-emitter, Darlington, and cascode feed- The Darlington configuration [l], [2] (Fig. 4) increases back amplifier configurations were investigated. In silicon the stage bandwidth by providing a low-impedance drive technology [ll, with f,,, substantially larger than f7, the to the (capacitive) input of the common-emitter device Darlington stage attains larger bandwidth than the com- (Q2). If the collector-base junction of Ql remains con- mon emitter. In current AlInAs/GaInAs technology, R,,,, nected between amplifier input and output (as in Fig. 41, 1380 IEEE JOURNAL OF SOLID-STATE CIRCUITS. VOL. 26, NO. 10, OCTOBER 1991 6' Fig. 4. Darlington feedback amplifier * Fig. 6. Cascode feedback amplifier. 12 ""1""1""1""11"'1""1~1"~"" -\ on-wafer bypass capacitors necessary to ac ground the Q1 \ 10 . collector were not available in the fabrication process, the independent-collector-supply Darlington configuration could not be implemented. In silicon bipolar microwave amplifiers [l], f,,, is gen- \ erally substantially larger than f,, hence RhbrCchis sub- stantially smaller than T,, + 7,. In this case, the Darlington configuration provides a large bandwidth improvement, even with collector of the emitter-follower stage con- 0 5 10 15 20 25 30 35 40 nected to the amplifier output. In our process f,,, = f,, Frequency. GHz hence RhbrCrhplaces more severe constraints on circuit Fig.
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