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A Platform-Based Approach to Communication Synthesis for Embedded Systems A Platform-Based Approach to Communication Synthesis for Embedded Systems Alessandro Pinto Electrical Engineering and Computer Sciences University of California at Berkeley Technical Report No. UCB/EECS-2008-54 http://www.eecs.berkeley.edu/Pubs/TechRpts/2008/EECS-2008-54.html May 19, 2008 Copyright © 2008, by the author(s). All rights reserved. Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. To copy otherwise, to republish, to post on servers or to redistribute to lists, requires prior specific permission. A Platform-Based Approach to Communication Synthesis for Embedded Systems by Alessandro Pinto Laurea (University of Rome “La Sapienza”) 1999 M.S. (University of California at Berkeley) 2003 A dissertation submitted in partial satisfaction of the requirements for the degree of Doctor of Philosophy in Engineering – Electrical Engineering and Computer Sciences in the GRADUATE DIVISION of the UNIVERSITY OF CALIFORNIA, BERKELEY Committee in charge: Professor Alberto L. Sangiovanni Vincentelli, Chair Professor Robert K. Brayton Professor Zuo-Jun Shen Spring 2008 The dissertation of Alessandro Pinto is approved: Chair Date Date Date University of California, Berkeley Spring 2008 A Platform-Based Approach to Communication Synthesis for Embedded Systems Copyright 2008 by Alessandro Pinto 1 Abstract A Platform-Based Approach to Communication Synthesis for Embedded Systems by Alessandro Pinto Doctor of Philosophy in Engineering – Electrical Engineering and Computer Sciences University of California, Berkeley Professor Alberto L. Sangiovanni Vincentelli, Chair As the complexity of electronic systems increases, designers adopt a re-use methodology where new products are assembled out of components. This is a common trend in many application domains. In consumer electronics, Systems-on-Chips (SoCs) integrate many different cores to provide tens of different functions. In automotive, modern cars rely on a distributed, networked embedded system that comprises hundreds of processors to provide comfort, fuel efficiency and entertainment. In large scale systems, such as avionics and building automation, networked distributed controllers are used to provide comfort, safety and energy efficiency. Since the system behavior depends not only on the components, but also on the way in which they interact, architecting their interconnection is a critical step in the overall design flow. Be- ing subject to tight performance and cost constraints, the design of the interconnection architecture needs to be tailored to the specific system application. This task is too complex to be done by hand, considering also the heterogeneous nature of these systems. Therefore, there is a need for com- 2 munication synthesis tools that, starting from a characterization of the communication constraints among the components and the library of available communication building blocks, automatically derive an optimal interconnection architecture. In this thesis I argue that the essence of the communication synthesis problem is invariant to the application domain. I introduce a formal framework to capture the communication constraints, the library of communication building blocks, and the rules to compose them. Using this framework, I formulate a general communication synthesis problem. I show the generality of the approach by formulating and solving the problem in two different domains: system-on-chips and building automation systems. Professor Alberto L. Sangiovanni Vincentelli Dissertation Committee Chair i To my mother who raised me and let me go to follow my dreams. ii Contents List of Figures iv List of Tables vi I Introduction1 1 Trends in Electronics2 1.1 System Complexity..................................4 1.2 Time-To-Market and Productivity..........................9 1.3 Re-Use........................................ 10 2 Design Methodologies 14 2.1 System-Level Design................................. 16 2.2 Platform-Based Design................................ 20 2.2.1 Formalizing Platform-Based Design..................... 22 2.2.2 Example................................... 31 3 Communication Synthesis 38 3.1 Flows......................................... 39 3.1.1 Maximum Flow................................ 40 3.1.2 Minimum-Cost Flow............................. 41 3.1.3 Minimum-Cost Flow with End-To-End Constraints............. 43 3.2 Optimal Network Design............................... 44 3.3 Concluding Remarks on Communication Synthesis................. 46 II Theoretical Background 48 4 Communication Structures 49 4.1 Quantities....................................... 50 4.2 Communication Structures.............................. 52 iii 5 Building Complex Communication Architectures from Components 59 5.1 Composition...................................... 60 5.2 Platforms....................................... 63 6 Communication Synthesis for Networked Systems 68 6.1 Relations Among Communication Structures.................... 69 6.2 A General Optimization Problem........................... 76 III Applications 80 7 On-Chip Communications 81 7.1 Design Flow...................................... 84 7.2 Specification..................................... 92 7.3 Library and Composition Rules............................ 93 7.4 Optimization Algorithm................................ 97 7.5 Results......................................... 104 7.5.1 Impact of the Application Characteristics.................. 105 7.5.2 Effect of Technology Scaling......................... 107 7.5.3 Quality of the Solution............................ 109 8 Building Automation Networks 115 8.1 Specification..................................... 118 8.2 Capturing the Building Geometry.......................... 121 8.3 Wired Networks.................................... 125 8.3.1 Library of Communication Components................... 127 8.3.2 Communication Platform and Implementation................ 133 8.3.3 Optimization Algorithm........................... 134 8.3.4 Results.................................... 141 8.4 Wireless Networks.................................. 146 8.4.1 Library of Communication Components: Modeling ZigBee Networks... 147 8.4.2 Formulation of the Optimization Problem.................. 155 8.4.3 Results.................................... 158 9 Conclusions and Future Work 161 Bibliography 166 iv List of Figures 1.1 System complexity: Number or transistors in Intel microprocessors as a function of time, also known as Moore’s law (Source: Intel), and number of lines of code for avionic products [111].................................5 1.2 Hardware design productivity expressed in number of gates per designer per year. 11 2.1 System-level design flows presented in early papers on this topic........... 18 2.2 Pictorial representation of a platform-based design flow................ 21 2.3 Architecture and Function Platforms......................... 29 2.4 Mapping of function and architecture......................... 30 2.5 Platform-based design flow for communication synthesis.............. 37 4.1 Hasse diagrams relative to the domains of three quantities: a) bandwidth, b) latency, c) the set containing both bandwidth and latency................... 51 4.2 Hasse diagram of the partial order for subset of communication structures... 55 ≤(b;l) 4.3 The system-level specification of a simplified Set-Top Box. Each core in the spec- ification is annotated with and area in mm2 and each arrow is annotated with a bandwidth constraint in MB=s............................. 56 5.1 Example of parallel composition of networks: the set-top box is expanded by adding a video channel and an extra off-chip memory bank.................. 61 5.2 Example of a library L for on-chip communication and two alternative implemen- tations for the set-top box example based on composing elements instanced from L ............................................ 66 6.1 Example of communication implementation for the set-top box........... 71 6.2 Summary of the procedure to define problem PR2................... 79 7.1 COSI-OCC open software infrastructure........................ 85 7.2 Specification of the set-top-box example as given to COSI-OCC(a), and, Chip floor- plan after elaboration from PARQUET(b)....................... 93 7.3 Modeling the NoC components............................ 95 7.4 Slicing method to find the available area for NoC implementation.......... 97 7.5 High-level description of the heuristic algorithm................... 99 v 7.6 Procedure for adding a new router to the NoC implementation. For an expression exp, we denote by exp(x y) the same expression where variable x has been replaced n by y........................................... 101 7.7 Properties of the synthesized NoCs for the MWD, MPEG4, VOPD, dVOPD and tVOPD applications. Power is expressed in Watts, area in mm2 and latency in ns= f lit. We used the following notation: R for routers, W for wires, B for sequential buffers. Latency is reported on a logarithmic scale.................. 108 7.8 Properties of the synthesized NoCs for the VProc applications............ 110 8.1 A distributed embedded control system: (a) controller specification and (b) net- worked execution platform............................... 116 8.2 Example of gateway zone associated to a building floor................ 121 8.3 Representation of a
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