Intel® Xeon® Processor E5-1600/2400/2600/4600 (E5-Product Family) Product Families Datasheet- Volume
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Intel® Xeon® Processor E5- 1600/2400/2600/4600 (E5-Product Family) Product Families Datasheet- Volume Two May 2012 Reference Number: 326509-003 INFORMATIONLegal Lines and Disclaimers IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Intel products are not intended for use in medical, life saving, life sustaining, critical control or safety systems, or in nuclear facility applications. Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. The Intel® Xeon® Processor E5 Product Family may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request. Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an order number and are referenced in this document, or other Intel literature may be obtained by calling 1-800-548-4725 or by visiting Intel's website at http://www.intel.com. See the Processor Spec Finder at http://ark.intel.com or contact your Intel representative for more information. Requires an Intel® HT Technology enabled system, check with your PC manufacturer. Performance will vary depending on the specific hardware and software used. Not available on Intel® Core™ i5-750. For more information including details on which processors support HT Technology, visit http://www.intel.com/info/hyperthreading Requires a system with Intel® Turbo Boost Technology. Intel Turbo Boost Technology and Intel Turbo Boost Technology 2.0 are only available on select Intel® processors. Consult your PC manufacturer. Performance varies depending on hardware, software, and system configuration. For more information, visit http://www.intel.com/go/turbo Intel® Virtualization Technology requires a computer system with an enabled Intel® processor, BIOS, virtual machine monitor (VMM) and, for some uses, certain computer system software enabled for it. Functionality, performance or other benefits will vary depending on hardware and software configurations and may require a BIOS update. Software applications may not be compatible with all operating systems. Please check with your application vendor. Intel® Trusted Execution Technology: No computer system can provide absolute security under all conditions. Intel® Trusted Execution Technology (Intel® TXT) requires a computer system with Intel® Virtualization Technology, an Intel TXT-enabled processor, chipset, BIOS, Authenticated Code Modules and an Intel TXT-compatible measured launched environment (MLE). Intel TXT also requires the system to contain a TPM v1.s. For more information, visit http://www.intel.com/technology/security I2C is a two-wire communications bus/protocol developed by Philips. SMBus is a subset of the I2C bus/protocol and was developed by Intel. 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All Rights Reserved. 2 Intel® Xeon® Processor E5-1600/2400/2600/4600 (E5-Product Family) Product Families Datasheet Volume 2 Contents 1Introduction..............................................................................................................9 1.1 Document Terminology ........................................................................................9 1.2 Related Documents ........................................................................................... 12 1.3 Register Terminology ......................................................................................... 12 2 Configuration Process and Registers ....................................................................... 15 2.1 Platform Configuration Structure ......................................................................... 15 2.1.1 Processor IIO Devices (CPUBUSNO (0))..................................................... 15 2.1.2 Processor Uncore Devices (CPUBUSN0 (1)) ................................................ 17 2.2 Configuration Register Rules ............................................................................... 18 2.2.1 CSR Access ........................................................................................... 18 2.2.2 PCI Bus Number..................................................................................... 18 2.2.3 Uncore Bus Number................................................................................ 19 2.3 Configuration Mechanisms .................................................................................. 19 2.3.1 Standard PCI Express* Configuration Mechanism........................................ 19 2.4 Device Mapping................................................................................................. 19 3 Processor Integrated I/O (IIO) Configuration Registers ......................................... 23 3.1 Processor IIO Devices (PCI Bus CPUBUSNO (0)) .................................................... 23 3.2 PCI Configuration Space Registers (CSRs)...................................................... 23 3.2.1 Unimplemented Devices/Functions and Registers........................................ 23 3.2.2 IIO Registers Specific to Intel® Xeon® Processor E5 Product Family ............. 23 3.2.3 PCI Bus Number..................................................................................... 23 3.2.4 IIO PCI Express Configuration Space Registers ........................................... 26 3.2.5 Standard PCI Configuration Space (Type 0/1 Common Configuration Space) .. 32 3.2.6 PCI Express and DMI2 Error Registers ....................................................... 95 3.2.7 PCI Express Lane Equalization Registers .................................................. 106 3.2.8 DMI Root Complex Register Block (RCRB)................................................ 111 3.3 Non Transparent Bridge Registers...................................................................... 120 3.3.1 Configuration Register Map (NTB Primary Side) ........................................ 120 3.3.2 Standard PCI Configuration Space - Type 0 Common Configuration Space.... 122 3.3.3 NTB Port 3A Configured as Primary Endpoint Device.................................. 129 3.3.4 PCI Express Configuration Registers (NTB Secondary Side) ........................ 165 3.3.5 Configuration Register Map (NTB Secondary Side) .................................... 165 3.3.6 NTB Shadowed MMIO Space .................................................................. 193 3.3.7 NTB Primary/Secondary Host MMIO Registers .......................................... 194 3.3.8 MSI-X MMIO Registers (NTB Primary side) ............................................... 210 3.3.9 MSI-X MMIO registers (NTB Secondary Side) ........................................... 212 3.4 Intel® QuickData Technology ........................................................................... 214 3.4.1 Intel® QuickData Technology Registers Maps........................................... 214 3.4.2 Intel® QuickData Technology Registers Definitions ................................... 217 3.4.3 Intel® QuickData Technology MMIO Registers Map ................................... 236 3.4.4 Intel® QuickData Technology MMIO Registers Definitions .......................... 238 3.4.5 DMA Channel Specific Registers.............................................................. 245 3.5 Integrated I/O Core Registers ........................................................................... 254 3.5.1 Configuration Register Maps (Device 5, Function: 0, 2 and 4)..................... 255 3.5.2 PCI Configuration Space Registers Common to Device 5 ............................ 264 3.5.3 Intel® VT-d, Address Mapping, System Management, Coherent Interface, Misc Registers.......................................................... 269 3.5.4 Global System Control and Error Registers............................................... 300 3.5.5 Local Error Registers............................................................................. 311 3.5.6 IOxAPIC PCI Configuration Space ........................................................... 325 3.5.7 I/OxAPIC Memory Mapped Registers ....................................................... 332 Intel® Xeon® Processor E5-1600/2400/2600/4600 (E5-Product Family) Product Families 3 Datasheet Volume 2 3.5.8 Intel VT-d