Appeared in IEEE Computer, February 1995 RPM: A RAPID PROTOTYPING ENGINE FOR MULTIPROCESSOR SYSTEMS1 Luiz Andre Barroso, Sasan Iman, Jaeheon Jeong, Koray Öner, Krishnan Ramamurthy and Michel Dubois Department of Electrical Engineering - Systems University of Southern California Los Angeles, CA 90089-2562 (213)740-4475
[email protected] Abstract In multiprocessor systems, processing nodes contain a processor, some cache and a share of the system memory, and are connected through a scalable interconnect. The sys- tem memory partitions may be shared (shared-memory systems) or disjoint (message- passing systems). Within each class of systems many architectural variations are possible. Fair comparisons among systems are difficult because of the lack of a common hardware platform to implement the different architectures. RPM (Rapid Prototyping engine for Multiprocessors) is a hardware emulator for the rapid prototyping of various multiprocessor architectures. In RPM, the hardware of the target machine is emulated by reprogrammable controllers implemented with Field-Pro- grammable Gate Arrays (FPGAs). The processors, memories and interconnect are off-the- shelf and their relative speeds can be modified to emulate various component technolo- gies. Every emulation is an actual incarnation of the target machine and therefore software written for the target machine can be easily ported on it with little modification and with- out instrumentation of the code. In this paper, we describe the architecture of RPM, its performance and the proto- typing methodology. We also compare our approach with simulation and breadboard pro- totyping. Keywords: Field-Programmable Gate Arrays (FPGAs), message-passing multicomputers, shared-memory multiprocessors, design verification, performance evaluation, simulation. 1.