ISSN 2319-8885 Vol.06,Issue.24 July-2017, Pages:4770-4773 www.ijsetr.com Fully Reused VLSI Architecture of Differential Manchester Encoding Using SOLS Technique for DSRC Application B. TEJASWINI1, B. VAMSI KRISHNA2 1PG Scholar, Dept of ECE, Gudlavalleru Engineering College, Gudlavalleru, AP, India, Email:
[email protected]. 2Assistant Professor, Dept of ECE, 2Gudlavalleru Engineering College, Gudlavalleru, AP, India, Email:
[email protected]. Abstract: The Encoding techniques has received great attention in last few years due to their ability to reduce the power dissipation which is the main requirement in low power VLSI design. The dedicated short-range communication (DSRC) is an emerging technique to push the intelligent transportation system into our daily life. This paper proposes a Differential Manchester encoding using Similarity Oriented logic Simplification(SOLS) technique. This SOLS technique is based on two core methods 1)Area compact retiming 2)Balance logic operation sharing .The designed encoding technique has high hardware utilization rate. In addition to that the designed technique is better than the existing counterparts in terms of power consumption, delay. The designed technique is modeled using Verilog HDL and functionality is verified with Xilinx ISE 13.1. Keywords: DSRC, SOLS, VLSI, Manchester, Encoding. I. INTRODUCTION II. FM0 AND DIFFERENTIAL MANCHESTER Differential Manchester encoding is a line code in CODING PRINCIPLES which data and clock signals are combined to form a self A. FM0 Encoding synchronizing data stream. In various specific applications, The coding principle of FM0 is listed as the following this line code is also called by various other names, three rules. including BiphaseMark Code(BMC), Frequency Modulation If X is the logic-0, the FM0 code must exhibit a (FM).This SOLS consists of two core methods, area compact transition between A and B.