Optimization of Bst Thin Film Phase Shifters for Beam Steering Applications

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OPTIMIZATION OF BST THIN FILM PHASE SHIFTERS FOR BEAM STEERING APPLICATIONS

Thesis

Submitted to

The School of Engineering of the

UNIVERSITY OF DAYTON

In Partial Fulﬁllment of the Requirements for

The Degree of

Master of Science in Electrical Engineering

Devin William Spatz

UNIVERSITY OF DAYTON

Dayton, Ohio

May, 2017 OPTIMIZATION OF BST THIN FILM PHASE SHIFTERS FOR BEAM STEERING

APPLICATIONS

Name: Spatz, Devin William

APPROVED BY:

Guru Subramanyam, Ph.D. Robert Penno, Ph.D. Advisor Committee Chairman Committee Member Chairperson, Professor, Department of Professor, Department of Electrical and Electrical and Computer Engineering Computer Engineering

Weisong Wang, Ph.D. Committee Member Research Engineer, Department of Electrical and Computer Engineering

Robert J. Wilkens, Ph.D., P.E. Eddy M. Rojas, Ph.D., M.A., P.E. Associate Dean for Research and Dean Innovation School of Engineering Professor, School of Engineering

ii c Copyright by

Devin William Spatz

2017 ABSTRACT

OPTIMIZATION OF BST THIN FILM PHASE SHIFTERS FOR BEAM STEERING

APPLICATIONS

Name: Spatz, Devin William University of Dayton

Advisor: Dr. Guru Subramanyam

Barium Strontium Titante (BST) thin ﬁlm based varactors are optimized for implementation in electrically controlled, analog phase shifters. Varactor tunability / phase shift is derived from ferroelectric BST being used as the dielectric layer in a parallel plate capacitive structure. The application of a low (0-8V DC) bias enables a decrease in varactor capacitance and creates a resulting phase shift. Optimization is performed though the simulation of varactor device variations including varied parallel-plate area and dielectric thickness. Parameters for phase shifter optimization include insertion loss, device size, and ﬁgure of merit (FOM) while requiring 360 degree phase shift from all designs. Though extensive simulations, a 6x6 µm2 varactor based phase shifter with a dielectric thickness of 200 nm is determined to be optimal based on these criterion. A Monolithic Microwave

Integrated Circuit (MMIC) and hybridized circuit are designed to demonstrate beam steering capabilities of the optimized phase shifters. Though fabrication of the varactor and phase shifter devices, experimental results are obtained to validate simulation performance and observations.

iii Dedicated to my parents, William and Teresa, and my brother, Brandon

iv ACKNOWLEDGMENTS

First and foremost, I would like to thank Dr. Guru Subramanyam for supporting me in my research endeavors over the past three years. From inviting me to join his microwave electronics research group during my junior year to advising me through both an undergraduate honors thesis and masters thesis, he has always encouraged me to pursue my interests in electrical engineering.

Had it not been for my experiences working with his research group as an undergraduate, I would not have pursued an advanced degree in engineering. I cannot thank him enough for the impact that he has had on my academic experience.

I would also like to thank all of the members of Dr. Subramanyam’s research group for all of the support they have provided throughout my research. Dr. Hailing Yue, Dr. Shu Wang, and Kuan-

Cheng Pan have always gone out of their way to help me with varactor theory and AWR Microwave

Ofﬁce simulations. Additionally, I would like to thank my committee members, Dr. Robert Penno and Dr. Weisong Wang, for their support and feedback throughout my masters thesis research.

Finally, I would like to thank my family, friends, co-workers, and mentors for helping me become both the person and engineer I am today. My experience as a masters student has come along with many opportunities to work alongside some of the best researchers in academia and industry at the Mumma Radar Lab, UDRI ISR group, and AFRL Sensors Directorate. I owe a special thanks to

Dr. Lorenzo Lo Monte for being a fantastic mentor and friend throughout my time as a graduate student. It has not been an easy journey, but all of these people have made the experience worthwhile every step of the way.

v TABLE OF CONTENTS

ABSTRACT ...... iii

DEDICATION ...... iv

ACKNOWLEDGMENTS ...... v

LIST OF FIGURES ...... ix

LIST OF TABLES ...... xi

I. INTRODUCTION ...... 1

1.1 Background ...... 1 1.2 Motivation ...... 2 1.3 Research Plan ...... 3

II. BACKGROUND AND LITERATURE REVIEW ...... 5

2.1 Introduction ...... 5 2.2 Overview of Phase Shifter Topologies ...... 5 2.2.1 Frequency & Bandwidth ...... 6 2.2.2 Phase States & Error ...... 7 2.2.3 Device Losses ...... 8 2.2.4 Switching Time & Power Handling Capabilities ...... 8 2.2.5 Control Mechanism Topologies ...... 9 2.2.6 Summary ...... 12 2.3 Phased Array Theory ...... 12 2.3.1 Antenna Basics ...... 14 2.3.2 Phased Array Beamforming ...... 19 2.3.3 Electronic Beam Steering ...... 20 2.4 Barium Strontium Titanate Thin Film Technology ...... 21 2.4.1 Material Properties ...... 21 2.4.2 Applications in Microwave Devices ...... 23

vi III. PHASE SHIFTER OPTIMIZATION & SIMULATION ...... 25

3.1 BST Thin Film Varactor Theory ...... 25 3.1.1 Varactor Structure ...... 25 3.1.2 Varactor Tuning ...... 26 3.1.3 Electrical Model ...... 27 3.1.4 Varactor Optimization Parameters ...... 29 3.1.5 Simulation Parameters ...... 30 3.1.6 Simulation Results ...... 35 3.2 Phase Shifter Simulations & Optimization ...... 39 3.2.1 Device Optimization ...... 40 3.2.2 Summary ...... 43

IV. MMIC / HYBRIDIZED PHASED ARRAY DESIGN ...... 45

4.1 Phased Array Design ...... 45 4.1.1 Patch Antenna Design ...... 46 4.1.2 Patch Antenna Simulations ...... 49 4.1.3 Linear Array Design ...... 50 4.1.4 Beam Steering Calculations and Simulations ...... 51 4.2 Monolithic Microwave Integrated Circuit (MMIC) Design ...... 59 4.2.1 CPW Feed ...... 59 4.2.2 Transmission Lines ...... 60 4.2.3 CPW-to-Microstrip Transition ...... 60 4.2.4 Power Divider ...... 62 4.2.5 BST Phase Shifter Integration ...... 63 4.2.6 Phase Shifter Biasing ...... 63 4.2.7 Layout ...... 63 4.3 Hybridized Circuit Design ...... 64 4.3.1 Simulation Parameters ...... 64 4.3.2 Transmission Line ...... 65 4.3.3 Power Divider ...... 65 4.3.4 Phase Shifter Integration ...... 66 4.3.5 Phase Shifter Biasing ...... 66

V. EXPERIMENTAL PROCEDURE AND RESULTS ...... 67

5.1 Mask Design ...... 67 5.2 Experimental Procedure ...... 72 5.3 Results and Discussion ...... 75

VI. CONCLUSIONS AND FUTURE WORK ...... 78

vii 6.1 Conclusions ...... 78 6.2 Future Work ...... 79 6.2.1 MMIC Phased Array ...... 79 6.2.2 Hybridized Phased Array ...... 79

BIBLIOGRAPHY ...... 81

viii LIST OF FIGURES

2.1 Switched-Line Phase Shifter ...... 11

2.2 Antenna Reﬂection Coefﬁcient ...... 14

2.3 Dipole Antenna Radiation Pattern ...... 16

2.4 Phased Array Theta-Cut Radiation Pattern ...... 18

2.5 Phased Array Antenna Beam Forming ...... 20

2.6 Electronic Beam Steering Based on Phase Delay ...... 22

3.1 Parallel Plate Capacitor Diagram ...... 26

3.2 BST Dielectric Constant & Loss Tangent under Applied Voltage ...... 27

3.3 Varactor Electrical Model ...... 28

3.4 Varactor Multi-Capacitor Variations ...... 30

3.5 Parallel Plate Varactor Material Stackup ...... 31

3.6 Parallel Plate Varactor Port Layout ...... 33

3.7 Parallel Plate Varactor Meshing ...... 34

3.8 Standard Varactor Transmission Magnitude & Phase ...... 36

3.9 Cascading Varactor S-Parameter Blocks in AWR Microwave Ofﬁce ...... 41

4.1 Quarter-Wavelength Transformer Fed Patch Antenna CAD Model ...... 51

ix 4.2 Patch Antenna Reﬂection Coefﬁcient (S11) ...... 52

4.3 Patch Antenna Far Field Radiation Patterns ...... 53

4.4 Beam Steering Angle (Expected vs. Simulated) ...... 55

4.5 Beam Steering: 0 Degrees ...... 56

4.6 Beam Steering: 30 Degrees (18 Degree Actual)) ...... 57

4.7 Beam Steering: -30 Degrees (-18 Degree Actual) ...... 58

4.8 CPW Feeding for Cascade Microtech ACP40-GSG-150 Probes ...... 59

4.9 Coplanar Waveguide to Microstrip Transition ...... 61

4.10 Coplanar Waveguide to Microstrip Transition Parametric Study (Magnitude) . . . . 61

4.11 Single Antenna Element with BST Phase Shifter MMIC ...... 64

5.1 Mask Set Layout: Varactors/Phase Shifters ...... 68

5.2 Mask Set Layout: All Phase Shifters ...... 69

5.3 Mask Set Layout: Optimized Phase Shifters ...... 70

5.4 Varactor Variations ...... 71

5.5 Complete Photo-Lithography Mask: All Layers ...... 72

5.6 Fabricated Wafer using BST on Si/SiO2 Substrate ...... 73

5.7 On-Wafer Probing Station Test Setup ...... 74

5.8 On-Wafer Probing Station with Fabricated Wafer ...... 75

5.9 Microscope View of Phase Shifter Testing ...... 76

x LIST OF TABLES

2.1 Varactor Simulation Results ...... 24

3.1 Material Properties for BST Parallel-Plate Varactor ...... 32

3.2 Varactor Dielectric Thickness Variation ...... 37

3.3 Varactor Parallel-Plate Area Variation ...... 38

3.4 Multi-Varactor Conﬁgurations ...... 39

3.5 Varactor Simulation Results ...... 40

3.6 Phase Shifter BST Thin Film Thickness Variation ...... 41

3.7 Phase Shifter Capacitor Area Variation ...... 42

3.8 Phase Shifter Multi-Varactor Variation ...... 43

3.9 Phase Shifter Simulation Results ...... 44

4.1 MMIC & Hybrid Antenna Properties ...... 46

4.2 MMIC & Hybrid Calculated Antenna Parameters ...... 47

4.3 Quarter-Wavelength Transformer Calculated Characteristic Impedance Values . . . 49

4.4 FEKO Optimized Microstrip Patch Antenna Width & Length ...... 50

4.5 Linear 2-Element Patch Array Beam-Steering Angles ...... 54

xi 4.6 Material Properties for BST Parallel-Plate Varactor ...... 65

5.1 Varactor Experimental vs Simulation Results (200 nm) ...... 76

5.2 Phase Shifter Experimental vs Simulation Results ...... 77

xii CHAPTER I

INTRODUCTION

1.1 Background

The discovery of the phased array antenna dates back to 1905 when German Nobel Prize physicist Karl Ferdinand Braun found that the phase and position of radiating elements impacts the behavior of its neighbors. His early experiment involving three radiators with switched phases resulted in an ”enhanced” radiation pattern that could be inﬂuenced by switching the phase of each element.

[1] Foundational research continued during World War II when Nobel Prize physicist Luis Alvarez developed Ground-Controlled Approach (GCA) while performing research at the Massachusetts In- stitute of Technology (M.I.T.). The GCA was a rapidly steerable phased array radar system which is used to determine the altitude and course of an incoming aircraft to assist its landing. [2] Con- tinued developments in phased arrays have coincided with advances in radar since World War II leading to the development of communications links, radio imaging techniques, weather tracking, and increased radar detection capabilities.

In modern day, phased array antennas and their electrical subsystems have become extensively used in both the military and commercial sectors. In 2016, the budget for defense spending in the

United States exceeded over 500 billion dollars [3] and innovations in the commercial sector such as connected Internet of things (IoT) devices are expected to rapidly grow the value of the global 1 industry in the near future. A recent trend in these industries is an increased desire for reconfigurable electronic systems that are able to able to change functionality in the field while requiring a minimum number of components. In the communications/cellular industry, this desire for reconfigurable components enables operation on multiple frequency bands as governments place more and more restrictions on the electromagnetic spectrum. Meanwhile, the electronic warfare community has an interest in reconfigurable phased array systems in order to continue critical operations in con- tested environments such as under spectral interference. In all of these sectors, reconfigurable radio frequency (RF) components can expand on the capabilities of current Radar and communications systems.

1.2 Motivation

Although phased array systems have extensively improved since their original inception, microelectronic subsystem limitations still present a constant bottleneck in the performance of modern systems. One such subsystem is the phase shifter which is utilized to control the signal phase delivered to each antenna element in a phased array. Historically, phase shifters started out as me- chanically switched delay line devices which were limited to a single frequency of operation and limited phase resolution. Advances in phase shifter design have enabled high performance electrical phase shifters of both analog and digital varieties, but these devices are still faced with many short- comings. As both the military and commercial sectors continue to develop more advanced phased array systems, the demand arises for reconﬁgurable phase shifters.

The application of a ferroelectric material called Barium Strontium Titantate (BST) provides a novel approach to reconﬁgurable phase shifter design. Due to the high tunability of the dielectric constant, BST has been implemented in frequency agile phase shifters in literature [4]. By improv- ing upon this work and optimizing the phase shifter designs for phase shifter properties such as low

2 insertion loss and 360 degrees of continuous phase shift potential, a novel contribution can be made to the ﬁeld of phased array development.

1.3 Research Plan

The solution proposed in this thesis is utilizing ferroelectric varactors to develop phase shifters that are frequency agile while providing continuous phase shift tuning. By optimizing the ferroelectric varactor based phase shifters developed by Spatz [4] though electromagnetic simulations, an optimal phase shifter design can be realized. In order to demonstrate the functionality of these phase shifters, a phased array antenna circuit will be designed for the integration of the optimized phase shifters into a phased array to demonstrate beam steering.

This thesis aims to present a novel approach to analog phase control in phased arrays over the course of the six chapters presented in this thesis manuscript. The current section, being the

Introduction, has exempliﬁed the need for and importance of high performance, reconﬁgurable phase shifters in the communications and defense industries. Following this brief introduction, a literature review on Barium Strontium Titanate, phase shifter devices, and phased array antennas is presented in Chapter 2.

Phase shifter design and optimization is presented in Chapter 3 where electromagnetic (EM) simulations are performed in Advanced Wave Research (AWR) Microwave Office and FEKO. Basic varactor devices of varying parameters are first simulated to understand the effect of each parameter on the device behavior. Phase shifters are then developed based upon each varactor and simulated in order to find an optimized design.

Following the selection of an optimal phase shifter design, Chapter 4 covers the application of the optimized phase shifters to phased array circuits. Microstrip and coplanar waveguide (CPW) technologies are discussed and applied to the development of a monolithic microwave integrated

3 circuit (MMIC) and a hybrid packaged circuit. Additionally, a phased array antenna is designed and beam steering behavior is simulated for the array.

Device fabrication and testing is covered in Chapter 5 including the experimental testing procedure. The results obtained from testing are discussed and compared to the results of the simulations in prior sections. Finally, conclusions are drawn in Chapter 6 along with a discussion of future work that can be done based on the ﬁndings presented in this thesis.

4 CHAPTER II

BACKGROUND AND LITERATURE REVIEW

2.1 Introduction

In modern radio frequency (RF) and microwave circuit design, phase shifters are widely implemented in phased array antenna systems, phased locked loops (PLL), power ampliﬁer (PA) lin- earization systems, IQ vector modulators, and many other novel technologies. Given such a wide range of applications, phase shifter design encompasses numerous physical phenomena, material characteristics, and design topologies. Although the research presented in this thesis manuscript is driven by materials based discoveries, a broad understanding of phase shifter topologies is essential for developing an optimized Barium Stronitum Titanate (BST) thin-ﬁlm based phase shifter design.

Furthermore, a review of phased array theory is necessary in order to develop a beam steering system for demonstration of such phase shifters. The remainder of this chapter will be used to review phase shifter topologies, phased array antennas, and Barium Strontium Titante thin ﬁlm technology and to discuss the state-of-the-art implementations in literature.

2.2 Overview of Phase Shifter Topologies

In time domain analysis, a signal at time, t, corresponds to a magnitude and phase. The phase component of a time domain signal describes the position of a point on a sinusoidal waveform

5 cycle relative to the beginning of the cycle. This property is synonymous with a time delay and is expressed as a fraction of a total cycle in either degrees or radians. When comparing two signals, such as the input and output of a two-port electrical network, the phase describes the delay the signal experiences as it propagates though the device. In most electrical networks, phase is a characteristic device property that corresponds to the electrical length of the network at the frequency of operation.

A special class of devices called phase shifters exist that utilize electrical, mechanical, and magnetic mechanisms to control the phase angle in an electrical network. Though this manipulation, the signal phase at the output of an electrical network can be controlled in a predictable manner.

As previously stated, there are many different types of phase shifters which derive their operation from the control mechanisms they utilize. Regardless of how they operate, all phase shifters share a number of fundamental characteristics including operating frequency, device bandwidth, phase states, phase error, associated losses, switching time, and power handling capabilities. The following sections provide a overview of these phase shifter properties before common examples of electrical and electromechanical phase shifters are discussed.

2.2.1 Frequency & Bandwidth

Basic characterization of radio frequency and microwave devices requires an understanding of the distinction between center operating frequency and bandwidth. The center operating frequency of a phase shifter describes the frequency at which the device has been designed to operate. Phase shifter properties such as losses or phase shift inherently frequency dependent meaning that this property tells a user what performance should be expected at a given frequency. By comparison, bandwidth describes the maximum frequency range over which device properties can reasonably expected to operate in the same manner. This becomes important in phase shifter characterization since many phase shifter topologies utilize capacitive and inductive behavior that changes with frequency. Bandwidth is an important metric for wide-band signals since it is necessary for the

6 entire signal to be shifted by the same degree and experience a ﬂat amount of loss. Both of these properties describe optimal frequency ranges for phase shifter operation, but the distinction between analog and digital phase shifters is necessary to understand practical limitations.

2.2.2 Phase States & Error

The golden standard in phase shifter design is the ability to provide up to 360 degrees of continuous phase shift. Physical limitations prevent such a device to be created without compromise, but luckily it is not always necessary to have such a robust phase shift range and resolution. In terms of applications, phased array antenna systems require high resolution while delay lines require a high phase shift range. In order to describe the incremental phase shift that a phase shifter can provide, analog and digital paradigms are used.

Generally speaking, analog devices have an infinite number of device states over a specified range. Analog phase shifter designs have a continuously variable phase shift angle over a specified phase shift range. This behavior is typically enabled though tuning device capacitance or inductance by applying an electric or magnetic field. Analog design techniques are often used to reduce cost though simplified device assemblies as well as reduce insertion loss in phase shifter devices.[5]

Although continuous phase shift angles within a speciﬁed range can be theoretically achieved in analog phase shifters, there is always a degree of error. In practice this means that a phase shift of

254.15 degrees is theoretically possible, but is not achievable to such a ﬁne resolution.

Contrarily, digital devices have a set of quantized or ﬁxed states that offer limited resolution.

In a digital (binary based) system, device states are represented by either 1s and 0s, referred to as bits. Lending this paradigm to phase shifter design, phase shift angle resolution becomes limited by a set of discrete phase shift angles, or steps, that can be achieved. The attainable step resolution is limited by the number of phase bits, or input lines, used in the design. In a 5-bit phase shifter,

7 a step size of 11.25 degrees is theoretically achievable, but in practice such precision is not always possible. A pitfall in this design paradigm is that the insertion loss corresponds to the number of bits of resolution the phase shifter has to the degree of 1-2 dB of added loss for each additional bit of resolution. [6] Additionally, digital phase shifters generally require larger chip areas and have decreased angle precision when compared to continuous analog phase shifters. [7] Although it may seem impractical to use digital phase shifters, they are immune to noise on control lines, have ﬂat phase over a wider bandwidth, and often have higher power handling capabilities. [5] The error in digital phase shifters is based on the actual phase shift per bit of resolution compared to the theoretical phase shift produced.

2.2.3 Device Losses

Since the majority of phase shifter devices are passive (not requiring power), they contribute to signal loss. As a results of this, insertion loss is among the most commonly used properties to characterize a phase shifter. Often confused with the transmission coefﬁcient of an electrical network, the insertion loss is the combination of the transmission coefﬁcient and mismatch losses of the load and generator. [8] The insertion loss represents the loss (in decibels) that a signal experiences passing though the phase shifter electrical network. Additional losses often occur when a phase shifter changes phase states. In a capacitive loaded phase shifter, the insertion loss changes as a function of the degree of phase shift.

2.2.4 Switching Time & Power Handling Capabilities

Switching time is the property used to describe how much time it takes for a phase shifter to transition between phase states. The total switching time includes the time it takes for a control signal to cause a change in the device (such as the physical movement of a mechanical switch) along with the setting time for transients in the device. Applications such as phased array antenna’s require

8 fast switching times to effectively sweep a beam over a broad ﬁeld of view. Another important property relating to phase shifter operation is power handling capabilities. There are two main types of power handled and dissipated in a device; average power and peak power. Average power heats microelectronic devices and can lead to performance degradation over time. Meanwhile, peak power can cause damage to devices though breakdown effects. [9] The latter property is important in ferroelectric material based phase shifters that can be damaged though exceeding the material breakdown voltage.

2.2.5 Control Mechanism Topologies

In literature, there exist three main phase shifter topologies: electrical, mechanical, and magnetic control. Oftentimes, devices will utilize a combination of these control mechanisms resulting in electromechanical and magneto-mechanical phase shifters. Most modern phase shifters are either purely electrical or electromechanical in nature, but mechanical and magnetic phase shifters are still used for a number of specialized applications.

Magnetic Phase Shifters

The term ”magnetically controlled” is used to describe materials that change behavior under a DC biasing magnetic ﬁeld. In literature, magnetically controlled ferrite and yttrium-iron-garnet

(YIG) phase shifters are often reported. [10] [11] Magnetic phase shifters are desirable for select applications due to their high power handling capabilities. [12] One application of magnetic phase shifters is thyristor chopper control in the automotive industry. In this application, a control voltage is applied to a control winding around permalloy ferrite core to produce a phase delayed voltage on the output windings. Due to the need for voltage biasing, magnetic phase shifters are much more complex than mechanical phase shifters. [13]

9 Mechanical Phase Shifters

Mechanical phase shifters are simple transmission line based devices that produce phase shift based upon physical change in transmission line length. Commonly known as line stretchers, these phase shifters are lengthened though tightening of a screw or motorized control. [14] Mechanical phase shifters are desirable due to their linear adjustable phase shift and lack of a need for biasing or control voltages. In literature, mechanical phase shifters have been realized though sliding a bumped plate over a meta-material ridged waveguide structure to shorten the length of the waveguide and produce a phase shifting effect. [15]

Electrical Phase Shifters

Electrical and electromechanical phase shifters make up the large majority of modern phase shifter devices. These phase shifters vary widely in complexity from simple electromechanical switched-line phase shifters to complex multi-bit digital phase shifter architectures. A number of commonly used electrical and electromechanical phase shifters are described as follows:

Switched-Line Phase Shifter A switched-line type phase shifter is a electromechanical device capable of producing a ﬁxed degree of phase shift. Based on two transmission lines of ﬁxed, but different electrical length, the switched-line phase shifter transitions between states through the use of mechanical switching between transmission lines. The phase shift produced in this topology is based on the difference between the electrical length of a reference arm and delay arm as shown in Figure 2.1. This type of phase shifter is commonly implemented for obtaining large phase shift angles such as increments of 90 or 180. [16] Although well suited for large phase step increments, switched-line phase shifters lack the resolution obtainable by other phase shifter topologies. Addi- tionally, single-pole double-throw (SPDT) switches are required which adds a mechanical element to the phase shifter. [16] 10 Figure 2.1: Switched-Line Phase Shifter

High-Pass / Loss-Pass Phase Shifters High-pass / loss-pass phase shifters are electrical devices that create phase shift by switching between a high-pass filter and a low-pass filter. Unlike the switched-line phase shifters which are based on transmission lines of varying electrical length based on frequency, high-pass / low-pass filters are based on lumped element T- or π- structures. As a result, these filters can have a wide bandwidth since high-pass and low-pass filters have relatively

ﬂat phase angles over a wide frequency range. In addition to wide bandwidths, high-pass/low-pass

ﬁlters are compact since they use lumped elements instead of transmission lines. [17]

Loaded-Line Phase Shifter Loaded-line type phase shifters are another type of electromechanical device which are used for phase shift steps of 45 or less. [16]. Unlike switched-line phase shifters, loaded-line phase shifters operate by switching the load impedance of a transmission line causing small changes in the transmission phase angle of the electrical network. In order to avoid

11 creating amplitude variations between device states, the reactive loads are spaced by a quarter wavelength. [18] The impedance loading in these phase shifters is often achieved though the use of varactors or PIN diodes which can be switched on and off with a single control signal.

Ferroelectric Phase Shifters Ferroelectric phase shifters are electrical devices that change dielectric permittivity to create phase shift. These phase shifters often utilize a distributed phase shifter architecture where a transmission line is loaded with ferroelectric capacitors. Through al- tering the dielectric constant (through a biasing voltage) in ferroelectric materials such as BST, the capacitance and therefore phase shift on the line can be controlled. These phase shifters have fast- switching times and high tunablilty, but have low power handling capabilities and often require high biasing voltages. [19]

2.2.6 Summary

As can concluded from the vast number of phase shifter topologies, there is no single solution to phase angle control across the entire wireless spectrum. Selecting an appropriate phase shifter topology requires careful consideration of a number of properties including maximum phase shift, device insertion loss, required biasing voltages, and phase shift resolution. In order to quantify the performance of phase shifter design, a ﬁgure of merit (FOM) is commonly used which describes the degrees of phase shift that can be achieved at a speciﬁed frequency per decibel of loss in the device.

2.3 Phased Array Theory

When transmitting and receiving signals at radio frequency (RF), it is not always desirable to have an antenna radiating energy isotropically, or uniformly in the spacial domain. On the transmit side of communications, radiating isotropically means that the radiated power is uniformly

12 distributed about the antenna. This proves to be problematic in radar and electronic warfare applications since radiating isotropically can allow for signals, such as a radar pulse, to be more easily detected. Similarly, in the consumer electronic devices industry, unintended radiation can cause interference to other devices should those emissions interfere with another signal. Techni- cally speaking, non-directive radiation is also highly inefﬁcient since power is dissipated uniformly resulting in a weaker signal compared to an directive antenna (beam) that has gain from the power being focused over a narrow region.

From the receive point of view, there are equally as many disadvantages when using an isotropic radiator. In the radar and electronic warfare industry, intentional sources of directive radiation (jam- ming) entering a receiver beam can prevent signals from being detected. A directive beam allows for the source of interference to be ”nulled” or ignored and other spatial regions to be interrogated.

Similarly, the gain provided from a directional antenna receive pattern allows for weaker signals to be discovered which means earlier detection in radar. In the communications/cellular industry, the gain provided from a directional antenna beam allows for communication links to be able to operate farther distances such as in the case of satellite communications where antennas are designed to be highly directive.

Knowing the vast beneﬁts of being able to transmit and receive using directional beams, it becomes important to understand how phased array antennas are able to form such beams. At the most fundamental level, a phased array is a network of phase shifters and radiating antenna elements.

The components involved in the design of a phased array along with the number of elements are all important aspects, but ﬁrst it is necessary to understand how a single antenna functions.

13 Figure 2.2: Antenna Reﬂection Coefﬁcient

2.3.1 Antenna Basics

At the most basic level, an antenna is an electric device that converts an electrical signal into radiated electromagnetic (EM) waves and vice versa. Despite there being countless different types of antennas, all antennas can be characterized by a common set of parameters including frequency, bandwidth, impedance, reflection coefficient, radiation pattern, field regions, beamwidths, sidelobes, directivity, and gain. While not an exhaustive list, these properties are sufficient to develop a context for discussion on antennas and how they relate to phased array antenna systems.

Frequency & Bandwidth

The most fundamental property of any antenna is the frequency or band of frequencies on the

EM spectrum at which an antenna will radiate. Although any frequency can be fed into an antenna, the antenna will only radiate those frequencies that it has been designed to convert into EM waves.

With this in mind, it becomes necessary to define the range of frequencies, or bandwidth, over which an antenna can radiate equally well. Bandwidth is generally defined as range of frequencies over which the reflection coefficient is within 3dB of the peak value. Figure 2.2 illustrates this property

14 for a 8 GHz centered patch antenna. At 8 GHz, the reflection coefficient, or magnitude of the signal reflected back from the antenna is -6 dB (25% of the incident wave). The 3-dB bandwidth for this antenna is 400 MHz from 7.8 GHz to 8.2 GHz at which points the reflection coefficient is 3-dB greater than the -6 dB peak at which point 50% of the incident wave is reflected back by the antenna.

Impedance & Reﬂection Coefﬁcient

Electrical impedance is the effective resistance of an antenna at a given frequency. Defined as the combination of both resistive and reactive components, the industry standard for electrical components is an impedance of Zo = 50 + j0 ohms. Since this is often not the case in antenna design, it is necessary to match an antenna to a feeding transmission line using a matching network of capacitors and inductors. The reflection coefficient briefly discussed in the previous section is a metric of how well the antenna is matched to a transmission line. A very small reflection coefficient

(-30 dB or better) means that the antenna has a very good match while large reflection coefficient values (-10 dB or worse) means that the antenna is poorly matched and much of the incident signal is being reflected back. An important concept to keep in mind is that a low reflection coefficient does not always mean that all power will be radiated. Some power incident on antenna will be dissipated due to losses and mutual coupling.

Radiation Pattern & Field Regions

The radiation pattern of an antenna describes the spatial power distribution radiated in a spher- ical coordinate space. An antenna that radiates equally in all directions is said to be an isotropic radiator. Since it is not possible to design a perfectly isotropic radiator, all real antennas have radiation patterns that vary as a function of theta and phi angles. Figure 2.3 shows the radiation pattern of a dipole antenna. It can be observed that the antenna has a maximum power density in the theta

15 Figure 2.3: Dipole Antenna Radiation Pattern

plane and minimal power density orthogonal to the ground plane (theta plane). Such radiation patterns are only valid sufﬁciently far away from the antenna in what is known as the far ﬁeld region.

The electromagnetic fields that radiate from an antenna are broken up into three regions; reactive near field, radiating near field, and far field.. Each of these regions is spatially approximated in terms of range, R, from the antenna based on the maximum linear dimension on the physical antenna, D, and the wavelength in free space, λ0. Starting from the region nearest to the antenna, the reactive near field has electric and magnetic fields (E- and H- fields) that are out of phase by 90 degrees.

[20] Rather than propagating, the E- and H- fields stay within the reactive near field region due to the effect of the self-inductance and self-capacitance of the antenna. This region is typically defined as

s D3 R < 0.62 (2.1) λ0

16 After the reactive near field is the radiative near field (Fresnel) region. Within this region radiating fields begin to dominate the reactive fields that are seen in the reactive near field region. Unlike the far field region, the radiation patterns in this region vary greatly with distance. This region is defined as

s D3 2D2 0.62 < R < (2.2) λ0 λ0

Finally, the region beyond the radiative near field is the far field region. This region is classified by radiated fields in which the E- and H- fields are orthogonal in the direction of propagation. Unlike the radiative near field, the radiation pattern in this region is constant as a function of distance. That is not to say that the field strength does not change since the field strength is inversely proportional

1 1 to the distance R and the power density is inversely proportional to the square of the distance R2 .

This region is approximated by the following three conditions

2D2 R > (2.3) λ0

R >> D (2.4)

R >> λ0 (2.5)

Beamwidth & Sidelobes

In a far field radiation pattern, the region of peak radiation is defined as the main beam or mainlobe such as shown in Figure 2.4. The mainlobe of this phased array antenna radiation pattern is centered at 0 degrees theta. The beamwidth of the main beam is defined as the angular region bounded by the half-power (3-dB) of the peak gain of the main beam. In the case of this phased array radiation pattern, the beamwidth is around 10 degrees.

17 Figure 2.4: Phased Array Theta-Cut Radiation Pattern

The other beams in the phased array radiation pattern in Figure 2.4 are known as sidelobes. By deﬁnition, sidelobes are any smaller, secondary antenna beams that occur in undesired directions.

These beams cannot be eliminated, although there are weighting methods in phased arrays to reduce the power radiated in these beams. Each beam is separated by a null which is a direction at which there is no radiation.

Directivity & Gain

Directivity is an antenna property used to describe the peak radiated power relative to the average radiated power over all directions. An isotropic antenna would have a directivity of 1, while a higher directivity describes an antenna which has a ﬁeld focused towards one direction such as the main beam in a phased array antenna. Comparatively, gain is deﬁned as the ratio of transmitted power relative to an isotropic radiator. Unlike directivity, the gain of an antenna takes into account the losses that occur during transmission. For this reason, gain is frequently used to describe antenna performance rather than directivity due to losses being taken into account.

18 2.3.2 Phased Array Beamforming

Even the most highly optimized antenna element can only produce so much gain. In order to achieve the high antenna gains needed in communication and radar systems, it is necessary to form an antenna array consisting of multiple antenna elements. When two or more RF waves (as emitted from two or more antenna elements) interfere during propagation, their interference can either be constructive or destructive. In the time domain, this interference results in waves with greater magnitude during constructive interference and small or effectively canceled out magnitude in the case of destructive interference. Similarly, in the spatial domain, the interference of RF waves being emitted from multiple radiators, or phased array elements, creates a unique radiation pattern for the array in which directions of constructive interference create beams, or a main lobe and side lobes, and directions of destructive interference create nulls. As more antenna elements are added to an array, an increasingly narrow directive beam can be formed.

From a systems perspective, beamforming can be accomplished either in the analog or digital domain. In analog beamforming, the transmit/receive radiation pattern is determined by the magnitudes and phases of the signals delivered to each antenna element. In practice, this can be accomplished through a power divider and phase shifters before each antenna element or a transmit/receive (T/R) module before each antenna element. This architecture is used for high power applications, but is limited by the T/R module switching speed mainly due to phase shifters. Mean- while, a digital beamforming samples the magnitudes and phases on each antenna element and applies beamsteering and weighting vectors to the digital data. This allows for beamforming to be performed in parallel in digital hardware so that multiple scan angles can be examined at once.

Transmitting in a digital architecture is also possible though direct digital synthesis (DDS). DDS

19 Figure 2.5: Phased Array Antenna Beam Forming

is a technique where digital signals can be converted to analog signals directly though an digital- to-analog converter. Beamforming can be performed though DDS by generating signals with the necessary magnitudes and phases to replicate the behavior of an analog beamformer.

Moving on from architectures, the operation of a phased array is determined by the magnitude and phase delivered to each antenna element. Each combination of weighting and delays produces a unique radiation pattern that includes a high gain mainlobe and often unintended sidelobes. By applying weighting methods such as the Schelkunoff polynomial method, Dolph-Chebyshev, or

Minimum Mean-Square Error (MMSE), it is possible to reduce sidelobe levels or create nulls in a direction of interference. Figure 2.5 shows a graphical example of how applying the same phase to each antenna element results in a forward facing propagating wave or beam.

2.3.3 Electronic Beam Steering

In the design of phased array antennas, the distribution of antenna elements produces a unique radiation pattern. Applications requiring high antenna gain such as radio astronomy need a narrow beam radiation pattern that is highly directive. Although antenna gain is increased in these instances,

20 the ﬁeld of view (FOV) becomes highly limited. Beam steering though mechanical or electrical means becomes imperative to scan a region which extends beyond the FOV of the phased array.

Mechanical beam steering is accomplished though changing the azimuth or elevation though the use of servos and gimbals. These mechanical methods come at the cost of slow speed due to having to physically reposition the array for each measurement. Alternatively, electronic beam steering can be performed though varying the phase at each antenna element to change the phased array radiation pattern.

A visual depiction of electronic beam steering is shown in Figure 2.6. In the first sub-figure, the phase shift angle increases from left to right causing transmitted waves to become more delayed from right to left. This causes the beam to steer to the right of center. The opposite applies in the second sub-figure when the phase shift angle decreases from left to right. The resulting beam then steers to the left of center.

The required phase difference, ∆ϕ, from array element to element in order to achieve a speciﬁc phase angle can be determined using the following equation

2π · d · sinθ ∆ϕ = (2.6) λ0

where d is the distance been radiating antenna elements, θ is the desired beam steering angle, and λ0 is the wavelength for propagation of waves in free space.

2.4 Barium Strontium Titanate Thin Film Technology

2.4.1 Material Properties

Recent advances in the microwave electronics ﬁeld have resulted from discoveries made in ferroelectric materials research. One material often utilized in tunable microwave device research is

21 (a) Phased Array Antenna Beam Steering (Right)

(b) Phased Array Antenna Beam Steering (Left)

Figure 2.6: Electronic Beam Steering Based on Phase Delay

Barium Strontium Titanate (BST), BaxSr(1−x)T iO3, which exhibits nonlinear dielectric permittivity tuning under the application of a DC biasing voltage. The material composition of BST is dependent on the desired critical temperature for the material which is the temperature at which

BST transitions from a ferroelectric phase material to a paraelectric phase material. The BST com- positions most commonly studied are Ba0.6Sr0.4T iO3 and Ba0.7Sr0.3T iO3 which both have a critical temperature that is close to room temperature. [21]

In thin ﬁlm form, BST has a relative dielectric permittivity between εr = 500−700. When a DC biasing voltage of 0-8V is applied, the relative dielectric permittivity can drop as low as εr = 180.

22 [4] When utilized in development of microwave devices, the tuning behavior of BST can be used to create a wide range of reconﬁgurable RF components.

2.4.2 Applications in Microwave Devices

Barium Strontium Titanate components are frequently used in agile electronic circuits designs.

Due to its high dielectric constant at room temperature and low required basing voltage for tuning, researchers have found many applications for BST in ﬁlters, matching networks, phase shifters, and many other types of microwave devices.

Filters

Tunable low-pass and bandpass filters have been demonstrated using BST thin film capacitors at radio frequencies. In lumped-element filters, the application of a 0-9 V DC bias has been shown to result in a 40% tunability (120-170 MHz) in demonstrated low pass filters and 57% tunability

(176-276 MHz) in bandpass ﬁlters . [22] At higher frequencies, tunable bandpass ﬁlters based on

BST thin ﬁlm interdigitated capacitors have been shown to demonstrate center frequency tuning of

16% from 2.44 GHz to 2.88 GHz. [23] Within the Ku- and X-bands, tunable BST based combline bandpass filters have been demonstrated to produce 20% and 22% tuning in center frequency under a 0-100V DC bias, respectively. [24] All of these examples show the versatility of BST when used to create frequency reconfigurable filters.

Matching Networks & Power Ampliﬁers

Another common application of BST thin ﬁlm varactors is tunable matching networks (TMN).

In [25], ferroelectric varactors were used to capacitvely load a transmission line in order to adap- tively match a load impedance. Similarly, an impedance transformer based on tunable BST thin ﬁlm varactors is demonstrated in [26] to develop a narrow band matching network with a tunable center

23 frequency for antenna matching. Lumped element implementations of TMNs have been demonstrated for a ”T”-configuration matching network [27] and ”pi” matching network [28]. Finally, in [29] and [30], BST varactors are used to tune the output impedance of a power amplifier. The latter implementation uses thick film BST varactors to de-tune the input matching to reduce power amplifier gain for VSWR protection.

Phase Shifters

A number of phase shifters have been demonstrated in literature using BST thin ﬁlm varactors.

[31][32] In these phase shifter implementations, parallel plate and interdigitated capacitor (IDC) structures are commonly seen fabricated on substrates such as Sapphire. A summary of these phase shifter characteristics is provided in Table 2.1.

Table 2.1: Varactor Simulation Results

Varactor Simulation Results Ref Freq Type Composition Phase Insertion Figure Basing (GHz) Shift Loss of Merit Voltage (deg) (dB) (deg/dB) (V) [31] 6.3 Parallel Ba0.2Sr0.8T iO3 240 3 93 20 Plate [32] 30 Parallel BaSrT iO3 157 5.8 27.1 20 Plate [33] 20 IDC BaSrT iO3 110 3.4 32 100 [34] 20 IDC Ba0.45Sr0.55T iO3 360 6 50 20

24 CHAPTER III

PHASE SHIFTER OPTIMIZATION & SIMULATION

The primary focus of this masters thesis is the optimization of BST thin ﬁlm varactor based phase shifters. This chapter covers the theory, design, optimization and simulation of varactors and varactor based phase shifters.

3.1 BST Thin Film Varactor Theory

3.1.1 Varactor Structure

A variable capacitor (varactor) is a basic circuit element that has a capacitance which can be varied though an external stimulus. One type of capacitive structure, known as the parallel-plate capacitor, derives its capacitance though a metal-insulator-metal (MIM) interface as shown in Figure

3.1. Mathematically, the capacitance, C, of a parallel plate structure is expressed as follows:

ε ε A C = 0 r (3.1) d

where ε0 is the permittivity of a vacuum, εr is the relative permittivity of the dielectric, A is the conducting plate area, and d is the distance between conducting plates.

25 Figure 3.1: Parallel Plate Capacitor Diagram

3.1.2 Varactor Tuning

In Chapter 2, a voltage tunable dielectric material called Barium Strontium Titante was intro- duced. Due to its ferroelectric nature, BST has a variable permittivity which is expressed as a function of applied voltage bias. When used as the dielectric layer in a parallel plate capacitor, the expression for capacitance becomes

ε ε (V )A C(V ) = 0 r DC (3.2) DC d

where ε0 is the permittivity of a vacuum, εr is the relative permittivity of the dielectric as a function of applied voltage bias, A is the conducting plate area, and d is the distance between conducting plates.

Recalling the behavior of BST under an applied electric ﬁeld, the dielectric constant of BST will decrease as an applied voltage increases from 0V - 8V as demonstrated in [35]. Figure 3.2 shows the relationship between applied voltage and dielectric constant of BST with a thickness of 0.25 microns. In the context of the parallel-plate capacitor equation, this relationship allows for the capacitance to be increased/decreased by decreasing/increasing the applied voltage bias, respectively. The tuneablility, τ, of BST is expressed in [36] as

26 Figure 3.2: BST Dielectric Constant & Loss Tangent under Applied Voltage

ε − ε τ = r0 r,bias (3.3) εr0

where εr0 is the relative permittivity of BST without an applied voltage bais and εr,bias is the relative permittivity of BST under a maximum applied bias of 8V.

3.1.3 Electrical Model

The equivalent electrical model for ferroelectric parallel plate varactors is well established in literature. As shown in Figure 3.3, the electrical model consists of a variable capacitance, series resistance, shunt resistance, and inductance. Mathematical expressions for each of these electrical properties have been derived in [37].

The variable capacitance, C, in the electrical model is the parallel plate capacitor equation is

ε ε wl C = 0 r (3.4) d

where w and l are the width and length of the overlapping plates and d is the distance between the conducting plates. The relative permittivity is that of the BST dielectric layer and is variable based on applied voltage bias. 27 Figure 3.3: Varactor Electrical Model

The series resistance Rs is resistance caused by conductor losses expressed as

l R = (3.5) s σwt

where w and l are the width and length of the conductor, t is the conductor thickness, and σ is the material conductivity.

The parallel, or shunt, resistance Rp is the resistance caused by dielectric leakage losses expressed as

1 R = (3.6) p ωCtanδ

where ω is the angular frequency, C is the variable capacitance, and tanδ is the dielectric loss tangent or dielectric dissipation factor.

Finally, the series parasitic inductance Ls expressed as 28 Z L = o sin(βl) (3.7) s ω

where Zo is the transmission line characteristic impedance, ω is the angular frequency, and βl is the product of the phase constant and transmission line length.

The other component of the electrical model is the coplanar waveguide transmission at each end of the device structure. Although adding comparatively little loss, the transmission line losses and electrical length can become signiﬁcant as the length of the CPW line increases.

3.1.4 Varactor Optimization Parameters

Based upon the parallel plate capacitor equation for a ferroelectric dielectric, there are three parameters that can be modiﬁed to change the capacitance and resulting phase shift of the varactor device; relative dielectric permittivity, dielectric thickness, and overlap area. The ﬁrst of these properties, being the relative dielectric permittivity, is altered though the application of a DC biasing voltage. This parameter will be swept from εr = 180 − 650 for each varactor device in order to simulate the phase shift and insertion loss in each device.

Using the remaining controllable parameters, optimization of varactor devices will be achieved through varying the dielectric thickness and changing the overlap area using smaller/larger overlaps as well as multi-varactor designs. The ﬁrst set of simulations involves varying the dielectric thickness of a standard 5 um by 5 um varactor design in order to observe the effect on device insertion loss and phase shift. Dielectric thicknesses of 50, 150, 200, 250, and 500 microns will be simulated to observe the effect of a full range of thin ﬁlm thicknesses.

Variation of the parallel plate area will be examined using two approaches. First, the area of a single overlapping area will be varied using square edge lengths of 2.5, 5, 6, 7.5, and 10 micrometers. Second, the concept of multi-varactors as shown in Figure 4.3 will applied where

29 (a) Single (b) Double (c) Triple

Figure 3.4: Varactor Multi-Capacitor Variations

there are multiple parallel plate overlapping sections in a single varactor device. Varactors with both double and triple overlap areas will be simulated for overlap areas 2.5 and 5 micrometers in edge length. The simulation parameters and results for all of these devices will be presented in the upcoming sections.

3.1.5 Simulation Parameters

Frequency domain simulations of single segment, parallel-plate varactor devices are performed using Advanced Wave Research (AWR) Microwave Office (MWO). The AWR MWO software provides a comprehensive electronic design environment capable of RF and microwave circuit simulations. Commonly used software applications include active devices such as amplifiers, mixers, and multipliers as well as passive components including couplers, splitters/combiners, filters, and antennas. [38]

Within the AWR Design Environment software, there are a number of EM solvers that can be used in the simulation of RF and microwave devices and systems. The 3-D Planar EM Analysis

30 Figure 3.5: Parallel Plate Varactor Material Stackup

software called AXIEM is the best choice for EM simulation of varactor devices. Utilizing full- wave planar Method of Moments (MoM) technology, the AXIEM solver is optimal for simulating the passives and PCB/IC interconnects designed in this thesis. The following subsections detail the solver conﬁguration and simulation parameters used for simulation of the varactor devices.

Material Properties

As detailed in the previous sections, the varactor device used in this thesis has four layers; substrate, bottom metal, dielectric, and top metal. In order to perform an EM simulation, certain material properties must be known for all conductors and dielectric layers including the permittivity, permeability, conductivity, dielectric dissipation factor (loss tangent), and layer thickness. Table 3.1 lists the material properties for each of the layers including Gold (Au), Sapphire, and BST. A visual material stack-up is shown in Figure 3.5. The dielectric constant simulation range for BST is used to mimic the tuning behavior that BST exhibits under a 0-8VDC bias. Multiple simulations must be performed with a varying BST dielectric constant to fully simulate tuning behavior.

Ports

In an electrical network, the inputs and outputs of a device are referred to as ports. A simple device such as a varactor only has an input and output port. Simulation port properties include

31 Table 3.1: Material Properties for BST Parallel-Plate Varactor

Material Properties Material Relative Relative Conductivity tanδ Thickness Permittivity Permeability (σ) (µm) Gold 1 1 4.26e7 0 0.3 BST 180-650 1 0 0.02 0.2 Sapphire 9.7 1 0 0.005 600

real and imaginary impedance components, explicit ground plane reference, and excitation power and phase if the port is defined as an input. These properties influence the behavior of an EM simulator since each device port appears to be terminated by an impedance, Zo, as defined by its respective port impedance setting. The varactor devices in this thesis are defined as having no explicit ground reference due to the co-planar waveguide structure, an impedance of 50 ohms, and an excitation voltage of 0 dBm at 0 degrees phase on the input ports. Revisiting the ground plane reference property, negative ports (as defined by a negative port number corresponding to the respective input/output port) is used to define the ground planes in a standard (non-conductor backed) coplanar waveguide. The port connections for a standard varactor device are shown in

Figure 3.6.

Meshing

Electromagnetic solvers use technique called meshing to generate a polygonal approximation of computer aided design (CAD) geometries in the geometric domain. The size of a mesh ’cell’ can be thought of as the resolution of elements used in a method of moments computation. Finer meshes allow for increased accuracy of simulation results, but come at the cost of increased computational workload and time. Generally, a mesh size should be used such that the smallest geometric features

32 Figure 3.6: Parallel Plate Varactor Port Layout

in a design are captured by the mesh. Using a mesh cell size of 0.5 by 0.5 microns, a simulated varactor mesh is shown in Figure 3.7. Additionally, a meshing frequency is deﬁned at which meshing will be performed. By default, meshing is performed at the highest frequency simulated.

Solver Requests

When an EM simulation is performed, it is necessary to specify what results should be returned by the simulator. Depending on the type of simulation being performed, results can include S- parameters, near field & far field radiation patterns, and electrical currents in the EM domain. The appropriate return for the varactor simulations in this thesis are S-parameter results as they can be used to determine the transmission and reflection behavior of the device. Regardless of the results requested, it is necessary to define the frequency range and resolution over which the results are

33 (a) Parallel Plate Varactor with Fine Meshing

(b) Closeup View of Parallel Plate Varactor Meshing

Figure 3.7: Parallel Plate Varactor Meshing

returned for. The simulation setup used in this thesis is speciﬁed for DC - 20 GHz with a linear frequency step size of 100 MHz.

34 3.1.6 Simulation Results

Through the variation of dielectric thicknesses, parallel-plate overlaps, and number of overlap segments in varactor devices, a set of simulated S-parameter results were obtained. Scattering parameters (S-parameters) describe the behavior of a linear electrical network. In a two-port network, there are four complex (magnitude and phase) scattering parameters measurements including

S11,S12,S21, andS22. The physical properties associated with each of these parameters are as follows:

• S11 is the input return loss (reﬂection coefﬁcient)

• S12 is the reverse isolation

• S21 is the insertion loss (transmission coefﬁcient)

• S22 is the output return loss

The starting point for the varactor device simulations is a single overlapping, 5 by 5 micron varactor with a dielectric thickness of 200 nanometers. Using the simulation methodologies discussed in the prior section, the magnitude and phase of the transmission coefficient S21 are simulated and shown in Figure 3.8 for multiple voltage biasing points. Three important pieces of information can be extracted from this plot; phase shift, insertion loss, and figure of merit. From the background section, phase shift is defined as the difference between two phase angles or in the case of a tunable phase varactor / phase shifter, the difference between the maximum and minimum phase angles.

Looking at the phase angles for maximum phase angle (0V) and minimum phase angle (8V) at a frequency of 8 GHz, the simulated phase shift is found to be 30.81 degrees.

In terms of losses, the device insertion loss is deﬁned as the minimum loss in the device over the entire 0-8V tuning range. For the ”standard” varactor, the insertion loss occurs at a bias of 8V

35 (a) S21 Magnitude

(b) S21 Phase

Figure 3.8: Standard Varactor Transmission Magnitude & Phase

with a value of -0.523 dB. Additionally, there is loss associated with tuning from 0V to 8V which is

2.785 dB for the ”standard” varactor. Finally, a ﬁgure of merit (FOM) is deﬁned as the phase shift

36 produced in a varactor per dB of loss. The FOM is found to be 11.06 degrees/dB in the ”standard” varactor device.

Varactor Thickness Variation

The analysis performed for the ”standard” varactor device is now repeated for each varactor device design that was described in the varactor optimization parameters section. Table 3.2 tabulates the results for dielectric thickness variation in single overlapping, 5 by 5 micron varactor devices. As parallel plate capacitor theory would imply, the phase shift in a varactor decreases as the dielectric thickness increases. Similarly, the loss in a varactor device decreases as the dielectric thickness is increased since there is less capacitance. It can be noted in the FOM that varactor devices with a thicker dielectric layer produce more phase shift per dB of loss than varactors with thinner dielectric layers.

Table 3.2: Varactor Dielectric Thickness Variation

Varactor Simulation Results (8 GHz) Type Capacitor Dielectric Phase Insertion Loss Figure Area Thick- Shift Loss (dB) of Merit (µm2) ness (deg) (dB) (deg/dB) (nm) Single 5x5 50 29.03 -0.311 12.089 2.40 Single 5x5 150 33.82 -0.718 3.892 8.69 Single 5x5 200 30.81 -0.523 2.785 11.06 Single 5x5 250 28.05 -0.430 2.129 13.18 Single 5x5 500 20.6 -0.311 0.990 20.81

Varactor Overlap Area Variation

The simulated results for a variation in parallel-plate capacitor overlap area are tabulated in

Table 3.3. In all of these varactor devices, the phase shift, insertion loss, and tuning loss all tend to

37 increase as the parallel-plate capacitor area is increased. Despite this behavior, a larger overlap area is shown to decrease the FOM since each parameter does not increase proportionally to the increase in area.

Table 3.3: Varactor Parallel-Plate Area Variation

Varactor Overlapping Sections Variation

The simulation results for multiple overlap area varactors is tabulated in Table 3.4. Much like the results from an increase in overlap area, adding more overlapping sections to a varactor increases the phase shift, insertion loss, and tuning loss. Unfortunately, the results show that doubling or tripling the number of overlapping sections in a varactor does not show a proportional increase in these parameters. As a result, the double and triple overlap varactors have FOMs of less than half and one-third of a single overlap varactor, respectively.

Summary

After simulating three different types of varactor variations, a number of conclusions can be drawn about varactor behavior and optimization:

• Increasing dielectric thickness increases FOM 38 Table 3.4: Multi-Varactor Conﬁgurations

Varactor Simulation Results Type Capacitor Dielectric Phase Insertion Loss Figure Area Thick- Shift Loss (dB) of Merit (µm2) ness (deg) (dB) (deg/dB) (nm) Single 2.5x2.5 200 12.77 -0.383 0.306 41.73 Single 5x5 200 30.81 -0.523 2.785 11.06 Double 2.5x2.5 200 21.52 -0.44 1.052 20.46 Double 5x5 200 35.36 -1.336 5.929 5.96 Triple 2.5x2.5 200 27.89 -0.542 2.019 13.81 Triple 5x5 200 32.72 -2.439 7.791 4.20

• Increasing overlapping area decreases FOM

• Increasing number of overlapping areas decreases FOM

Based on these simulations, an optimal varactor could be obtained by following these design guidelines. Looking at the combined varactor simulation data in Table 3.5, the top two varactor designs in terms of ﬁgure of merit are the 2.5 by 2.5 micron single varactor of 200 micron thickness and the 5 by 5 micron single varactor of 500 micron thickness.

3.2 Phase Shifter Simulations & Optimization

Based on the earlier work of Spatz [4], varactor segments can be joined together, or cascaded, in order to produce a phase shifter device. Recalling the requirements of a desirable phase shifter from

Chapter 2, it is important to minimize device length and loss while maximizing the figure of merit achieved by the phase shifter. By using circuit simulation techniques in AWR Microwave Office it is possible to find an optimal 360 degree phase shifter based on BST varactor devices.

39 Table 3.5: Varactor Simulation Results

Varactor Simulation Results Type Capacitor Dielectric Phase Insertion Loss Figure Area Thick- Shift Loss (dB) of Merit (µm2) ness (deg) (dB) (deg/dB) (nm) Single 2.5x2.5 200 12.77 -0.383 0.306 41.73 Single 5x5 50 29.03 -0.311 12.089 2.40 Single 5x5 150 33.82 -0.718 3.892 8.69 Single 5x5 200 30.81 -0.523 2.785 11.06 Single 5x5 250 28.05 -0.430 2.129 13.18 Single 5x5 500 20.6 -0.311 0.990 20.81 Single 6x6 200 34.42 -0.793 4.301 8.00 Single 7.5x7.5 200 34.92 -1.5 6.446 5.42 Single 10x10 200 28.82 -3.422 8.955 3.22 Double 2.5x2.5 200 21.52 -0.44 1.052 20.46 Double 5x5 200 35.36 -1.336 5.929 5.96 Triple 2.5x2.5 200 27.89 -0.542 2.019 13.81 Triple 5x5 200 32.72 -2.439 7.791 4.20

3.2.1 Device Optimization

Based on microwave circuit theory, the effect of cascading multiple electrical networks such varactors can be simulated using network transmission parameters. Using the S-parameters from each varactor variation in the previous section, the effect of cascading multiple segments can be simulated as shown in Figure 3.9.

The following sections simulate phase shifters based on the varactor variations from the previous section. Each phase shifter device is made up of the number of varactor segments that cause the overall phase shift to be closest to 360 degrees. As a result of this, varactor segments that appeared optimal in the previous section may no longer appear optimal when cascaded to reach this degree of phase shift.

40 Figure 3.9: Cascading Varactor S-Parameter Blocks in AWR Microwave Ofﬁce

Varactor Thickness Variation

In the previous section it was found that varactor devices with thicker dielectric constants have an increased ﬁgure of merit. By cascading these varactor devices to form 360 degree phase shifters, the behavior of each device has changed as summarized in Table 3.7. Looking at the phase shifter simulation results, this trend in FOM remains consistent. It should be noted that despite an increase in FOM, the number of varactor segments required for 360 degree phase shift increases as well. In practice, this means that the device area is larger which is not often desirable.

Table 3.6: Phase Shifter BST Thin Film Thickness Variation

41 Varactor Overlap Area Variation

Looking back to the previous section, it was noted that an increase in varactor overlap area causes a decreases in the FOM. This trend is also found for the phase shifer devices as shown in

Table 3.7. Although the smaller overlap areas produce the highest FOM, the 6 by 6 micron phase shifter is optimal since it achieves a high phase shift while only needing 14 varactor segments causing it to have a reduced size.

Table 3.7: Phase Shifter Capacitor Area Variation

Varactor Overlapping Sections Variation

For the ﬁnal variation, phase shifters using varactors with multiple overlapping sections were simulated against those with only single overlapping sections as shown in Table 3.8. Due to the number of varactor segments used being adjusted to produce 360 degrees of phase shift, the effect that multi-overlapping section varactors has on FOM has been reduced. Despite this, a single overlapping section is desirable due to the high FOM while not requiring too many additional varactor segments.

42 Table 3.8: Phase Shifter Multi-Varactor Variation

3.2.2 Summary

When all of these simulation results are combined into a Table 5.2, it becomes apparent that there are trends between the physical properties of the phase shifters and their simulated characteristics.

Choosing an optimal phase shifter from these options requires considering the importance of device size (number of segments), insertion loss, and FOM. Of these properties, FOM is the most important since a low FOM means that a high degree of loss is incurred between phase angle states. Device size is of second highest importance since it is desirable for devices to take up as little chip area as possible in microelectronics. While still highly important, insertion loss does not vary much between phase shifter devices and does not matter as much as amplitude ﬂuctuation between device states. Based on the weightings for thesis criteria, the 6 by 6 micron single overlap phase shifter with standard thickness is the optimal device.

Moving forwards, the optimal 6 by 6 micron single overlap phase shifter with standard thickness will be used. For experimental demonstration purposes, a simple phased array will be designed, simulated, and fabricated for use in conjunction with the optimal BST tunable phase shifter.

To achieve this, the phased array must support the following functions; probing interface, power

43 splitting, phase shifting, impedance matching, and radiation of the resulting signal. The following chapter will describe the design of each subsection of a phased array MMIC and hybridized circuit.

Table 3.9: Phase Shifter Simulation Results

Phase Shifter Simulation Results Type Capacitor Dielectric Varactor Phase Insertion Loss Figure Area Thick- Segments Shift Loss (dB) of Merit (µm2) ness (deg) (dB) (deg/dB) (nm) Single 2.5x2.5 200 38 364.8 -15.41 9.03 40.1 Single 5x5 50 8 377.8 -8.389 16.261 23.2 Single 5x5 150 16 373.1 -8.342 9.418 39.6 Single 5x5 200 18 358.6 -8.166 8.464 42.4 Single 5x5 250 20 354.1 -8.189 8.081 44.1 Single 5x5 500 27 362.9 -9.081 7.429 48.9 Single 6x6 200 14 365.6 -7.704 9.076 40.3 Single 7.5x7.5 200 12 377.3 -7.717 10.343 36.5 Single 10x10 200 8 366.8 -6.828 13.412 27.3 Double 2.5x2.5 200 26 370.2 -12.91 10.057 36.8 Double 5x5 200 12 358.9 -8.195 10.465 34.3 Triple 2.5x2.5 200 20 362.5 -11.66 10.53 34.4 Triple 5x5 200 10 381.8 -9.148 12.772 29.9

44 CHAPTER IV

MMIC / HYBRIDIZED PHASED ARRAY DESIGN

In the previous section, optimized phase shifter devices were designed and simulated. The second portion of this thesis involves the integration of the phase shifter devices into a phased array antenna circuit to demonstrate beam steering capabilities. Two phased array circuit implementations are presented including a monolithic microwave integrated circuit (MMIC) and a hybrid packaged printed circuit board (PCB) design. Each design covers circuit elements including transmission lines, power dividers, phase shifter integration, and transitions for coplanar waveguide (CPW) and microstrip technology, respectively. Before circuit design can be discussed, phased array antenna designs will be presented for each circuit.

4.1 Phased Array Design

The design of a beam steering phased array antenna requires three considerations: antenna element design, phased array design, and beam forming techniques. In order to address both the

MMIC and hybridized phased array antennas, all calculations and simulations will be presented along-side each other in this section. This discussion begins with the design of a singular antenna element.

45 4.1.1 Patch Antenna Design

One of the most commonly used antenna elements in phased array design is the microstrip patch antenna. The patch antenna is often used in planar arrays due to ease of integration with planar PCBs

& MMICs and closed form expressions of its behavior. The following assumptions are made for all design calculations:

Table 4.1: MMIC & Hybrid Antenna Properties

Antenna Calculation Parameters Frequency (GHz) Relative Dielectric Thickness (um) Permittivity MMIC 8 9.7 600 Hybrid 8 5.2 1600

As stated above, closed form equations for microstrip patch antennas are well reported in reference texts and literature. Using the parameters from Table 4.1, the width and length of a rectangular patch antenna can be calculated. The starting point in determining patch antenna parameters is calculating the antenna width, W, which controls the antenna input impedance.

v W = √0 (4.1) 2fr r,eff

In the equation, v0 is the velocity of a wave in free space, fr is the frequency of the antenna, and r,eff is the effective relative permittivity as determined in the next equation.

r + 1 r − 1 = + √ (4.2) r,eff 2 h 2 1 + 12 W

For a single layer dielectric substrate, the effective relative dielectric permittivity is dependent on the relative permittivity of the substrate r, the thickness or height of the substrate, h, and the width, 46 W, as determined from the previous step. Now that the width and effective relative permittivity have been determined, the length extension, ∆L can be calculated

W (r,eff + 0.3)( h + 0.264) ∆L = 0.412h W (4.3) (r,eff − 0.258)( h + 0.8)

Finally, the actual length, L, of the patch antenna can be calculated as follows using all of the previously discussed parameters along with the permittivity and permeability of free space 0 and

µ0, respectively.

1 L = √ √ − 2∆L (4.4) 2fr r,eff µ00

Solving these equations for the design parameters results in base dimensions for the MMIC and hybrid patch antennas as summarized in Table 4.2. These antenna parameters can be used as a starting point when simulating the S-parameter and far ﬁeld behavior of the antennas.

Table 4.2: MMIC & Hybrid Calculated Antenna Parameters

Calculated Patch Antenna Parameters Width (mm) Length (mm) W/L Ratio MMIC 8.1 5.9 1.370 Hybrid 10.6 7.6 1.395

Although an antenna of these speciﬁed dimensions should theoretically radiate at the desired frequency, a matching network is still required to deliver power to the radiating element. The characteristic impedance of a microstrip patch antenna is often in the range of a few hundred ohms.

Simply feeding the patch antenna with a 50 ohm microstrip transmission line will result in a large impedance mismatch causing most of the power to be reﬂected back into the transmission line.

47 This can be corrected though a number of feeding methods including an insert feed or a quarter- wavelength transformer.

As the name would imply, a quarter wavelength transformer is a transmission line section of length λeff /4 that is used to match a patch antenna to the 50 ohm microstrip line. The expression uses the effective wavelength, λeff since the transmission line is on a dielectric substrate. The theory behind this can be realized though examination of the input impedance equation given as follows

ZL + iZ0tanh(βl) Zin = Z0 (4.5) Z0 + iZLtanh(βl)

where Z0 is characteristic impedance of the transmission line, ZL is the load impedance of the transmission line, and βl is the product of the wavenumber and transmission line length. The wavenumber is deﬁned as

2π β = (4.6) λ0

Evaluating the limit of the transmission line equation at l = λ0/4 causes the hyperbolic tangent functions to approach inﬁnity at which point the equation can be farther reduced to

Z0 Zin = Z0 (4.7) ZL

Re-arranging this equation to solve for the required characteristic impedance of the quarter wavelength transmission line yields the following result

√ Z0 = ZinZL (4.8)

48 Using the material properties for the MMIC and hybridized circuit substrates, the required quarter-wavelength characteristic impedances can be determined using the EM:Talk microstrip patch antenna calculator [39] and the AWR TXLINE calculator. The results from the calculator are tabulated in Table 4.3

Table 4.3: Quarter-Wavelength Transformer Calculated Characteristic Impedance Values

Quarter-Wavelength Transformer Parameters Input Load Characteristic TX Line TX Line Impedance Impedance Impedance Width (mm) Length (mm) (Ω) (Ω) (Ω) MMIC 50 481.5 155.16 0.011 3.885 Hybrid 50 279 118.11 0.326 5.039

Simulations of the MMIC and hybridized microstrip patch antennas can now be performed for the calculated antenna dimensions and quarter-wavelength transformer characteristic impedance values.

4.1.2 Patch Antenna Simulations

The patch antenna simulations for both the MMIC and hybridized substrates are performed in using FEKO. Applying the same simulation principles discussed in Chapter 3, the reflection coefficient and far field radiation patterns are simulated for each design. One important assumption is that the ground plane in each design can be sufficiently modeled using an infinite perfect electric conductor (PEC). This may produce simulation results slightly different from reality for the hybrid substrate, but is necessary due to the microstrip port requirements in FEKO.

In the hybridized antenna design, a wider bandwidth is desirable due to poor tolerances associated with both the FR-1 substrate and the milling machine. The FR-1 substrate is not intended to be

49 used for high frequency circuit design. For this reason, a wider bandwidth is desired to decrease the effect of these tolerances.

Initial S-parameter simulations indicated that the resonance frequency of each antenna was around 0.1 GHz higher/lower than the desired 8 GHz resonance. In order to correct for this an optimization routine was run in FEKO to vary the width and length of the patch antenna. In order to maintain the input impedance, the width to length ratio was maintained in the optimization. After a number of iterations, the optimal patch antenna widths and lengths were found to be

Table 4.4: FEKO Optimized Microstrip Patch Antenna Width & Length

Optimal Patch Antenna Parameters Width (mm) Length (mm) W/L Ratio MMIC 7.954 5.806 1.370 Hybrid 9.8845 7.087 1.395

The following figures show the CAD model, reflection coefficient, and far field radiation pattern for both the hybrid and MMIC patch antenna designs.

4.1.3 Linear Array Design

There are multiple different conﬁgurations that can be used when designing a phased array antenna. The simplest type which can be used for beam steering demonstration is the linear array.

In a linear array, patch antenna elements are distributed with equal spacing in a single row. Since the addition of antenna elements coherently and destructively interferes with the radiation pattern, it is desirable to avoid grating lobes. Prevention of grating lobes can be achieved by spacing elements in a manner such that

d/λ0 ≤ 1/(1 + sinθmax) (4.9) 50 (a) MMIC

(b) Hybrid

Figure 4.1: Quarter-Wavelength Transformer Fed Patch Antenna CAD Model

where d is the distance between consecutive elements, λ0 is the wavelength of the propagation medium (free space), and θmax is the maximum desired beam steering angle.

For the purpose of antenna array design in this thesis, a two element linear phased array will be used with an element spacing of λ0/2 to avoid grating lobes.

4.1.4 Beam Steering Calculations and Simulations

In order to steer the mainlobe of an antenna array, it is necessary to alter the phases being fed

at the source of each antenna element. This behavior can be simulated by examining the simulated

phi cut of the far ﬁeld radiation pattern as the phase difference between the patch elements is varied.

Determining the required phase angle difference between elements to achieve a given beam angle

can be determined as follows

51 (a) MMIC

(b) Hybrid

Figure 4.2: Patch Antenna Reﬂection Coefﬁcient (S11)

2π · d · sinθ ∆ϕ = (4.10) λ0

where d is the distance been consecutive patch antenna elements, θ is the desired beam steering angle, and λ0 is the wavelength of the medium of propagation (free space).

The element-to-element phase shift is calculated using the assumption that the linear patch array elements are separated by λ0/2. Through using the antenna array simulation capabilities of FEKO,

52 (a) MMIC

(b) Hybrid

Figure 4.3: Patch Antenna Far Field Radiation Patterns

the theoretical and simulated beam steering angles are tabulated in Table 4.5. It can be noted that the simulation beam steering angles are roughly half that of the theoretical values as shown in Figure

4.4. Although the simulated beam steering angles fall short of the theoretical values, the angle

53 difference can be calibrated out by creating a look up table. Since the phase shifters in the array have continuously variable phase shift, experimental phase differences can be determined such that each phase difference maps to a desired beam steering angle. The far ﬁeld radiation patterns and theta cuts for beam angles of 0, -30, and 30 degrees are shown in the following ﬁgures.

Table 4.5: Linear 2-Element Patch Array Beam-Steering Angles

Beam-Steering Angles Desired Phase Calculated Phase Actual MMIC Actual Hybrid Angle (deg) Difference (deg) Angle (deg) Angle (deg) 0 0 0 0 5 15.7 3 4 10 31.3 7 6 15 46.6 10 10 20 61.6 13 12 25 76.1 16 16 30 90 19 18 35 103.2 22 21 40 115.7 25 24 45 127.3 27 26 50 137.9 29 28 55 147.4 31 30 60 155.9 33 32

54 Figure 4.4: Beam Steering Angle (Expected vs. Simulated)

55 (a) Far Field Radiation Pattern

(b) Theta Cut of Gain

Figure 4.5: Beam Steering: 0 Degrees

56 (a) Far Field Radiation Pattern

(b) Theta Cut of Gain

Figure 4.6: Beam Steering: 30 Degrees (18 Degree Actual)) 57 (a) Far Field Radiation Pattern

(b) Theta Cut of Gain

Figure 4.7: Beam Steering: -30 Degrees (-18 Degree Actual) 58 4.2 Monolithic Microwave Integrated Circuit (MMIC) Design

A Monolithic Microwave Integrated Circuit (MMIC) is a type of integrated circuit that operates at microwave frequencies. In this context, monolithic refers to the circuit design existing on a single substrate. This type of design is often desirable as it can be fabricated at lower costs and packaged for integration with other devices. While there are many advantages to this type of circuit, a number of considerations must be taken into consideration when working between two different transmission line technologies. The following sections cover each element of a MMIC design. A completed MMIC design is not presented in this thesis due to biasing limitations that are discussed in a later section.

4.2.1 CPW Feed

Figure 4.8: CPW Feeding for Cascade Microtech ACP40-GSG-150 Probes

Measurement of on-wafer microwave devices requires a suitable interface for probe connec- tivity. The microwave probing station that will be used for measurement uses Cascade Microtech

ACP40-GSG-150 probes. This probe is designed to measure circuits based on CPW technology. 59 With a pitch of 150 µm and a ground-signal-ground spacing of 50 microns, the feed point is spaced as shown in Figure 4.8.

4.2.2 Transmission Lines

The MMIC design is based on a combination of coplanar waveguide (CPW) and microstrip transmission line technologies. A CPW transmission line is designed for high frequency operation and consists of a conducting signal line which is coplanar to ground planes on either side of the line.

A variation of the CPW structure exists called conductor backed coplanar waveguide (CBCPW) which has a ground plane on the back side of the substrate. This technology is commonly used for

MMIC designs and is directly compatible with the phase shifter designs in this thesis.

Meanwhile, the antenna array in this thesis is designed using microstrip transmission lines.

Although CPW based antennas exist in literature, microstrip based antennas are easy to design.

Since two separate technologies are used in the design, it is necessary to have transitions between

CPW and microstrip transmission lines.

4.2.3 CPW-to-Microstrip Transition

The integration of components based on multiple transmission line types is often required in microwave circuit design. Ideally, this transition would be lossless, but the impedance mismatch between two transmission line technologies inevitably results in some degree of reflection. There- fore, transition circuits must be optimized to reduce the reflection as much as possible. Parametric studies performed in [40] show that an increase in the angle of the CPW-to-microstrip transition results in a decrease in the reflection back to the coplanar waveguide line. Additionally, a parametric study of the length of the coplanar waveguide section of the transmission reveals that a length of 0.1

60 lambda is optimal for decreasing the reﬂection in the CPW-to-microstrip transition. These observations are for transition on high resistivity silicon. Applying this methodology to the Sapphire wafer, we can simulate the performance of the CPW-to-microstrip transition.

Following the design guidelines from [40], a CPW-to-microstrip transition is designed as shown in Figure 4.9. A parametric study of transmission angle indicated that the transmission angle has a negligible effect on the reﬂection coefﬁcient. The transition magnitude for the parametric study is shown in Figure 4.10. Regardless of the transition angle, the transition loss is around 1.2 dB.

Figure 4.9: Coplanar Waveguide to Microstrip Transition

Figure 4.10: Coplanar Waveguide to Microstrip Transition Parametric Study (Magnitude)

61 4.2.4 Power Divider

Once a signal is fed into the phased array, it must be divided amongst all of the antenna elements in the array. For simplicity, the signal should be divided evenly each time the signal is split. This is commonly achieved by using a T-junction divider, resistive divider or a Wilkinson power divider.

The T-junction divider is a versatile three-port network which is capable of power splitting / com- bining for many transmission line types. Unfortunately, its lossless behavior prevents an impedance match at all three ports. On the contrary a resistive divider is lossy in nature due to its resistive components, but can be impedance matched at all three ports as a result. In addition to this one or the other trade off, both of these divider types fail to have high isolation between the two output ports. A common solution to this problem is implementing the Wilkinson power divider which is lossless, but still achieves impedance matching at the output ports due to high port isolation. This divider takes an input signal of characteristic impedance Zo and splits it into two transmission lines of

λeff length 2 which leaves the output ports with an impedance of twice the characteristic impedance, √ 2Zo. In order to impedance match the output ports to that of the input, a chip resistor of value

2Zo is connected across the output ports. The equal potential at each port of the resistor prevents the ﬂow of current between the two output ports which both transforms the output impedance to Zo and increases the isolation between the ports. [41]

The Wilkinson power divider approach would be best in a MMIC design due to this balance of isolation between ports and matched input / output impedance. In [42], a CPW to CPW power divider is presented based on the Wilkinson architecture. Unfortuantly, these power dividers present one of a number of limitations on the fabrication of a MMIC phased array due to the signal lines being smaller than the smallest chip resistors which are required in these architectures.

62 4.2.5 BST Phase Shifter Integration

Due to the monolithic nature of the MMIC, the BST phase shifter device can be integrated directly in-line with a CPW transmission line. The phase shifters were designed to have ground- signal-ground widths matching that of the measurement probe width. In the case of a CPW transmission line of a different input impedance, a CPW-to-CPW transition is required.

4.2.6 Phase Shifter Biasing

As mentioned in the introduction to this section, phase shifter biasing becomes problematic in the MMIC design. Generally speaking, a DC biasing voltage is injected into the signal line via a bias-tee. Without a DC blocking capacitor in line with each phase shifter, a single bias will effect every phase shifter. Since the signal line width is again smaller than the smallest of chip capacitors, a simple DC blocking method with a capacitor is not possible in this MMIC design.

4.2.7 Layout

Although an MMIC design is not fabricated in this thesis due to surface mount component size limitations, a partial MMIC circuit is fabricated in its place. The circuit, shown in Figure 4.11, includes many of the MMIC elements discussed in this section. In the MMIC design, a CPW feed line is connected to the optimized phase shifter. The CPW output of the phase shifter is then transitioned to a microstrip line using the CPW-to-Microstrip transition circuit from the previous section. Finally, the microstrip line is matched to the 8 GHz MMIC patch antenna.

63 Figure 4.11: Single Antenna Element with BST Phase Shifter MMIC

4.3 Hybridized Circuit Design

A novel application of the optimized phase shifters from the previous sections is packaging for use in a hybrid circuit. A hybrid integrated circuit (HIC) is a circuit made of packaged semiconduc- tor devices that are bonded to a printed circuit board (PCB). Packaging in this manner allows for phase shifters to be integrated into components-off-the-shelf (COTS) designs.

For demonstration purposes, the optimized phase shifter will be integrated into a HIC based on a milled, two-sided FR1 copper clad circuit board. Due to the lower dielectric constant of the FR1 board, it is necessary to redesign and simulate the phased array antenna and matching network in order to be optimal for the substrate.

4.3.1 Simulation Parameters

Microstrip technology is well established in literature with closed form models existing for most microstrip structures. These models simplify the simulation of hybrid circuit designs signiﬁcantly, often only requiring the structure dimensions and circuit board properties. The hybrid circuit will be fabricated on a FR-1 printed circuit board using a Othermill Pro milling machine. The properties of the FR-1 board are summarized in Table 4.6

64 Table 4.6: Material Properties for BST Parallel-Plate Varactor

Material Properties Material Relative Relative Conductivity tan δ Thickness Permittivity Permeability (σ) (mm) Copper 1 1 5.88e7 0 0.0356 FR-1 5.2 1 0 0.52 1.6

4.3.2 Transmission Line

In the hybrid circuit, microstrip technology can be exclusively used in the PCB design portion of the circuit. A 50 ohm microstrip transmission line can easily designed using the AWR TXLINE calculator and the FR-1 material properties from Table 4.6. The resulting transmission line has a

ﬁxed width of 2.86 millimeters.

4.3.3 Power Divider

Implementing power dividers in microstrip technology is well understood due to closed form expressions for Wilkerson and rat-race couplers. Recalling from the MMIC power divider discussion, the Wilkerson power divider architecture can split a signal equally using two transmission

λeff √ lines of length 2 and impedance 2Zo. Although the two outputs are equal, a chip resistor of value 2Zo is still required in this design.

Alternatively, a rat-race coupler can be used to equally split a signal without the need for a chip resistor. The coupler consists of a conductive ring of 1.5λeff in length and an impedance of √ 2Z0. The coupler has four ports, or microstrip inputs of impedance Z0 which are each separated

λeff 3λeff by 4 and ports 1 and 4 are separated by 4 . Due to the separation separations between ports, the magnitudes at ports 2 and 4 are equal and out of phase by 180 degrees. The magnitude on these ports is the sum / difference of the inputs on ports 1 and 3. If port 3 is grounded, then the coupler

65 simply acts as a power divider that requires no resistors or capacitors. For this reason, a rat race coupler is ideal for the hybridized circuit.

4.3.4 Phase Shifter Integration

Due to the hybrid nature of this design, wire-bonding is used to connect the microstrip transmission line to the coplanar waveguide interface of the phase shifter. Wire-bonding is a technique in which extremely thin metal wires are used to connect two signal lines. In microelectronic packaging, this technique is used to bound signal lines in an integrated circuit (IC) to the pads or leads in a IC case. For the phase shifter devices, the microstrip line will be wire-bonded to the signal line of the CPW line and the coplanar ground planes are going to be wire-bonded to the PCB ground plane.

In order for the devices to function correctly, it is necessary to have a shared common ground.

4.3.5 Phase Shifter Biasing

The main reason for not fabricating the MMIC phased array was the problem of separately biasing multiple phase shifters. This problem is easily overcome in a hybrid circuit design though the use of a DC blocking capacitor. Normally, the injection of a DC biasing voltage on a transmission line causes the entire transmission line to conform to the same DC voltage potential. In the MMIC case, this would cause all phase shifters to have the same DC bias and therefore same phase shift.

In order to avoid this issue, a small capacitor can be added in series with the transmission line to prevent the DC from passing though the capacitor and biasing the entire phase shifter network.

Since the DC bias is no longer injected via a bias-T in line with the microwave probe, it is necessary to develop a new biasing method. The solution for the HIC is adding a thin biasing line at the output of each phase shifter which termination in a radial stub. The width of the biasing line is made to be as small as possible in order to avoid introducing resistance and a subsequent voltage drop to the biasing line.

66 CHAPTER V

EXPERIMENTAL PROCEDURE AND RESULTS

5.1 Mask Design

Fabrication of the varactor and phase shifter devices in this thesis requires the design of a photo- lithography mask set which will be used to pattern and etch each of the process layers in the phase shifter and phased array designs. The mask layout is based around a standard 4” wafer and divided into multiple sections that contain copies of varactor and phase shifter devices. The layout is designed using AWR Microwave Ofﬁce and is created by Photo Sciences Incorporated. The contents of each section of the mask set is detailed in the remainder of this section.

The ﬁrst section of the mask layout in Figure 5.1 contains nearly all of the varactor and phase shifter designs that were simulated in this thesis. Single segment varactors of 2.5x2.5 um, 5x5 um, 6x6 um, 7.5x7.5 um, and 10x10 um are distributed in a pattern around the phase shifters.

Additionally, the double and triple varactor designs are included of both the 2.5x2.5 um and 5x5 um variety. Looking at the phase shifters in this section of the mask set, the 5x5 um, 6x6 um, 7.5x7.5 um and 10x10 um phase shifters are all placed in the middle of the section. There are no 2.5x2.5 um phase shifter since the minimum feature size is smaller than the minimum allowed in the mask set.

67 Figure 5.1: Mask Set Layout: Varactors/Phase Shifters

The next section of the mask layout in Figure 5.2 includes the same phase shifters from the previous ﬁgure at a greater vertical spacing between them. The thick Metal 1 layer lines that create a border around the devices are the dicing lines. In order to test these devices, a wafer dicing machine will be used to cut along the guide lines which are 250 microns wide. Each of the phase shifters can then we wirebonded to the hybridized circuit for testing in a phased array antenna system.

Similar to the previous section of the mask design, Figure 5.3 includes multiple copies of the optimal 6x6 um phase shifter with 250 um wide dicing lines in between each device. This section of the mask set is included so that individual optimal phase shifters can be packaged again via wirebonding for use in phased array circuits.

68 Figure 5.2: Mask Set Layout: All Phase Shifters

All of the mask sections shown in the previous ﬁgures are made of of four mask layers: Pas- sivisation, Metal 1, BST, and Metal 2. The Metal 1 and Metal 2 layers are positive photoresist layers that form the top and bottom plates of the parallel plate capacitor structures, respectively.

In-between these two layers is the positive photoresist BST layer which speciﬁes the areas of the mask that require the tunable dielectric. This mask layer is necessary to remove BST from under the CPW transmission line and antennas on the mask design. If not removed, the BST will alter the behavior of these components. Finally, the passivisation layer is a negative photo-resist layer that is used to protect the devices under it. The passivisation layer features are etched away to expose device test pads for on wafer probing.

69 Figure 5.3: Mask Set Layout: Optimized Phase Shifters

The layers, fabricated in that order, are used to create the varactor and phase shifter devices. A layer-by-layer view of the entire mask design is shown in Figure 5.4. There are a number of devices shown on this wafer that are not part of this thesis, but were added to the device mask for other members of the research group.

70 (a) Metal 1 (b) Metal 2

Figure 5.4: Varactor Variations

The fabricated wafer is shown in Figure 5.6. Due to fabrication issues, the wafer is fabricated on a SiO2 substrate. This change in substrate material is expected to result in increased devices losses when compared to simulations on a Sapphire substrate. Additionally, the BST thin ﬁlm deposition resulted in a BST thickness of 230 microns. Phase shifter behavior is expected to be similar to the simulated 200 micron thickness based on the phase shifter thickness study.

71 Figure 5.5: Complete Photo-Lithography Mask: All Layers

5.2 Experimental Procedure

S-parameter measurement of the on-wafer varactor and phase shifter devices is performed using an HP 8720B 130 MHz - 20 GHz vector network analyzer (VNA). In the test setup, a MATLAB script running on an external computer is used to control the VNA and perform a frequency sweep across the entire frequency range of the VNA.

The physical setup of the on-wafer probing station requires securing the fabricated wafer con- taining the varactor/phase shifter devices on a JMicro Technology Corporation LMS-2709 microprobing station. Two Cascade Microtech ACP probes are next secured on the microprobing platform

72 Figure 5.6: Fabricated Wafer using BST on Si/SiO2 Substrate

and connected to Ports 1 and 2 of the VNA, respectively. In order to bias the BST devices, a high voltage bias tee is inserted between Channel 1 of the VNA and the ACP probe. A high precision

DC power supply is used to provide a DC bias to the bias tee.

Before S-parameter measurements can be taken, it is necessary to calibrate the VNA. The VNA is calibrated using a Cascade Microtech impedance standard substrate (ISS) (P/N 101-190). The calibration procedure involves connecting short, thru, and load structures to each of the ACP probes. In the procedure, Channels 1 and 2 are individually calibrated under all three conditions. Once accomplished, a thru calibration is performed from Port 1 to Port 2. After the procedure is completed, the

73 Figure 5.7: On-Wafer Probing Station Test Setup

VNA will display a calibration profile of the transmission coefficient. If sufficiently flat, meaning that the cable and probe loss has been calibrated out, testing can begin.

Now that calibration has been performed, it is possible to start device measurements. Using the x,y, and z alignment knobs on the microprobing station, the device under test (DUT) can be located and centered between the probe leads. The microscope is used to assist with aligning the probes over the device test connections. Once aligned, the probes are lowered until contact is made with the device (indicated by the probe leads sliding forwards). The MATLAB script is then executed and the data is saved once all points have been collected. After the 0V bias measurement has been taken, the voltage bias is stepped up to 8V in increments of 1V. This procedure is repeated for each of the varactor and phase shifter devices tested.

74 Figure 5.8: On-Wafer Probing Station with Fabricated Wafer

5.3 Results and Discussion

After on-wafer measurement of varactor and phase shifter devices, experimental data can be compared with simulated results. Although many varactor and phase shifter devices were simulated, only select devices could be fabricated. This is due to the mask set feature size limitation that eliminated the 2.5 by 2.5 micron designs and the lack of variation of BST thickness on a single fabricated wafer which eliminated the layer thickness variation. As a result of this, the tables of results are shown for 200 nm BST thickness and only devices that were successfully fabricated.

Table 5.1 shows the experimental loss and phase angle for single segment varactor devices.

Taking into consideration the SiO2 substrate and the thicker 230 nm BST thickness, some

variation in phase angle and insertion loss is to be expected. Experimental testing of the varactor

75 Figure 5.9: Microscope View of Phase Shifter Testing

Table 5.1: Varactor Experimental vs Simulation Results (200 nm)

Varactor Simulation Results Type Capacitor Phase Angle Insertion Area (µm2) (deg) Loss (dB) Single 5x5 12.43 -0.33 Single 6x6 14.33 -0.35 Single 7.5x7.5 15.56 -0.36 Single 10x10 17.69 -0.45 Double 5x5 17.53 -0.47 Triple 5x5 19.52 -0.57

devices shows that all fabricated varactors have signiﬁcantly less phase shift than expected. For the

6x6 µm2 varactor, the 0V phase angle was -14.33 degrees whereas the simulation indicated -59.8 degrees. The varactors did not tune under the application of a DC bias so phase shifting results

76 could not be obtained. It can be noted that although tuning did not work, the fabricated varactors have a higher phase angle per decibel of loss than the simulated devices.

The phase shifter on-wafer experimental phase angle and insertion losses are shown in Table

5.2. Again, it should be taken into account that the fabrication used a different substrate and the

BST did not exhibit tuning behavior. For the optimized 6x6 µm2 phase shifter, a 0V phase angle of

-814.6 degrees was expected. On-wafer testing resulted in a phase angle of -248.93 degrees with an insertion loss of -6.17 dB. Unlike the optimized varactor, the phase shifter did not produce as much phase angle per decibel of loss when compared to the simulation results.

Table 5.2: Phase Shifter Experimental vs Simulation Results

Phase Shifter Simulation Results Type Capacitor Varactor Phase Shift Insertion Area (µm2) Segments (deg) Loss (dB) Single 5x5 18 304.45 -7.83 Single 6x6 14 248.93 -6.17 Single 7.5x7.5 12 224.85 -5.32 Single 10x10 8 165.78 -4.11 Double 5x5 12 231.26 -6.30 Triple 5x5 10 207.59 -5.91

When considering the experimental results for BST thin ﬁlm varactor based phase shifters in

[4], it is evident that the simulation parameters used in this thesis should be close to experimental performance. Fabrication issues including use of a different substrate and non-tuning BST make it impossible to draw experimental conclusions about the optimized phase shifter devices. What can be noted is that both the experimental varactor and phase shifter devices exhibit similar behavior to the simulations when variations such as capacitor area and overlapping segments are considered.

77 CHAPTER VI

CONCLUSIONS AND FUTURE WORK

6.1 Conclusions

Through the research performed in this thesis manuscript, the BST thin ﬁlm based phase shifters originally designed in the author’s prior research have been optimized to achieve 360 degrees of analog phase shift with a FOM of 40.3 degrees/dB. The optimal phase shifter design was found to be the 6 by 6 µm2 single overlapping design with a 200 nm dielectric thickness. This design has a smaller footprint than the un-optimized design and a reduced minimum insertion loss of -

7.704 dB as compared with the original phase shifter design. Due to fabrication issues outside the scope of this thesis, the fabricated varactor and phase shifter devices were unable to tune under the application of an applied voltage bias. Despite this, experimental testing veriﬁed the general trends which were observed when simulating varactor and phase shifter variations.

Design and simulation of the MMIC and phased array antennas successfully demonstrated the potential for the phased shifters to be integrated into phased array antenna systems. Beam steering simulations indicated that the 360 degree phase shifters can be used to steer a beam in excess of the desired 20 degrees of beam steering that was declared in the scope of this thesis. Through the future fabrication of the designed MMIC and hybridized phased array circuits as detailed in the Future

Work section, beam steering can be experimentally demonstrated. Overall, this thesis work as been 78 sucessfully in creating an optimized phase shifter design using BST thin ﬁlm varactor technology and in demonstrating beam steering applications.

6.2 Future Work

There is much potential for the continued development of BST phase shifters as well as implementation in phased array antenna systems. In this thesis, a simple hybridized phased array was constructed to demonstrate beam steering. While important in its own regard, this development creates many opportunities for future work involving the implementation of BST phase shifters in more complex phased arrays. The following sections detail some of the work that can be performed in integrate the phase shifters as well as develop more sophisticated control mechanisms for individual phase shifters.

6.2.1 MMIC Phased Array

Though developing a hybridized phased array, this thesis presented much of the groundwork for developing a MMIC phased array based on the BST thin ﬁlm phase shifter technology. All of the components presented in Chapter 4 including the phase shifters, patch antenna array, and CPW transition circuity are all designed for use in a MMIC. Future work on the development of an MMIC would involve devising a biasing network that can independently bias each phase shifter. The small width of the CPW transmission line proved prohibitive to using chip capacitors as a DC block, but an MMIC implementation of a capacitive coupler could be used to solve this issue.

6.2.2 Hybridized Phased Array

The hybridized phased array presented in this thesis demonstrated simple beam steering though a two element phased array. Future work in this area could include the development of a larger

79 phased array to demonstrate a narrower beam that can be steered in multiple dimensions. Addition- ally, beam forming and weighting algorithms can be explored using a more complex phased array design. As more elements are added to the phased array, a controller can be integrated to provide appropriate biasing voltages to each phase shifter.

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