Engineering Multicomponent Nanostructures for MOSFET, Photonic Detector and Hybrid Solar Cell Applications
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UCC27531 35-V Gate Driver for Sic MOSFET Applications (Rev. A)
(1) Application Report SLUA770A–March 2016–Revised May 2018 UCC27531 35-V Gate Driver for SiC MOSFET Applications Richard Herring........................................................................................... High Power Driver Solutions ABSTRACT SiC MOSFETs are gaining popularity in many high-power applications due to their significant switching performance advantages. SiC MOSFETs are also available with attractive voltage ratings and current capabilities. However, the characteristics of SiC MOSFETs require consideration of the gate-driver circuit to optimize the switching performance of the SiC device. Although SiC MOSFETs are not difficult to drive properly, many typical MOSFET drivers may result in compromised switching speed performance. The UCC27531 gate driver includes features and has operating parameters that allow for driving SiC power MOSFETs within the recommended optimum drive configuration. This application note reviews the characteristics of SiC MOSFETs and how to drive them to achieve the performance improvement that SiC can bring at the system level. The features of UCC27531 to achieve optimal performance of SiC are explained and results from a demonstration circuit are provided. 1 Introduction In the past, the majority of applications such as uninterruptible power supplies (UPS), photovoltaic (PV) inverters, and motor drive have utilized IGBTs for the power devices due to the combination of high- voltage ratings exceeding 1 kV and high current capability. Usable switching frequency of IGBTs has typically been limited to 20–30 kHz, due to the high turnoff losses caused by the long turnoff current tail. Design comparisons have shown that SiC MOSFET designs can operate at considerably higher switching frequency and achieve the same or better efficiency. Although the device cost of the SiC MOSFETs are higher than the equivalent IGBTs, the significant savings in transformer, capacitor, and enclosure size results in a lower system cost. -
Design and Process Developments Towards an Optimal 6.5 Kv Sic Power MOSFET
Design and process developments towards an optimal 6.5 kV SiC power MOSFET Victor Soler ADVERTIMENT La consulta d’aquesta tesi queda condicionada a l’acceptació de les següents condicions d'ús: La difusió d’aquesta tesi per mitjà del r e p o s i t o r i i n s t i t u c i o n a l UPCommons (http://upcommons.upc.edu/tesis) i el repositori cooperatiu TDX ( h t t p : / / w w w . t d x . c a t / ) ha estat autoritzada pels titulars dels drets de propietat intel·lectual únicament per a usos privats emmarcats en activitats d’investigació i docència. No s’autoritza la seva reproducció amb finalitats de lucre ni la seva difusió i posada a disposició des d’un lloc aliè al servei UPCommons o TDX. No s’autoritza la presentació del seu contingut en una finestra o marc aliè a UPCommons (framing). Aquesta reserva de drets afecta tant al resum de presentació de la tesi com als seus continguts. En la utilització o cita de parts de la tesi és obligat indicar el nom de la persona autora. ADVERTENCIA La consulta de esta tesis queda condicionada a la aceptación de las siguientes condiciones de uso: La difusión de esta tesis por medio del repositorio institucional UPCommons (http://upcommons.upc.edu/tesis) y el repositorio cooperativo TDR (http://www.tdx.cat/?locale- attribute=es) ha sido autorizada por los titulares de los derechos de propiedad intelectual únicamente para usos privados enmarcados en actividades de investigación y docencia. No se autoriza su reproducción con finalidades de lucro ni su difusión y puesta a disposición desde un sitio ajeno al servicio UPCommons No se autoriza la presentación de su contenido en una ventana o marco ajeno a UPCommons (framing). -
Design, Implementation, Modeling, and Optimization of Next Generation Low-Voltage Power Mosfets
Design, Implementation, Modeling, and Optimization of Next Generation Low-Voltage Power MOSFETs by Abraham Yoo A thesis submitted in conformity with the requirements for the degree of Doctor of Philosophy Department of Materials Science and Engineering University of Toronto © Copyright by Abraham Yoo 2010 Design, Implementation, Modeling, and Optimization of Next Generation Low-Voltage Power MOSFETs Abraham Yoo Doctor of Philosophy Department of Materials Science and Engineering University of Toronto 2010 Abstract In this thesis, next generation low-voltage integrated power semiconductor devices are proposed and analyzed in terms of device structure and layout optimization techniques. Both approaches strive to minimize the power consumption of the output stage in DC-DC converters. In the first part of this thesis, we present a low-voltage CMOS power transistor layout technique, implemented in a 0.25µm, 5 metal layer standard CMOS process. The hybrid waffle (HW) layout was designed to provide an effective trade-off between the width of diagonal source/drain metal and the active device area, allowing more effective optimization between switching and conduction losses. In comparison with conventional layout schemes, the HW layout exhibited a 30% reduction in overall on-resistance with 3.6 times smaller total gate charge for CMOS devices with a current rating of 1A. Integrated DC-DC buck converters using HW output stages were found to have higher efficiencies at switching frequencies beyond multi-MHz. ii In the second part of the thesis, we present a CMOS-compatible lateral superjunction FINFET (SJ-FINFET) on a SOI platform. One drawback associated with low-voltage SJ devices is that the on-resistance is not only strongly dependent on the drift doping concentration but also on the channel resistance as well. -
Cleanroom Facilities: Experience from an User
Cleanroom Facilities: Experience from an user Mark Ming-Cheng Cheng Electrical and Computer Engineering Wayne State University Detroit MI USA [email protected] WAYNE STATE UNIVERSITY Cheng Cleanroom 8/2 Thin Micro/NanoFilm Deposition Fabrication Microfabrication is the term that describes processes of fabrication of miniature structures, of mironmeter sizes and smaller. Historically the earliest microfabrication processes were used for integrated circuit fabrication, also known as “ semiconductor manufacturing ”, ” microelectronic fabrication ”, ” VLSI technology ”. 65nm 2 cores; Introduced 2006 291 millions transistors 1.8 ~3GHz Die size 111mm 2; 65W WAYNE STATE UNIVERSITY Cheng Cleanroom Thin Micro/NanoFilm Deposition Fabrication In the last two decades, microfabrication has been used in many research fields, including * Micro Electromechanical System (MEMS) * RF MEMS (resonators, filters, switches, phase shifters) * Microfluidics/ Lab-on-Chip * Bio MEMS * Solar cells * Flat panel display * NEMS WAYNE STATE UNIVERSITY Cheng Cleanroom EnablingThin Film Deposition Technology in iPhone Microphone Accelerometer GPU (graphic processor) 45nm WAYNE STATE UNIVERSITY Cheng Cleanroom ThinHow Film Deposition to Make Sandwiches? Add bread Cut bread Cut vegetables Place vegetables … METHOD AND APPARATUS FOR MAKING A SANDWICH International Publication Number WO 2006/068865 AW Section (54) WAYNE STATE UNIVERSITY Cheng Cleanroom How to Make Devices? /etching pMOS Deposition Module Photolightography Module (Pattern Transfer) Etching Module WAYNE STATE UNIVERSITY Cheng Cleanroom Materials Semiconductor Insulator Metal (Si, C, SiC, GaAs ) (SiO 2, Si 3N4,glass, (Au, Pt, Al, Cr, Ti, Ni..) polymer, ceramics) WAYNE STATE UNIVERSITY Cheng Cleanroom Thin Film Deposition (overview) 0 I. Furnace (Few hundred~1100 C, atmosphere): SiO 2, P++ II. Low Pressure Chemical Vapor Deposition System (LPCVD): polycrystalline Si, amorphous SiO 2 III. -
Driving Egantm Transistors for Maximum Performance
Driving eGaNTM Transistors for Maximum Performance Johan Strydom: Director of Applications, Efficient Power Conversion Corporation Alex Lidow: CEO, Efficient Power Conversion Corporation The recent introduction of enhancement mode MOSFET development, silicon has approached GaN transistors (eGaN™) as power MOSFET/ its theoretical limits. In contrast, GaN is young in IGBT replacements in power management its life cycle, and will see significant improvement applications enables many new products that in the years to come. promise to add great system value. In general, an eGaN transistor behaves much like a power MOSFET with a quantum leap in performance, but to extract all of the newly-available eGaN transistor performance requires designers to understand the differences in drive requirements. eGaN Power Transistor Characteristics As with silicon power MOSFETs, applying a positive bias to the gate relative to the source of an eGaN power transistor causes a field effect, which attracts electrons that complete a Figure 1. Theoretical resistance times die area limits of GaN, silicon, and silicon carbide versus voltage. bidirectional channel between the drain and the source. When the bias is removed from the gate, the electrons under it are dispersed into the GaN, Figure of Merit (FOM) recreating the depletion region and, once again, giving it the capability to block voltage. The FOM is a useful method for comparing power devices and has been used by MOSFET To obtain a higher-voltage device, the distance manufactures to show both generational between the drain and gate is increased. Doing improvements and to compare their parts to so increases the on-resistance of the transistor. -
Work Function and Process Integration Issues of Metal
WORK FUNCTION AND PROCESS INTEGRATION ISSUES OF METAL GATE MATERIALS IN CMOS TECHNOLOGY REN CHI NATIONAL UNIVERSITY OF SINGAPORE 2006 WORK FUNCTION AND PROCESS INTEGRATION ISSUES OF METAL GATE MATERIALS IN CMOS TECHNOLOGY REN CHI B. Sci. (Peking University, P. R. China) 2002 A THESIS SUBMITTED FOR THE DEGREE OF DOCTOR OF PHILOSOPHY DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING NATIONAL UNIVERSITY OF SINGAPORE OCTOBER 2006 _____________________________________________________________________ ACKNOWLEGEMENTS First of all, I would like to express my sincere thanks to my advisors, Prof. Chan Siu Hung and Prof. Kwong Dim-Lee, who provided me with invaluable guidance, encouragement, knowledge, freedom and all kinds of support during my graduate study at NUS. I am extremely grateful to Prof. Chan not only for his patience and painstaking efforts in helping me in my research but also for his kindness and understanding personally, which has accompanied me over the past four years. He is not only an experienced advisor for me but also an elder who makes me feel peaceful and blessed. I also greatly appreciate Prof. Kwong from the bottom of my heart for his knowledge, expertise and foresight in the field of semiconductor technology, which has helped me to avoid many detours in my research work. I do believe that I will be immeasurably benefited from his wisdom and professional advice throughout my career and my life. I would also like to thank Prof. Kwong for all the opportunities provided in developing my potential and personality, especially the opportunity to join the Institute of Microelectronics, Singapore to work with and learn from so many experts in a much wider stage. -
1Q 2013Issue Analog Applications Journal
Texas Instruments Incorporated High-Performance Analog Products Analog Applications Journal First Quarter, 2013 © Copyright 2013 Texas Instruments Texas Instruments Incorporated IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily performed. TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or endorsement thereof. -
LV MOSFET Applications High Power, High Quality Discrete Class D Amplifi Er
LV MOSFET applications High power, high quality discrete Class D amplifi er A range of Philips LV MOSFET devices Effi cient and cost-effective Discrete 200W UcD is specifi cally targeted at demanding, The Class D concept allows effi cient demonstration module and cost-effective high output power audio To demonstrate the UcD concept and high frequency switching applications amplifi ers to be created. The Universal Class the enabling MOSFETs, a 200W demo Class like high power Class D D (UcD) principle enables PWM amplifi ers D amplifi er board is available for Philips audio amplifi ers. to perform at an excellent sonic level customers. The demo board will require while making use of a relatively simple an external power supply, a signal source closed-loop topology. (e.g. CD player) and a loudspeaker for initial evaluation. Contact your local Philips sales UcD concept representative for additional information. Class D amplifi ers consist of at least one comparator and one power stage (see fi gure 1). Environmental aspects At the end of the power stage the PWM Compared to conventional high power high output signal is fi ltered using a second order quality amplifi ers, the UcD amplifi er consumes LC fi lter. The UcD concept (developed 20% less power at maximum output power by Philips Digital System Laboratories level. The reduction in dissipated power allows in Leuven, Belgium) includes the LC fi lter for a much smaller and lighter heatsink. in the feedback loop, thus allowing active When disposed of, the UcD amplifi er control over the fi lter behavior. -
Click Here to Download Vlsi Syllabus
Course Curriculum for Master of Technology Programme in Electronics and Communication Engineering Department National Institute of Technology Goa Farmagudi, Ponda, Goa - 403 401 Semester-wise Credit Distribution Semester Total Credits I 19 II 17 III 14 IV 14 Total Credits 64 1 M.Tech. Program Name: VLSI Semester-wise Distribution of the Courses Semester I Total Credits Credits SI. No. Course Code Course Name (L-T-P) 1 EC600 Digital IC Design (3-0-0) 3 2 EC601 Analog IC Design (3-0-0) 3 3 EC602 Semiconductor Device Theory and Modelling (3-0-0) 3 4 EC603 Digital Signal Processing (3-0-0) 3 5 EC604 IC Design Laboratory (0-0-6) 3 6 EC605 Semiconductor Device Simulation Laboratory (0-0-3) 2 7 EC606 Seminar (0-0-3) 2 Total Credits 19 Semester II Total Credits Credits SI. No. Course Code Course Name (L-T-P) 1 EC650 VLSI Testing and Testability (3-0-0) 3 2 EC651 VLSI Technology (3-0-0) 3 3 Elective I (3-0-0) 3 4 Elective II (3-0-0) 3 5 EC652 System Design Laboratory (0-0-6) 3 6 EC653 VIVA-VOCE - 2 7 HU650* Communication Skills and Technical Writing (1-0-2) - Total Credits 17 Semester III Total Credits Credits SI. No. Course Code Course Name (L-T-P) 1 Elective III (3-0-0) 3 2 Elective IV (3-0-0) 3 3 EC700 Major Project-I (0-0-12) 8 Total Credits 14 Semester IV Total Credits Credits SI. No. Course Code Course Name (L-T-P) 1 EC750 Major Project-II (0-0-21) 14 Total Credits 14 2 List of Electives Electives Total SI. -
IGBT & Sic Gate Driver Fundamentals
IGBT & SiC Gate Driver Fundamentals Enabling the world to do more with less power ti.com/sic I 3Q 2019 IGBT and SiC power switch fundamentals Outline • IGBT and SiC Power Switch Fundamentals • Isolated Gate Driver Features • IGBT and SiC Protection Basics IGBT & SiC Gate Driver Fundamentals 2 3Q 2019 I Texas Instruments IGBT and SiC power switch fundamentals • What are the markets and applications for insulated gate bipolar transistors (IGBTs) and silicon carbide (SiC) power switches? • What are the advantages of SiC metal-oxide semiconductor field-effect transistors (MOSFETs) over IGBTs and silicon (Si) MOSFET power switches? • What are the differences between Si MOSFET, IGBT and SiC power switches? IGBT & SiC Gate Driver Fundamentals 3 3Q 2019 I Texas Instruments IGBT and SiC applications What are the markets and applications Specifically, applications with bus voltages >400 V SiC MOSFETs are becoming common in power for IGBT and SiC power switches? require device voltage ratings >650 V to leave factor correction power supplies, solar inverters, sufficient margin for safe operation. Applications DC/DC for EVs/HEVs, traction inverters for EVs, Efficient power conversion is heavily dependent including industrial motor drives, electric vehicles/ motor drives and railway, while IGBTs are common on the power semiconductor devices used in the hybrid electric vehicles (EVs/HEVs), traction inverters in motor drives (AC machines), uninterruptible power system. High-power applications are becoming and solar inverters for renewable energy are at the supplies (UPSs), solar central- and string-type more efficient and smaller in size because of power level of a few kilowatts (kW) to a megawatt power inverters <3 kW, and traction inverters improvements in power device technology. -
Application of Jfet and Mosfet
Application Of Jfet And Mosfet Unconsecrated and showier Abner exemplify some minstrel so irrepressibly! Ron is rodlike: she dusks wordily and muddles her macaroni. When Bud primps his miscegenation whoop not exuberantly enough, is Reed conscience-smitten? When handling mosfet of application jfet mosfet and applications and hence it is to flow between jfet Mosfets is a pn junction reverse bias, its gate and of jfet begins to flow through the fig. MOS the negatively applied gate potential increases the channel resistance thus reducing the drain current. But could potentially useful. Mosfets and of application jfet for automatic brightness cannot be. Array biosensor for the time, copy and switches of dengue virus detecting compatible with that does not always guaranteed to focus on purchases made of jfet current. The LDMOSFET has one lateral channel structure and nourish a state of enhancement MOSFET designed for power applications. We approach a channel formed between its applications such as compared with synthetically encoded properties. The gate electrode is a host of metal whose posture is oxidized. Fets and of application jfet mosfet is brought to the file can conclude that mosfet is needed after a dielectric oxide semiconductor diode across the fet formed between collector. Jfet has an insulator between jfets operate by many circuits from a variable resistor, thus requiring high frequency amplifiers. This region is called as ohmic region. To a sufficient amount and. What is the huge advantage of FET which makes it any useful in industrial applications a Voltage controlled operation b Less cost c Small size d. MOSFETs are the basis for smartphones, each typically containing billions of MOSFETs. -
Bio-MEMS Technologies and Applications
DK532X_C000.fm Page i Monday, November 13, 2006 7:24 AM Bio-MEMS Technologies and Applications EDITED BY Wanjun Wang • Steven A. Soper Boca Raton London New York CRC Press is an imprint of the Taylor & Francis Group, an informa business © 2007 by Taylor & Francis Group, LLC DK532X_C000.fm Page ii Monday, November 13, 2006 7:24 AM CRC Press Taylor & Francis Group 6000 Broken Sound Parkway NW, Suite 300 Boca Raton, FL 33487-2742 © 2007 by Taylor & Francis Group, LLC CRC Press is an imprint of Taylor & Francis Group, an Informa business No claim to original U.S. Government works Printed in the United States of America on acid-free paper 10 9 8 7 6 5 4 3 2 1 International Standard Book Number-10: 0-8493-3532-9 (Hardcover) International Standard Book Number-13: 978-0-8493-3532-7 (Hardcover) This book contains information obtained from authentic and highly regarded sources. Reprinted material is quoted with permission, and sources are indicated. A wide variety of references are listed. Reasonable efforts have been made to publish reliable data and information, but the author and the publisher cannot assume responsibility for the validity of all materials or for the conse- quences of their use. No part of this book may be reprinted, reproduced, transmitted, or utilized in any form by any electronic, mechanical, or other means, now known or hereafter invented, including photocopying, microfilming, and recording, or in any information storage or retrieval system, without written permission from the publishers. For permission to photocopy or use material electronically from this work, please access www.