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Intel Server Boards SE7320SP2 and SE7525GP2

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Intel Server Boards SE7320SP2 and SE7525GP2 Intel® Server Boards SE7320SP2 and SE7525GP2 Technical Product Specification Intel reference number D24635-004 Revision 4.0 December, 2005 Enterprise Platforms and Services Division - Marketing Revision History Intel® Server Boards SE7320SP2 and SE7525GP2 Revision History Date Revision Modifications Number June 2004 1.0 Initial Release Updated and clarified memory support, removed LX SKU references, added MTBF November 2004 2.0 calculations, performed general grammar and spelling updates. Updated supported processors matrix and BIOS setup options according to new September 2005 3.0 BIOS release, modified front panel pin-out description, updated the function introduction of Wake on LAN from S5 Added the introduction of CME counter in the section “3.5.4 – Disabling DIMMs”, December 2005 4.0 added the tip of fan configuration when integrated in third-party chassis Disclaimers Information in this document is provided in connection with Intel® products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel's Terms and Conditions of Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Intel products are not intended for use in medical, life saving, or life sustaining applications. Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. The Intel® Server Boards SE7320SP2 and SE7525GP2 may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request. The information in this manual is furnished for informational use only, is subject to change without notice, and should not be construed as a commitment by Intel Corporation. Intel Corporation assumes no responsibility or liability for any errors or inaccuracies that may appear in this document or any software that may be provided in association with this document. Intel, Pentium, Itanium, and Xeon are trademarks or registered trademarks of Intel Corporation. *Other brands and names may be claimed as the property of others. Copyright © Intel Corporation 2005. All rights reserved. ii Revision 4.0 Intel® Server Boards SE7320SP2 and SE7525GP2 Contents Table of Contents 1. Introduction ..........................................................................................................................1 1.1 Chapter Outline........................................................................................................1 1.2 Server Board Use Disclaimer ..................................................................................1 2. Server Board Overview........................................................................................................2 2.1 Intel® Server Board SE7320SP2..............................................................................2 2.1.1 Intel® Server Board SE7320SP2 Feature Set..........................................................2 2.2 Intel® Server Board SE7525GP2 .............................................................................4 2.2.1 Intel® Server Board SE7525GP2 Feature Set .........................................................4 3. Functional Architecture .......................................................................................................8 3.1 Processor Sub-system.............................................................................................9 3.1.1 Processor Voltage Regulator Devices (VRDs) ......................................................10 3.1.2 Reset Configuration Logic .....................................................................................10 3.1.3 Processor Module Presence Detection .................................................................10 3.1.4 GTL2006................................................................................................................10 3.1.5 Common Enabling Kit (CEK) Design Support........................................................11 3.1.6 Processor Support .................................................................................................12 3.1.7 Multiple Processor Initialization .............................................................................14 3.1.8 CPU Thermal Sensors...........................................................................................15 3.1.9 Processor Thermal Control Sensor .......................................................................15 3.1.10 Processor Thermal Trip Shutdown ........................................................................15 3.1.11 Processor IERR .....................................................................................................15 3.2 Intel® E7320 Chipset (Intel® Server Board SE7320SP2) .......................................15 3.2.1 Memory Controller Hub (MCH) ..............................................................................16 3.3 Intel® E7525 Chipset (Intel® Server Board SE7525GP2).......................................17 3.3.1 Memory Controller Hub (MCH) ..............................................................................18 3.4 Intel® 6300ESB ICH...............................................................................................19 3.4.1 PCI Interface..........................................................................................................20 3.4.2 IDE Interface (Bus Master Capability and Synchronous DMA Mode).................... 20 3.4.3 SATA Controller.....................................................................................................20 3.4.4 Low Pin Count (LPC) Interface ..............................................................................20 3.4.5 Compatibility Modules (DMA Controller, Timer/Counters, Interrupt Controller)..... 20 3.4.6 Advanced Programmable Interrupt Controller (APIC)............................................21 Revision 4.0 iii Contents Intel® Server Boards SE7320SP2 and SE7525GP2 3.4.7 Universal Serial Bus (USB) Controller ...................................................................21 3.4.8 RTC .......................................................................................................................21 3.4.9 GPIO......................................................................................................................21 3.4.10 Enhanced Power Management .............................................................................22 3.4.11 System Management Bus (SMBus 2.0).................................................................22 3.5 Memory Sub-System .............................................................................................22 3.5.1 Memory Sizing .......................................................................................................22 3.5.2 Memory Population................................................................................................23 3.5.3 I2C Bus...................................................................................................................25 3.5.4 Disabling DIMMs....................................................................................................26 3.5.5 Memory RASUM Features.....................................................................................27 3.6 I/O Sub-System .....................................................................................................30 3.6.1 PCI Subsystem ......................................................................................................30 3.6.2 Split Option ROM...................................................................................................32 3.6.3 Interrupt Routing ....................................................................................................32 3.6.4 IDE Support ...........................................................................................................36 3.6.5 SATA Support........................................................................................................36 3.6.6 Video Controller .....................................................................................................37 3.6.7 Network Interface Controller (NIC) ........................................................................39 3.6.8 USB 2.0 Support....................................................................................................40 3.6.9 Super I/O Chip .......................................................................................................40 3.6.10 BIOS Flash ............................................................................................................43 3.7 Configuration and Initialization...............................................................................43 3.7.1 Memory Space.......................................................................................................43 3.7.2 I/O Map ..................................................................................................................50
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