MachXO Control Development Kit User’s Guide
October 2009 Revision: EB46_01.2
Lattice Semiconductor MachXO Control Development Kit User’s Guide
Introduction Thank you for choosing the Lattice Semiconductor MachXO™ Control Development Kit!
This guide describes how to start using the MachXO Control Development Kit, an easy-to-use platform for rapidly prototyping system control designs using MachXO PLDs. Along with the evaluation board and accessories, this kit includes a pre-loaded control system-on-chip (Control SoC) design that demonstrates board diagnostic functions including fan speed control based on temperature monitoring, LCD control, complete power supply monitoring and reset distribution in conjunction with the Power Manager II ispPAC®-POWR1014A and 8-bit LatticeMico8™ micro- controller.
Note: Static electricity can severely shorten the lifespan of electronic components. See the MachXO Control Devel- opment Kit QuickSTART Guide for handling and storage tips. Features The MachXO Control Development Kit includes:
• MachXO Control Evaluation Board – The MachXO Control Evaluation Board features the following on-board components and circuits: – MachXO LCMXO2280C-4FT256C PLD (www.latticesemi.com/products/cpldspld/machxo) – Power Manager II ispPAC-POWR1014A mixed-signal PLD (www.latticesemi.com/products/powermanager) – 2 Mbit SPI Flash memory – 1 Mbit SRAM • Interface to 16 x 2 LCD Panel* – Secure Digital (SD) and CompactFlash memory card sockets* –I2C temperature sensor – Current and voltage sensor circuits – Voltage ramp circuits – Fan and controller circuitry – USB connector (JTAG, RS-232) – GPIO expansion header landings – 3” x 1”, 140-hole prototyping area – Push-buttons for sleep mode and global set/reset – 8-bit DIP switch – PWM analog output circuit – 8 status LEDs • Pre-loaded Reference Designs and Demo – The kit includes a pre-loaded demo design (Control SoC) that integrates several Lattice reference designs including: the LatticeMico8 microcontroller, PWM fan controller, LCD controller, SRAM controller, I2C controller, SPI Flash memory controller, and a UART peripheral. Firmware sup- ports a temperature, current, and voltage monitoring demo and when connected to a host PC allows you to use a terminal program to interact with the MachXO Control Evaluation Board. • USB connector Cable – A mini B USB port provides a communication and debug port via a USB-to-RS-232 physical channel and programming interface to the MachXO JTAG port. • AC Adapter (international plugs) • Quick Start Guide – Provides information on connecting the MachXO Control Evaluation Board, installing Win- dows hardware drivers, and running the Control SoC demo. • MachXO Control Development Kit Web Page – www.latticesemi.com/machxo-control-kit provides access to the latest documentation, demo designs, and drivers for the kit.
* Note: LCD panel, SD and Compact Flash memory not included in the MachXO Control Development Kit.
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
The contents of this user’s guide include demo operation, top-level functional descriptions of the various portions of the evaluation board, descriptions of the on-board connectors, switches and a complete set of schematics of the MachXO Control Evaluation Board.
Figure 1. MachXO Control Evaluation Board, Top Side
Lattice Semiconductor Devices MachXO Device This board features a MachXO PLD with a 3.3V core supply. It can accommodate all pin-compatible MachXO devices in the 256-ball ftBGA (17x17 mm) package. A complete description of this device can be found in the MachXO Family Handbook.
Note: The connections referenced in this document refer to the LCMXO2280C-4F256C device. Available I/Os and associated sysI/O™ banks may differ for other densities within this device family. However, only the LCMXO2280C- 4F256C device offers full functional use of the entire evaluation board. Power Manager II Device This board features a Power Manager II mixed-signal PLD. It serves as general-purpose power-supply monitor, reset generator, sequence controller, and high-voltage FET drivers. More information about Lattice Power Manage- ment devices can be found on the Lattice website.
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
Software Requirements You should install the following software before you begin developing designs for the evaluation board:
• ispLEVER Starter or ispLEVER/Pro 7.2 • ispVM System 17.5 Demonstration Designs Lattice provides four demos to illustrate key applications of the MachXO (XO2280) and Power Manager II (POWR1014A) devices in the context of control applications.
• Control SoC – The Control System-on-Chip (SoC) demo illustrates the use of the LatticeMico8 (LM8) microcon- troller, peripherals, and firmware integrated to provide system control features such as power supply sequencing, temperature monitoring, and fan control. The Control SoC design is the default, pre-programmed demo of the MachXO Control Evaluation Board. • Voltage Monitoring Using Delta-Sigma ADC – Monitor sensors and power rails for free by replacing discrete ADCs in your system. This demo implemements a Delta-Sigma Analog-to-Digital Conversion (ADC) technique to monitor an analog voltage and convert it into a digital value with the XO2280. • Memory-Audio – CompactFlash memory is commonly found in system control designs to provide simple plug memory. This demo showcases the LatticeMico8 microcontroller, CompactFlash memory controller, and a PWM- based digital-to-analog conversion to drive the audio jack of the MachXO Control Evaluation Board. A Hyperter- minal interface allows you to load a wave format file onto the board and play it back using the audio jack output. • Power Supply Fault Logging – Maximize system reliability by monitoring devices for marginal power supply fail- ures. This demo continuously monitors the supply rails of the MachXO Control Evaluation Board. If a power sup- ply failure occurs, the POWR1014A and XO2280 systems will issue a diagnostic log to the on-board SPI memory that includes supply identity and level.
Note: You may obtain your MachXO Control Evaluation Board after it has been reprogrammed. To restore the fac- tory default demo or program it with other Lattice-supplied examples see the Download Demo Designs and Pro- gramming Demo Designs with ispVM sections of this document. Control SoC Demo This demo illustrates how the MachXO and Power Manager II devices can be used to address a variety of system control design issues including:
• Power supply sequencing • Reset distribution • Power supply monitoring • Temperature monitoring and fan control
Power management is handled in two phases by the MachXO Control Evaluation Board system:
1. Power On – After power is supplied to the board and the 3.3V rail is stable, the Power Manager II POWR1014A sequences four supply rails. Two circuits demonstrate the voltage ramp of 2N7002E power MOSFETs using the high-voltage (HVOUT) outputs and two demonstrate power rail enable of Vcccore and Vccaux of the MachXO2280 using digital outputs. Next the POWR1014A asserts the MachXO reset. Finally the POWR1014A enters a supply monitoring state.
2. Post Power On – During the second phase of power management the board’s “condition” is monitored. Power supply rail voltage, current, and board temperature is monitored by the MachXO2280 and POWR1014A. If any supply rail fails, the POWR1014A asserts a reset for the LCMXO2280.
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
Figure 2. PC Board Control and Power Management
MachXO Control Evaluation Board
Optional Current Lattice MachXO PLD Power LCD Panel Sensor Manager II LatticeMico8 Platform Interface Supply SPI Memory 2-Bit Sequencing Controller XO2280 DIP Switch Reset LED Bank I2C Controller Distribution
POWR1014A Voltage SRAM Memory Fan LED Bank Sensor Controller Circuit
PWM Controller
LCD Controller
I2C SPI Flash SRAM Temperature Memory Memory Sensor (2Mbit) (1Mbit) PC Host
JTAG/USB RS-232/USB
The MachXO LCMXO2280C is a general purpose 2280-LUT PLD programmed with a small System-on-Chip design based on the LatticeMico8 8-bit microcontroller. The LatticeMico8 platform provides board management functions for temperature sensing, fan and LCD control, and monitoring of the Power Manager II POWR1014A I2C interface. The system is designed to continuously monitor the condition of the board. You can interact with the plat- form through a menu-driven terminal program running on a PC host. Switches and jumpers can be adjusted to emulate reset, Sleep, and supply interruptions.
The LatticeMico8 platform integrates Lattice reference designs for SRAM and SPI Flash memory control, pulse- width modulation (PWM) fan control, LCD control, and a Power Manager II POWR1014A communication interface. All peripherals communicate across a WISHBONE-compatible bus. LatticeMico8 firmware written in Assembly lan- guage manages communication between peripherals and provides a menu-driven user interface layer for a termi- nal program running on a host PC.
The Power Manager II POWR1014A is a 10-input, 14-output, mixed-signal PLD with integrated analog voltage comparators, timer/counter circuits, and a PLD core. The POWR1014A is programmed to cover supply sequenc- ing, reset distribution, and voltage supervision functions. The POWR1014A will trap supply faults and assert MachXO2280 reset when appropriate. It disables MachXO2280 supplies input supplies are not stable. An I2C slave interface to the POWR1014A allows the MachXO2280 to extract status and read/write control registers for the board status.
Board Monitoring and Fan Control The MachXO2280 design performs monitoring functions for the on-board temperature sensor and supply status issued by the POWR1014A device. A rolling board status log is maintained in the on-board SRAM. The on-board DC fan motor is activated whenever the programmed temperature threshold is exceeded.
The MachXO2280 design provides the following features:
• Menu-driven user interface for Windows or Linux PC-based terminal program via USB-to-Serial channel.
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
• Board “uptime” clock • Programmable temperature threshold via the PC terminal program. • Programmable LCD (not included) backlight and contrast via the PC terminal program. • Programmable 0-5V ADC input voltage via the PC terminal program. • Issues a periodic log of time, temperature, voltage level, and fan speed readings to on-board SRAM memory. • Enables on-board fan during over-temperature conditions.
Power Supply Sequencing and Reset Distribution The POWR1014A design shows the Power Manager II in the PC board management role to sequence multiple power supplies, distribute reset signals, and monitor power supply voltage/current levels. The POWR1014A’s embedded I2C slave interface provides a variety of status registers for basic status polling while the board is opera- tional.
The state diagram in Figure 3 illustrates the control logic embedded in the POWR1014A. The following states define the control logic:
• RESET – After the MachXO Control Evaluation Board is powered and power-on reset occurs the POWR1014A waits until its own supply rail is stable (Power OK). • SEQUENCE SUPPLIES – After power is applied to the board and the 3.3V and Vccio supply rails are stable the POWR1014A will sequence the MachXO2280 supply rails: Vcccore and Vccaux using two transistor switches. In addition two voltage ramp circuits are provided on-board to demonstrate safe operating area (SOA) operation of two 2N7002E PNP-type power MOSFETs. LEDs D5-D6 of the POWER1014A LED bank are binary encoded to represent the four supply sequence. The minimum value for each VMON input can be set independently by mod- ifying the PAC-Designer® software project. • DISTRIBUTE RESETS – After all supplies are powered the POWR1014A will release three reset signals. Reset control of multiple microprocessor/DSP reset circuits is emulated by displaying the Reset state on the POWR1014A LED bank. When lit, LEDs D7-D8 represent the reset release state. • MONITOR SUPPLIES – After the power-on phase (supply sequencing and reset distribution) the MachXO Con- trol Evaluation Board is operational and a LatticeMico8 8-bit microcontroller based design runs its firmware the MachXO2280. The POWR1014A then continuously monitors all input supplies. In this state the MachXO2280 polls the POWR1014A I2C registers for the evaluation board’s status and makes voltage and current measure- ments available to the PC terminal interface.
Figure 3. Power Manager II POWR1014A Embedded Logic
Fault OR RESET Threshold Violation Power OK
MONITOR SEQUENCE SUPPLIES SUPPLIES
DISTRIBUTE REQUESTS
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
Download Windows Hardware Drivers Before you begin, you will need to obtain the necessary hardware drivers for Windows from the Lattice web site.
1. Browse to the www.latticesemi.com/machxo-control-kit and locate the hardware device drivers for the USB interface.
2. Download the ZIP file to your system and unzip it to a location on your PC.
Linux Support:
The USB interface drivers for the evaluation board are included in Linux kernel 2.4.20 or greater including distribu- tions compatible with ispLEVER® 7.2 (Red Hat Enterprise v3, v4 or Novell SUSE Enterprise V10).
Download and Program the Demo Designs The Control SoC Demo is preprogrammed into the MachXO Control Evaluation Board, however over time it is likely that your board will be modified.
To download the demo source files and reprogram the MachXO Control Evaluation Board:
1. See the Download Demo Designs and Programming Demo Designs with ispVM sections of this document.
2. Use .\Demo_MachXO_Control_SoC\project\control_soc_demo.jed to restore the MachXO2280 Control SoC demo design.
3. Use .\Demo_PM_Control_BM\project\bm_demo.jed to restore the POWR1014A Board Management demo design.
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
Connect to the MachXO Control Evaluation Board In this step, power the board, and connect the evaluation board to your PC using the USB cable provided. TMS TDIO
XO J15 J5
PM J18 J9
XX J19 J14 Install to Install to Include Device Exclude Device
Notes: 1. Install exactly one device per row to include or exclude each device. 2. Shown with MachXO and POWR1014A enabled.
1. Adjust the following jumpers to include the MachXO2280 and POWR1014A devices in the JTAG programming chain and exclude the “Other JTAG” option.
Install Jumpers J14 – Excludes Other JTAG TDI-TDO J15 – Includes MachXO2280 JTAG TMS J18 – Includes POWR1014A JTAG TMS
Remove Jumpers J19 – Excludes Other JTAG TMS J5 – Includes MachXO2280 JTAG TDI-TDO J9 – Includes POWR1014A JTAG TDI-TDO
See Schematic 1 of 10 for details on the MachXO Control Evaluation Board jumper settings.
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
2. Adjust the following jumpers to connect the on-board supply monitor circuits.
Install Jumper J17 – Enable MachXO2280 Vccio monitor circuit
Remove Jumper J22 – Enable MachXO2280 Vccaux monitor circuit
See Schematic 8 of 10 for details of the voltage monitor input circuits.
3. Ensure SW 4, position 2, of the POWR1014A DIP Switch is in the raised position. When in the lowered position it will assert manual reset to the system.
4. Plug in the power supply to an outlet and the Power Socket. After a connection is made, a red Power LED (D18) will light up indicating the board is powered on.
5. Connect the USB cable provided from a USB port on your PC to the board’s USB interface socket (J8) on the side of the board as shown in the layout diagram below.
6. If you are prompted, Windows may connect to Windows Update select No, not this time from available options and click Next to proceed with the installation. Choose the Install from specific location (Advanced) option and click Next.
7. Select Search for the best driver in these locations and click the Browse button to browse to the Windows driver folder created earlier. Select the CDM 2.04.06 WHQL Certified folder and click OK.
8. Click Next. A screen will display as Windows copies the required driver files. Windows will display a message indicating that the installation was successful.
9. Click Finish to install the USB driver.
10. Right-click the ispPAC-POWR1014A entry and choose Edit Device… The Device Information dialog appears.
11. From the Operation list, select Bypass.
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
Set Up Windows HyperTerminal You will use a terminal program to communicate with the evaluation board. The following instructions describe the Windows HyperTerminal program which is found on most Windows PCs. You may use another terminal program if you wish although setup will be somewhat different. For Linux, Minicom is a good alternative.
Note: This step uses the procedure for Windows XP users. Steps may vary slightly if using another Windows ver- sion.
1. From the Start menu, select Control Panel > System. The “System Properties” dialog appears.
2. Select the Hardware tab and click Device Manager. The “Device Manager” dialog appears.
3. Expand the Ports (COM & LPT) entry and note the COM port number for the USB Serial Port.
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
4. From the Start menu, select Programs > Accessories > Communications > HyperTerminal. The HyperTer- minal application and a “Connection Description” dialog appear.
5. Specify a Name and Icon for the new connection. Click OK. The “Connect To” dialog appears.
6. Select the COM port identified in Step 3 from the Connect using: list. Click OK.
7. The “COMn Properties” dialog appears where n is the COM port selected from the list.
8. Select the following Port Settings and click OK.
Bits per second: 115200 Data bits: 8 Parity: None Stop bits: 1 Flow control: None
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
The HyperTerminal window appears.
9. From the MachXO Control Evaluation Board, press the MachXO2280 GSR Input push-button. The Control SoC demo Main Menu appears.
The user interface will provide the menu-driven interface shown in Table 1.
Table 1. Main Menu ======Welcome to the MachXO Control Evaluation Board Control SoC Demo Rev 1.0, June 2009
0: Re-display Main Menu 1: Read Board Uptime 2: Read Current Board Status ------n : Normalize Temp Output H/h: +/- Fan Temp Threshold (0.25C) b : Backlight Intensity (H/L) C/c: +/- LCD Contrast f : Change Fan Speed s : Read SPI Flash IDCode t : Read I2C Temp Sensor d : Read XO2280 DIP Switches u : Read POWR1014A UES
======
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
Set Up Linux Minicom Minicom is a terminal program found with most Linux distributions. It can be used to communicate with the MachXO Control Evaluation Board.
To setup Minicom:
1. Check active serial ports: #dmesg | grep tty Note the tty label assigned to the USB port.
2. From a command prompt, start Minicom: #minicom -s The configuration menu appears.
3. Highlight Serial port setup and press Enter. Serial port settings appear.
4. Press A (Serial Device). Specify the active serial device noted in Step 1 and press Enter.
5. Press E (Bps/Par/Bits). Specify 115200, None, 8 and press Enter.
6. Press F (Hardware Flow Control). Specify None and press Enter.
7. Press Esc. The configuration menu appears.
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
8. Select Save setup as dfl. Minicom saves the port setup as the new default.
9. Select Exit. The Minicom interface appears.
10. From the evaluation board, press the G2 push-button (GSR). The Control SoC demo Main Menu appears.
Power Supply Sequencing Supply sequencing by the POWR1014A can be visualized on the MachXO Control Evaluation Board with the POWR1014A LED bank.
To cycle the manual reset and observe power-on management:
1. Press toggle switch position 2 of SW4.
An evaluation board manual reset is continuously cycled.
Upon each reset event, the POWR1014A sequences five supply rail circuits of the MachXO Control Evaluation Board: Vccio, Vcccore, Vccaux, and two high-voltage ramp circuits (see Schematic Sheet 7 of 10). LEDs D5- D6 of the POWER1014A LED bank are binary encoded to represent the three Vcc supply sequence, in order: Vccio, Vcccore, and Vccaux.
LEDs D7-D8 of the POWER1014A LED bank light when the voltage ramp circuits monitored by VMON7 and VMON8 are enabled by the high-voltage outputs (HVOUT1 and HVOUT2) of the POWR1014A.
Supplies Enabled D5 D6 D7 D8 None Vccio X Vccio AND Vcccore X Vccio AND Vcccore AND Vccaux X X HVOUT1/VMON7 X HVOUT1/VMON7 AND HVOUT2/VMON8 X X
2. Raise toggle switch position 2 of SW4.
A MachXO Control Evaluation Board manual reset is released.
Read Current Board Status Board status is monitored continuously by the MachXO2280 and POWR1014A after the power-on stage of the evaluation board logic.
To read board status:
In the terminal window press 2. Status of the board appears including uptime since last reset, board temperature, fan speed (a relative speed number), and voltage/current measurements of three supply rails.
Example:
Uptime: 000h54m50s
Temp:29.50oC Fan Speed:000
Core: 3.103V / 55.2mA Aux : 3.187V / 13.2mA I/O : 3.247V / 24.6mA
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
To measure supply rail variations:
1. To disconnect the Vccio rail connection to the MachXO2280, remove jumper J17 from the MachXO Control Evaluation Board. The Vccio supply rail is disconnected.
2. From the terminal window, press 2. Status of the board appears.
Example:
Uptime: 000h55m05s
Temp:29.50oC Fan Speed:000
Core: 3.103V / 55.2mA Aux : 3.187V / 13.2mA I/O : 0.007V / 24.6mA
The Vccio supply rail measurement indicates ~0V.
Note: Vccio current (ICCIO_Sense) is not affected by removing the jumper at J17. See Schematic Sheet 8 of 10 for details.
3. Install a jumper at J22. The Vccaux voltage divider circuit is connected. From the terminal window, press 2. Status of the board appears.
Example:
Uptime: 000h56m30s
Temp:29.25oC Fan Speed:000
Core: 3.103V / 55.2mA Aux : 1.597V / 14.9mA I/O : 0.007V / 24.6mA
The Vccaux supply rail measurement indicates ~1.5V.
Note: Vccaux current (ICCAUX_Sense) is not affected by installing the J22 jumper. See Schematic Sheet 8 of 10 for details.
To read PCB temperature:
1. Place your finger on the on-board Temperature Sensor (U15) for 2-5 seconds. Depending on your skin temper- ature, the level should influence the temperature monitor (1 LED=0.25C).
2. From the terminal window, press 2. Status of the board appears.
Example:
Uptime: 000h56m30s
Temp:29.75oC Fan Speed:000
Core: 3.103V / 164.4mA Aux : 1.597V / 14.9mA I/O : 0.007V / 24.6mA
The temperature monitor varies over time depending on the I2C temperature sensor reading.
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
Normalize PCB Temperature Output You can calibrate the Control SoC temperature sense logic to account for the ambient conditions of the PCB. The MachXO2280 LED bank displays relative temperature of the PCB as a level meter. The normalize feature will reset the median temperature level and light 4 of 8 LEDs.
To normalize the temperature output:
From the terminal window, press n. The Control SoC normalizes the meter output for the ambient temperature and lights 4 (D1-D4) of the MachXO2280 LED bank.
Adjust Fan Temperature Threshold The Control Evaluation Board includes a small fan controlled by a pulse width modulated (PWM) output module of the Control SoC design. The fan enable is a function of a temperature threshold setting. By default, the threshold is set at the median of the normalized ambient temperature. You may increase or decrease the threshold in steps of ~0.25C.
To adjust fan temperature threshold:
1. Note the fan operation.
2. If the fan is on, from the terminal window, press H. The control design raises the temperature threshold by +0.25C. If the fan does not turn off, continue pressing H until the threshold is higher than the PCB temperature.
If the fan is off, from the terminal window, press h. The control design drops the temperature threshold by - 0.25C. If the fan does not turn on, continue pressing h until the threshold is lower than the PCB temperature.
Change Fan Speed When the evaluation board fan is operational as determined by the fan temperature threshold, the Fan speed can be set to one of the following fan speeds:
None: 000 Low: ~175 Medium: ~222 High: ~234
To adjust fan speed:
1. Note the fan operation.
If the fan is off, from the terminal window, press h. The control design drops the temperature threshold by - 0.25C. If the fan does not turn on, continue pressing h until the threshold is lower than the PCB temperature and the fan turns on.
2. From the terminal window, press f. The Fan speed setting appears.
Example:
Fan: Off
The fan is turned off.
3. Press f. The Fan speed setting appears.
Example:
Fan: Low
The fan is turned on with the low (175) speed.
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
4. Press f. The Fan speed setting appears.
Example:
Fan: Med
The fan is turned on with the medium (222) speed.
Adjust LCD Backlight Intensity If an LCD panel (not included in the Control Development Kit) with a backlight feature is installed to header J13, you may adjust the backlight intensity.
To adjust LCD panel backlight intensity:
From the terminal window, press b. The backlight intensity increases.
Adjust LCD Contrast If an LCD panel (not included) is installed to header J13, you may adjust the LCD contrast between the display seg- ments and the background.
To adjust LCD panel contrast:
From the terminal window, press C to increase or c to decrease.
Read the SPI Flash Memory IDCode This demo uses SPI Flash Memory Controller and UART modules of the Control SoC to scan the memory device identification code of the on-board SPI Flash Memory and display it on the terminal output. The transaction is logged to the on-board SRAM through the SRAM controller module.
To scan the SPI Flash Memory IDCode:
From the terminal Main Menu, press s. The IDCode is returned as a hex value.
Example:
ID:0x12
Note: The IDCode for your board may differ.
Read the I2C Temperature Sensor This demo uses the I2C Controller and UART modules of the Control SoC to read the on-board I2C temperature sensor, convert the raw data to Celsius units and display it on the terminal output.
To monitor temperature:
From the terminal window press t. The current temperature in degrees Celsius appears.
Example:
Temp:30.50°C
Read MachXO2280 DIP Switch Inputs This demo uses the UART module of the Control SoC to read the user-input switch inputs 8-1 (MSB-LSB) of the DIP Switch Bank (SW2) and output it to the terminal as a hex value. Switch numbers are marked on the DIP switch body. A raised switch indicates a logical True (1).
To read the DIP Switch:
From the terminal window press d. The switch setting is returned as a hex value.
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
Example:
SW:0xFF
Read POWR1014A UES This demo uses the I2C module of the Control SoC to read the UES (User Electronic Signature) of the POWR1014A. The UES consists of 32 bits that can be configured to store unique data such as inventory control data.
To read the POWR1014A UES:
From the terminal window press u.
The UES is returned as a hex value.
Example:
UES:CB1014A1
Note: The POWR1014A UES for your board may differ.
Read Board Uptime Board uptime is the period in hours, minutes, and seconds elapsed since the last MachXO2280 power-on or global reset event. Board uptime can be a useful metric for system reliability.
To read board uptime:
In the terminal window press 1. Uptime status of the board appears.
Example:
Uptime: 000h40m18s
Re-Display the Main Menu During the demo session the main menu will scroll off screen. To redisplay the menu, press 0. Voltage Monitoring Demo This demo showcases RD1063, Delta-Sigma ADC Reference Design to monitor an analog voltage and convert it to a digital value. The demo utilizes header J23 and the 8-LED bank adjacent to the MachXO device on the board.
Figure 4. Delta-Sigma ADC Functional Block Diagram
SAR Done Sample Control
Digital OUT Analog + Successive Register Approximation Register - DAC RC Filter - (SAR)
Feedback Signal
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
The following logic blocks are implemented in the PLD:
• Successive Approximation Register • Delta-Sigma DAC • Sample Control • Output Register • SAR Done Flag
An 8-bit ADC with sampling frequency of 100Hz has been implemented for this demo. For detailed technical infor- mation on the ADC converter, reference RD1063, Delta-Sigma ADC Reference Design.
The demo asks the user to download the configuration pattern of the MachXO device from the following directory:
…\XO_Voltage_Monitoring_Demo\Project
The configuration pattern is in JEDEC file XO_Voltage_Monitoring_Demo.jed
Connect a voltage source to pin 2 of header J23. Make sure the ground of the voltage source is connected to a ground pad on the board. The voltage source must be between 0V and 3.3V.
Press reset switch SW1. The LEDs will display the digital value of the analog voltage provided by the voltage source. Each LED is ON when driven by an active low signal.
Vary the analog voltage source and observe the digital output on the LEDs, which will track the analog voltage source. Memory-Audio Demo The Memory-Audio Demo showcases the LatticeMico8 and two new peripherals that Lattice has developed. These peripherals are a CompactFlash memory controller and the Audio Player PWM DAC.
This exciting demo asks users to connect the MachXO Control Evaluation Board to the USB port of a personal computer and download wave files (filename.wav) to CompactFlash memory through the USB port. During this transaction, LatticeMico8 plays a crucial role in receiving the stream of data and writing it to the CompactFlash memory.
With a computer, users are able to send commands to the LatticeMico8 and select the wave file they would like to be played by the Audio Player PWM DAC. During this transaction, the LatticeMico8 interprets user keystroke com- mands, reads data from the CompactFlash memory and sends the data to Audio Player PWM DAC.
Figure 5. Functional Block Diagram
PC Host LatticeMico8 Microcontroller
WISHBONE Bus
CompactFlash Audio Player UART Controller PWM DAC
CompactFlash Memory Card Audio Jack
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
The darker blocks of the diagram highlight the embedded resources in the MachXO device.
PC Host Users employ a HyperTerminal program to communicate with the MachXO Control Evaluation Board. From the HyperTerminal, they are able to:
• Transfer a wave file to the CompactFlash memory card • Select the wave file, which the LatticeMico8 will read from the CompactFlash memory card and send ito the Audio Player PWM DAC
LatticeMico8 Microcontroller The LatticeMico8 is an 8-bit microcontroller optimized for Field Programmable Gate Arrays (FPGAs) and Program- mable Logic Device architectures from Lattice. In this demo, it performs the following tasks:
• Receives wave files and writes them to the CompactFlash memory card. (User transfers the wave files through the HyperTerminal program). • Receives commands from the user, indicating the wave file to be played. (User provides commands through the HyperTerminal program). • Reads a specific wave file from the CompactFlash memory card and sends it to the Audio Player PWM DAC.
UART The Lattice WISHBONE UART provides an interface between the WISHBONE UART system bus and an RS232 serial communication channel. Reference Design RD1042, WISHBONE UART has been implemented in this demo.
CompactFlash Memory Controller This embedded controller has wishbone interface and it is a peripheral component to the LatticeMico8 microcon- troller. Reference Design RD1040, CompactFlash Controller has been implemented in this demo.
Audio Player PWM DAC
This is an embedded digital-to-analog converter with WISHBONE interface and it is a peripheral component to the LatticeMico8 microcontroller.
Memory-Audio Demo Before you start, ensure that you have:
• A MachXO Control Evaluation Board connected to your computer through a USB connection and programmed with JED file control_soc_demo.jed. • A CompactFlash card plugged into the MachXO Control Evaluation Board CF connector J16 • Headphones or speakers plugged into the MachXO Control Evaluation Board Audio connector Q3 • Wave file mono <5 MB, 8 bit, mono
To run the demo:
1. Using a HyperTerminal program, connect to the MachXO Control Evaluation Board.
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
Figure 6. Startup Screen
2. Press u to begin uploading a song.
3. You will be prompted that existing data on the CompactFlash card will be overwritten. Press y to continue.
Figure 7. Uploading a Song/Wave File
4. Select a number to be associated with the song (1-9).
5. Ensure the protocol to transfer the file is Xmodem then select the file to upload. Toggle any switch on SW2 to begin uploading the file. The File progress window will update and the LEDs on the MachXO Control Evalua- tion Board will toggle.
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
Figure 8. Upload a File
Figure 9. Select File to Upload with Xmodem Protocol
Figure 10. File Upload Status
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
6. The file is uploaded and ready to be played. Press p then a number to select the song to play. At any time, press x to stop the playing of the song.
Figure 11. Select a Song to Play
Power Supply Fault Logging Demo This demo showcases a solution for detecting and logging power supply fault conditions in non-volatile memory. The demo is based on the reference design Power Supply Fault Logging (RD1062). Additional reference designs to build the system include:
• RD1042, WISHBONE UART • RD1043, LatticeMico8 to WISHBONE Interface Adapter • RD1044, SPI WISHBONE Controller • RD1026, LatticeMico8 Microcontroller
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
Figure 12. Power Supply Fault Logging Demo Block Diagram
MachXO2280 ispPAC-POWR1014A OUT3 - Fault Elapsed Time OUT10 - Stat0 SS OUT11 - Stat1 VMON VMON SPI SCLK VMON OUT12 - Stat2 Status Dump Status Capture Write 1-10 State State Status MOSI A & B Machine Machine State MISO 250kHz - PCLK Machine SPI Memory SS
8MHz - MCLK M SCLK U Fault Logging X MOSI RD1062 SS MISO
Sequencer & SCLK Supervisory Logic MOSI
MISO
Arbitration Logic and Handshaking
SPI Mem RD1044 BusyFull Ready Clear 4 bit Port
Wishbone Bus RD1043 LM8 UART Hyperterminal RD1026 RD1042 Interface
Arbitration logic and handshaking between the LatticeMico8 microcontroller and the Power Supply Fault Logging reference design (RD1062) is implemented to prevent contention with the interface signals of the SPI memory.
During this demo, the user will trigger faults in voltage rails monitored by Power Manager II ispPAC-POWR1014A, which will detect the faults and enable a dump of VMON status to the MachXO. The dump of VMON status is imple- mented using supervisory logic equations and happens automatically using outputs and clock pins of the Power Manager II. The MachXO will log the VMON status to SPI memory. The user is able to read the logged VMON sta- tus from SPI memory using the HyperTerminal interface of a personal computer.
Demo Environment Setup The user will first set up the MachXO Control Evaluation Board by populating jumpers in headers J17 and J22. These jumpers will later be used to trigger a fault condition during the demonstration. Next, program the Power Manager II and MachXO devices with the configuration patterns of this demo. The JEDEC files with the configura- tion patterns are located in the following directories:
…\MachXO_Control_PowerSupplyFaultLogging_Demo\project\MachXO
…\MachXO_Control_PowerSupplyFaultLogging_Demo\project\POWR1014A
Establish a HyperTerminal communication between the personal computer and the MachXO Control Evaluation Board as previously described in this document. Press on the pushbutton S1 to reset the board. Upon release of the reset line, the LatticeMico8 will transmit a menu of options through the UART to the HyperTerminal as shown in Figure 13.
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
Figure 13. HyperTerminal Window
• Option 1 of the menu will display the total number of faults logged in SPI memory. • Option 2 of the menu will display the latest fault that was logged in SPI memory. • Option 3 of the menu will step one-by-one through all the faults that were logged in SPI memory. • Option 4 of the menu will clear all the faults that were logged in SPI memory.
The demo design is configured to capture and log up to 251 faults in SPI memory. A message indicating that the SPI memory is full will be displayed in the HyperTerminal window in case the maximum number of faults is reached.
Trigger Fault Conditions Below is a list of fault conditions that users can cause on the board. After a fault condition is caused, the user can use menu options 1-3 to read the faults logged in SPI memory.
Fault conditions:
1. VMON2: Under volt if test point I/O 25 is shorted to test point I/O 26.
2. VMON2: Over volt if a 1KOhm resistor is shorted from test point I/O 26 to GND.
3. VMON3: Under volt if test point I/O 17 is shorted to test point I/O 19
4. VMON3: Over volt if a 1KOhm resistor shorts test point I/O 19 to GND
5. VMON4: Under volt if jumper J17 is removed. Remove jumper for less than two seconds.
6. VMON5: Over volt if jumper J22 is removed. Remove jumper for less than two seconds.
7. VMON7: Under voltage if 1KOhm resistor shorts HVO1 to GND.
8. VMON8: Under voltage if 1KOhm resistor shorts HV02 to GND.
When any of the above faults happen VMON9 and VMON 10 will have faults based on the settings of SW4: SW4.1 emulates comparator A status and SW4.2 emulates comparator B status.
There is a 2-second delay after a fault to prevent double faults before the sequence restarts.
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
The image below shows the HyperTerminal window after an over volt fault was caused on VMON5 and the user selected options 1 and 2 of the menu.
If desired, users can modify the assembly program for this demo by using the updated LatticeMico8_V3.01 assem- bler from the following directory:
…\MachXO_Control_PowerSupplyFaultLogging_Demo\LatticeMico8_V3_01_Util\ Download Demo Designs Lattice distributes source and programming files for a variety of demonstration designs compatible with the MachXO Control Evaluation Board.
To download demo designs:
1. Browse to the MachXO Control Development Kit web page at www.latticesemi.com/machxo-control-kit. Select the Demo Applications download and save the file.
2. Extract the contents of MachXO_Control_Dev_Kit.zip to an accessible location on your hard drive.
Two demo design directories are unpacked.
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
Demo Directories O2280 Control SoC Demo Demo_MachXO_Control_SoC \project .\source .\LatticeMico8_V3_0_Verilog .\RD1042 .\project .\source .\RD1043 .\project .\source .\RD1044 .\project .\source .\RD1046 .\project .\source .\RD1060 .\project .\source POWR1014A Board Management (BM) Demo Demo_PM_Control_BM .\project Voltage Monitoring Demo Demo_MachXO_Control_ADC_Voltage_Moni tor .\Project .\Source .\Testbench Memory-Audio Demo Demo_MachXO_Control_Mem_Audio .\Project .\rd1040 .\RD1042 .\RD1043 .\RD1044 .\RD1048 .\rd1053 .\Wave_Files Power Supply Fault Logging Demo Demo_MachXO_Control_FaultLogging .\Project .\Source .\Testbench Where:
• .\project – ispLEVER project (.syn) or PAC-Designer project (.pac), preferences (.lpf), and programming file (.jed). This directory may contain intermediate results of the ispLEVER/PAC-Designer build process. • .\source – HDL source for the ispLEVER project. • .\LatticeMico8_V3_0_Verilog – RD1026, LatticeMico8 Microcontroller User’s Guide • .\rdxxxx – Reference designs integrated by a demo. Programming Demo Designs with ispVM The Control SoC demo design is pre-programmed into the MachXO Control Evaluation Board by Lattice. To restore a board to factory settings or load an alternative demo design, use the procedure in this section.
To program a demo programming file:
1. Connect the MachXO Control Evaluation Board USB connector (J8) to a host PC.
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
2. Connect the included 5V adapter to the MachXO Control Evaluation Board power connector (J10).
3. Ensure the JTAG chain jumpers are set properly to include the MachXO and POWR1014A devices (See Figure X).
4. From the Start menu run ispVM System. ispVM appears.
5. Choose Options > Cable and IO Port Setup… The Cable and I/O Port Setup dialog appears.
6. Click Auto Detect. ispVM will detect Cable Type USB and Port Setting USB2.
7. Click OK.
8. Choose ispTools > Scan Chain. The New Scan Configuration Setup window appears. Bot the LCMXO2280 and POWR1014A appear in the device list.
9. Right-click the LCMXO2280C entry and choose Edit Device… The Device Information dialog appears.
10. From the Data File section, click the Browse button. The Open Data File dialog appears.
11. Browse to the
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
From the Operation list choose FLASH Erase, Program, Verify and click OK.
12. Choose Project > Download. ispVM reprograms the MachXO Control Evaluation Board.
Programming requires about 20-40 seconds. A small timer window will appear to show elapsed programming time. At the end of programming, the configuration setup window should show a PASS in the Status column. Rebuilding a MachXO Demo Project with ispLEVER Use this general procedure here to rebuild any of the MachXO2280 demo projects for the MachXO Control Evalua- tion Board.
1. Install and license ispLEVER software
2. Install and license ispVM System software.
3. Download the demo source files from the MachXO Control Development Kit Webpage at www.lattices- emi.com/machxo-control-kit.
4. Run the ispLEVER Project Navigator.
5. Create a new project and add the HDL files from the
6. Import the logical preference file (
7. Run the Generate Data File (JEDEC) process.
8. See the Programming Demo Designs with ispVM section of this document for details on downloading a pro- gramming file to the board.
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
Reassembling the Demo LatticeMico8 Firmware Use this general procedure to reassemble and download changes to the LatticeMico8 microcontroller firmware.
1. Install the LatticeMico8 Tool Code Revision 3.0 from www.latticesemi.com/products/intellectualproperty/referencedesigns/8bitmicrocontrollermico8.cfm
Note: The LatticeMico8 tool executables are also provided in the .\Demo_MachXO_Control_SoC\LatticeMico8_V3_0_Verilog\utils directory.
2. Compile the LatticeMico8 Assembler and Simulator (optional)
3. Modify the Assembly source (.s) file and recompile to a memory image (.hex). Source for the Control SoC demo is provided as control_soc_demo.s.
4. Use the Memory Initialization tool of the ispLEVER Project Navigator to update the physical database NCD.
5. Rerun Generate Data File (JEDEC) process.
6. See the Programming Demo Designs with ispVM section of this document for details on downloading a pro- gramming file to the MachXO Control Evaluation Board. Recompiling a Power Manager II Demo Project with PAC-Designer Use the general procedure here to rebuild any of the POWR1014A demo projects for the MachXO Control Evalua- tion Board.
1. Install and license PAC-Designer software
2. Install and License ispVM System software.
3. Download the demo source files from the MachXO Control Development Kit Webpage at www.lattices- emi.com/machxo-control-kit.
4. Run PAC-Designer.
5. Open the PAC-Designer project file (
6. Double-click the Sequence Controller block.
7. Choose Tools > Compile LogiBuilder Design.
Note: To program the POWR1014A device, the MachXO device must be removed from the JTAG chain by setting the JTAG jumpers (see Figure X). Because the power to the MachXO device is controlled by the POWR1014A, it cannot be in the JTAG chain during POWR1014A updates. MachXO Control Evaluation Board This section describes the features of the MachXO Control Evaluation Board in detail. Overview The MachXO Control Evaluation Board is an AC-powered development platform for the MachXO PLD. The board includes on-board SRAM and SPI Flash memory, I2C and SPI microcontroller communication interfaces, a USB program/debug port, and an expansion header to support test connections.
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
Figure 14. MachXO Control Evaluation Board Block Diagram
8 2x40 PWM Optional Optional Header Landing Fan Circuit LCD expansion 2x40 4 XO2280 boards Header Landing 46 GPIO LED Bank SPI 3 SPI 2 Mbit Optional 9 SD Card Flash SD 2 2 Socket I2C Temp. I C Memory Card Optional Sensor 36 CompactFlash CompactFlash Socket 28 Memory Card Wall- 1 Mbit wart SRAM Audio Jack A Circuit Power 3 2 2 I C Delta-Sig Supply ADC Circuit MachXO Current 3 6 GPIO LCMXO2280C-4F256C Sensor Power Manager II POWR1014A 3 Fan Circuit 4 POWR1014A LED Bank Fan
2-Bit A/Mini-B DIP Switch JTAG Program / USB Cable Serial Debug USB USB Mini B Controller Socket 62.5 MHz Crystal GSRN/ 2 User 2 SLEEPN Pushbuttons 8-bit 8 DIP SW
Table 2 describes the components on the board and the interfaces it supports. Table 2. MachXO Control Evaluation Board Components and Interfaces Component/Interface Type Schematic Reference Description Circuits USB Controller Circuit U3:CY7C68013A-QFN56 USB-to-JTAG interface USB to Serial (RS-232) Circuit U1:FT232R / 32-QFN USB-to-Serial interface Components 62.5 MHz Oscillator Clock U38 MachXO clock source 1Mbit SRAM Memory U8:CY128X8TSOP 1Mb of SRAM MachXO PLD PLD U60:MachXO_2280_FN256 LCMXO2280FN256 POWR1014A PLD U17:ispPAC-POWR1014A ispPAC-POWR1014A I2C Temperature Sensor I/O U15:TMP101 Measures board temperature 2Mbit SPI Flash Memory Memory U4 2Mb FLASH memory 8 LEDs Output D7-D0 User-definable LEDs Interfaces 2X16 Header I/O J6 User-definable I/O USB Control B Sockets I/O J1, J8 Programming and debug interface Push-button switches I/O S1, S2 GSR and Sleep push buttons Jumper I/O J2 MachXO Core current Jumper I/O J3 MachXO AUX current Jumper I/O J4 MachXO I/O current Jumper I/O J6 MachXO TSALL input
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
Table 2. MachXO Control Evaluation Board Components and Interfaces (Continued) Jumper I/O J17 Connects Vccio Jumper I/O J22 Grounds Vccaux
Subsystems This section describes the principle subsystems for the MachXO Control Evaluation Board in alphabetical order.
CompactFlash Card Socket A CompactFlash card socket (J16 - Schematic Sheet 2 of 10) will accept both Type I and Type II cards.
Table 3. CompactFlash Socket Reference
Item Description Reference Designators J16 Part Number CF_Socket Manufacturer AVX Part Number AVX-31-5620-050-116-871
Tested CF Flash Memory Card: SanDisk 64MB
Current Sensor Circuits The MachXO Control Evaluation Board provides three resistive current sensing circuits (Schematic Sheet 7 of 10) using the technique described in AN6049, High-side Current Sensing Techniques for Power Manager Devices. You may measure current consumption of the MachXO2280 Vcccore, Vccaux, or Vccio through the POWR1014A volt- age supervisor function.
Digital Potentiometer Circuit An I2C addressable digital potentiometer (U44 – Schematic Sheet 4 of 10) is programmable to adjust the LCD backlight and contrast and optionally provide a variable input voltage for the Delta-Sigma ADC circuit.
Fan Circuit A 3-pin fan motor header and circuit supports a DC fan motor (Schematic Sheet 3 of 10).
GPIO Expansion Header Land Patterns The MachXO Control Evaluation Board provides land patterns for two 40-pin general purpose I/O (GPIO) expan- sion headers (J4 and J7 – Schematic Sheet 2 of 10), a 38-pin header for MachXO2280 GPIO access, and one 14- pin header for debug access. All land patterns are organized for 100mil centered pin headers.
J4 and J7 Land Patterns: J4 and J7 patterns are for two 40-pin expansion headers. The combination provides 46 user I/Os connected to the MachXO2280. The remaining pins serve as power and clock supplies for expansion boards. I/Os are shared with the CompactFlash socket. The connector spacing, orientation, and I/O connections match expansion board from Gleichmann Engineering. See the Gleichmann Hpe Expansion board page at (http://www.ger-fae.com/hpe_expansion.html) for an example. Table 4. Header J4 Pin Information Function J4 Pin MachXO Pin CompactFlash Socket Pin GPIO_RST 1 E8 GND 2 IO0 3 E9 2 IO1 4 A10 3 IO2 5 A9 4 IO3 6 C9 5 IO4 7 C10 6
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
Table 4. Header J4 Pin Information (Continued) Function J4 Pin MachXO Pin CompactFlash Socket Pin IO5 8 D9 7 IO6 9 D10 8 IO7 10 B9 9 IO8 11 B10 10 IO9 12 A11 11 IO10 13 A12 12 IO11 14 B11 14 IO12 15 B12 15 IO13 16 C11 16 IO14 17 C12 17 IO15 18 A13 18 GND 19 +3.3V 20 IO16 21 A14 19 GND 22 IO17 23 D11 20 GND 24 IO18 25 D12 21 GND 26 IO19 27 E10 22 IO20 28 E11 23 IO21 29 B13 24 GND 30 IO22 31 C13 25 IO23 32 B14 26 IO24 33 C14 27 GND 34 IO25 35 A15 28 IO26 36 B15 29 IO27 37 B3 30 GPIO_CARDSEL# 38 B2 IO28 39 A2 31 GND 40
Table 5. Header J7 Pin Information Function J7 Pin MachXO Pin CompactFlash Socket Pin GND 1 NC 2 3.3V 3 IO29 4 A3 32 IO30 5 D3 33 IO31 6 D4 34 IO32 7 C4 35
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
Table 5. Header J7 Pin Information (Continued) Function J7 Pin MachXO Pin CompactFlash Socket Pin IO33 8 C5 36 IO34 9 D6 37 IO35 10 D5 39 IO36 11 B4 40 IO37 12 B5 41 IO38 13 E7 42 IO39 14 E6 43 IO40 15 A5 44 IO41 16 A4 45 IO42 17 C6 46 IO43 18 C7 47 IO44 19 B6 48 IO45 20 B7 49 5V 21 GND 22 3.3V 23 GND 24 3.3V 25 GND 26 3.3V 27 GND 28 OSC_CLK 29 GND 30 IO46 31 A6 GND 32 IO47 33 A7 GND 34 3.3V 35 GND 36 3.3V 37 GND 38 3.3V 39 GND 40
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
38-Hole Land Pattern: The MachXO Control Evaluation Board provides a 38-hole landing area with connections to POWR1014A and MachXO2280 support circuits (Schematic Sheet 8 of 10).
Table 6. 38-Pin Landing Pattern Pin Information
Function Pin POWR1014A Pin Other Connections HVOUT1 IO9 15 HVOUT2 IO54 14 PM_I2C_ALERT IO55 13 PM_OUT8 IO33 8 PM_OUT9 IO11 6 PM_OUT10 IO56 5 PM_OUT11 IO53 4 PM_OUT12 IO57 3 XO_RESET IO59 2 XO2280 GSR push-button circuit XO_Sleepn IO60 1 XO2280 Sleep push-button circuit PM_PLDCLK IO61 42 PM_MCLK IO85 43 VMON7 IO65 34 VMON8 IO66 35 VMON9 IO67 36 VMON10 IO68 37 ICC_Sense IO69 25 ICCAUX_Sense IO70 26 ICCIO_Sense IO71 27
14-Hole Land Pattern: The MachXO Control Evaluation Board provides a 14-hole landing area with connections to key SPI bus and DAC/ADC circuit nets (Schematic Sheet 3 of 10).
Table 7. 14-Hole Landing Pattern Pin Information
Function Pin XO_SPI_CS0 IO7 GND_6 XO_SPI_CLK IO52 GND_50 XO_SPI_OUT IO30 GND_29 XO_SPI_IN IO8 GND_7 A2D_DS_IN IO50 GND_51 D2A_OUT IO28 GND_30 Fan_Trigger IO28 GND_33
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
JTAG Jumpers Two jumper circuits (Schematic Sheet 1 of 10) allow you to define the MachXO Control Evaluation Board’s JTAG chain of installed devices. You may specify the Installed/Removed state for the MachXO2280 and POWR1014A of the board. Additionally you can connect an external JTAG circuit by attaching to IO20, IO22, and IO24 test points. See the Jumper Settings table of Schematic Sheet 1 for details.
LCD Panel Support Circuit The MachXO Control Evaluation Board provides support circuitry and connector (Lumex LCM-S02002DSR. Note: Assembly to generic 16-pin (2x8) header is required, for example, Sullins Connector Solutions PPPC082LFBN- RC), Schematic Sheet 4 of 10. The LCD is connected to GPIOs of the MachXO and backlight/contrast controls.
Table 8. LCD Connector Pin Information
Function J13 Pin LCD_BACKLIGHT 1 GND 2 GND 3 +5V 4 LCD_CONTRAST 5 LCD_RS 6 LCD_RW 7 LCD_E 8 LCD_D0 9 LCD_D1 10 LCD_D2 11 LCD_D3 12 LCD_D4 13 LCD_D5 14 LCD_D6 15 LCD_D7 16 LCD_BACKLIGHT 17 GND 18
MachXO PLD (MachXO2280) The MachXO PLD device (LCMXO2280C-4F256C) on the board provides 2280 LUTs, 7.5 Kbits of distributed RAM, 27.6 Kbits of EBR SRAM, 211 user I/Os in a 17x17 mm ftBGA package.
Table 9. MachXO2280 Reference
Item Description Reference Designators U60A, U60B, U60C, U60D, U60E Part Number LCMXO640/1200/2280-FT256/FTN256 Manufacturer Lattice Semiconductor Corporation Web Site www.latticesemi.com
This following sections describe user access to the LCMXO2280FTN256 device.
MachXO2280 DIP Switch Bank Input: The MachXO Control Evaluation Board includes an eight-bit input toggle switch tied to GPIOs of the MachXO (SW2 – Schematic Sheet 4 of 10). When in the open position, the switch is pulled to 3.3V via a 10K resistor. When in the down position, the switch is tied to ground.
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
Table 10. DIP Switch Pin Information
Function SW2 Pin MachXO Pin SW7 1 T13 SW6 2 T12 SW5 3 R13 SW4 4 R14 SW3 5 T14 SW2 6 T15 SW1 7 R15 SW0 8 R16 GND 9 GND 10 GND 11 GND 12 GND 13 GND 14 GND 15 GND 16
MachXO2280 LED Bank: The evaluation board includes an eight LED tied to GPIOs of the MachXO (Schematic Sheet 4 of 10). Driving logic low ‘0’ will light an LED. Table 11. LED Bank Pin Information
Function RN1_8_470 MachXO Pin LED0 D1 T10 LED1 D2 T11 LED2 D3 N10 LED3 D4 N11 LED4 D14 R11 LED5 D15 R12 LED6 D16 P11 LED7 D17 P12
MachXO2280 GSR Input Push-button: A global RESET (GSR) push-button circuit (Schematic Sheet 5 or 10) con- nects to the dedicated pad for the MachXO2280 global RESET signal (GSRN). The push-button circuit can also be driven from a POWR1014A output.
MachXO2280 Sleep Input Push-button: A temporary push-button switch connects to the MachXO2280 SLEEPN input pin. When depressed the MachXO2280 enters Sleep Mode. Note that during sleep all I/Os of the device are tri-stated. The push-button circuit can also be driven from a POWR1014A output.
MachXO2280 TSALL Input Jumper: A tri-state all (TSALL) jumper circuit (Schematic Sheet 5 or 10) connects to the dedicated pad for the MachXO2280 global output enable signal. When TSALL is high all the outputs are tristated.
Oscillator Circuit A 62.5MHz oscillator circuit (Schematic Sheet 5 of 10) fans out to a primary clock input of the MachXO USB con- troller PHY, prototype area, and GPIO Expansion Connector. You may disable the oscillator circuit by installing jumper J24.
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
Power Manager II Mixed Signal PLD (ispPAC-POWR1014A) The Power Manager II (ispPAC-POWR1014A-01TN48I) (U17 – Schematic Sheet 8 of 10) provides a programmable power supply supervisor, reset generation, and sequencing control features for the MachXO Control Evaluation Board. By default the POWR1014A is programmed to monitor current and voltage levels of the MachXO2280 Icccore, Iccaux, Iccio, Vcccore, Vccaux, and Vccio using VMON inputs 1-6.
Table 12. POWR1014A Reference
Item Description Reference Designators U17 Part Number ispPAC-POWR1014A Manufacturer Lattice Semiconductor Corporation Web Site www.latticesemi.com
POWR1014A DIP Switch Input: The MachXO Control Evaluation Board includes a two-bit input toggle switch tied to digital inputs of the POWR1014A (SW4 – Schematic Sheet 8 of 10). When in the open position, the switch is pulled to 3.3V via a 10K resistor. When in the down position, the switch is tied to ground.
Table 13. POWR1014A DIP Switch Pin Information
Function U17 Pin Description MachXO Pin Other Connection
POWR1014A LED Bank: The MachXO Control Evaluation Board includes four LEDs tied to digital outputs of the POWR1014A (Schematic Sheet 8 of 10). Driving logic low ‘0’ will light a LED.
Table 14. POWR1014A LED Bank Pin Information
Function RN2_4_470 POWR1014A Pin PM_LED0 D5 12 PM_LED1 D6 11 PM_LED2 D7 10 PM_LED3 D8 9
Power Supplies, Supply Control, and Fault Circuits The MachXO Control Evaluation Board features a single coaxial input connector to apply power (Schematic Sheet 7 of 10). A 5V DC source must be applied to power the board.
A low dropout voltage regulator converts +5V to +3.3V. Two MOSFET power switch circuits controlled by the POWR1014A enable the MachXO2280 Vcccore and Vccaux supplies. For more information on using power MOS- FETs with Power Manager and Power Manager II devices see AN6048, Using Power MOSFETs with Power Man- ager Devices.
To emulate a supply failure on the MachXO Control Evaluation Board, you may remove either unplug the power supply to disable the 5V input or remove Vccaux or Vccio jumpers connected to the voltage monitor inputs to the POWR1014A (Schematic 8 of 10). When programmed with the default PC Board Control and Power Management demo design the supply rail failure and time will be recorded to a diagnostic log of the on-board SPI Flash Memory.
Prototyping Area The MachXO Control Evaluation Board provides 1” x 3”, 140-hole prototyping area with connections to MachXO2280 GPIOs (Schematic Sheet 8 and 9 of 10), +3.3V, and GND. The area is organized as 7 columns of 100-mil spaced holes.
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
Table 15. Prototype Area Column Organization
Column 1 2 3 4 5 6 7 Function +3.3V Proto Area (NC) GND Proto I/Os
Table 16. Column 7 Proto I/O Pin Information
Function Proto I/O Pin MachXO2280 Pin ProtoT4 IO12 T4 ProtoR6 IO80 R6 ProtoT6 IO34 T6 ProtoT8 IO18 T8 ProtoM7 IO35 M7 ProtoM8 IO31 M8 ProtoR7 IO76 R7 ProtoR8 IO79 R8 ProtoN8 IO83 N8 ProtoN9 IO62 N9 ProtoP9 IO63 P9 ProtoP10 IO64 P10 ProtoM10 IO82 M10 ProtoR9 IO72 R9 ProtoR10 IO73 R10 ProtoP15 IO74 P15 ProtoP16 IO75 P16 OSC_CLK IO77 XO_SDA IO78 K5 XO_SCL IO84 K4
PWM Analog Output Circuit A pulse width modulated type circuit (Schematic Sheet 3 of 10) is provided to serve a digital to analog conversion (DAC). A stereo phonejack (J26) allow you to connect external speakers or headphones to the MachXO Control Evaluation Board.
SD Flash Memory Card Socket A 9 pin SD card socket is provided (U23 – Schematic Sheet 3 of 10) with the ability to interface to SD card memory cards.
SPI Flash Memory The board is populated with an Atmel non-volatile 2 M-bit SPI Flash memory (U69 – Schematic Sheet 3 of 10).
Table 17. SPI Flash Memory Reference
Item Description Reference Designators U69 Part Number M25PE20-VMN6TP Manufacturer Numonyx/ST Micro Web Site www.numonyx.com
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
SRAM The board is populated with 1 Mbit of SRAM from Cypress (U8 – Schematic Sheet 3 of 10) with a data bus width of 8 bits. The 17-bit address bus, the data bus and the control signals are connected directly to the CPLD. The 17-bit address bus, named MEMORY_A0 through MEMORY_A16, addresses 1 byte locations.
Table 18. SRAM Reference
Item Description Reference Designators U8 Part Number CY128X8TSOP Manufacturer Cypress Semiconductor Web Site www.cypress.com
Status LEDs One red power OK status LED is provided.
Temperature Sensor The temperature sensor on the MachXO Control Evaluation Board is a TI TMP101NA/250 device (U15 – Sche- matic Sheet 3 of 10). It uses an I2C bus slave interface to provide the temperature reading on the board.
Test Points In order to check the various voltage levels used, several test points are provided:
• VCC (1.2V, 2.5V, and 3.3V) • VCCAUX • VCCIO of all banks •GND • Clock source • ADC GND • ADC Vin •DAC Vout •DAC Fdbk
USB Programming and RS-232 Interface The USB programming and data interface circuit (Schematic Sheet 10 of 10) provides clocking, boot memory, a FTDI Chip dual USB UART/FIFO device.
By default, the MachXO Control Evaluation Board’s pre-programmed PC Board Control and Power Management demo design provides a user interface layer to a PC-based terminal program.
Voltage Ramp Circuit The evaluation board includes two voltage ramp circuits (Schematic Sheet 8 of 10) tied to the high-voltage outputs of the POWR1014A. Vishay N-channel MOSFETs are included so test equipment can be attached to examine con- trolled FET ramp rate. FET source pins are attached to voltage monitor inputs of the POWR1014A.
Ramp the voltage of two simulated supplies up using the HVOUT1 and HVOUT2 outputs. Each circuit will be ramped up at a different rate. The HVOUT outputs will each be connected to a circuit using a MOSFET controlling a resistor and capacitor network. The voltage output of this circuit will be monitored by the VMON7 and VMON8 inputs. When the voltage on each of these inputs reaches the preset value, an LED on the POWR1014A LED bank will be lit.
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
Programming Programming for the MachXO and Power Manager II devices are controlled using the ispVM® System software, available for download from the Lattice website at www.latticesemi.com/ispvm.
Refer to the ispVM System software for help regarding operation of this software.
The MachXO Control Evaluation Board is equipped with a built-in USB-based programming circuit. This consists of a USB PHY and a USB connector. When the board is connected to a PC with a USB cable, it is recognized by the ispVM System software as a “USB Download Cable”. The MachXO PLD can then be scanned and programmed using the ispVM System 17.5 or later software. Mechanical Specifications Dimensions: 6 ¼ in. [L] x 4 in. [W] x 5/8 in. [H] Environmental Requirements The evaluation board must be stored between -40° C and 100° C. The recommended operating temperature is between 0° C and 55° C.
The evaluation board can be damaged without proper anti-static handling. Glossary CPLD: Complex Programmable Logic Device
DIP: Dual in-line package.
I2C: Inter-Integrated Circuit.
LED: Light Emitting Diode.
PCB: Printed Circuit Board.
RoHS: Restriction of Hazardous Substances Directive.
PLL: Phase Locked Loop.
SPI: Serial Peripheral Interface.
SRAM: Static Random Access Memory.
TransFR: Transparent Field Reconfiguration.
UART: Universal Asynchronous Receiver/Transmitter.
USB: Universal Serial Bus.
WDT: Watchdog timer
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
Troubleshooting Board Does Not Power On Completely If jumper is not installed at J17, when power is initially applied to the board, the POWR1014A will stop the power-on sequence of the board. Install a jumper at J17 to enable the power-on sequence.
Board Continuously Resets If position 2 of the POWR1014A DIP Switch (SW4) is depressed the board will continuously cycle the reset input of the system. Raise position 2 of SW4 for normal operation.
Other JTAG Devices are Ignored by ispVM Software • See Schematic Sheet 1 of 10 to ensure the TDI-TDO and TMP jumper settings enable the Other JTAG option. • All JTAG devices attached to the MachXO Control Evaluation Board JTAG chain, must use a 3.3V supply rail to be recognized by ispVM System software.
Determine the Source of a Pre-Programmed Part It’s likely you will receive your MachXO Control Evaluation Board after it has been reviewed and reprogrammed by someone else. To restore the board to the factory default, see the Download Demo Designs section of this docu- ment for details on downloading and reprogramming the device.
You can also determine which demo design is currently programmed onto the board by comparing the JEDEC checksums against of the programming file with what is read from the programmed part.
To compare JEDEC file checksum:
1. Connect the MachXO Control Evaluation Board to a host PC using the USB ports.
2. Start ispVM and choose ispTools > Scan. The LCMXO2280C appears in the Device List.
3. Double-click the LCMXO2280C row. The Device Information dialog appears.
4. Click the Browse button. The Save as Data File dialog appears.
5. Specify a new JEDEC Data File name and click the Save button.
6. From the Operation list choose FLASH Read and Save and click OK.
7. Choose Project > Download. ispVM reads the Flash contents from the MachXO and writes the results to the JEDEC file specified.
Open the JEDEC file into a text editor and page to the bottom of the file.
Note the hexidecimal checksum at the line above the User Electronic Data note line. Compare this value against the checksum of the original JEDEC demo programming files. Ordering Information
China RoHS Environment-Friendly Description Ordering Part Number Use Period (EFUP)
MachXO Control Development Kit LCMXO2280C-M-EVN
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
Technical Support Assistance Hotline: 1-800-LATTICE (North America) +1-503-268-8001 (Outside North America) e-mail: [email protected] Internet: www.latticesemi.com Revision History Date Version Change Summary August 2009 01.0 Initial release. August 2009 01.1 Added Appendix A - Schematic. Updated Appendix B - Bill of Materials. October 2009 01.2 Included support for the Power Supply Fault Logging, Voltage Monitor- ing and Memory-Audio demos.
© 2009 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are trademarks or registered trademarks of their respective holders. The speci• cations and information herein are subject to change without notice.
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
Appendix A. Schematic Figure 15. Configuration B D C A B 10 of 1 Board Rev Schematic Rev Sheet 1 1 Lattice Semiconductor Applications Email: [email protected] Phone (503) 268-8001 -or- (800) LATTICE (800) -or- 268-8001 (503) Phone Monday, 13-Apr-09Monday, MachXO ControlMachXO Board Project Config B Size Date: Title USB_TDO TMS 2 2 GND_72 TDO TCK IO21 IO20 IO22 IO24
R192 10K DI
1 1
2 +3.3V 2 J19 Jumper_1way DI J14 Jumper_1way DI IO23 Other JTAG TDI PM_TMS PM_TCK PM_TDO
R191 10K DI
1 1
2 3 +3.3V 2 3 J18 Jumper_1way DI J9 Jumper_1way DI PM_TDI Power Manager JTAG Jumper Settings XO_TMS XO_TCK XO_TDO
R159 10K DI
1 1
2 +3.3V 2 J5 Jumper_1way DI J15 Jumper_1way DI MachXO JTAG 4 4 XO_TDI R158 4_7k DI USB_TCK USB_TMS USB_TDI 5 5 A D C B
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
Figure 16. MachXO Banks 0 and 1 D C B A B 0 DI R197 10 IO33 IO35 IO39 IO31 IO37 IO43 IO45 IO29 IO41 +3.3V of Board Rev Schematic Rev 2 IO5 IO7 IO1 IO9 IO3 IO13 IO23 IO11 IO15 IO20 IO26 Sheet 1 1 +3.3V GPIO_CARDSEL# 10 18 2 4 8 14 16 26 30 36 38 6 10 14 16 18 20 32 36 40 6 12 20 22 24 28 32 34 40 2 4 8 12 22 26 30 24 28 34 38 J7 CON40A DNI 2x20x100mil J4 CON40A DNI 2x20x100mil GPIO Header 1 7 9 5 9 3 5 1 3 7 23 21 11 13 15 17 19 27 31 33 35 37 39 11 13 17 25 29 31 33 35 37 39 21 25 29 15 19 23 27 Lattice Semiconductor Applications GPIO Header Email: [email protected] Phone (503) 268-8001 -or- (800) LATTICE (800) -or- 268-8001 (503) Phone 0 DI R196 +3.3V IO30 IO32 IO36 IO38 IO40 IO42 IO44 GPIO_RST IO0 IO2 IO4 IO6 IO10 IO14 IO16 IO18 IO21 IO22 IO25 IO28 IO34 IO46 IO47 IO8 IO12 IO17 IO19 IO24 IO27 Monday, 13-Apr-09Monday, MachXO ControlMachXO Board Project MachXO Banks 0 and 1 Banks MachXO B Size Date: Title OSC_CLK +3.3V 0 DI +5V R195 2 2 IO2 IO9 IO14 IO22 IO24 IO0 IO1 IO3 IO4 IO5 IO6 IO7 IO8 IO10 IO11 IO12 IO13 IO15 IO16 IO17 IO18 IO19 IO20 IO21 IO23 IO25 IO26 GPIO_RST E9 A15 B15 B14 C14 A10 C10 D9 A11 B11 B12 A12 A13 C9 B10 A14 D11 B13 A9 C11 C12 D12 C13 E8 E10 E11 D10 B9 1OI C CV PT9A/PT7A/PT9C PT9B/PT7B/PT9D NC/PT11A/PT16A NC/PT11B/PT16B NC/PT10C/PT15A NC/PT10D/PT15B NC/PT11C/PT16C NC/PT11D/PT16D 3 3 PT7F/PT9F/PT14B PT8D/PT8B/PT10F PT7D/PT8F/PT12B PT7E/PT9E/PT14A PT6A/PT7C/PT10A PT6D/PT7F/PT10D PT8C/PT8A/PT10E PT7C/PT8E/PT12A PT7A/PT9A/PT12C PT7B/PT9B/PT12D PT5C/PT8C/PT11A PT6C/PT7E/PT10C PT5D/PT8D/PT11B PT8A/PT9C/PT13C PT8B/PT9D/PT13D PT9F/PT10F/PT15D PT9E/PT10E/PT15C PT9C/PT10A/PT14C PT9D/PT10B/PT14D I/Os in Bank 1 for XO2280
PT6B/PT7D/PT10B/CLK1
PT5B/PT6F/PT9B/CLK0
D7
PT5A/PT6E/PT9A D8 LCMXO640/1200/2280-FT256/FTN256 0OI I/Os in Bank 0 for XO1200 CCV Pin name sequence PT(640,1200,2280) U60A NC/PT2B/PT2D PT2C/PT3C/PT5A PT3F/PT5B/PT6D PT4D/PT6B/PT7D PT4E/PT6C/PT8C PT2B/PT3B/PT3B NC/PT2C/PT3C NC/PT2D/PT3D PT2E/PT4A/PT4A PT2F/PT4B/PT4B PT3A/PT3E/PT5C PT3B/PT3F/PT5D NC/PT4C/PT6E PT3E/PT5A/PT6C PT4B/PT5F/PT7B NC/PT2A/PT2C PT2A/PT3A/PT3A PT2D/PT3D/PT5B NC/PT4D/PT6F PT3C/PT5C/PT6A PT3D/PT5D/PT6B PT4A/PT5E/PT7A PT4C/PT6A/PT7C PT4F/PT6D/PT8D B2 A2 E6 A6 B3 A4 A7 B8 A3 B4 B5 E7 A5 B7 B6 D3 C5 D5 C6 C7 C8 D6 D4 C4 4 4 IO28 IO43 GPIO_CARDSEL# IO27 IO29 IO30 IO34 IO36 IO37 IO41 IO44 IO31 IO39 IO46 IO32 IO33 IO35 IO38 IO40 IO42 IO45 IO47 OSC_CLK D4 D6 CE1N/CE1N/CS0N A8 VCC D0 WP/IOIS16N/IOCS16N CD1N D12 CE2N/CE2N/CS1N IOWRN WEN CSELN INPACKN/DMARQ BVD1/STSCHGN/PDIAGN D8 GND GND D3 D5 D7 A10 OEN/OEN/ATA_SELN A9 A7 A6 A5 A4 A3 A2 A1 A0 D1 D2 CD2N D11 D13 D14 D15 VS1N IORDN READY/IREQN/INTRQ VCC VS2N RESET/RESET/RESETN WAITN/WAITN/IORDY REGN/DMACKN BVD2/SPKRN/DASPN D9 D10 J16 CF_ Socket DI 5 1 2 4 6 8 9 3 7 19 22 30 11 13 21 24 26 28 32 35 36 39 43 46 47 50 10 12 14 15 16 17 18 20 23 25 27 29 31 33 34 37 38 40 41 42 44 45 48 49 Compact Flash Socket Compact Flash 5 5 +3.3V IO34 IO37 IO44 IO2 IO6 IO9 IO10 IO12 IO13 IO16 IO19 IO20 IO22 IO23 IO24 IO26 IO28 IO30 IO33 IO36 IO38 IO39 IO40 IO0 IO1 IO3 IO4 IO5 IO7 IO8 IO11 IO14 IO15 IO17 IO18 IO21 IO25 IO27 IO29 IO31 IO32 IO35 IO41 IO42 IO43 IO45 10uF DI C35 A D C B
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
Figure 17. MachXO Banks 2 and 3 D C B A B 10 of 3 GND_6 GND_33 GND_50 GND_30 Schematic Rev GND_29 GND_51 Board Rev GND_7 Data_1 Data_4 Data_5 SRAM_WEb Data_0 Data_3 Data_6 Data_7 SRAM_OEb Data_2 SRAM_CSb IO7 IO36 IO52 IO8 IO28 IO30 IO50 Sheet
1 1 R76 R76 10K 10K DNI DNI R124 R124 10K 10K DNI DNI
R65 10K 10K DNI DNI R103 R103 10K 10K DNI DNI
28 R65 25 5 23 6 7 22 10 11 27 26 12 9
R73 R73 10K 10K DNI DNI R148 R148 10K 10K DNI DNI
DI R66 10K 10K DNI DNI R104 R104 10K 10K DNI DNI C24 0_1uF R66
IO5 IO0 IO1 IO4 IO2 IO3 IO7 IO6 R67 R67 10K 10K DNI DNI R105 10K 10K DNI DNI
CEn R105 VSS OEn VSS
WEn
R68 R68 10K 10K DNI DNI R149 R149 10K 10K DNI DNI
R69 R69 10K 10K DNI DNI R107 R107 10K 10K DNI DNI +3.3V SRAM U8 VCC A3 A9 A13 VCC A0 A1 A2 A4 A5 A6 A7 A8 A10 A11 A14 A15 A16 A12 DI CY128X8TSOP DI C23 0_1uF 1 2 3 4 8 24 18 29 13 14 15 16 17 19 20 30 31 32 21 Lattice Semiconductor Applications Email: [email protected] Phone (503) 268-8001Phone -or- (800) LATTICE +3.3V IO Header Fan_Trigger XO_SPI_CS0 XO_SPI_CLK XO_SPI_OUT XO_SPI_IN A2D_DS_IN D2A_OUT Monday, 13-Apr-09Monday, MachXO ControlMachXO Board Project MachXO Banks 2 and 3 Banks MachXO Addr_2 Addr_3 Addr_7 Addr_13 Addr_0 Addr_1 Addr_4 Addr_5 Addr_8 Addr_9 Addr_10 Addr_11 Addr_12 Addr_14 Addr_15 Addr_16 Addr_6 B Date: Title Size DI C21 10uF DNI C51 0_1uF 2 2 D2A_OUT Data_2 Data_0 Data_3 Data_4 Data_5 Data_6 Data_7 Addr_1 Addr_2 Addr_3 Addr_4 Addr_5 Addr_6 Addr_7 Addr_8 Addr_9 Addr_10 Addr_11 Addr_12 Addr_13 Addr_14 Addr_15 Addr_16 Data_1 Addr_0 DI 100 R50 DI R44 100 3 2 1 R6 330
Q3 2N2369A DI
3 1 +5V DI 2 N16 N12 N13 J12 K12 M15 J15 L16 L12 L13 H16 J13 M12 M13 M11 N14 M14 L14 M16 L11 N15 J14 K14 K16 J16 K15 K13 L15 J26 PHONEJACK STEREO R26 10k DI PWM Output Signal Analog NC/PR9C/PR11C NC/PR9D/PR11D VCCIO3 NC/PR16B/PR20B NC/PR16A/PR20A NC/PR14C/PR17C NC/PR14D/PR17D PR8A/PR10C/PR13C PR8B/PR10D/PR13D PR9A/PR11C/PR14C PR9B/PR11D/PR14D PR11A/PR13C/PR16C PR11B/PR13D/PR16D PR10C/PR12C/PR15C PR10D/PR12D/PR15D XO_D2A_Driver NC/PR15A/PR18A/LV_T NC/PR15B/PR18B/LV_C PR7A/PR9A/PR11A/LV_T PR7B/PR9B/PR11B/LV_C PR7C/PR10A/PR13A/LV_T PR9C/PR12A/PR15A/LV_T PR8C/PR11A/PR14A/LV_T PR7D/PR10B/PR13B/LV_C PR8D/PR11B/PR14B/LV_C PR9D/PR12B/PR15B/LV_C PR10A/PR13A/PR16A/LV_T PR11C/PR14A/PR17A/LV_T PR10B/PR13B/PR16B/LV_C PR11D/PR14B/PR17B/LV_C LCMXO640/1200/2280-FT256/FTN256 3 3 DI R83 5_1k XO_A2D_DS_IN Pin name sequence PR(640,1200,2280) +3.3V VCCIO2 U60D NC/PR3B/PR4B/LV_C NC/PR3D/PR4D PR3C/PR4A/PR5A/LV_T PR2C/PR5A/PR6A/LV_T PR3A/PR5C/PR6C PR3B/PR5D/PR6D PR4A/PR6A/PR7A/LV_T PR4B/PR6B/PR7B/LV_C PR5A/PR6C/PR7C PR6C/PR7C/PR9C PR5C/PR8A/PR10A/LV_T PR5D/PR8B/PR10B/LV_C NC/PR2A/PR3A/LV_T NC/PR2B/PR3B/LV_C NC/PR3A/PR4A/LV_T NC/PR3C/PR4C PR3D/PR4B/PR5B/LV_C PR2A/PR4C/PR5C PR2B/PR4D/PR5D PR2D/PR5B/PR6B/LV_C PR5B/PR6D/PR7D PR4C/PR7A/PR9A/LV_T PR4D/PR7B/PR9B/LV_C PR6D/PR7D/PR9D PR6A/PR8C/PR10C PR6B/PR8D/PR10D 4 DI F12 F15 F16 F13 F14 E12 E14 E16 E15 E13 B16 C15 D16 H12 H14 D14 D13 C16 D15 H13 H15 G16 G15 G14 G12 G13 C46 0_1uF DI LMV331 2 5 +5V U16 3 1 DI C45 0_01uF A2D Delta Sigma Delta A2D SRAM_WEb XO_SPI_CLK XO_D2A_Driver SD_CMD-DI SRAM_CSb SRAM_OEb XO_SPI_IN XO_SPI_OUT XO_A2D_DS_IN SD_DAT3-CS SD_CLOCK SD_DAT0-D0 SD_DAT1-IRQ Fan_Tach XO_SPI_CS0 SD_DAT2-NC Fan_PWM Fan_Trigger XO_A2D_DS_OUT DI C44 0_1uF R27 3k DI 4 4 DeltaSignIn A2D_DS_IN XO_A2D_DS_OUT 2 1 3 J23 Jumper_2way DI XO_I2C_ALERT +3.3V 3 6 4 +3.3V XO_SPI_IN XO_SPI_CS0 XO_SPI_CLK XO_SPI_OUT Vdd 2 5 3 Vss2 Fan_PWM VSS1 DI R82 10k U23 GND 1 ADD0 ALERT 2 6 1 5 Clock DAT3/CS CMD/DI DAT1/IRQ DAT2/NC DAT0/D0 SD Socket DI
TMP101 DI
S D C 5 2 8 7 Q 1 9 2 3
SD Card Socket
U15 VCC SCL 4 SDA 4 1 6 2MBit SPI Temperature Sensor AddrSlave 1001010 M25PE20-VMN6TP U69 3 Vcc Reset Vss W 5 5 U32 DI 8 4 3 7 +3.3V MOSFET U34 GND Sense VCC DI C6 0_1uF DI DI 3 Pin Fan Fan U35 +3.3V 1 2 +5V XO_SCL XO_SDA SD_CLOCK SD_DAT0-D0 SD_DAT3-CS SD_CMD-DI SD_DAT1-IRQ SD_DAT2-NC DI Fan 3Pin Connector R81 10k Fan_Tach C22 DI 0_1uF +3.3V A D C B
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
Figure 18. MachXO Banks 4 and 5 D C B A B 10 of 4 Schematic Rev Board Rev DeltaSignIn DI 10K DI D19 D_SW R179 +5V Sheet 1 1 10K DI R188 LCD_BACKLIGHT LCD_CONTRAST 10K DI R184 LCD_RS LCD_E LCD_D1 LCD_D3 LCD_D5 LCD_D7 10K DI LCD_D4 LCD_D0 LCD_D1 LCD_D2 LCD_D3 LCD_D5 LCD_D6 LCD_D7 R183 Lattice Semiconductor Applications Email: [email protected] Phone (503) 268-8001Phone -or- (800) LATTICE 100 DI +5V R182 4 6 14 18 2 8 10 12 16 +5V 22 21 20 19 18 17 16 14 24 23 15 13 Monday, 13-Apr-09Monday, 7 6 5 MachXO ControlMachXO Board B0 B1 B2 B3 B4 B5 B6 B8 B7 B9 Project HD9x2 BEn VCC MachXO Banks 4 and 5 Banks MachXO H1 H2 H0 J13 B 3 7 1 5 9 15 11 13 17 Date: Title Size U42 A8 NC A0 A1 A2 A3 A4 A5 A6 A7 GND A9 DI LCD_Connector QS3861 1 2 3 4 5 6 7 8 9 U44 SDA SCL A0 Vcc GND 11 10 12 POT DI LCD 5V to 3.3V 1 8 3 4 2 Variable POT Slave Addr 1010000 2 2 DI C15 0_1uF LCD_CONTRAST LCD_RW LCD_D2 LCD_D4 LCD_D6 LCD_D0_SW LCD_D1_SW LCD_D2_SW LCD_D4_SW LCD_D6_SW LCD_BACKLIGHT LCD_D0 LCD_D3_SW LCD_D5_SW LCD_D7_SW +3.3V XO_SCL XO_SDA XO_Sleepn DI SW3 XO_Sleep_SW 1 2 3 4 R36 10k DI +3.3V C54 0_01uF DI XO Sleep 3 3 ProtoN9 ProtoR9 ProtoP15 ProtoN8 ProtoP9 ProtoP10 ProtoM10 ProtoR10 ProtoP16 LED4 LED0 LED2 LED5 LED7 SW7 SW4 SW3 SW2 SW1 SW0 LED1 LED3 LED6 SW6 SW5 XOSleepn_In XOSleepn_In P10 T10 M9 R12 T15 P16 R13 R14 P14 N9 N10 N11 R15 R16 P12 T13 N8 R11 T12 P13 P9 R9 R10 T11 P11 M10 T14 P15 SLEEPN 15 13 11 16 14 12 10 9 NC/PB8F/PB12D NC/PB8E/PB12C NC/PB11A/PB16A NC/PB11B/PB16B VCCIO4 NC/PB11C/PB16C NC/PB11D/PB16D PB7F/PB9B/PB13B PB5A/PB7A/PB10E PB7E/PB9A/PB13A PB8D/PB9F/PB14B PB6A/PB7E/PB10A PB8C/PB9E/PB14A PB8B/PB9D/PB13D PB7A/PB7C/PB10C PB6C/PB8A/PB11C PB6D/PB8B/PB11D PB7D/PB8D/PB12B PB8A/PB9C/PB13C PB7B/PB7D/PB10D PB7C/PB8C/PB12A PB9F/PB10F/PB15D SW2 SW DIP-8 208-8 CTS DI PB9A/PB10A/PB14C PB9B/PB10B/PB14D PB9C/PB10C/PB15A PB9D/PB10D/PB15B 1 5 2 3 4 6 7 8
PB6B/PB7F/PB10B/CLK3 PB5B/PB7B/PB10F/CLK2 I/Os in Bank 4 for XO2280 DIP Switch RN2 DI RN1_8_10K
PB5D/PB6F/PB9B
P8
PB5C/PB6E/PB9A
P7 9 8
10 7
11 4 6 4
12 5
13 4
14 LCMXO640/1200/2280-FT256/FTN256 3
15 2
16 1 I/Os in Bank 5 for XO1200 +3.3V SW7 SW6 SW5 SW4 SW3 SW2 SW1 SW0 Pin name sequence PB(640,1200,2280) VCCIO5 U60C NC/PB2B/PB2B PB4D/PB5D/PB6B TDO TMS NC/PB2C/PB2C PB2A/PB3A/PB3A PB2B/PB3B/PB3B PB2D/PB3D/PB3D PB3B/PB4B/PB4B PB3D/PB4D/PB4D PB4A/PB5A/PB5A PB4B/PB5B/PB5B PB4C/PB5C/PB6A NC/PB6A/PB7C NC/PB6B/PB7D PB4E/PB6C/PB8C PB4F/PB6D/PB8D TDI TCK NC/PB2A/PB2A NC/PB2D/PB2D PB2C/PB3C/PB3C PB3A/PB4A/PB4A PB3C/PB4C/PB4C T5 T7 T2 T3 T4 T6 T8 P6 P2 P5 P3 P4 R5 R6 R8 N7 N6 R4 N5 R7 R3 M7 M8 M6 LCD_D6_SW LCD_D4_SW LCD_D3_SW LCD_D7_SW LCD_RW LCD_D0_SW LCD_D2_SW LCD_RS LCD_E LCD_D1_SW LCD_D5_SW RN1 DI RN1_8_470
ProtoT6 ProtoT4 ProtoT8 ProtoM7 ProtoR7 ProtoR8 ProtoR6 ProtoM8
9 8
D17 LED LED XO_TDI D17
XO_TMS XO_TCK
XO_TDO
10 7 DI D16 D16 LED LED
11 6 DI D15 D15 LED LED
12 5 DI D14 D14 LED LED
13 5 4 5 DI D4 D4 LED LED
14 LEDs 3 DI D3 D3 LED LED
15 2 DI D2 D2 LED LED
16 1 DI D1 D1 LED LED +3.3V DI LED0 LED1 LED2 LED3 LED4 LED5 LED6 LED7 A D C B
47
Lattice Semiconductor MachXO Control Development Kit User’s Guide
Figure 19. MachXO Banks 6 and 7 D C B A B 10 of 5 Schematic Rev Board Rev Sheet 1 1 Lattice Semiconductor Applications Email: [email protected] J6 Jumper_1way DI Phone (503) 268-8001Phone -or- (800) LATTICE 1 2 +3.3V DI 10k Monday, 13-Apr-09Monday, R58 MachXO ControlMachXO Board Project MachXO Banks 6 and 7 Banks MachXO B Date: Title Size PM_SCL PM_I2C_ALERT PM_SDA XO_SCL XO_SDA XO_I2C_ALERT Sheet 8 Power Manager +3.3V 2 2 R63 10k DI +3.3V FT_SCL FT_SDA R62 10k DI R135 10K DI +3.3V R134 10K DI TSALL PM_MCLK PM_OUT10 PM_OUT11 PM_OUT12 PM_PLDCLK PM_IN1 PM_IN2 R125 2_2K DI OSC_CLK R59 10k DI R123 2_2K DI R57 10k DI J2 K1 M1 R2 J5 L1 J4 J1 N1 J3 K3 N2 L2 L4 L3 M5 K4 P1 M2 K2 N4 L5 H2 K5 M4 M3 R1 N3 6OIC CV PL7C/PL9C/PL11C PL7D/PL9D/PL11D PL9B/PL10D/PL12D PL9A/PL10C/PL12C PL9D/PL12D/PL15D PL8D/PL11D/PL14D PL9C/PL12C/PL15C PL11C/PL16A/PL19A PL11D/PL16B/PL19B PL11A/PL13C/PL16C PL11B/PL13D/PL16D PL10D/PL14D/PL17D PL10C/PL14C/PL17C PL6A/PL9A/PL11A/LV_T PL6B/PL9B/PL11B/LV_C PL7A/PL11A/PL13A/LV_T PL8A/PL13A/PL16A/LV_T PL6C/PL10A/PL12A/LV_T PL7B/PL11B/PL13B/LV_C PL8B/PL13B/PL16B/LV_C PL6D/PL10B/PL12B/LV_C PL10A/PL12A/PL15A/LV_T PL10B/PL12B/PL15B/LV_C TSALL/PL8C/PL11C/PL14C 3 3 NC/PL15A/PL18A/LV_T/PLL0_T_IN OSC_CLK NC/PL15B/PL18B/LV_C/PLL0_C_IN NC/PL14A/PL17A/LV_T/PLL0_T_FB NC/PL14B/PL17B/LV_C/PLL0_C_FB LCMXO640/1200/2280-FT256/FTN256 7OIC CV OSC_CLK Pin name sequence PL(640,1200,2280) U60B NC/PL7A/PL8A/LV_T NC/PL2B/PL2B/PLL1C_FB NC/PL3A/PL3A/LV_T PL3A/PL3C/PL3C/PLL1T_IN NC/PL4C/PL4C NC/PL4D/PL4D PL2B/PL5B/PL5B/LV_C PL3D/PL5D/PL6D PL5A/PL6A/PL7A/LV_T NC/PL7B/PL8B/LV_C NC/PL8B/PL9B/LV_C NC/PL2A/PL2A/PLL1T_FB NC/PL3B/PL3B/LV_C PL3B/PL3D/PL3D/PLL1C_IN PL2D/PL4B/PL4B/LV_C PL2A/PL5A/PL5A/LV_T PL3C/PL5C/PL6C PL5B/PL6B/PL7B/GSR/LV_C PL4A/PL6C/PL7C PL4B/PL6D/PL7D PL4C/PL7C/PL8C PL4D/PL7D/PL8D PL5C/PL8C/PL10C PL2C/PL4A/PL4A/LV_T NC/PL8A/PL9A/LV_T PL5D/PL8D/PL10D F6 F4 F1 F5 F3 F2 B1 E3 E5 E4 E2 E1 C2 D2 H3 H4 H1 C3 C1 D1 H5 G3 G1 G2 G4 G5 3 OUTP 2 GND DI Tristate VCC U38 Oscillator 62.5MHz Oscillator 4 1
4 4
R163 R163 10K 10K
+3.3V DI DI BDBUS2 BDBUS3 BDBUS4 BDBUS5 BCBUS2 BCBUS3 ACBUS2 ACBUS3 BDBUS1 BDBUS6 BCBUS0 BCBUS1 SI-WUB ACBUS0 BDBUS0 BDBUS7 ACBUS1 2 1 HD1X2 DI J24 USB Data Sheet 10 USB Data Sheet 10 Ferrite_bead L5 BD0603 DI +3.3V DI C98 0_1uF C64 0_1uF R56 10k DI DI +3.3V DI C83 0_01uF 4 3 S1 DI 1 2 5 5 XO GlobalXO Reset XO_RESET A D C B
48
Lattice Semiconductor MachXO Control Development Kit User’s Guide
Figure 20. MachXO Power D C B A B 10 of Board Rev Schematic Rev 6 Sheet 1 1 DI C8 0_1uF DI DI C16 0_1uF C38 0_1uF Lattice Semiconductor Applications Email: [email protected] Phone (503) 268-8001 -or- (800) LATTICE (800) -or- 268-8001 (503) Phone DI DI C17 0_1uF C37 0_1uF Monday, 13-Apr-09Monday, MachXO ControlMachXO Board Project MachXO Power B Size Date: Title DI DI C18 0_1uF C41 0_1uF 2 2 DI DI C7 0_1uF C42 0_1uF Decoupling Caps Decoupling DI C12 0_1uF VCC_CORE DI DI C13 0_1uF C25 0_1uF DI DI C14 0_1uF C33 0_1uF VCC_IO VCC_AUX 3 3 VCC_CORE G10 F11 H10 J9 K9 G7 K10 K7 H8 J8 H7 J7 L6 T1 K8 A1 A16 T16 J10 G9 H9 G8 4 4 VCC_0 VCC_2 VCC_1 VCC_3 GND_0 GND_1 GND_4 GND_5 GND_6 GND_9 GND_2 GND_3 GND_7 GND_8 GND_10 GND_11 GND_13 GND_14 GND_15 GND_17 GND_12 GND_16 XO_640 common VCCIO XO_640 common VCCIO XO_640 common VCCIO VCCJ on VCCIO5 XO_640 common VCCIO LCMXO640/1200/2280-FT256/FTN256 U60E VCCIO2_0 VCCIO3_0 VCCIO3_1 VCCIO5_1 VCCIO7_0 VCCAUX_0 VCCIO0_0 VCCIO0_1 VCCIO1_0 VCCIO1_1 VCCIO2_1 VCCIO4_0 VCCIO4_1 VCCIO5_0 VCCIO6_0 VCCIO6_1 VCCIO7_1 VCCAUX_1 J6 L8 L9 L7 T9 F7 F8 F9 A8 K6 H6 G6 J11 L10 F10 K11 H11 G11 VCC_IO 5 5 VCC_AUX A D C B
49
Lattice Semiconductor MachXO Control Development Kit User’s Guide
Figure 21. Board Power D C B A B 10 of Board Rev Schematic Rev 7 Sheet ICCAUX_N 1 1 VCC_AUX IO26 R7 2 DI
ZDT758 Q7B DI
7
1 8 +3.3V IO25 AUX Current R202 1K DI 2 ICCAUX_P Lattice Semiconductor Applications Email: [email protected] Phone (503) 268-8001 -or- (800) LATTICE (800) -or- 268-8001 (503) Phone R203 220 DI ICCIO_N VCC_IO IO19 Monday, 13-Apr-09Monday, MachXO ControlMachXO Board Project Board Power R3 2 DI B Size Date: Title PM_OUT9 +3.3V IO17 I/O Current ICCIO_P MachXO Power Rails 2 2 ICC_N VCC_CORE IO14 R5 1 DI
ZDT758 Q7A DI
5
3 6 +3.3V IO13 Core Current 4 R201 1K DI ICC_P ICCAUX_Sense R200 220 DI R30 3_92k DI C66 0_01uF DI U68B AD8604ARZ 7
C30 0_1uF DI PM_OUT8
11 3 4 3 +3.3V - + 5 6 +3.3V ICCIO_Sense DI 3_92k R46 C20 22uF R43 100 DI DI 100 R45 DI R31 3_92k DI C67 0_01uF DI 2 4 U68C AD8604ARZ 8 ICCAUX_P ICCAUX_N NCP1117 C31 0_1uF DI
TAB
OUT
11 1 4 GND +3.3V + - U7 IN DI 9 10 3 DI +5V -> +3.3V Rail C19 10uF 4 ICC_Sense 4 Current Sense Current DI 3_92k R49 R47 100 DI DI 100 R48 R11 470 DI
2k DI R29 C65 0_01uF DI
D18 D18 LED LED +5V DI U68A AD8604ARZ 1
ICCIO_P ICCIO_N C29 0_1uF DI
4 11 +3.3V + - 3 2 IO15 +5V DI 5V 2k R42 DI 100 R41 R40 100 DI 1 2 3 5 5 AC 110V -> 5V ICC_P ICC_N J10DI PWR_JACK 5V Input A D C B
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
Figure 22. Power Manager II D C B A B GND_11 GND_54 GND_32 GND_62 GND_53 GND_55 GND_60 GND_66 GND_10 GND_56 GND_59 GND_67 GND_68 GND_69 GND_70 GND_71 GND_57 GND_61 GND_65 10 of
IO53 IO65 IO9 IO54 IO33 IO11 IO59 IO67 IO70 IO71 IO55 IO57 IO60 IO61 IO66 IO56 IO85 IO68 IO69 Board Rev Schematic Rev 8
R181 R181 10k 10k DNI DNI R18510kR18510k DNI DNI
R176 R176 10k 10k DNI DNI R17710kR17710k DNI DNI
R174 R174 10k 10k DNI DNI R17510kR17510k DNI DNI
R172 R172 10k 10k DNI DNI R17310kR17310k DNI DNI
R169 10k 10k DNI DNI R17110kR17110k DNI DNI R169 Sheet
1 1 R167 R167 10k 10k DNI DNI R16810kR16810k DNI DNI
R165 R165 10k 10k DNI DNI R16610kR16610k DNI DNI
R170 R170 10k 10k DNI DNI R17810kR17810k DNI DNI
R162 R162 10k 10k DNI DNI R16110kR16110k DNI DNI
R128 R128 10k 10k DNI DNI R15710kR15710k DNI DNI
R131 R131 10k 10k DNI DNI R15610kR15610k DNI DNI
IO Header R133 R133 10k 10k DI DI R15510kR15510k DNI DNI
R132 R132 10k 10k DI DI R15410kR15410k DNI DNI
SW4 SW DIP-2 DI R130 R130 10k 10k DI DI R15110kR15110k DNI DNI
R129 R129 10k 10k DI DI R11010kR11010k DNI DNI
PM DIP Switch R127 R127 10k 10k DI DI R11110kR11110k DNI DNI
Lattice Semiconductor Applications
R126 10k 10k DI DI R15210kR15210k DNI DNI R126 Email: [email protected]
R116 R116 10k 10k DNI DNI R15310k DNI DNI R193 R193 10K 10K DI DI R15310k LATTICE (800) -or- 268-8001 (503) Phone
+3.3V R118 R118 10k 10k DNI DNI R11410kR11410k DNI DNI R194 R194 10K 10K DI DI +3.3V PM_IN3 PM_IN4 Monday, 13-Apr-09Monday, MachXO ControlMachXO Board Project Power Manager II Manager Power B Size Date: Title HVOUT1 PM_OUT8 PM_OUT9 XO_RESET VMON9 HVOUT2 PM_I2C_ALERT PM_OUT10 PM_OUT11 PM_OUT12 XO_Sleepn PM_PLDCLK PM_MCLK VMON7 VMON8 VMON10 2 2 ICC_Sense ICCIO_Sense Sheet 7 ICCAUX_Sense D8 RN3 RN2_4_470 DI LED DI
D7 LED DI
5 4
D6 LED DI
6 3
D5 LED DI
7 2
8 1 LEDs +3.3V PM_LED2 PM_LED3 PM_LED0 PM_LED1 PM_OUT8 PM_OUT11 PM_OUT12 PM_MCLK PM_I2C_ALERT PM_OUT9 PM_OUT10 XO_RESET XO_Sleepn PM_PLDCLK 3 3 VMON7 VMON8 HVOUT1 PM_LED0 PM_LED2 PM_OUT10 HVOUT2 PM_I2C_ALERT PM_LED1 PM_LED3 PM_OUT8 PM_OUT9 PM_OUT11 PM_OUT12 PM_PLDCLK PM_MCLK R186 200 R187 200
DI DI Q5 2N7002E DI Q6 2N7002E DI
3 2 3 2 +3.3V +3.3V 1 1 30 43 11 9 8 6 3 15 14 5 4 2 1 31 7 42 40 13 10 12 OUT6 OUT4 OUT5 OUT7 OUT8 OUT9 MCLK GNDA GNDD GNDD OUT12 OUT10 OUT11 OUT13 OUT14 DI DI PLDCLK RESETB C80 1uF C79 1uF HVOUT1 HVOUT2 DI DI
SMBA_OUT3 Voltage Ramp CircuitVoltage R204 1k R205 1k
VCCJ
20
VCCPROG
+3.3V 24
VCCINP
45
VCCA
29
VCCD
41
VCCD HVOUT2 HVOUT1 23 4 4 Power Manager Power AddrSlave Programmable VMON2 VMON3 VMON6 VMON10 IN2 IN3 TDISEL ATDI TCK SCL SDA VMON1 VMON4 VMON5 VMON7 VMON8 VMON9 IN1 IN4 TDI TMS TDO ispPAC-POWR1014A DI U17 25 44 26 27 33 37 46 47 19 17 22 39 38 28 32 34 35 36 48 18 16 21 +3.3V DI C69 0_1uF Sheet 7 ICC_Sense ICCIO_Sense PM_IN4 PM_IN3 ICCAUX_Sense VMON9 VMON7 VMON8 VMON10
DI C70 0_1uF 2
PM_SCL PM_SDA 1 PM_IN2 PM_IN1 PM_TDI PM_TMS PM_TCK PM_TDO J17 DI HD1X2 VCC_IO DI C71 0_1uF 5 5 Decoupling Caps Decoupling VCC_AUX R190 1K DI
DI C72 0_1uF
2 1 J22 DI HD1X2 R189 1K DI DI C73 0_1uF VCC_CORE A D C B
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
Figure 23. Prototype Area D C B A B 10 of Board Rev Schematic Rev 9 Sheet 1 1 Lattice Semiconductor Applications Email: [email protected] Phone (503) 268-8001 -or- (800) LATTICE (800) -or- 268-8001 (503) Phone Monday, 13-Apr-09Monday, MachXO ControlMachXO Board Project Proto Area B Size Date: Title DB1 DB4 DB5 DB7 DB8 DB10 DB11 DB12 DB16 DB18 DB19 DB2 DB3 DB6 DB9 DB13 DB14 DB15 DB17 DB20 CB7 CB11 CB18 CB1 CB2 CB3 CB4 CB5 CB6 CB8 CB9 CB10 CB12 CB13 CB14 CB15 CB16 CB17 CB19 CB20 2 2 Proto Area BB1 BB2 BB4 BB6 BB7 BB8 BB9 BB10 BB11 BB12 BB13 BB15 BB17 BB18 BB19 BB3 BB5 BB14 BB16 BB20 AB14 AB20 AB26 AB28 AB32 AB36 AB48 AB16 AB18 AB22 AB24 AB30 AB34 AB38 AB40 AB42 AB44 AB46 AB50 AB52 IO31 IO83 IO62 IO72 IO75 IO78 IO12 IO80 IO34 IO18 IO35 IO76 IO79 IO63 IO64 IO82 IO73 IO74 IO77 IO84 sOI otorP sOI XO_SCL XO_SDA ProtoT4 ProtoP10 ProtoR6 ProtoT6 ProtoM7 ProtoM8 ProtoR7 ProtoR8 ProtoN8 ProtoN9 ProtoP9 ProtoM10 ProtoR9 ProtoP15 ProtoP16 ProtoT8 ProtoR10 3 3 OSC_CLK AB90 AB96 AB98 AB99 AB82 AB87 AB89 AB91 AB93 AB94 AB97 AB95 AB88 AB81 AB86 AB92 AB84 AB83 AB85 AB100 rewoP otorP rewoP +3.3V AB73 AB64 AB72 AB74 AB75 AB76 AB65 AB68 AB66 AB70 AB71 AB77 AB78 AB61 AB62 AB67 AB79 AB69 AB63 AB80
4 4 1 MH11 1 G3 E-Friendly 1 MH7 M_HOLE1 DI IW_MNT0 M_HOLE1 DI IW_MNT0
1 MH9 1 M_HOLE1 DI IW_MNT0 MH5 M_HOLE1 DI IW_MNT0 1 G2 WEEE 1 MH12 M_HOLE1 DI IW_MNT0 MH8 1 M_HOLE1 DI IW_MNT0 Board Logos
Fan Mounting Holes Mounting Fan Board Mounting Holes 1 1 G1 Lattice Logo MH10 1 M_HOLE1 DI IW_MNT0 MH6 M_HOLE1 DI IW_MNT0 5 5 A D C B
52
Lattice Semiconductor MachXO Control Development Kit User’s Guide
Figure 24. USB Program Data D C B A B 10 of Board Rev Schematic Rev 10 Sheet 1 1 FT_SCL USB_TDO USB_TMS FT_SDA USB_TCK USB_TDI Lattice Semiconductor Applications Email: [email protected] Phone (503) 268-8001 -or- (800) LATTICE (800) -or- 268-8001 (503) Phone 5 15 1 3 7 9 11 13 2S2 1S1 1S2 2S1 3S1 3S2 4S1 4S2 Monday, 13-Apr-09Monday, MachXO ControlMachXO Board Project STG3690QTR USB Program Data U67 D3 1-2IN VCC D1 D2 D4 3-4IN GND B Size Date: Title 4 6 8 2 14 16 12 10 +3.3V BDBUS2 BDBUS4 ACBUS0 ACBUS1 ACBUS2 BDBUS0 BDBUS6 BCBUS1 BCBUS3 SI-WUB ACBUS3 SI-WUA BDBUS1 BDBUS3 BDBUS5 BDBUS7 BCBUS0 BCBUS2 2 2 DI DI C47 0_1uF R15 0 28 23 19 33 41 37 24 40 17 36 22 21 38 15 12 26 30 16 32 11 10 13 29 27 39 35 20 DI C34 0_1uF RIA# RIB# TXDA TXDB RXDA RXDB U4 CTSB# RTSA# CTSA# RTSB# DTRA# DTRB# DSRA# DRSB# DCDB# DCDA# SI/WUB SI/WUA TXLED# RXLED# FT2232
TXDENA
PWREN# TXLEDB# SLEEPA# SLEEPB# RXLEDB# TXDENB#
VCCIOB
DI 31
VCCIOA
C36 GND
14
+3.3V 34
0_1uF GND
25
VCC GND
42 18
VCC GND
3 9
AVCC AGND
46 45 +5V 3 3 330 DI DI C39 0_1uF R39 DI EESK 3V3OUT USBDM USBDP XTIN RESET# EECS EEDATA TEST RSTOUT# XTOUT 6 8 7 5 1 4 2 43 48 47 44 R38 10k DI R53 1M DI R10 2_2K DI DI DI EESK EECS EEDATA R54 1k DI C52 12pF R37 1_5k 1 2 3 4 2 DI SK CS DIN U70 DOUT X3 DI DI 6 MHz C58 33pF 4 4 DI 10k R32 1 DI C48 12pF VCC NC GND ORG M93C46-WMN6TP DI 8 7 5 6 C53 33pF 27 +5V R12 DI R13DI 27 C55 0_01uF DI DI C40 0_1uF R14DI 100k DI C43 0_1uF SHLD_Debug DI C50 0_1uF 5 5 DI 11 4 3 6 7 8 2 1 9 10 5 D- D+ NC VCC MH1 MH2 GND CASE CASE CASE CASE J8 USB_MINI_B A D C B
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
Appendix B. Bill of Materials Table 19. Bill of Materials
Item Quantity Reference Part Footprint Populate Vendor Part Number Description 1 2 C48, C52 12pF SM/C_0603 DI Murata Electronics ERB1885C2E120JDX5D 12pF surface mount cap C6, C7, C8, C12, C13, C14, C15, C16, C17, C18, C22, C23, C24, C25, C29, C30, C31, C33, C34, C36, C37, 2 38 C38, C39, C40, C41, C42, 0_1uF SM/C_0603 DI Panasonic ECJ-1VB1C104K 0.1uF surface mount cap C43, C44, C46, C47, C50, C64, C69, C70, C71, C72, C73, C98 3 1 C51 0_1uF SM/C_0603 DNI Panasonic ECJ-1VB1C104K 0.1uF surface mount cap 4 3 C19, C21, C35 10uF SM/C_0603 DI TDK Corp. C1608Y5V0J106Z 10uF surface mount cap 5 1 C20 22uF SM/C_0805 DI Taiyo Yuden LMK212BJ226MG-T 22uF surface mount cap C45, C54, C55, C65, C66, 6 7 C67, C83 0_01uF SM/C_0603 DI Murata Electronics GRM188R71H103KA01D 0_01 SMC 7 2 C53, C58 33pF SM/C_0603 DI Panasonic ECJ-1VC2A330J 33pF SMC D1, D2, D3, D4, D5, D6, D7, 8 13 D8, D14, D15, D16, D17, D18 LED SM/D_0603 DI Lite-On LTST-C190CKT LEDRED 9 1 D19 D_SW SM/SOD_323 DI Diodes 1N4148WS SM-SOD-323 10 1 J8 USB_MINI_B TYPE_B DI Hirose UX60-MB-5ST USBType-BMiniConnector BLKCON.100/VH/ Jumper with Shunt 11 7 J5, J6, J9, J14, J15, J18, J19 Jumper_1way TM1SQ/W.100/2 DI Samtec Inc. TSW-102-07-G-S (929957-08) Jumper with Shunt 12 1 J23 Jumper_2way JP_2WY DI Samtec Inc. TSW-103-07-G-S (929957-08) 13 1 J10 PWR_JACK PWR_CON DI Switchcraft RAPC712 CoaxialDCconnector BLKCON.100/VH/ Jumper with Shunt 14 3 J17, J22, J24 HD1X2 TM1SQ/W.100/2 DI Samtec Inc. TSW-102-07-G-S (929957-08) Jumper with Shunt 15 1 J13 HD9x2 HD9x2 DI Samtec Inc. TSW-109-07-G-D (929957-08) 16 1 J16 CF_ Socket CF_2X30 DI AVX AVX-31-5620-050-116-871 AVXCFconnector 17 1 L5 Ferrite_bead BD0603 DI Steward MI0603J600R-00 SMD0603 Ferrite Bead Fairchild 18 1 Q3 2N2369A SM/SOT23 DI Semiconductor MMBT2369A Transistor NPN SOT-23 Rohm 19 1 RN1 RN1_8_470 SMD_0603 DI Semiconductor MNR18E0APJ471 SMD_0602 Rohm 20 1 RN2 RN1_8_10K SMD_0603 DI Semiconductor MNR18E0APJ103 SMD_0602 RES 330 OHM 1/10W 21 2 R6, R39 330 SM/R_0603 DI Panasonic ECG ERJ-3EKF3300V 1% 0603 SMD 22 4 R15, R195, R196, R197 0 SM/R_0603 DI Panasonic ECG ERJ-3GEY0R00V Resistor 0.0 SMD 0603 R40, R41, R43, R44, R45, 23 9 R47, R48, R50, R182 100 SM/R_0603 DI Vishay/Dale CRCW0603100RFKEA SMT resistor R54, R189, R190, R201, 24 7 R202, R204, R205 1k SM/R_0603 DI Vishay/Dale CRCW06031K00FKEA Resistor 1k SMD 0603 25 3 R10, R123, R125 2_2K SM/R_0603 DI Panasonic ECG ERJ-3GEYJ222V Resistor 2.2k SMD 0603 R26, R32, R36, R38, R56, R57, R58, R59, R62, R63, R81, R82, R126, R127, 26 30 R129, R130, R132, R133, 10K SM/R_0603 DI Vishay/Dale CRCW060310K0FKEA 10K 0603 SMT resistor R134, R135, R159, R163, R179, R183, R184, R188, R191, R192, R193, R194 R65, R66, R67, R68, R69, R73, R76, R103, R104, R105, R107, R110, R111, R114, R116, R118, R124, R128, R131, R148, R149, R151, R152, R153, R154, 27 46 R155, R156, R157, R161, 10k SM/R_0603 DNI Vishay/Dale CRCW060310K0FKEA 10K 0603 SMT resistor R162, R165, R166, R167, R168, R169, R170, R171, R172, R173, R174, R175, R176, R177, R178, R181, R185 RES 3.00K OHM 1/10W 28 1 R27 3k SM/R_0603 DI Panasonic ECG ERJ-3EKF3001V 1% 0603 SMD 29 1 R83 5_1k SM/R_0603 DI Panasonic ECG ERJ-3EKF5101V SMD 0603 RES 4.7K OHM 1/10W 30 1 R158 4_7k SM/R_0603 DI Panasonic ECG ERJ-3EKF4701V 1% 0603 SMD CTS Corporation 31 1 SW2 SW DIP-8 CTS 208-8 DI Electrocomponents 194-8MST x8 DIP Switch Piano 32 1 S1 XO Global Reset SMT_SW DI Panasonic ECG EVQ-Q2K03W SPST_Switch
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
Table 19. Bill of Materials (Continued)
Item Quantity Reference Part Footprint Populate Vendor Part Number Description IC SRAM 128KX8 33 1 U8 CY128X8TSOP 32-TSOP DI Cypress CY7C1019DV33-10ZSXI ASYNC 32-TSOP 34 1 U70 M93C46-WMN6TP SOIC-8 DI STMicroelectronics M93C46-WMN6TP IC 1K EEPROM 8-SOIC IC TEMP SENSOR 35 1 U15 TMP101 SM/SOT23_6 DI TI TMP101NA/250 DIG SOT-23-6 36 1 U23 SD Socket SM/SD DI 3M SD-RSMT-2-MQ-WF SD socket 37 1 U32 MOSFET SOT-223-4 DI Fair Child NDT3055LCT-ND MOSFET N-CH Molex/Waldom 38 1 U34 Fan 3 Pin Connector SP-10 DI Electronics WM4201-ND Molex Connector Corp. EC2510M05CA,NY PMS 440 Evercool 25x10mm Fan 39 1 U35 Fan Fan DI Fantronic 0063 PH,NUT HEX 4-40 & two mouting nylon NYLON nuts/bolts 40 1 U42 QS3861 TSSOP_24 DI IDT IDTQS3861PAG8 TSSOP-24 41 1 J26 PHONEJACK STEREO SM DI CUI SJ1-3513-SMT 3.5mm_AudioJack 42 1 R11 470 SM/R_0603 DI Panasonic ECG ERJ-3EKF4700V RES470OHM1/10W1% 43 2 R12, R13 27 SM/R_0603 DI Panasonic ECG ERJ-3GEYJ270V Resistor 27 SMD 0603 44 1 R14 100k SM/R_0603 DI Panasonic ECG ERJ-3GEYJ104V Resistor 100k SMD 0603 45 1 R53 1M SM/R_0603 DI Panasonic ECG ERJ-3GEYJ105V RES 1.0M1/10W5% 46 1 SW3 XO_Sleep_SW SMT_SW DI Panasonic ECG EVQ-Q2K03W SPST_Switch Voltage Regulators - 47 1 U7 NCP1117 SOT-223 DI ON Semiconductor NCP1117ST33T3G Linear 48 1 U16 LMV331 SOT-23-5 DI TI LMV331IDBVR Comparators Citizen CRYSTAL 6.000 MHz 49 1 X3 6 MHz SMD DI America Corp. HCM49 6.000MABJ-UT SMT 18PF 50 1 R37 1_5k SM/R_0603 DI Panasonic ECG ERJ-3GEYJ152V Resistor 1.5k SMD 0603 51 1 U4 FT2232 TQFP_48 DI Future FT2232D R USB UART/FIFO Dallas 52 1 U44 POT 8-µSOP DI Semiconductor DS3904U-020+ Variable POT 53 2 C79, C80 1uF SM/C_0805 DI Panasonic ECG ECJ-2YB1A105K 1uF SMC 54 2 J4, J7 CON40A 2x20x100mil DNI Samtec Inc. TSW-120-07-G-D Header MOSFET N-CH SGL 55 2 Q5, Q6 2N7002E SM/SOT23 DI ON Semiconductor 2N7002ET1G 60V 310A SOT-23 56 1 Q7 ZDT758 SM-8 DUAL PNP DI zetex ZDT758 SM-8 DUAL PNP 57 1 RN3 RN2_4_470 SMD_0603 DI Ya g e o TC164-JR-07470RL RES ARRAY 470 OHM RES 200 OHM 1/10W 58 2 R186, R187 200 SM/R_0603 DI Panasonic ECG ERJ-3GEYJ201V 5% 0603 SMD RES 220 OHM 1/10W 59 2 R200, R203 220 SM/R_0603 DI Panasonic ECG ERJ-3EKF2200V 1% 0603 SMD SWITCH SIDE 60 1 SW4 SW DIP-2 SP-75 DI CTS 195-2MST ACTUATED 2 SEC OSC 62.5 MHZ 61 1 U38 Oscillator_62_5 SMD DI Fox Electronics FXO-HC735-62.5 MHz 3.3V SMD 62 1 U17 ispPAC-POWR1014A 48 TQFP DI Lattice POW1014A Power Manager LCMXO640/1200/ 63 1 U60 2280-FT256/FTN256 256 ftBGA DI Lattice MachXO_2280 MachXO 64 1 U67 STG3690QTR QFN DI STMicroelectronics STG3690QTR Dual Switch Analog Devices 65 1 U68 AD8604ARZ 14 SOIC DI Inc. AD8604ARZ Quad OP AMP SOIC Numonyx/ IC SPI Flash 66 1 U69 M25PE20-VMN6TP 8 SOIC DI ST Micro M25PE20-VMN6TP 2MBit 8-SOIC 67 1 R5 1 SM/R_0805 DI Vishay Dale CRCW08051R00FKEA Resistor 1 1% Rohm Resistor 2 1% 68 2 R3, R7 2 SM/R_0805 DI Semiconductor MCR10EZHFL2R00 1/4W
69 8 MH5, MH6, MH7, MH8, MH9, M_HOLE1 IW_MNT0 DI 3M SJ-5003 (BLACK) BUMPON HEMISPHERE MH10, MH11, MH12 .44X.20 BLACK RES 3.92K OHM 1/10W 70 4 R30, R31, R46, R49 3_92k SM/R_0603 DI Susumu Co. Ltd. RG1608P-3921-B-T5 .1% 0603 SMD RES 2.0K OHM 1/10W 71 2 R29, R42 2k SM/R_0603 DI Susumu Co. Ltd. RG1608P-202-B-T5 .1% 0603 SMD
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
Table 19. Bill of Materials (Continued)
Item Quantity Reference Part Footprint Populate Vendor Part Number Description DB1, CB1, BB1, DB2, CB2, BB2, DB3, CB3, BB3, DB4, CB4, BB4, DB5, CB5, BB5, GND_6, DB6, CB6, BB6, IO7, GND_7, DB7, CB7, BB7, IO8, DB8, CB8, BB8, IO9, DB9, CB9, BB9, GND_10, DB10, CB10, BB10, IO11, GND_11, DB11, CB11, BB11, IO12, DB12, CB12, BB12, IO13, DB13, CB13, BB13, IO14, DB14, CB14, BB14, AB14, IO15, DB15, CB15, BB15, DB16, CB16, BB16, AB16, IO17, DB17, CB17, BB17, IO18, DB18, CB18, BB18, AB18, IO19, DB19, CB19, BB19, IO20, DB20, CB20, BB20, AB20, IO21, IO22, AB22, IO23, IO24, AB24, IO25, IO26, AB26, IO28, AB28, GND_29, IO30, GND_30, AB30, IO31, GND_32, AB32, IO33, GND_33, IO34, AB34, IO35, IO36, AB36, AB38, AB40, AB42, AB44, AB46, 72 205 AB48, IO50, GND_50, AB50, T POINT R TP GND_51, IO52, AB52, IO53, GND_53, IO54, GND_54, IO55, GND_55, IO56, GND_56, IO57, GND_57, IO59, GND_59, IO60, GND_60, IO61, GND_61, AB61, IO62, GND_62, AB62, IO63, AB63, IO64, AB64, IO65, GND_65, AB65, IO66, GND_66, AB66, IO67, GND_67, AB67, IO68, GND_68, AB68, IO69, GND_69, AB69, IO70, GND_70, AB70, IO71, GND_71, AB71, IO72, GND_72, AB72, IO73, AB73, IO74, AB74, IO75, AB75, IO76, AB76, IO77, AB77, IO78, AB78, IO79, AB79, IO80, AB80, AB81, IO82, AB82, IO83, AB83, IO84, AB84, IO85, AB85, AB86, AB87, AB88, AB89, AB90, AB91, AB92, AB93, AB94, AB95, AB96, AB97, AB98, AB99, AB100 73 1 G1 Lattice Logo LOGO300_1000 74 1 G2 WEEE WEEE_SM 75 1 G3 E-Friendly EFRIENDLY_400_SM
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
Appendix C. Control SoC Demo I/O Plan LOCATE COMP "led_0" SITE "T10" ; LOCATE COMP "led_1" SITE "T11" ; LOCATE COMP "led_2" SITE "N10" ; LOCATE COMP "led_3" SITE "N11" ; LOCATE COMP "led_4" SITE "R11" ; LOCATE COMP "led_5" SITE "R12" ; LOCATE COMP "led_6" SITE "P11" ; LOCATE COMP "led_7" SITE "P12" ; LOCATE COMP "rst_n" SITE "G2" ; LOCATE COMP "scl" SITE "K4" ; LOCATE COMP "sda" SITE "K5" ; LOCATE COMP "spi_csn" SITE "F13" ; LOCATE COMP "spi_miso" SITE "F14" ; LOCATE COMP "spi_mosi" SITE "E14" ; LOCATE COMP "spi_sclk" SITE "F12" ; LOCATE COMP "sram_addr_0" SITE "J13" ; LOCATE COMP "sram_addr_1" SITE "K13" ; LOCATE COMP "sram_addr_2" SITE "K16" ; LOCATE COMP "sram_addr_3" SITE "L16" ; LOCATE COMP "sram_addr_4" SITE "L15" ; LOCATE COMP "sram_addr_5" SITE "M15" ; LOCATE COMP "sram_addr_6" SITE "M16" ; LOCATE COMP "sram_addr_7" SITE "N16" ; LOCATE COMP "sram_addr_8" SITE "L14" ; LOCATE COMP "sram_addr_9" SITE "M14" ; LOCATE COMP "sram_addr_10" SITE "L12" ; LOCATE COMP "sram_addr_11" SITE "L13" ; LOCATE COMP "sram_addr_12" SITE "N15" ; LOCATE COMP "sram_addr_13" SITE "N14" ; LOCATE COMP "sram_addr_14" SITE "M12" ; LOCATE COMP "sram_addr_15" SITE "M13" ; LOCATE COMP "sram_addr_16" SITE "N13" ; LOCATE COMP "sram_data_0" SITE "H16" ; LOCATE COMP "sram_data_1" SITE "J16" ; LOCATE COMP "sram_data_2" SITE "J12" ; LOCATE COMP "sram_data_3" SITE "K12" ; LOCATE COMP "sram_data_4" SITE "J15" ; LOCATE COMP "sram_data_5" SITE "K15" ; LOCATE COMP "sram_data_6" SITE "J14" ; LOCATE COMP "sram_data_7" SITE "K14" ; LOCATE COMP "sram_cen" SITE "D14" ; LOCATE COMP "sram_oen" SITE "D13" ; LOCATE COMP "sram_wen" SITE "E13" ; LOCATE COMP "sw_7" SITE "R16" ; LOCATE COMP "sw_6" SITE "R15" ; LOCATE COMP "sw_5" SITE "T15" ; LOCATE COMP "sw_4" SITE "T14" ; LOCATE COMP "sw_3" SITE "R14" ;
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Lattice Semiconductor MachXO Control Development Kit User’s Guide
LOCATE COMP "sw_2" SITE "R13" ; LOCATE COMP "sw_1" SITE "T12" ; LOCATE COMP "sw_0" SITE "T13" ; LOCATE COMP "uart_rx" SITE "F5" ; LOCATE COMP "uart_tx" SITE "F6" ; LOCATE COMP "clk" SITE "D7" ; LOCATE COMP "fan_en" SITE "G14" ; LOCATE COMP "fan_sense" SITE "H14" ; LOCATE COMP "lcd_e" SITE "R4" ; LOCATE COMP "lcd_rs" SITE "T3" ; LOCATE COMP "lcd_rw" SITE "P2" ; LOCATE COMP "lcd_db_0" SITE "P3" ; LOCATE COMP "lcd_db_1" SITE "R5" ; LOCATE COMP "lcd_db_2" SITE "N5" ; LOCATE COMP "lcd_db_3" SITE "P5" ; LOCATE COMP "lcd_db_4" SITE "N6" ; LOCATE COMP "lcd_db_5" SITE "P6" ; LOCATE COMP "lcd_db_6" SITE "T2" ; LOCATE COMP "lcd_db_7" SITE "T5" ; LOCATE COMP "scl_pm" SITE "N4" ; LOCATE COMP "sda_pm" SITE "M4" ;
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