Software Python 3 Hmmm problems Machine Language How does Python function ? due Mon. 3/9 Assembly Language Hmmm RAM CS 5 this week registers

1-bit memory: flip-flops

arithmetic

bitwise functions

logic gates

transistors / switches Hardware CS 5 Python taking Hmmm... Logisim's A computer B "canvas" S literally O T U main memory R … R A registers C C T S 1-bit memory: flip-flops I O P arithmetic N A T bitwise functions H logic gates

switches: transistors

An example of a happy Things seem to get messy around here… Ripple-Carry Adder... Circuit Optimization? try E85 !

using a genetic algorithm

7 gates 16 gates

Perhaps artistically optimized! Optimize for what?! What's inside gates?

What's the other half of computation? 1940's Electromechanical "gates" (relays) computers

metal plate Signal Spring Output Q

External Electro- Power (6v) magnet

NOT gate

Signal Input, A Which gate is this?

External Power (6v) Signal Output Q

Input, A Input, B

AND NAND OR NOR XOR Which gate is this? AND gate

External Power (6v) Signal Output Q

Input, A Input, B

AND NAND OR NOR XOR The Mark 1 an early, relay-based computer

http://www-03.ibm.com/ibm/history/exhibits/markI/markI_reference.html Grace Hopper + Howard Aiken, Harvard ~ 1944 ran at 0.00001 MHz

5 tons Addition: 0.6 seconds 530 miles of wiring Multiplication: 5.7 seconds 765,299 distinct parts! Division: 15.3 seconds The Mark 1 an early, relay-based computer

a "modern" relay-based computer

https://www.youtube.com/watch?v=-ReqdyCxZ9I

http://www-03.ibm.com/ibm/history/exhibits/markI/markI_reference.html Grace Hopper + Howard Aiken, Harvard ~ 1944 ran at 0.00001 MHz

5 tons Addition: 0.6 seconds 530 miles of wiring Multiplication: 5.7 seconds 765,299 distinct parts! Division: 15.3 seconds Today's gates?

https://www.youtube.com/watch?v=Fxv3JoS1uY8 Silicon-based switches (transistors)

a single etched transistor labeled with base (b), emitter (e), and collector (c) Transistors

Radio Shack transistors Transistors are current switches: +5v voltage here

switch-off-type (pmos)

0v 5v

0v "opens" this wire 5v "cuts" this wire allows current here

switch-on-type (nmos)

0v 5v 20 nm

0v "cuts" this wire 5v "opens" this wire switch-on-type transistor single-electron tunneling, or SET transistor Building a NOT gate

Transistors are current switches: NOT input output

switch-off-type (pmos)

0v 5v Building a NOT gate from transistors…

0v "opens" this wire 5v "cuts" this wire POWER +5 v

switch-on-type (nmos)

0v 5v (1 or 0) (0 or 1) OUTPUT INPUT 0v "cuts" this wire 5v "opens" this wire

Ground = 0v NOT gate Implemented!

Transistors are current switches:

switch-off-type (pmos)

0v 5v

0v "opens" this wire 5v "cuts" this wire +5 v POWER

switch-on-type (nmos)

0v 5v (1 or 0) (0 or 1) OUTPUT INPUT 0v "cuts" this wire 5v "opens" this wire

Ground = 0v Half a computer: the CPU

transistors

gates

arithmetic

6 x 7… ! What's inside gates?

What's the other half of computation? Make no mistake… computers process numbers - not symbols.

We can only automate what we can arithmetize. 1%

- Alan Perlis

99% (communications) Store + Retrievetransport! True! But it misses 99% of what computers do! What? • The circuit starts with R being 0 + S being 0 the "loopback wire" Memory! and Q starts at _0_ from S to R will be 1 • What if S stays 0 and R is set to 1? Q is then set to __ 0 • What happens if S stays 0 and R is set back to 0? "Set" 1 Q still stays (!) at __ S NOR • What happens if R is 0 and S is set to 1? Q is then set to __

• What happens if S is 0 and R is set back to 0? Q still stays (!) at __ 0 NOR Q "Reset" 0 Why does "S" stand for "Set" and R for "Reset" ? R Q is a single S "sets" Q to 1; R "resets" it back to 0. bit of storage

Take a look at this circuit: The D (data) line holds a single bit we want to store "we are ready (either a 0 or a 1). to handle the data" How does the strobe bit help store the bit D into Q?

Hint: What happens when the "strobe" is 1? • The circuit starts with R being 0 + S being 0 the "loopback wire" Memory! and Q starts at _0_ from S to R will be 1 • What if S stays 0 and R is set to 1? Q is then set to _0_ 1 • What happens if S stays 0 and R is set back to 0? "Set" NOR 0 Q still stays (!) at _0_ S • What happens if R is 0 and S is set to 1? Q is then set to _1_

• What happens if S is 0 and R is set back to 0? 1 Q still stays (!) at _1_ NOR Q "Reset" 0 Why does "S" stand for "Set" and R for "Reset" ? R Q is a single S "sets" Q to 1; R "resets" it back to 0. bit of storage

Take a look at this circuit: The D (data) line holds a single bit we want to store "we are ready (either a 0 or a 1). to handle the data" How does the strobe bit help store the bit D into Q?

Hint: What happens when the "strobe" is 1? The flip-flop

D data inputs AND "strobe" NOR

"we are ready to handle the data"

NOR AND Q Q is 1 bit of storage

D the flip-flop's diagram Q

strobe 1 bit of memory! The flip-flop

D data inputs AND "strobe" NOR

NOR Q But there's a LOT more AND Q is 1 bit than 1 bit of memory… !of storage

D the flip-flop's diagram Q

strobe 1 bit of memory! Random Access Memory

4 3 2 2 5 1 3 data input bits 6 0 Inputs Simplified values memory Prototype for locations 2 data address bits Accessing write enable line Memory Outputs read enable line 12 bits of RAM 3 data output bits

3 bits stored at location 00 3 bits stored at location 01 3 bits stored at location 10 3 bits stored at location 11 Stacking up Bits of Memory…

Speaking of data… Some memory is more equal than others…

Registers Main Memory Disk Drive on the Central Processing Unit (replaceable RAM) magnetic storage

8 flip-flops are an 8-bit register

D Q D Q D Q D Q D Q D Q D Q D Q s s s s s s s s

100 Registers of 64 bits each 10 GB memory 4 TB drive ~ 10,000 bits ~ 100 billion bits ~ 42 trillion bits (or more)

memory from "Leaky Bucket" remagnetizing logic gates capacitors surfaces

"640K ought to be enough for anybody" - Bill Gates (contested) Some memory is more equal than others…

Registers Main Memory Disk Drive on the Central Processing Unit (replaceable RAM) magnetic storage

8 flip-flops are an 8-bit register

D Q D Q D Q D Q D Q D Q D Q D Q s s s s s s s s

100 Registers of 64 bits each 10 GB memory 4 TB drive ~ 10,000 bits ~ 100 billion bits ~ 42 trillion bits (or more)

Price ~$100 ~$100 ~$100

7 Time 1 clock cycle 100 cycles 10 cycles 10-9 sec 10-7 sec 10-2 sec

If a clock cycle == 1 minute 1 min 1.5 hours 19 YEARS Some memory is more equal than others…

Registers Main Memory Disk Drive on the Central Processing Unit (replaceable RAM) magnetic storage

8 flip-flops are an 8-bit register

D Q D Q D Q D Q D Q D Q D Q D Q s s s s s s s s

100 Registers of 64 bits each 10 GB memory 4 TB drive ~ 10,000 bits ~ 100 billion bits ~ 42 trillion bits (or more)

programs are running Pricefetched and ~$100 programs ~$100 "Off" data is ~$100 saved way executed 1 are stored 7 Time 1 clock cycle 100 cycles 10out here...cycles instruction at a 10-9 sec 10here…-7 sec 10-2 sec time here… If a clock cycle == 1 minute 1 min 1.5 hours 19 YEARS How do we execute sequences of operations? processor CPU stores all instructions and almost all data the instruction's RAM live memory bits select which circuit to use… sends next instruction to the CPU …

divider

runs 1 instruction memory and sends back locations results for storage, (RAM) if requested…

multiplier sends next instruction to the CPU … Jon V.N. 70 years ago…

processing fetch stored program

CPU execute RAM central processing unit registers random access memory locations

limited, fast registers larger, slower memory + arithmetic + no computation Jon V.N. 70 years later…

processing fetch stored program

CPU execute RAM central processing unit registers random access memory locations

limited, fast registers larger, slower memory + arithmetic + no computation Von Neumann Architecture

processing program

Von Neumann CPU bottleneck RAM central processing unit registers random access memory locations

r1 0 0000 0001 0000 0001 General-purpose register, r1 1 1000 0010 0001 0001 2 0110 0010 0010 0001 r2 General-purpose register, r2 3 0000 0010 0000 0010 4 0000 0000 0000 0000 Programs are stored 5 6 (all bits) in memory in machine language Von Neumann Architecture

processing program

Von Neumann CPU bottleneck RAM central processing unit registers random access memory locations

r1 the read instruction 0 0000 0001 0000 0001 General-purpose register, r1 1 1000 0010 0001 0001 2 0110 0010 0010 0001 r2 read r1 General-purpose register, r2 3 0000 0010mul 0000 r2 0010 r1 r1 4 0000 0000add 0000 r2 0000 r2 r1 5 write r2 (all bits) Programs are shown 6 halt in assembly language "mnemonics" instead of bits Von Neumann Architecture

processing program

Von Neumann CPU bottleneck RAM central processing unit registers random access memory locations

r1 0 0000 0001 0000 0001 General-purpose register,the r1 mul instruction 1 1000 0010 0001 0001 2 0110 0010 0010 0001 r2 read r1 General-purpose register, r2 3 0000 0010mul 0000 r2 0010 r1 r1 4 0000 0000add 0000 r2 0000 r2 r1 5 write r2 (all bits) Programs are shown 6 halt in assembly language "mnemonics" instead of bits Von Neumann Architecture

processing program

Von Neumann CPU bottleneck RAM central processing unit registers random access memory locations r1 0 read r1 General-purpose register, r1 1 mul r2 r1 r1 2 r2 add r2 r2 r1 General-purpose register, r2 3 write r2 4 halt 5 Assembly language "mnemonics" 6 is human-readable instead of bits

Human readable? machine language I doubt it! (input) Example #1: Screen 6

Von Neumann CPU bottleneck RAM central processing unit registers random access memory locations

6 0 r1 read r1

General-purpose register r1 1 mul r2 r1 r1 r2 2 General-purpose register r2 add r2 r2 r1

3 write r2

4 halt Hmmm: Harvey mudd miniature machine

Von Neumann CPU bottleneck RAM central processing unit registers random access memory locations

0 r1 read r1

General-purpose register r1 1 mul r2 r1 r1 r2 2 General-purpose register r2 add r2 r2 r1 256256 memory memory 16 registers 3 writelocationslocations r2

4 halt vs. 2018 ? Hmmm vs now

Von Neumann CPU bottleneck RAM central processing unit registers random access memory locations

0 r1 read r1

General-purpose register r1 1 mul r2 r1 r1 r2 2 General-purpose register r2 add r2 r2 r1 256256 memory memory 16 registers 3 writelocationslocations r2

4 halt Modern Intel: 50-100 registers per core Modern: ~10,000,000,000 mem loc's Hmmm the complete reference

At www.cs.hmc.edu/~cs5grad/cs5/hmmm/documentation/documentation.html

Today Thurs. Assembly Language ought to be called register language read r1 reads from keyboard into reg r1 write r2 outputs reg r2 onto the screen

you can replace 42 with setn r1 42 reg1 = 42 anything from -128 to 127 addn r1 -1 reg1 = reg1 - 1 a shortcut This is why assignment is written R to L in Python! add r3 r1 r2 reg3 = reg1 + reg2 sub r3 r1 r2 reg3 = reg1 – reg2 mul r2 r1 r1 reg2 = reg1 * reg1 ints div r1 r1 r2 reg1 = reg1 / reg2 only! screen (input) Name(s) Quiz 100 (output) CPU RAM random access memory central processing unit Python 100 r1 0 read r1 r1 = 100

General-purpose register r1 1 setn r2 7 r2 2 mod r4 r1 r2 General-purpose register r2 3 div r3 r1 r4 r3 4 General-purpose register r3 sub r3 r3 r2

r4 5 addn r3 -1

General-purpose register r4 6 write r3 Hmmm...!? Extra! Change only line 4's instruction to create an output of 0 or 6 or 349 instead? 7 halt exQuiz.hmmm screen 100 (input) Try this on the back page first! Quiz (output) CPU RAM random access memory central processing unit Python 100 r1 100 0 read r1 r1 = 100

General-purpose register r1 1 setn r2 7 r2 = 7

r2 7 2 mod r4 r1 r2 r4 = r1 % r2 General-purpose register r2 3 div r3 r1 r4 r3 = r1 // r4 r3 4 General-purpose register r3 sub r3 r3 r2 r3 = r3 – r2

5 r4 addn r3 -1 r3 = r3 + -1

General-purpose register r4 6 write r3 print r3 Hmmm...!? Extra! Change only line 4's instruction to mod div mul create an output of 0 or 6 or 349 instead? 0 6 349 7 halt exQuiz.hmmm screen 100 (input) Try this on the back page first! Quiz (output) CPU RAM random access memory central processing unit Python 100 r1 100 0 read r1 r1 = 100

General-purpose register r1 1 setn r2 7 r2 = 7

r2 7 2 these in and up!mod r4 r1 r2 r4 = r1 % r2 General-purpose register r2 Pass 3 div r3 r1 r4 r3 = r1 // r4 r3 4 General-purpose register r3 sub r3 r3 r2 r3 = r3 – r2

5 r4 addn r3 -1 r3 = r3 + -1

General-purpose register r4 6 write r3 print r3 Hmmm...!? Extra! Change only line 4's instruction to mod div mul create an output of 0 or 6 or 349 instead? 0 6 349 7 halt Real Assembly Languages Hmmm is a subset common to all real assembly languages. Instruction Description

A few of the many basic processor instructions (Intel)

two more recent Intel instructions (SSE4 subset) Who writes all of the assembly language that gets executed? Who writes all of the assembly language that gets executed?

other programs! Is this all we need?

0 read r1 What’s 1 mul r2 r1 r1 missing here? 2 add r2 r2 r1 3 write r2

4 halt

Why couldn't we implement Python using only Hmmm assembly language up to this point? Loops and ifs

We couldn't implement Python using Hmmm so far... It's too linear!

"straight-line code"

0 setn r1 42 loop 1 write r1

2 addn r1 1

3 jumpn 1 jumpn! 4 halt CPU RAM central processing unit random access memory

0 r1 setn r1 42

General-purpose register r1 1 write r1

r2 not used in this program… 2 General-purpose register r2 addn r1 1

3 Screen jumpn 1

4 halt

What would happen IF… • we replace line 3's 1 with a 0? • we replace line 3's 1 with a 2? • we replace line 3's 1 with a 3? jumpn! • we replace line 3's 1 with a 4? Jumps in Hmmm

Conditional jumps

jeqzn r1 42 IF r1 == 0 THEN jump to line number 42 jgtzn r1 42 IF r1 > 0 THEN jump to line number 42 jltzn r1 42 IF r1 < 0 THEN jump to line number 42 jnezn r1 42 IF r1 != 0 THEN jump to line number 42

This is making me jumpy!

Unconditional jump jumpn 42 Jump to program line # 42 Jumps in Hmmm

Conditional jumps

jeqzn r1 if eq42ual to zIF ero… r1 == 0 THEN jump to line number 42 jgtzn r1if g42reater than IF r1 > 0zero …THEN jump to line number 42 jltzn r1if l42ess than IF zr1 < 0ero… THEN jump to line number 42 jnezn r1if n42ot equal to IF r1 != 0zero … THEN jump to line number 42

This is making me Mnemonics! jumpy!

Unconditional jump jumpn 42 Jump to program line # 42 Hmmm the complete reference

At www.cs.hmc.edu/~cs5grad/cs5/hmmm/documentation/documentation.html

Jumps! Gesundheit! jgtzn What Python f'n is this?

CPU RAM central processing unit random access memory

r1 0 read r1 1 jgtzn r1 7 General-purpose register r1 2 setn r2 -1 r2 3 mul r1 r1 r2 General-purpose register r2 4 nop space for 5 nop future expansion! Screen -6 (input) 6 nop 7 write r1 8 halt

With an input of -6, what does this code write out? I think this language has injured my craniuhmmm! 2 Write an assembly-language program that reads a Try it! positive integer into r1. The program should compute the factorial of the input in r2. Once it's computed, it Follow this Hmmm program. should write out that factorial. Two lines are provided: 1 First run: use r1 = 42 and r2 = 5. Next run: use r1 = 5 and r2 = 42. Memory - RAM 0 read r1 Registers - CPU Memory - RAM Registers - CPU 1 Run 1 Run 2 setn r2 1 0 read r1 r1 input 5 2 r1 42 5 1 read r2 r2 1 3 r2 5 42 2 sub r3 r1 r2 result – so far 4 3 nop r3 r3 not needed; OK to use 5 4 jgtzn r3 7 6 5 write r1 7 Output 1 Output 2 6 jumpn 8 7 write r2 8 write r2 8 halt 9 halt

(1) What common function does this compute? Hint: On line 2, could you write a test that checks if the factorial Hint: try the inputs in both orders... is finished; if it's not, compute one piece and then jump back! (2) Extra! How could you change only line 3 so that, if inputs r1 and r2 are equal, the program will ask for new inputs? Extra! How few lines can you use here? (Fill the rest with nops…) factorial: the plan … fac(5) is 1*5*4*3*2*1

output (to be) r1 input r2 starting 5 1 value!

let r1 be the input let r2 become and the "counter" the output I think this language has injured my craniuhmmm! 2 Write an assembly-language program that reads a Try it! positive integer into r1. The program should compute the factorial of the input in r2. Once it's computed, it Follow this Hmmm program. should write out that factorial. Two lines are provided: 1 First run: use r1 = 42 and r2 = 5. Next run: use r1 = 5 and r2 = 42. Memory - RAM 0 read r1 Registers - CPU Memory - RAM Registers - CPU 1 Run 1 Run 2 setn r2 1 0 read r1 r1 input 5 2 r1 42 5 1 read r2 r2 1 3 r2 5 42 2 sub r3 r1 r2 result – so far 4 3 nop r3 r3 not needed; OK to use 5 4 jgtzn r3 7 6 5 write r1 7 Output 1 Output 2 6 jumpn 8 7 write r2 8 write r2 8 halt 9 halt

(1) What common function does this compute? Hint: On line 2, could you write a test that checks if the factorial Hint: try the inputs in both orders... is finished; if it's not, compute one piece and then jump back! (2) Extra! How could you change only line 3 so that, if inputs r1 and r2 are equal, the program will ask for new inputs? Extra! How few lines can you use here? (Fill the rest with nops…) 1 Follow this assembly-language program from top to bottom. First use r1 = 42 and r2 = 5, then swap them on the next run:

Run #1 Memory - RAM Run #2 0 read r1 r1 42 1 read r2 r1 5 2 sub r3 r1 r2 3 nop r2 42 r2 5 4 jgtzn r3 7 5 write r1 r3 6 jumpn 8 r3 7 write r2 8 halt 9

(1) What function does this program compute in general? (2) Extra! How could you change only line 3 so that, if the original two inputs were equal, the program asked for new inputs? a factorial solution Memory - RAM

0 read r1

Registers - CPU 1 setn r2 1 2 jeqzn r1 8 3 r1 input mul r2 r2 r1 4 addn r1 -1

r2 result – so far 5 jumpn 2

6 nop space for r3 future not needed, but OK to use! 7 nop expansion! 8 write r2 9 halt This week in lab:

Randohmmm Numbers…

where you'll write your own random number generator… ... in Hmmm assembly language

See you there! https://understandinguncertainty.org/node/1066