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CPU08RM, CPU08 Central Processor Unit CPU08 Central Processor Unit Reference Manual M68HC08 Microcontrollers CPU08RM Rev. 4 02/2006 freescale.com CPU08 Central Processor Unit Reference Manual To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to: http://www.freescale.com/ The following revision history table summarizes changes contained in this document. For your convenience, the page number designators have been linked to the appropriate location. Revision History Revision Page Date Description Level Number(s) February, Updated to meet Freescale identity guidelines. N/A 4 2006 Chapter 5 Instruction Set — Corrected description of CLI instruction. 101 Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. This product incorporates SuperFlash® technology licensed from SST. © Freescale Semiconductor, Inc., 2006. All rights reserved. CPU08 Central Processor Unit Reference Manual, Rev. 4 Freescale Semiconductor 3 Revision History CPU08 Central Processor Unit Reference Manual, Rev. 4 4 Freescale Semiconductor List of Chapters Chapter 1 General Description. .13 Chapter 2 Architecture . .15 Chapter 3 Resets and Interrupts . .23 Chapter 4 Addressing Modes. .33 Chapter 5 Instruction Set . .59 Chapter 6 Instruction Set Examples . .155 Glossary. 187 Index. 195 CPU08 Central Processor Unit Reference Manual, Rev. 4 Freescale Semiconductor 5 List of Chapters CPU08 Central Processor Unit Reference Manual, Rev. 4 6 Freescale Semiconductor Table of Contents Chapter 1 General Description 1.1 Introduction . 13 1.2 Features. 13 1.3 Programming Model. 13 1.4 Memory Space. 14 1.5 Addressing Modes . 14 1.6 Arithmetic Instructions . 14 1.7 Binary-Coded Decimal (BCD) Arithmetic Support . 14 1.8 High-Level Language Support . 14 1.9 Low-Power Modes . 14 Chapter 2 Architecture 2.1 Introduction . 15 2.2 CPU08 Registers . 15 2.2.1 Accumulator . 16 2.2.2 Index Register. 16 2.2.3 Stack Pointer. 17 2.2.4 Program Counter. 17 2.2.5 Condition Code Register . 18 2.3 CPU08 Functional Description . 19 2.3.1 Internal Timing . 20 2.3.2 Control Unit . 20 2.3.3 Execution Unit . 21 2.3.4 Instruction Execution . 21 Chapter 3 Resets and Interrupts 3.1 Introduction . 23 3.2 Elements of Reset and Interrupt Processing . 23 3.2.1 Recognition . 23 3.2.2 Stacking . 24 3.2.3 Arbitration. 25 3.2.4 Masking . 26 3.2.5 Returning to Calling Program. 27 3.3 Reset Processing. 27 3.3.1 Initial Conditions Established . 28 3.3.2 CPU . 28 3.3.3 Operating Mode Selection . 28 CPU08 Central Processor Unit Reference Manual, Rev. 4 Freescale Semiconductor 7 Table of Contents 3.3.4 Reset Sources . 29 3.3.5 External Reset . 29 3.3.6 Active Reset from an Internal Source . 29 3.4 Interrupt Processing. 29 3.4.1 Interrupt Sources and Priority . 30 3.4.2 Interrupts in Stop and Wait Modes. 31 3.4.3 Nesting of Multiple Interrupts . 31 3.4.4 Allocating Scratch Space on the Stack . 32 Chapter 4 Addressing Modes 4.1 Introduction . 33 4.2 Addressing Modes . 33 4.2.1 Inherent. 34 4.2.2 Immediate . 36 4.2.3 Direct. 37 4.2.4 Extended. 39 4.2.5 Indexed, No Offset . 40 4.2.6 Indexed, 8-Bit Offset . 40 4.2.7 Indexed, 16-Bit Offset . ..
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