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Next Generation Computing

Erica Wiseman Strategic Information Analyst, National Research Council of Canada

Prepared by: National Research Council of Canada / Government of Canada 1200 Montreal Rd, Ottawa, ON K1A 0R6

Contract Number: FE22071707 NRC Project #: EW16-02

Contract Scientific Valérie Lavigne, Defence Scientist and Bruno Gilbert, Chief Scientist

The scientific or technical validity of this Contract Report is entirely the responsibility of the Contractor and the contents do not necessarily have the approval or endorsement of the Department of National Defence of Canada.

Defence Research and Development Canada Contract Report DRDC-RDDC-2017-C049 March 2016

Template in use: SR Advanced_Oct_Release_EN_V.03.02_2015-08-12-V02_WW.dot

© Her Majesty the Queen in Right of Canada, as represented by the Minister of National Defence, 2016 © Sa Majesté la Reine (en droit du Canada), telle que représentée par le ministre de la Défense nationale, 2016

Strategic Technical Insights

NEXT GENERATION COMPUTING

Prepared for Valerie Lavigne Defence Scientist, C2I Section, Valcartier Research Centre Defence Research and Development Canada / Government of Canada [email protected]

Bruno Gilbert Chief Scientist, Information Sciences, Valcartier Research Centre Defence Research and Development Canada / Government of Canada [email protected]

Prepared by Erica Wiseman, Strategic Information Analyst, National Research Council of Canada / Government of Canada [email protected]

DRDC Project #: FE22071707

NRC Project #: EW16-02

Report submitted: September 12, 2016

NRC-KM employees make every effort to obtain information from reliable sources. However, we assume no responsibility or liability for any decisions based upon the information presented.

Scientometric Study on Next Generation Computing September, 2016

Table of Contents

1 Executive Summary ...... 5 2 Background ...... 7 2.1 Context ...... 7 2.2 Key Issues ...... 7 2.3 Key Questions ...... 7 3 Introduction ...... 8 3.1 Phase 1 Findings ...... 11 4 Phase 2 Findings ...... 14 4.1 Biocomputing ...... 17 4.1.1 Biocomputing Top Topics ...... 21 4.1.2 Major Players and Area of Focus ...... 23 4.1.3 Collaboration Networks ...... 25 4.2 Nanocomputing ...... 27 4.2.1 Top Topics ...... 32 4.2.2 Major Players and Area of Focus ...... 33 4.2.3 Collaboration Networks ...... 35 4.3 Spintronics ...... 36 4.3.1 Top topics ...... 43 4.3.2 Major Players and Area of Focus ...... 44 4.3.3 Collaboration Networks ...... 45 4.4 Optical/Photonic Computing ...... 47 4.4.1 Top Topics ...... 53 4.4.2 Major players and Area of Focus ...... 55 4.4.3 Collaboration Networks ...... 57 5 Conclusions ...... 59 6 References ...... 62 Appendix A: Definitions of Topics In Phase 1 ...... 67 Appendix B: inspired Grand Challenge Goals ...... 74 Appendix C: Roadmap for nanophotonic devices 2014-2020 ...... 77 Appendix D: Attachments ...... 80 Appendix E: Methodology ...... 81 Searches ...... 81 Analysis ...... 82

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List of Figures

Figure 1: Selected Predictions for the End of Moore’s Law ...... 8 Figure 2. Cluster Map: Phase 1 ...... 12 Figure 3. Mind map of Next Generation Computing Topics ...... 13 Figure 4. Publication Trendlines, All Four Subsets ...... 14 Figure 5. Cluster Map of Topics in the Four Selected Subtopics ...... 16 Figure 6. Biocomputing Top Topics by Publication Count ...... 21 Figure 7. Biocomputing Research Thrusts ...... 22 Figure 8. Biocomputing Top Affiliations ...... 23 Figure 9. Biocomputing Top Countries ...... 23 Figure 10. Top 10 Biocomputing Affiliations and Areas of Focus ...... 24 Figure 11. Biocomputing Top Affiliation Collaborations ...... 26 Figure 12. Arrangement of in Quantum Dots ...... 27 Figure 13. Taxonomy of Memory Devices ...... 30 Figure 14. Most Promising Emerging Memory Devices ...... 30 Figure 15. Most Promising Emerging Logic Devices ...... 31 Figure 16. Nanocomputing Top Topics ...... 32 Figure 17. Nanocomputing Cluster Map ...... 32 Figure 18. Nanocomputing Top Affiliations ...... 33 Figure 19. Top Nanocomputing Major Players and Areas of Focus ...... 34 Figure 20. Nanocomputing Affiliation Collaborations ...... 35 Figure 21. Schematic of Magnetic Tunnel Junction ...... 36 Figure 22. Benchmarking of Emerging Logic Devices ...... 40 Figure 23. Spintronics Top Topics ...... 43 Figure 24. Spintronics Cluster Map ...... 43 Figure 25. Spintronics Top Affiliations ...... 44 Figure 26. Spintronics Geographic Distribution of Publications ...... 44 Figure 27. Spintronics Major Players and Areas of Focus ...... 45 Figure 28. Spintronics Affiliation Collaboration ...... 46 Figure 29. Emerging Opportunities in Optical Data Processing ...... 48 Figure 30. Synergies of Speed and Size of Nanoplasmonic Chips ...... 51 Figure 31. Optical/Photonic Computing Top Topics ...... 53 Figure 32. Optophotonic Cluster Map ...... 54 Figure 33. Optical/Photonic Computing Top Affiliations ...... 55 Figure 34. Geographic Distribution of Optical/Photonic Computing Publications...... 55 Figure 35. Optical/Photonic Computing Major Players and Areas of Focus ...... 56 Figure 36. Optical/Photonic Computing Affiliation Collaboration Map ...... 57 Figure 37. Optical/Photonic Computing Canadian Collaboration Map ...... 58

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List of Tables

Table 1. Key Findings ...... 5 Table 2. Requirements for Beyond CMOS Technologies ...... 9 Table 3. Summary of Emerging Device Challenges and Opportunities ...... 10 Table 4. Overview of Major Spintronic Devices ...... 37 Table 5. Comparison of Spin Torque and Spin Wave Majority Gates ...... 38 Table 6. Comparison of Spintronics Devices for Various Logic Systems ...... 41 Table 7. Comparison of Emerging Logic Devices ...... 41 Table 8. Summary of Replacement Technologies, Timelines and Opportunities ...... 60 Table 9. Definitions of Topics in Phase 1 ...... 67 Table 10. Nanotechnology Inspired Grand Challenge Goals ...... 74 Table 11. Nano-Engineered Materials Roadmap ...... 77 Table 12. Nanoscale Quantum Roadmap ...... 78 Table 13. Communications & All-Optical Signal Processing Roadmap ...... 78 Table 14. Plasmon-Enhanced Magentic Storage Roadmap...... 79 Table 15. Search Terms ...... 81

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1 EXECUTIVE SUMMARY Table 1. Key Findings

Key Question Key Findings Phase 1  Phase 1: Revealed a dominance of research on and Biocomputing as well as clusters of research in Nanocomputing, Spintronics, Optical/Photonic computing, Granular computing and Neuromorphic computing to name a few.  Phase 2: Four topics were investigated in depth including Biocomputing, Nanocomputing, Spintronics and Optical/photonic computing o Connections in research exist between Spintronics, Neuromorphic computing, Nanocomputing, Optical/Photonic computing, but the rest of Biocomputing is not connected in the cluster map. o Quantum computing is inescapable from the field of next generation computing. Biocomputing  Largest subset in the study with 2,160 publications, showing a slight decrease in publications between 2014 and 2015.  Top topics: DNA (Molecular) computing (413 records), Membrane computing (315) & P Systems (389), Neuromorphic computing (262).  Top Affiliations: Huazhong University of Science & Technology, China (78), University of Seville, Spain (69) Shandong Normal University, China (53), all of whom are focused on Membrane computing and P systems.  Major Collaborations: Huazhong University of Science and Technology, China (78) and the University of Seville, Spain, (69) share 14 co-publications, mainly on P System. The University of Pittsburgh, USA (23) and the US Air Force Research Laboratory (AFRL) (16) share 10 publications on Neuromorphic computing, Neurocomputing and Memristors. The University of Technology, Malaysia (21) and the International Islamic University, Malaysia (14) share 10 publications on DNA (Molecular) Computing. The University of Seville also has nine co-publications with Xihua University, China (50) on Membrane Computing and P System. Nanocomputing  Smallest subset in the study with 71 publications, showing a decrease in publications between 2014 and2015.  Top Topics: Nanomagnetic logic (37), Logic gates (24), Quantum-dot cellular automata (22).  Top Affiliations: University of Notre Dame, USA (15) focused on Nanomagnetic logic , Technical University Munich, Germany (14) focused on Nanomagnetic logic, Polytechnic University of Turin, Italy (7) focused on Nanomagnetic logic and Quantum- dot cellular automata.  Major Collaborations: The University of Notre Dame, USA and Technical University Munich, Germany, are also the top collaborators with 9 co-publications on Nanomagnetic logic. Brazil has only collaborated internally with three co-publications between UFMG and DISSE on Nanocomputing and Quantum-dot cellular automata. The University of California, Berkley, has collaborated with Intel Corporation on Nanomagentic logic computing architecture. Harvard University has co-published with Mitre Corporation. Spintronics  The second smallest dataset with 562 publications, only subset showing an increase in publications between 2013 and 2015.  Top Topics: Quantum computing (343), Magnetics (140), Spin (95), (75).  Top Affiliations: Purdue University, USA (32) focused on Spin transfer torque, CNRS, France (25) focused on Magnetism and Quantum computing, University of New South

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Key Question Key Findings Wales, Australia (24) focused on Quantum computing, Spin qubits and Silicon.  Major Collaborations: The University of New South Wales has 9 collaborations with the University of Melbourne Australia on Quantum computing and Silicon. Many of these publications also include the Purdue University, USA and/or the University College London, UK. Purdue University has also collaborated with Intel Corp, USA on Domain wall and with the University of Central Florida USA on Spin transfer torque and Non- boolean computing. The National Institute of Informatics, Japan and Stanford University, USA has collaborated on four publications on spin and Quantum computing. The CNRS, France has six collaborations with Universite Paris-Sud (Paris XI), France on Magnetic tunnel junction and Spin transfer torque. The Universite Paris-Sud (Paris XI), has four collaborations with both Beihang University, China and four other co-publications with Northwestern University, USA. Optical/Photonic  The second largest dataset with 1,403, showing a very slight decrease in publications Computing between 2014 and 2015.  Top Topics: Quantum computing (361), (81), Reversible logic (76), Photonic Integrated circuits (71).  Top Affiliations: Chinese Academy of Sciences (46), Centre national de la recherché scientific (CNRS), France (36), University of Oxford, UK (22), all of whom are focused on optical/photonic aspects of Quantum computing.  Major International Collaborations: Macquarie University and Sydney University Australia share 4 collaborations on silicon photonics, quantum computing, and photonic integrated circuits; Chinese Academy of Sciences and Tsinghua University share 3 publications on resonators and photonic integrated circuits; University of Oxford shares 6 publications with National University of Singapore on quantum computing and 3 with University of Southhampton on quantum computing and photonic integrated circuits; the National University Singapore and MIT share 3 publications on quantum computing.  Major Canadian Collaborations: University of British Columbia shares 3 publications with Mentor Graphic Corp., USA and Lumerical Solutions Inc., Canada on silicon photonics and photonic integrated circuits; University of Calgary shares 2 publications with the Chinese Academy of Sciences, Hefei University of Technology, China and the Canadian Institute for Advanced Research on quantum computing; University of Ottawa shares 2 publications with the University of the Algarve, Portugal and University of the Balearic Islands, Spain on and modulators; University of Toronto shares 2 publications with Oak Ridge National Laboratory, USA and University of Tennessee at Knoxville, USA on logic gates, and quantum computing, one of which was co-published with QKD Corp, Canada; Simon Fraser University and D-Wave Systems Inc, Canada share 2 publications on quantum computing; University of Waterloo and University of Ulm, Germany share 2 publications on quantum computing.

Given that the purpose of this study is to provide an overview of competing technologies to CMOS technology, the major recommendation is to continue monitoring future developments to see if the associated technologies advance enough to go beyond complementing CMOS and actually provide options for replacement.

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2 BACKGROUND 2.1 Context In order to assist with long-term R&D planning and the prioritization of research topics, scientometric studies are being commissioned to provide a high level overview of worldwide research activity in scientific domains. These studies will assist DRDC in uncovering and understanding the potential impact of new research on future defense and security capabilities and operations.

Digital computing based on silicon and conventional architectures is reaching its limits owing to fundamental physical limits, economic considerations, and reliability issues. This is a growing concern when addressing certain kinds of problems in domains such as weather forecasting, bioinformatics, robotics, and autonomous systems.

This scientometric study will focus on new and emerging next generation computing models from a broad perspective, including, but not limited to, quantum computing, biologically inspired computing, terahertz computing, nano-computing, cluster computing and 3D processors. Aside from 3D processors, this study will not look at advances in silicon-based computing, reconfigurable computing, cloud computing, cognitive computing, field-programmable field arrays, nor improvements in power consumption.

2.2 Key Issues The objective of this study is to detect and categorize the international R&D domains in the field of next generation computing as well as the collaboration networks in the various sub-domains in Canada and internationally. Results of this project will be used to identify domains that could present an area of interest for which DRDC may wish to develop expertise or pursue further in future deep-dive projects.

2.3 Key Questions This project will be conducted in a phased approach. The main purpose of Phase 1 is to identify selected topics within the broader field of next generation computing models for deeper analysis, which will be conducted in Phase 2. Results of Phase 1 will be presented at the midpoint review where 2-3 topics (depending on size of sub-datasets) will be selected. Phase 2 will include a more in depth examination of selected sub-topics.

Phase 1: Based on full dataset  What are the current computing technologies and models in next generation computing? Provide a high level description of top technologies and models based on keywords in the major topics. Phase 2: Based on each selected subtopics  What are the main thrusts of research?  Who are the major players (academic, government, and industrial organizations) and what are their areas of research focus?  Who are collaborating (based on co-publication) at the institutional level within the different computing technologies and models (in Canada and internationally)?

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3 INTRODUCTION According to Moore’s law, the number of on an (IC) will double every 18-24 months. This law has driven the industry for the past 40 years, and has allowed for the scaling down of complementary metal-oxide-semiconductor (CMOS) IC to produce high speed, small size, low power, high density devices with low production costs. However, the miniaturization of ICs is reaching the physical limit for scalability due to power issues, including both static power (due to intrinsic leakage current) and dynamic power (due to large data traffic and long interconnection delay). In addition to the physical limitations, there are also critical economic considerations affecting the future of CMOS technology. As technology shrinks, the cost rises as more challenging designs, fabrication techniques and additional materials are used. These limits foreshadow the approaching end of CMOS scaling in the near future but exactly when that future will arrive has been the subject of debate and conjecture as illustrated by Figure 1.1,2,3,4

Figure 1: Selected Predictions for the End of Moore’s Law

Similarly, determining what exactly will replace CMOS technology is still undecided due to the variety of alternatives available, coupled with the early state of research and development for many of the options. In addition to building new computing architectures, new programming models, software and interfaces are equally essential research priorities.5

In general, any technology that will potentially act as a replacement will need to meet a variety of criteria and overcome a multitude of technical challenges, many of which are listed in Table 2.

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Table 2. Requirements for Beyond CMOS Technologies

Nanoelectronics Relevance Logic Physical size Technological Research Guiding Technical Criteria Requirements Requirements Requirements Principles Challenges 1. Scalability; 1. Nonlinear 1. Size (i.e., 1. Room 1. Computational 1. Computation 2. Speed; characteristics scalability); temperature or state variables and Storage 3. Energy (related to noise 2. Switching higher operation; other than a) 0D/1D/2D efficiency; margin and the time; 2. Low sensitivity electron charge. charge based 4. Gain (logic) signal-to-noise 3. Switching to parameters 2. Non- extended CMOS or ON/OFF ratio); energy (i.e., (e.g., fabrication equilibrium devices ratio 2. Power power variations); systems. b) Computational (memory); amplification dissipation).7 3. Operational 3. Novel energy state variable 5. Operational (gain > 1); reliability; transfer other than solely Reliability; 3. Concatenation 4. CMOS interactions. electron charge 6. Operational (output of one architectural 4. Nanoscale c) Non-equilibrium temperature; device can drive compatibility thermal computation 7. CMOS another); (interface, management d) Information technological 4. Feedback connection 5. Beyond Transfer compatibility; prevention scheme); lithographic e) Thermal 8. CMOS (output does not 5. CMOS process manufacturing Management architectural affect input); compatibility processes. f) Manufacturing compatibility.6 5. Complete set (fabricated on the 6. Alternative g) Architectures 8 of Boolean same wafer); architectures8 operators (not, 6. Comprehending and, or, or intrinsic and equivalent).7 extrinsic parasitic and their interface to interconnect.7

In addition to meeting these criteria, it has been suggested that successful replacement technologies will likely have the following unique properties:

• Non-volatility (with built in memory in logic devices); • Efficient logic implementation (e.g. through analog or majority gates); • Structural / layout regularity (e.g. Quantum Cellular Automata (QCA), or crossbar arrays); • Self-adaptive property; • Coherent or collective behaviors (e.g. low-power switching and robustness).9

Part of the challenge in moving forward is the breadth of different applications and architecture concepts being developed and the variety of different performance assessment methods and criteria. Furthermore, some of the new approaches are application-specific while only some are truly general purpose. Additionally, there is a continued gap between emerging architectures and device technologies. That being said, opportunities do exist and technology drivers are moving from scaling to creating new functions and applications.10 Table 3 presents a summary of some potential avenues for moving beyond Moore’s law, the associated challenges in the 2020-2030 timeframe and opportunities for emerging devices.11

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Table 3. Summary of Emerging Device Challenges and Opportunities

Difficult Challenges 2020-2030 Summary of Issues and Opportunities SRAM and FLASH scaling in 2D will reach definite limits within the next several years (see PIDS). …[N]eed … new memory technologies to replace SRAM and FLASH memories. Scale high-speed, dense, embeddable, Identify the most promising technical approach(es) to obtain electrically volatile/nonvolatile memory accessible, high-speed, high-density, low-power, (preferably) embeddable technologies to replace SRAM and FLASH volatile and nonvolatile memories in appropriate applications The desired material/device properties must be maintained through and after high temperature and corrosive chemical processing. Reliability issues should be identified & addressed early in the technology development. Develop 2nd generation new materials to replace silicon (or InGaAs, Ge) as an alternate channel and source/drain to increase the saturation velocity and to further reduce Vdd and power dissipation in MOSFETs while minimizing leakage currents for technology scaled to 2020 and beyond. Develop means to control the variability of critical dimensions and statistical Extend CMOS scaling distributions (e.g., gate length, channel thickness, S/D doping concentrations etc.) Accommodate the heterogeneous integration of dissimilar materials. The desired materials/device properties must be maintained through and after high temperature and corrosive chemical processing. Reliability issues should be identified & addressed early in this development. Extend ultimately scaled CMOS as a Discover and reduce to practice new device technologies and primitive=level platform technology into new domains of architecture to provide special purpose optimized functional cores (e.g., application. accelerator functions) heterogeneously integratable with CMOS. Invent and reduce to practice a new information processing technology eventually to replace CMOS as the performance driver. Ensure that a new information processing technology has compatible memory technologies and interconnect solutions. A new information processing technology must be compatible with a system Continue functional scaling of architecture that can fully utilize the new device. Non-binary data information processing technology representations or non-Boolean logic may be required to employ a new substantially beyond that attainable by device for information processing, which will drive the need for new system ultimately scaled CMOS architectures. Bridge the gap that exists between materials behaviors and device functions Accommodate the heterogeneous integration of dissimilar materials Reliability issues should be identified & addressed early in the technology development. The industry is now faced with the increasing importance of a new trend, “More than Moore” (MtM), where added value to devices is provided by Invent and reduce to practice long-term incorporating functionalities that do not necessarily scale according to alternative solutions to technologies that “Moore’s Law”. address existing More than Moore ITRS Heterogeneous integration of digital and non-digital functionalities into topical entries compact systems that will be the key driver for a wide variety of application fields such as communication, automotive, environmental control, healthcare, security, and entertainment.

The U.S. National Strategic Computing Initiative (NSCI) strategic plan for future computing acknowledges that it is too early to choose an individual path for alternative computing technologies or paradigms. Its objective over the next three to five years is to explore and identify promising areas across the range of alternative future computing technologies.12 This report can be viewed as one step in the direction of identifying areas of promise and highlighting the research thrusts and challenges within each. In addition, it will highlight the major players, their areas of research focus and with whom they are collaborating, both in Canada and internationally.

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3.1 Phase 1 Findings To address the key questions in this project, a broad search on both generic and more specific next generation computing architectures, platforms, and approaches was conducted in several databases including Scopus, Inspec and ACM. A list of specific search terms that were used is provided in Table 15. The initial search resulted in a dataset of 12,647 publications from 2013-2015. To identify the major research areas within the dataset, the terms in the various keyword fields and natural language processing of the title keywords were merged and 110 subject groups covering 10,553 publications (83% of the dataset) were created.

In order to visualize the relationships between the subject groups, a cluster map of the 70 most relevant groups was created and is presented in Figure 2 (also available as attachment 1). The cluster map was a generated using TouchGraph Navigator software, which identifies clusters based on ‘Edge Betweeness Centrality’. Nodes within clusters tend to be close together while nodes in separate clusters are farther apart. That being said, the proximity of nodes has been slightly altered to improve the readability of the map. TouchGraph’s clustering algorithm ignores long edges that connect separate clusters, thereby splitting separate connected components into the clusters that are shown.b This map has been filtered to show correlations of 14% or higher. The map reveals a dominance of Quantum computing and Biocomputing as well as smaller clusters for Nanocomputing, Spintronics, Optical computing, Granular computing and Neuromorphic computing to name a few.

a TouchGraph Navigator is produced by the US company TouchGraph LLC: http://www.touchgraph.com/navigator b For more information on the clustering algorithm used by TouchGraph Navigator please see http://www.touchgraph.com/assets/navigator/help2/module_7_7.html?MenuState=AUdAAO-0hAHvtIQABO-0hO- 0gwAZAQPvtIRjbHVzdGVy

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Figure 2. Cluster Map: Phase 1

Definitions of all the topicsc in the cluster map are provided as an excel sheet (also available in Appendix A). An overview of a mind map which was created based on readings in Phase 1 and Phase 2 is presented in Figure 3 (available in full as Attachment 2). This mind map was created to provide a means of viewing the major topics in the field and to further identify some of the subtopics. Due to space limitations, many of the branches are collapsed; the small figures at the end of some of the boxes indicate the number of additional branches. The cluster map, the definitions, and the original Phase 1 mind map were used to select the topics for analysis in Phase 2.

c The definitions are informal, largely based on wikipedia and are used for discussion purposes rather than as a formal deliverable in this project Page 12 of 83

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Figure 3. Mind Map of Next Generation Computing Topics

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4 PHASE 2 FINDINGS

Four specific topics were chosen for analysis in Phase 2: Biocomputing, Nanocomputing, Spintronics and Optical/Photonic computing. These specific topics were chosen according to the following rational:

 They appear to generate a noticeable amount of publications from recognized institutions operating in various countries;  They provide a view of potential technologies beyond Moore’s Law and current CMOS technology  They could represent a paradigm shift with respect to current CMOS technology which is plateauing;  They could provide a significant increase in processing capabilities without the limitations of the current technology;  They could represent potentially disruptive technologies from a defense perspective.

Although Quantum Computing is the most significant topic in Phase 1 in terms of the number of publications, it was intentionally excluded from this study since many others have been conducted on this domain. Moreover, one of the underlying objectives of this study is to uncover what else is emerging besides quantum computing, in order to determine if there are other promising technologies worth exploring.

Four separate sub-datasets were built from the original dataset and additional searches were run for all sets. Figure 4 presents the publications per year for each subset on a logarithmic scale. Of note is the fact that Spintronics (red) is the only subset that has seen continued growth over the period of 2013-2015.

Figure 4. Publication Trendlines, All Four Subsets Page 14 of 83

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While each of the four subtopics will be discussed separately, it is valuable to see the connections between the various groups.

Figure 5 presents a cluster map of the topics in all four subsets and was created after each set was analyzed separately. To build this map, the four datasets were merged and each of the topics that were found in each individual subset was re-created based on all the data in the merged dataset. It reveals some noteworthy points:

 Each of the four subtopics has at least two major clusters. Biocomputing topics can be found in lime green and turquoise. Spintronics topics can be found in orange and blue. Nanocomputing topics can be found in dark green, red and orange. Optical/Photonic computing topics can be found in green, red, yellow, blue, purple and dark red.  The majority of the Biocomputing topics (upper left, lime green) are separated from the rest of the map.  Only the Biocomputing topics related to Neuromorphic computing, Memristors, Neurocomputing, Memory, etc., (turquoise) are connected to the rest of the data set, both through a Spintronics cluster (orange) and a Nanocomputing cluster (dark green).  Quantum computing, although not a topic of focus in phase 2, is clearly a dominant topic in the field of next generation computing and is connected to Spintronics and Optical/photonic computing.  Connections also exist between Spintronics and Nanocomputing.

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Figure 5. Cluster Map of Topics in the Four Selected Subtopics Page 16 of 83

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The results for the phase two questions, along with a high level review of selected major topics in each of the four subtopics, are provided below.

4.1 Biocomputing The Biocomputing dataset is the largest in this project with 2,160 publications between 2013 and 2016. This subset includes articles on biocomputing in terms of DNA and molecular computing as well as brain- inspired computing such as neurocomputing and neuromorphic computing.

Biocomputing, or biologically inspired computing, is a major subset of the field of natural computing (which encompasses a number of subtopics that are not relevant to this study). Biocomputing includes a broad range of computing approaches based on biological systems, ranging from the use of algorithms, such as swarm intelligence, to membrane computing, memetic computing, cellular automata, DNA and molecular computing, neural computing and evolutionary computing.13,14 Biocomputing has many diverse applications including computational intelligence, bioinformatics, natural language processing, machine learning, algorithm theory, data mining and many other areas.15

All biological systems, ranging from a simple single bacteria cell to the complex brain, sense and process information signals from their external environment, store information in “memory” and make decisions and adapt their internal state in order to ensure their survival, growth and reproduction.16,17 Capitalizing on the signal processing capabilities of biological systems, computing using biological entities can be “implemented either on traditional electronic hardware or on alternative physical media such as biomolecular (DNA, RNA) computing, or trapped-ion quantum computing devices”.14 However, while both electronic circuits and biological systems can process information, there are major differences in the “wiring” of the two. Electronic circuits have dedicated wires that prevent cross-talk, whereas biological networks respond to biochemical reactions that are subject to non-specific chemical interactions “which can degrade the specificity of the signals, contaminate the memory, and eventually lead to a “bad” decision (output)”.17 Furthermore, a cohesive scientific understanding of how biological systems process information is still lacking for even simple cellular signalling, let along for more complicated neural circuits. An integrated understanding of how biological signalling works as well as the similarities and differences between man-made computing machines and biocomputing is a central issue in the study of natural computing.16,17

Three of the major subtopics in the Biocomputing dataset will be discussed in more detail, including Membrane computing and P systems, DNA (Molecular) computing and Neuromorphic computing. These particular subtopics were selected in of the number of publications they are generating, combined with the fact that they could represent a paradigm shift in terms of computing.

Membrane computing investigates a class of computing models known as membrane systems or P systems, which are abstracted from the architecture, structure and functioning of biological membranes within living cells, as well as how cells are organized in tissues, organs (e.g. the brain) and higher order structures such as colonies of cells (e.g. bacteria colonies). In particular, membrane computing abstracts the compartmentalized nature of the internal structures that are affected by membranes. Membrane computing is a rigorous and comprehensive theoretical framework that provides a parallel distributed framework with flexible evolution rules. It has been applied both in the field of biology for activities such as modeling photosynthesis, signaling pathways, cell-mediated immunity, as well as in science for graphics, cryptography and solving computationally hard problems (e.g., P and NP Problems). The resulting

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computing devices are considered to be powerful (equivalent with Turing machines) and computationally efficient (solving NP-complete problems in a feasible/polynomial time).14,18,19

The P system model was introduced by Gheorghe Paun of the Romanian Academy in 1998, and research by him and many others has been expanding rapidly ever since. There are three main types of P systems: cell- like P systems, tissue-like P systems and neural-like P systems, the latter of which has extended to spiking neural P systems. Both software for simulating and some dedicated hardware for implementing P systems has been reported as early as 2010.18,19

DNA (Molecular) computing, (alternatively known as biomolecular computing, molecular computing, biochemical computing or DNA computing), is based on the notion that data can be encoded as biomolecules such as DNA or RNA strands and can be transformed through molecular biology tools to perform arithmetic or logical operations.14,20 Unlike Biocomputing techniques such as membrane computing, cellular automata or evolutionary computing, which use theoretical electronic hardware, DNA computing uses molecules as “hardware”.20 DNA is used as the input into DNA logic circuits to create complicated computing systems that are programmable, precise, and efficient. Various approaches to DNA computing have been studied, including using DNA strand-displacement reaction, DNA hairpins and DNAzymes in large-scale computing models to solve various NP problems.21 DNA computing has made a significant contribution to progress “in nanosciences by providing computational insights into a number of fundamental issues”, particularly to the understanding of self-assembly.14

There are various advantages and disadvantages to DNA computing compared to conventional computing. The two main advantages are (1) that DNA can carry significantly more data than silicon and (2) operation on DNA are massively parallel (a test tube, in which DNA computing often takes places place, contains trillions of strands of DNA and each operation is carried out on all strands in the tube in parallel). Following from these advantages, DNA computing is particularly suitable for solving “fuzzy logic” problems because it can produce billions of potential answers simultaneously, unlike a conventional computer which is designed to perform a single calculation very quickly. DNA are very efficient at handling massive amounts of working memory and are inexpensive to build. 22 That being said, the challenges include the fact that in order to generate some solution sets, even for relatively simple problems, impractically large amounts of DNA may be required. Various details, such as actual error rates, optimal coding techniques, and the ability to perform necessary bio-operations, are still empirically uncertain. DNA computers are not yet programmable and cannot be used by the general public, but progress is being made both in quantifying errors and developing new protocols for more efficient and error-tolerant computing.22

Debates continue as to the potential for DNA computing to replace traditional computing. On the one hand there are those that argue that DNA computing should not replace, but complement, existing computers.23 For example, it has been suggested that a hybrid machine could use traditional silicon for normal processing tasks but use a DNA co-processor for the computationally harder problems that it is more suited for.22 Others, however, hypothesize that molecular computing will effectively compete with electronic computing in the near future.20 Ultimately, more research is needed to determine the impact DNA computing will have in the domain of next generation computing.

Neuromorphic computing, or computing architecture and design principles that are based on the human brain, is a new computing paradigm that offers an alternative to von Neumann architectures, and is currently under intensive international investigation. One of the major goals of neuromorphic systems is to build a “thinking machine” and as such it uses hardware that resembles bio-intelligent systems at the physical level so that it can more closely match how the brain works at a functional level.

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Neuromorphic systems are built from devices that mimic neurons, sending information in the form of spikes rather than varying voltages, include realistic plasticity mechanisms, and incorporate the computation and memory storage within the same circuitry. The merging of the memory and processor in the same circuit is one of the major distinctions between neuromorphic and von Neumann architectures.24,25 Neuromorphic computing devices must be engineered with both area and power efficient circuits that mimic neuron and synaptic behavior while supporting massively parallel connectivity. Additional essential features have recently been listed by Rajendran and Alibart (2016) as including:

 Analog or Stochastic programmability;  Incremental or cumulative programming;  Interconnection and Density;  ON/OFF Ratio;  Power consumption.26

There are two main approaches to developing neuromorphic devices; the first based on analog very large scale integration (VLSI) circuits, the second based on memristive devices. The analog VLSI can contain synaptic circuits that can be integrated into large VLSI spike-based neural systems but these circuits are still CMOS and silicon based and thus face the same scaling limits as all other CMOS devices do. Memristive devices are nanoscale devices that are passive electronic circuit elements and offers new possibilities for building neuromorphic architectures with plastic synaptic connections. Memristive devices include resistance switches used for memory applications such as resistive random access memories (RRAMs or ReRAMs) as well as phase change memory devices, spintronic devices, Spin Torque Transfer (STT) MRAM, and ferroelectric devices (some of which will be described in more detail in the Spintronics section). These technologies are very attractive due to their CMOS compatibility and their ability to be leveraged in synapse circuits in neuromorphic architectures, often in a distributed fashion. Another attractive feature of these devices is their non-volatile nature (i.e. preserve their state when the power is switched off), which avoids the scaling limits of dynamic random access memory and flash memory.24,25

Memristors, and in particular their fundamental physics and the multitude of their various resistive switching mechanisms, have yet to be fully understood. Memristors can potentially improve density and power consumption compared to CMOS technologies but in order to mimic the brain’s ability to “perform fuzzy, fault-tolerant stochastic computing without sacrificing space or power efficiency they must have incremental or analog conductance change under short pulses with low voltage and low currents”. 25 Memristors are currently under intensive industrial development and with advances in basic research, in particular in the control of learning dynamics, stability, intrinsic timing mechanisms and variability etc., there is high potential to use memristors to advance neuromorphic circuits accordingly.24,25

A number of examples of neuromorphic computing devices or programs exist in the US and in Europe. A brief list of some of the major ones is provided below and are reviewed in Indiveri and Liu, 2015,24 and Upadhyay, Joshi and Yang, 2016.25

 TrueNorth chip,27 IBM Research;  SpiNNAker,28 Manchester University, U.K.;  NeuroGrid project,29 Stanford University, U.S.A;  BrainScaleS,30 an EU FET-Proactive FP7 funded research project;  ROLLS neuromorphic processor architecture.31

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Despite these successes, there are continuing challenges in the field of neuromorphic computing. For instance, the aforementioned systems do not yet provide a substantial advantage over conventional computing architectures, nor do they fully mimic the functioning of biological synapses.24,25 Three major challenges that researchers will have to tackle to improve neuromorphic systems relate to integration, energy consumption, and reliability and accuracy.26,32 Both Frost & Sullivan32 and Gartner33 recently assessed neuromorphic systems as being at a very early prototype stage and forecast that fully functional complete neuromorphic chips will hit the market in 7-8 years but with the potential to reshape the computing industry. Part of the delays are due to the need for 1) neuromorphic silicon to leapfrog advances in conventional computing, 2) to fill the knowledge gap of how neuromorphic silicon operates on a large scale and 3) to scale the manufacturing of the large number of neurons and deep interconnects that are needed for neuromorphic devices.33 In order to ultimately build a brain-like computer that consumes low power, has high computational density per unit volume and can perform complex tasks at high speeds, future work will need to continue to focus on the fundamental functioning of the human brain. It is only with significant improvements in our understanding of how the brain works that we will be able to build such functionality into external circuits.25 Frost and Sullivan predict that in pursuit of this goal, researchers will collaborate and form standardization and governing bodies for controlled development of this challenging yet promising technology.32

The U.S. National Nanotechnology Initiative has published a 5-, 10- and 15-year goal timeline for neuromorphic computing as follows:

• “5-year goal: Translate knowledge from biology, neuroscience, materials science, physics, and engineering into useable information for computing system designers. • 10-year goal: Identify and reverse engineer biological or neuro-inspired computing architectures, and translate results into models and systems that can be prototyped. • 15-year goal: Enable large-scale design, development, and simulation tools and environments able to run at exascale computing performance levels or beyond. The results should enable development, testing, and verification of applications, and be able to output designs that can be prototyped in hardware”.34

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4.1.1 Biocomputing Top Topics Figure 6 presents the top topics with 50 or more publications in the dataset. A complete list of topics is available in the Tableau workbook.

Figure 6. Biocomputing Top Topics by Publication Count

Figure 7 presents a cluster map of the research thrusts in the Biocomputing dataset. Unlike what was seen in Figure 2 and Figure 5, where biocomputing was largely unconnected to the other topics in the merged dataset maps, when the relationships between the biocomputing topics are examined within an exclusively biocomputing dataset, the majority of the topics are all interrelated with only a few outliers. Six major clusters are highlighted in the map.

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Figure 7. Biocomputing Research Thrusts

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4.1.2 Major Players and Area of Focus The institutions with 20 or more publications are shown in Figure 8. Six of the top 15 are located in China with two in the UK, Romania and Malaysia. There is one affiliation in the top players list from Spain and USA.

Figure 8. Biocomputing Top Affiliations

Despite the dominance of China in the top 15, the USA is in fact slightly more prolific in the field as seen in Figure 9. Canada ranks 12th in terms of overall publication numbers. The University of Waterloo (10), University of Alberta (6) and University of Western Ontario (6) are the most prolific Canadian institutions in the field.

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The top 10 major players and their areas of focus are presented in Figure 10. Only topics with a minimum of seven records in at least one institution are listed. The top topics for the top 20 major players are available in the Tableau workbook.

Figure 10 . Top 10 Biocomputing Affiliations and Areas of Focus

Additional programs of interest working in support of neuromorphic computing include:34

 SyNAPSE,35,36 DARPA;  UPSIDE,37 DARPA;  MICrONS,38 IARPA;  Neural and Cognitive Systems (NCS),39 U.S. National Science Foundation;  E2CDA program,40 U.S. National Science Foundation and Semiconductor Research Corporation;  SP9 Neuromorphic Computing Platform,41 EU Human Brain Project.

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4.1.3 Collaboration Networks The collaboration map in Figure 11 shows collaborations on two or more publications and reveals that the majority of the top 20 affiliations (all of which have a minimum of 14 publications) are collaborating with others in the field. The two most prolific collaborators are also the top affiliations in the dataset: Huazhong University of Science and Technology, China (78) and the University of Seville, Spain, (69) which share 14 co-publications, mainly on P System. The University of Pittsburgh, USA (23) and the US Air Force Research Laboratory (AFRL) (16) share 10 publications on Neuromorphic computing, Neurocomputing and Memristors. The University of Technology, Malaysia (21) and the International Islamic University, Malaysia (14) share 10 publications on DNA (Molecular) Computing. The University of Seville also has nine co- publications with Xihua University, China (50) on Membrane Computing and P System.

Six affiliations, shown on the right, have no more than one co-publication with those in the top 20 and are thus mapped with no connections. Only three affiliations, including Shandong Normal University (53), Chongqing University, China (16) and the National University of Malaysia (22), had no collaborations with others in the top 20. While there are no Canadian institutions in this map (due to their overall ranking) the Canadian institutions in the field have collaborated with 54 other institutions, the majority of times only once. The exception is the University of Alberta, which has collaborated twice with King Abdulaziz University, Saudi Arabia on the topics of Granular computing and Neurocomputing.

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Figure 11. Biocomputing Top Affiliation Collaborations

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4.2 Nanocomputing The Nanocomputing dataset is the smallest in this project with only 71 publications between 2013 and 2015. Two of the major topics in this dataset, including Quantum dot cellular automata which are related to Reversible computing, and Nanomagnetic Logic, will be reviewed below.

Quantum Dot Cellular Automata (or Quantum Cellular Automata, QCA) is a -less nanotechnology- based computing paradigm. QCA represents binary information in cells that are coupled through electromagnetic fields and has no current flow. The QCA cells consist of four dots that form a square, each dot representing an electron. Information is stored within the arrangement of the electrons. The electrons settle at the corners and thus have two minimal arrangements i.e. polarization +1 (representing logic 1) and polarization -1 (representing logic 0) as shown in Figure 12.

Figure 12. Arrangement of Electrons in Quantum Dots

The state of each cell is determined by the state of the neighboring cell but not by distance cells, which is a natural match for nano-devices. Using the different polarization values, logic operations can be performed with very low power consumption rates compared to traditional field-effect transistors. Furthermore, given their extremely regular structure, it is possible that QCA may be manufactured using very cost effective self-assembly methods that may eventually replace expensive, top down, lithographic techniques that are currently used for traditional semiconductor logic and memory devices.42,43,44,45

Much of the research on QCA is emerging from the field of reversible computing. Reversible computing is the study of computational models which are organized to be two-way deterministic. While traditional computers use irreversible logic operations that destructively overwrite previous outputs, reversible computing functions without any information loss. Consequently, reversible computing can reuse some of the signal energy that is typically lost in traditional computing.44,46-48

Remaining issues in QCA, as identified in 2014, include:

1. The role of quantum mechanics in QCA; 2. Power Gain; 3. Metastability, memory, and coherence; 4. Wire crossings; 5. Computational architecture 6. Lithography and self-assembly; 7. Energy Dissipation.43

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Nanomagnetic logic (NML) is an extension of QCA in that it can be viewed as a magnetic implementation of QCA where information signals are processed through magnetic field-interactions in nano-cells. As such, it is also known as field-coupled computing or previously known as magnetic QCA (MQCA).49,50 While the electron-based version of QCA is susceptible to size variations, nano-magnets, which exhibit a collective spin behavior, are more immune to structure variations.51 The nano-magnetics used in NML have bi-stable magnetization directions (up or down) and process signals via magnetostatic field coupling. They are transistor-less, can achieve non-volatility, high density integration and have ultra-low power consumption.2,7 NML can perform both Boolean and non-Boolean logic operations. Early work on NML was focused on devices that couple the magnetic charge in-plane (iNML) but recent work has focused on out-of- plane, perpendicular magnetic anisotropy (PMA) resulting in perpendicular magnetic logic devices (pNML). pNML typically switch through nucleation and domain wall propagation.11 Recent research on NML has focused on the use of two-phase multiferroics, which provide more local magnetization control and have the potential to support ultra-low power dissipation and fast switching.51 To date, NML devices have proven to meet five basic tenets that are considered essential for digital systems, including:

1. …have non-linear response characteristics due to the magnetic hysteresis loop. 2. … deliver a functionally complete logic set enabled by the 3-input majority gate and the NOT operation naturally achieved by the antiferromagnetic dot-to-dot coupling. 3. Signal amplification/gain greater than 1 … demonstrated by showing the feasibility of 1:3 fanout, where the energy for the gain is provided by an external clocking field... 4. The output of one device can drive another as the fringing fields from individual magnets can bias a neighbor. 5. Unwanted feedback is preventable through clocking.49

NML have many advantages including inherently pipelined logic with no overhead, non-volatility, scalability, reconfigurable logic, reduced power consumption, low energy dissipation in switching and are functional at room temperature.49,51,52 That being said, challenges remain, including:

 Moving the external clock source to “on-chip”, o Developing energetically efficient clocking, o Determining if the magnets that form a circuit can be switched reliably, o Determining whether NML devices are affected by thermal noise;  Developing reliable magnetic interconnects;  Developing an electro-magnetic interface for integration within a chip;  Improving circuit reliability and fault tolerance;  Managing thermal noise and fabrication-related imperfections which lead to errors;  Nearest neighbor dataflow;  Higher latency;  Low processing speed.2,49,51

It has been suggested that given all these challenges, stochastic computing would be an effective architectural approach for NML devices as it would support high error rates and allow for a trade-off between precision and computation time.2 Given NML’s scalability, low power consumption and low power dissipation, NML devices have certain advantages over scaled CMOS devices. However, due to the challenges described above, it is suggested that NML devices may act as a useful complement to CMOS- based circuitry.52

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While the dataset on nanocomputing is small, this does not suggest the effort to use to advance novel computing approaches is small. Two U.S. groups working to advance this cause, the Nanoelectronics for 2020 and Beyond and the International Technology Roadmap for Semiconductors (ITRS) Emerging Research Devices chapter (ITRS/ERD), will now be reviewed.

Nanoelectronics for 2020 and Beyond The Nanoelectronics for 2020 and Beyond is a Nanotechnology Signature Initiative within the broader U.S. National Nanotechnology Initiative. Its stated goal is “[T]o accelerate the discovery and use of novel nanoscale fabrication processes and innovative concepts to produce revolutionary materials, devices, systems, and architectures to advance the field of nanoelectronics”.53 Its main thrusts are:

 Exploring new or alternative “state variables” for computing;  Merging with nanoelectronics;  Exploring carbon-based nanoelectronics;  Exploiting nanoscale processes and phenomena for quantum information science;  Expanding the national nanoelectronics research and manufacturing infrastructure network.53

In particular it supports research on different types of logic using cellular automata or quantum entanglement and superposition; 3D spatial architectures; and information-carrying variables other than electron charge, such as polarization, electron spin, and position and states of atoms and molecules.

Looking at the thrusts and the areas of research it supports highlights the interconnectedness of many of the topics in this project as was seen in Figure 5. It also underscores the challenge in creating a strictly nanocomputing dataset.

Appendix B provides a high level 5-, 10-, 15-year Roadmap from the National Nanotechnology Initiative’s Grand Challenge from which the Nanoelectronics for 2020 and Beyond stems.

International Technology Roadmap for Semiconductors (ITRS) Emerging Research Devices chapter (ITRS/ERD) The ITRS is an international working group sponsored by national semiconductor industry associations in Europe, Korea, Taiwan, USA and the Japan Electronics and Information Technology Industries Association. Its objective is to ensure cost-effective advancements in the performance of integrated circuits and devices. It’s highly recommended publications and reports, including the 2015 International Roadmap for Semiconductors 2.0, can be found on their website.54 Within the ITRS, the Emerging Research Devices (ERD) group critically assesses the suitability and maturity of new nanodevices that are proposed to supplement and/or replace CMOS with new memory and logic technologies to be implemented by 2020-2026.6

The 2015 ITRS roadmap11 provides some useful taxonomies and comparisons of the latest memory and logic devices, many of which are nano-based.

Figure 13 presents a taxonomy of current and emerging memory devices, some of which will be described in the spintronics section below.

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Figure 13. Taxonomy of Memory Devices

Figure 14 presents the 2014 ERD survey of emerging memory devices in terms of those that are most promising and those that need the most resources.

Spin Transfer Torque MRAM Conductive-Bridge RAM Oxide-based ReRam Phase Change Memory Emerging FeFET and FTJ memories Molecular memory Macromolecular memory Mott memory Carbon-based memories

Figure 14. Most Promising Emerging Memory Devices

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Figure 15 presents the 2014 ERD survey of emerging logic devices in terms of those that are most promising and those that need the most resources.

Carbon nanomaterial device TFET Nanowire FET NEMS Spin-torque logic SOI lateral bipolar Piezotronic transistor spinFET 2D channel FET BisFET Collective-spin devices Neg-capacitance FET Mott FET Atomic switch

Figure 15. Most Promising Emerging Logic Devices

In general, any nanocomputing device that is developed must be assessed for its scaling potential, power dissipation, speed, operating temperature, internal gain, technological, and/or architectural compatibility with CMOS.6 For a broad overview of developments in nanoelectronic devices, Chen A., Hutchby, J., Zhirnov, V., & Bourianoff, G. (Eds) 2014 Emerging nanoelectronic devices55 is highly recommended. Similarly, for an overview and gap analysis of nanoelectronic research activities in U.S.A., Europe and Japan, Galatsis K. et al. “Nanoelectronic Research Gaps and Recommendations: A report from the International Planning Working Group on Nanoelectronics”8 is also suggested. Finally, the ITRS, 2015 International Roadmap for Semiconductors 2.0 2015 Edition11 is highly recommended for an overview of the technologies, integration issues, technological challenges and industry drivers. Using these as three preliminary sources, additional searching is recommended on nanocomputing, nanoscale computing devices, nanoscale semiconductors and nanoelectronics.

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4.2.1 Top Topics The top topics in the nanocomputing dataset are presented in Figure 16 and show the predominance of the main search terms: nanocomputing and nanomagnetic logic. That being said, an overlap with concepts from the quantum computing field is visible in the map below. Also of interest is the overlap with Spintronics and Reversible Computing, the former having been connected to Nanomagnetic Logic through Beyond CMOS on the original cluster map in Figure 2, while the latter was only connected to Quantum Computing and not to Nanocomputing in any way.

Figure 16 . Nanocomputing Top Topics

Figure 17 presents a cluster map of the top Nanocomputing topics, the majority of which are highly interconnected.

Figure 17. Nanocomputing Cluster Map

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4.2.2 Major Players and Area of Focus Figure 18 presents the top affiliations in the Nanocomputing dataset, the majority of which are from the USA. Only one Canadian affiliation, the Université de Sherbrooke, was in the dataset.

Figure 18. Nanocomputing Top Affiliations

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Figure 19 presents those affiliations with 3 or more publications, along with their areas of focus.

Figure 19. Top Nanocomputing Major Players and Areas of Focus

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4.2.3 Collaboration Networks Figure 20 presents the collaborations amongst the affiliations with a minimum of two publications in the nanocomputing dataset.

 The University of Notre Dame, USA and Technical University Munich, Germany, the top two affiliations in the dataset, are also the top collaborators with 9 co-publications on Nanomagnetic logic. o They also have each collaborated with Polytechnic University of Turin, Italy, one paper was co-published amongst all three, while the other was only shared between Germany and Italy.  Both the University of Notre Dame, USA and Technical University Munich, Germany, have each collaborated with an additional university. o The University of Notre Dame has co-published two articles with Zheijiang University, China on Nanomagnetic logic and Beyond-CMOS computing. o The Technical University Munich has collaborated on one publication with Delft University of Technology, Netherlands, which focuses on Memory and Spintronics.  Brazil has only collaborated internally with three co-publications between UFMG and DISSE on Nanocomputing and Quantum-dot cellular automata.  The University of California, Berkley, has collaborated with Intel Corporation on Nanomagnetic logic.  Harvard University has collaborated with Mitre Corporation on designing a nanoelectronic finite- state machine using nanowire transistor nodes.56

Figure 20. Nanocomputing Affiliation Collaborations

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4.3 Spintronics The spintronics dataset has 562 records between 2013 and 2016. Spintronics (sometimes referred to as magnetoelectronics) is an emerging technology that exploits both the spin (instead of the charge) and the magnetic moment of electrons.1,2,51,57 When an electron is placed in a magnetic field, its spin polarization becomes bistable which can be used to encode the logic bit 0 and 1. The idea of spin-based computing, in which Boolean logic gates are created through interacting electron spins, is the basis of spin-based quantum computing, which is also known as Magnetic Quantum Cellular Automata (MQCA) (and therefore ties back to nanomagnetic logic).

Research on spintronics actually dates back to the 1970’s but saw renewed interest with the discovery of magnetic tunnel junctions (MTJ) and spin torque transfer (STT) devices. MTJ and STT devices provide potential avenues for replacing CMOS technology with spin-based integrated circuits such as magnetic (or magnetoresistive) random access memory (MRAM) and spin transistors.2 An MTJ is created when two conducting electrodes of ferromagnetic material are separated by a thin dielectric layer (insulator or tunnel barrier layer) through which electrons can tunnel, resulting in electrical conduction (represented by Figure 2158). Each of the ferromagnetic electrode layers act as either a storage layer or a reference layer. The electric current that tunnels between them consists of two partial currents, each with either a spin-up or spin-down electron. Like with the NML, there are two types of MTJs, perpendicular magnetic anisotropy and in-plane shape anisotropy. MTJ have high resistance differences at room temperature and have found important application in modern hard drive read heads and MRAMs. MTJs are easily integrated with CMOS devices and have fast, low power data access making them suitable, and highly researched, for both memory and ultra-low power logic computing.59,1,2

Figure 21. Schematic of Magnetic Tunnel Junction

In an MTJ, when the tunneling current passes through the barrier layer it becomes spin polarized and thus generates a torque, referred to as spin torque.“Depending on the direction of the tunneling current, the effect of the spin torque is to switch the storage layer magnetization to be either parallel or antiparallel to the magnetization of the reference layer. Instead of using a magnetic field, spin torque can be used to switch the magnetic moment direction in MRAM memory elements by directly injecting the current through the MTJ”59 (the parallel or antiparallel magnetization is reflected by the direction of the two white arrows in Figure 21).Spin transfer torque (STT) is viewed as one of the most promising breakthroughs for spin-based circuits and switching mechanisms in particular. It provides high power efficiency and fast writing speeds and simplified the CMOS switching circuit. Despite these advantages, STT switching is normally stochastic due to thermal fluctuations in the magnetization and results in reliability issues.1,2

Magnetic random access memory (MRAM), which is based on using the direction of magnetization to store information and mangnetoresistance as information readout, can be designed using either MTJs or

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STT (STT-MRAM) and is a major promising candidate for next-generation memory. MRAM and STT- MRAM are non-volatile, have unlimited high-speed reading/writing endurance, operate at high speed with low voltage, have comparable densities to CMOS and 3D integration which shortens the data traffic between the processor and main memories. In fact, non-volatility (i.e. the “ability to preserve the result of computation without an external power source”51) is one of the most important features of spintronic devices as it allows the power-off of the whole system in standby state with no static power consumption. STT-MRAM in particular has been recommended for additional R&D by the ITRS and is expected to be commercialized and widely used within a 5-10 year timeframe as such issues as controlling the resistance uniformity, switching behavior and integration with CMOS are resolved. Research will also need to continue on the introduction of novel materials such as graphene and molecular spintronics.1,2,45,51,57,60

Moving on from memory devices to logic devices, there are two general approaches to developing spintronic logic devices including spin transistors and using spin as a logic state variable. Spin transistors, which originated in 1990, enable low power consumption and higher functional throughput than scaled CMOS. There are two types of spin transistors that can be classified as either spin-FET or spin-MOSFET (with several variations of the latter using organic materials, graphene or hybrid schemes combining MOSFET with MTJ). The second, more radical approach to spintronic logic devices assigns logic 0 and 1 to the polarization of a single spin in a magnetic field, and presents additional capabilities beyond conventional FET devices. Because spin logic is susceptible to the same challenges as electron logic, i.e. high sensitivity to structure imperfections and thermal fluctuations, research has been exploring the collective states of a large number of coupled spins (i.e. nanomagnetic logic) which would be more immune to noise and has the advantage of being non-volatile.51

Table 4 presents an overview of major spintronic devices.7 Those not touched on earlier will be described in more detail below.

Table 4. Overview of Major Spintronic Devices

Device name Acronym Input Control Int. state Output subclass SpinFET (Sughara-Tanaka) SpinFET V Vg, Vm Q M V Spin drift Spin torque domain wall STT/DW I V M I Domain wall Spintronic majority gate SMG M V M M Domain wall Spin torque triad STTtriad I V M I Nanomagnet Spin torque oscillator STOlogic I V M I Nanomagnet All spin logic device ASLD M V M M Spin diffusion Spin wave device SWD M I or V M M Spin wave Nanomagnetic logic NML M B or V M M Nanomagnet

Spin Torque Domain wall Domain wall in ferromagnetic nanowires is a candidate for next generation non- volatile memory. Racetrack memory is a 3D device in which magnetic domains are used to store information in tall columns of ferromagnetic nanowires (i.e. racetracks). Magnetic domain walls (DW) are interfaces or boundaries that separate the different magnetization directions along a racetrack. A highly spin-polarized current passes through the DW applying a torque to the moments in the DW, thus shifting it along the racetrack. The DWs are read by an MTJ magnetoresistive sensing device and can be written to using the spin transfer torque effect.61,62 A U-shaped nanowire configuration normal to the plane of the substrate offers ultra-high storage density, low power operation, and CMOS integration,2

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while DW motion in magnetic nanowires has been used in various configurations to design non-volatile logic gates. Critical challenges for DW logic gates include their low speed and management of power dissipation from the magnetic field generation when integrated in advanced CMOS circuits.1

Spin Majority gate Spin logic devices have been used to create majority gates, which are devices with a large number of inputs, outputs and a certain number of control gates. There are a variety of spintronic majority gates being researched, including those using plasmons and phonons, those using all spin logic and nanomagnets as well as spin torque majority gates (STMG) and spin wave majority gates (SWMG). The latter two are compared62 in Table 5.

Table 5. Comparison of Spin Torque and Spin Wave Majority Gates

Spin Torque Majority Gate Spin Wave Majority Gate Physics principle Domain wall motion/exchange Interference of spin waves Write Spin transfer torque/MTJ Magnetoelectric element Read Tunnel magneto-resistance Magnetoelectric element Non-volatile Could be Could be Scalability Scalable Not clear how far Multiplexing Unlikely Proposals exist Inverter Proposal exists but difficult Proposals exist Cascading Non-trivial Proposals exist Materials Comparable to MRAM Piezoelectrics and magnetostrictives Experimental demo N/A Full demo not available but components are

As shown in the table above, no full experimental demonstrations have been shown for either STMG or SWMG. Challenges with the STMG include experimentally producing the inverters, cascading the device, and long delays making them less efficient than equivalent CMOS. As for SWMG, the required materials are very different from current technologies adding to the challenges in developing the device. Both ultimately require further advances to improve their performance.62

Spin Torque Triad A spin torque triad (STTtriad) is similar to spin majority gates, however it consists of triangular structures with two inputs and one output. The current within one triangle drives the spin torque switching in the other triangles, resulting in an electrical-to-spin conversion rather than cascading magnetic signals.7

All-Spin Wave Logic All-spin logic devices (ASLDs) use nanomagnets as digital spin capacitors to store data bit information and spin currents to communicate. When voltage is applied to the nanomagnets, a diffusion spin current occurs and exerts torque on the nanomagnets, allowing the spin to switch its polarization. The nanomagnets are often arranged into spin majority logic gates. ASLD are considered compact and complete because no MOS transistor is needed and the logic functions can be constructed with a minimal set of Boolean logic gates. Additionally, such a configuration is expected to have extremely low switching dynamic power consumption and energy-delay. ASLD are analog and can be coupled with median functions to create functionality-enhanced ASL (FEASL) or bio-mimetic systems to create low- power, low-delay and lower-area circuits. Two recent advances include the “demonstration of spin injection into metal and semiconductors from magnetic contacts and the switching of a second magnet

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by the injected spins”.11 Challenges include proper choice of channel material and functionality at room temperature.2,7,11,51

Spin Wave Device Spin Wave Devices (SWD) are a type of magnetic logic that uses the collective spin oscillation (spin waves) for information transmission and processing. 51 The basic idea of spin wave logic is to use magnetic films as a spin conduit of wave propagation, referred to as spin wave bus, where the information can be coded into a phase or amplitude of the propagating spin wave. In SW logic devices, data can be encoded as volatile or non-volatile using Boolean and non-Boolean gates and single- or multi-frequency circuits.1,11 The key advantages of spin wave logic are that: (a) information transmission is accomplished without any electrical charge transfer, which can greatly benefit dynamic power economization; (b) spin waves with different frequencies can be transmitted simultaneously among a number of spin-based devices; and (c) interactions between spin waves and outside devices can also be done in a wireless manner via a magnetic field [Khitun et al. 2008].

Spin wave-based logic architecture shows great potential advantage for future implementation. Recent experimental demonstrations have shown spin wave excitation and detection using synthetic multiferroic elements.51 Expected advantages include:

 Ability to use phase and amplitude for building logic devices with smaller number of elements than transistor based approaches;  Parallel data processing on multiple frequencies;  Complement CMOS in specific tasks such as image processing;  Resolve the problem of interconnections;  Enhance architecture computing abilities;  Readily amenable to cascading.1,7,51

However, at this stage, many obstacles must still be overcome. Major challenges exist with creating energetically efficient spin wave excitation and detection, faster attenuation time, spin wave , additional power requirements for data amplification, and CMOS compatibility.1,51 One of the most critical issues of spin wave utilization is the relatively low spin wave phase velocity. Another intrinsic problem is the spin wave amplitude decay, mainly because of the scattering on phonons. These challenges highlight that future increases in integration density will result in increased signal propagation time (latency) and substantial signal losses (reliability) at a level much higher than we may have for spin waves. Therefore, defect tolerance and noise immunity are additional critical challenges for spin wave logic circuits. The success of the spin wave logic device will also depend on the ability to restore/amplify spin waves. All these problems remain open and should be addressed before this device can be practically used in industry.2

Other Spin-Based Logic Devices and Circuits A few other spin based devices worth mentioning include:

 3D magnetic ratchets – moves from 2D to 3D architecture thus enhancing density and power consumption. Shifts magnetic kink solitons from one magnetic layer to another and is transistor- less. While this approach offers a direction for 3D microchips in the future, the technology is far from that stage due to technical challenges such as variation in magnetic layers, dipole fields, data retention lifetime, and the reading and writing of solitons.2

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 Hybrid Spintronics and Straintronics – uses two-phase composite multiferroics made of piezoelectric and magnetoresistive materials. Stress is created as an electric field is passed over the piezoelectric material which causes a magnetization of the magnetoelastic. Both materials may be independently optimized to work at room temperature, have more local magnetization control. The two-phase electromagnetic coupling is significantly stronger than the single-phase counterpart, leading to potential resolution of the shortcomings in nanomagnetic logic circuits. Research is expected to continue to advance on the use of multiferroics for magnetization switching, including validating the ultra-low power dissipation and fast switching estimates.51

Figure 22 presents the ITRS 2015 benchmark of emerging logic devices9 including electronic, spin toque and magnetoelectric devices in terms of their energy and delay.

Figure 22. Benchmarking of Emerging Logic Devices

Table 6 compares many of the aforementioned spintronic devices for application in different computing systems or logic circuits1 and shows that MTJ, domain wall and memristor devices have the broadest applicability. For details on the various logic circuits in the table please see Zhang et al, 20141 and Kang et al., 2015.2

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Table 6. Comparison of Spintronics Devices for Various Logic Systems

Dynamic Spin- All Magnetic Normally- Logic-in- Nanomagnetic reconfigurable wave spin threshold off Memory logic logic logic logic logic Neuromorphic MTJ      Domain wall     SpinFET    Nanomagnet   3D ratchet  Spin wave    Memristor    

A similar, though more detailed, comparison of various emerging logic devices63 is provided in Table 7.

Table 7. Comparison of Emerging Logic Devices

Spin Wave Nanomagnetic Spin Torque Devices Logic Excitonic FET BiSFET Majority Gate All Spin Logic State Magnetization Magnetization Excitonic insulator Above (off) or Spin wave Spin Variable in the off-state. below (on) frequency magnetization Conventional superfluid critical conductor in the voltage on-state Function MAJ, NOT, Boolean enables Boolean logic- Performs the nonlinear MOD transition from the gate adjust value majority logic ‘conventional’ of BiSFET critical gate operation device on-state voltage, i.e., via phase into the excitonic switching locking of spin insulating state by threshold; first torque tuning the electron series device to oscillators with and hole density to reach critical a common become identical voltage turns off ferromagnetic under clocked nanowire free power supply layer spin wave bus Class- Adders, Majority Gate Steep Ultra-low Majority gate Median Example counters, subthreshold slope voltage/power Function special task device Boolean logic logic units (e.g. gates image processing) Architecture Systolic, non- Systolic/ Conventional CMOS-like with Systolic Morphic volatile pipelined CMOS clocked power supply, additional pipelining capabilities Application Boolean and Low power, non- Device for low- Low power, high Majority logic General Non-Boolean volatile power applications speed, general gate operation purpose/ logic radiation hard purpose logic with spin waves Non-volatile/ Reconfigurable logic

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Spin Wave Nanomagnetic Spin Torque Devices Logic Excitonic FET BiSFET Majority Gate All Spin Logic Paired Ferromagnetic NML device and TBD Conventional Spin wave Spin current Interconnect waveguides interconnect are charge based (e.g. NiFe) interchangeable Comments Allows for Compatible While drag has Potential ~10 Development of High speed, low parallel data memory been observed and zepto-joule this device will power and zero processing on technology: excitons have been switching leverage the standby power multiple MRAM detected in energies; 4- spin wave frequencies systems with phase clocked device (each frequency spatially separated power supply development as a distinct channels, the effort because information transition to an spin torque channel) excitonic insulator provides has not been energy-efficient observed. excitation of spin waves

Status Room Feasibility, Experimental work Simulated, with Phase locking of Simulation/ temperature, CMOS to create this experiments on two spin torque some low GHz frequency compatible device is ongoing going oscillators via temperature operating clocking spin waves in experiments prototypes experimentally the common have been demonstrated free layer is demonstrated demonstrated Material Integration of MRAM/CMOS We believe that Low defect NiFe, Cu, Ru, (a)Spin coherent issues multiferroic compatible graphene is ideally paired graphene IrMn, CoFe, channels with elements with suited for this layers and MgO, CoFeB, Ta reduced spin wave application compatible low-k electromigration buses (e.g., because of the dielectrics, low (b)Magnets with PZT/Ni/NiFe) symmetry of the resistance high anisotropy electron and hole contacts for low energy dispersion operation

It has been argued that MTJ-based STT logic gates are the most mature technological option for spin- based logic applications due to their good power, reliability, and speed capabilities. Some suggest that these components will be used in the near future for commercial logic computing and that over the long term, spin transistors and spin injection in graphene have high potential for building an all-spin processing system.2 That being said, it has similarly been argued that spin-based logic circuitry is still in its infancy and that it will more likely only complement CMOS in specific data processing tasks, rather than replace CMOS circuitry.51 To date, spintronic devices have been applied in Biocomputing, optical computing and quantum computing applications. More specifically, spin torque nano-oscillators and spintronic memristors, have been suggested for application in neuromorphic systems64,65 while spin waves have been used to perform optically inspired non-Boolean computing algorithms66 and quantum- dot spins have been tested with hypertangled photon pairs and optical-microcavities to perform quantum computations.67

For more detail on any of these technologies, and others not reviewed here, Nikonov and Yang, 20137 and Kang, Zhang, Wang et al., 20152 are recommended as excellent resources.

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4.3.1 Top topics The top topics in the spintronics dataset are presented in Figure 23. This figure shows the predominance of Quantum computing which, in the context of this dataset, is a subfield of spintronics focused on the application of electron and nuclear spins to quantum information processing and quantum computation.68

Figure 23. Spintronics Top Topics

Figure 24 presents a cluster map of the top Spintronics topics. Again, there is a dominance of quantum computing topics, but biocomputing and neuromorphic computing can also be seen on the map.

Figure 24. Spintronics Cluster Map

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4.3.2 Major Players and Area of Focus Figure 25 presents the top affiliations in the Spintronics dataset.

Figure 25. Spintronics Top Affiliations

There is a fairly even distribution of nations in the top affiliations list, however these do not completely reflect the overall global distribution of the data in the spintronics set. As such, Figure 26 is presented to show the number of publications coming from the top countries. Canada ranks 10th with 20 publications and is ahead of Netherlands which appears in the top affiliation map. Canada has 12 institutions working in the field. It’s most prolific institution is the University of Waterloo with five publications.

Figure 26. Spintronics Geographic Distribution of Publications

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Figure 27 presents the top affiliations with nine or more publications and their areas of focus. A more complete list of affiliations and areas of focus is available in the Tableau workbook.

Figure 27. Spintronics Major Players and Areas of Focus

4.3.3 Collaboration Networks The collaboration map for the Spintronics dataset is based on affiliations with a minimum of eight publications. Figure 28 shows three main clusters and excludes all those with less than 2 collaborative publications.  The red cluster shows the most connected and frequent collaborators, including the University of New South Wales, Australia and University of Melbourne, Australia who have nine collaborative papers between them and two of the same other collaborators each. o The nine Australian collaborations are focused on quantum computing and on silicon. o Four of the nine Australian collaborations included the University of Purdue, while three include the University College London, UK, one of these publications included all four affiliations.  Purdue University, USA has also collaborated with Intel Corp. USA on two publications related to Domain wall and Spintronics.  Purdue also has two publications with the University of Central Florida, USA on Spin transfer torque and Non-boolean computing.  In the green cluster, the National Institute of Informatics, Japan and Stanford University, USA has collaborated on four publications on Electron spin and Quantum computing.  The CNRS, France has six collaborations with Universite Paris-Sud (Paris XI), France on Magnetic tunnel junction and Spin transfer torque.  Universite Paris-Sud (Paris XI), France and Beihang University, China has four collaborations on Magnetic tunnel junction.  Universite Paris-Sud (Paris XI), France also has four papers with Northwestern University, USA on Spintronics in general.

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Figure 28. Spintronics Affiliation Collaboration

The 12 Canadian institutes in the dataset have collaborated with 38 other institutions (but not enough to show up in the map).

 University of British Columbia has collaborated twice with the State University of New York at Stony Brook on Quantum computing topics related to spintronics.  Simon Fraser University has co-published two papers with the University College London, UK and Keio University, Japan on Quantum computing topics related to spintronics.  Wilfrid Laurier University has collaborated with the University Carlos III of Madrid, Spain on two papers related to Quantum computing and Rashba spin-orbit coupling.

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4.4 Optical/Photonic Computing The Optical/Photonic Computing dataset has 1,403 publications between 2013 and 2016. Optical computing uses light, or , rather than electricity or electrons, to perform computational tasks. While optical/photonic computing, or “all-optical computing”, would ultimately be a complete replacement of electronic components with optical components,69 this has yet to occur and most research has focused on the development of individual optical components to work in tandem with electronic components. Photonic elements such as light sources, modulators, optical routers, photonic /transistors, couplers and logic gates can be regarded as optical analogies of electronic elements, but require careful design, construction and materials to overcome the fundamental differences in principles and structures between electrons and photons.70 That being said, replacing on-chip electronic resources with optical components has great potential due to the low latency and high bandwidth of light propagation. The more data transfer that occurs optically rather than electronically, the faster the computer can process information, particularly without various electrical-loss, electrical noise and crosstalk issues.71,3 All-optical signal processing also has a high potential to overcome the bandwidth and speed limits of electronic circuits, with processing bandwidths up to several Terahertz.69

Various optoelectronic integrated computing components exist on the market including Intel’s Thunderbold, IBM’s signal routing chip, and Luxtera and Infinera’s optoelectronic integrated circuits, to name just a cursory few.3,71 Some recent accomplishments in the academic literature include the development of photonic circuits for Wavelength Division Multiplexing (WDM), non-volatile photonic memory and all-optical logic gates, each of which will now be briefly described.

When optical components are coupled with a WDM device, new opportunities emerge for parallel computation as multiple signals can be managed at the same time.72 In fact, optoelectronic or photonic circuits for WDM, either through arrayed-waveguide gratings or variable optical attenuators, have been the first optoelectronic integrated circuits created, however the technology still lacks maturity.71 Recently, one of the more elusive goals of photonic computing, the development of on-chip non-volatile photonic memory, has been developed and offers the potential to replace previous volatile photonic memory devices. The non-volatile photonic memory uses innovative phase-change materials and eliminates the need to convert optical signals into electrical signals for data storage and then back again for data transmission.71,73 Ultra-compact linear all-optical logic gates, which are essentially highly developed kinds of optical switches, have theoretically been realized as a result of nanophotonic fabrication and the compact, low-loss nature of waveguide structures, making them ideal candidates for building ultra-fast optical integrated circuits or for integration with other silicon based photonic integrated circuits.74

A 2014 technology map of business opportunities for commercializing in the optoelectronics/photonics industry reported on the success of small-scale optical backplanes implemented in mainframe systems. This success was viewed as a useful stepping stone in the development of optoelectronic integrated circuits, planar waveguides and modulators, and the eventual implementation of optical-interconnect technologies at a chip-to-chip level. While the timeline for these advances was seen as difficult to predict, it did identify emerging opportunities over the next 5-10 years, as depicted in Figure 29.71

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Figure 29. Emerging Opportunities in Optical Data Processing

Two specific subdomains in optical/photonic computing, namely silicon photonics and nanophotonics, both of which have commercial potential, will now be reviewed. These particular technologies were selected since they are the subject of significant efforts and are the most likely candidates to support the implementation of optical computing.

Silicon Photonics Recently, silicon photonics has seen a significant increase in research. Silicon is a major candidate material for implementing integrated photonics as it supports the creation of compact nanowires for guiding light on-chip and facilitates integration with silicon based electronics.72 In general, combining silicon with integrated photonic devices takes advantage of the availability of large wafers, ease of handling and thermal cycling, high volume throughput and cost reduction of silicon manufacturing for photonic devices.72,75,76 Furthermore, it offers orders of magnitude improvement in bandwidth, latency, reliability and power-efficiency.77 As compared to III-V semiconductors, which are also useful for optoelectronics, silicon has many advantages, including:

 More compact optical waveguides;  Lower optical propagation loss;  Better processing yield;  Low cost;  Greater compatibility with CMOS electronics. 76

Silicon-on-insulator (SOI) has become the benchmark platform for silicon photonics and is a mature technology that has seen many devices and photonic integrated circuits implemented on it due to its

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highly accurate, robust, high yield, reproducible nature.76,d A 2014 MarketandMarkets report on SOI projected that the market value would reach $2145.1 million USD by 2020, representing a compound annual growth rate of 18.9% from 2014-2020.78

Despite this projected growth, there are still some long-known shortcomings of silicon based integrated photonics that will continue to need research and advancement. For instance, not all optical functionalities can be satisfactorily achieved on SOIs. Challenges in optical absorption, extinction ratios of modulators, loss of oxide layers, optical nonlinearity, lasing in bulk silicon, and the feasibility of electrically-injected at room temperature persist (please see Fathpour, 2015 for details).76 Furthermore, while silicon is a good material for passive photonics, it is notoriously bad for light emission and requires the integration of additional materials for the use of sources and detectors.72 III-V lasers and germanium are often used in combination with silicon as a modulator, but the trade-off between modulation bandwidth and depth remains a challenge. Thin films have also been integrated into SOI and present a potential opportunity given that they “possess strong second-order optical nonlinearity and may enable compact chips for entangled photon generation and other quantum-optic-related applications”.76

Heterogeneously merging different materials, technologies and waveguide platforms, each for different purposes, appears to be the path towards photonic integrated circuits. “…heterogeneous technologies, that combine group IV and III–V semiconductors, and perhaps LiNbO3 and other materials such as nitride semiconductors and high index dielectrics, will most likely dominate integrated optoelectronics”.76 These heterogeneous-silicon photonic integrated circuits have several advantages including:

 Reduced cost due to economy of scale;  Better performing devices than those using only III-V materials;  Low power;  High capacity, volume, yield and reliability;  Introduction of nonlinearities and magnetic properties;  Suitability for reliable active photonic devices such as lasers, modulators and photodetectors.75

The challenge of designing integrated silicon photonic devices is actively being pursued by both industry and academia. CMOS-compatible photonic devices such as micro-ring resonators, photodetectors, waveguides, network-on-chip (NoC) architectures and 3D architectures are all being researched. In particular, dense wavelength division multiplexing (DWDM), which processes multiple wavelengths of light in a waveguide at once, is the backbone of photonic NoC (PNoC) architectures. To improve performance, multi-layered or 3D-PNoC implementations are being explored. Some of the challenges with PNoC include:  network resource contention;  intrinsic cross-talk, temperature sensitivity and power-loss in the microring modulators;  the need for tight integration of intra-chip PNoCs with interchip photonic links;  the need for robust CAD tools to design, optimize and test chips with disparate technologies.

d For a review of various silicon-photonic platforms please see Fathour S. Emerging heterogeneous integrated photonic platforms on silicon. Nanophotonics. 2015;4:143-164.

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The use of so many different materials for the range of different photonic applications highlights the fact that no fully integrated photonic system that can satisfy the range of needs (including choice of wavelength, efficient light emission and detection, large electro-optical coefficient, strong optical nonlinear properties, ease of fabrication, integrability, scalability, reliability, inexpensiveness etc.) has been developed to date.76 Despite these challenges, it seems that researchers are accepting the drawbacks of hybridization and that heterogeneous silicon photonics is the best known approach for the foreseeable future.75,76 Furthermore, photonics continues to have the potential to play a significant role in future computing by allowing high bandwidth and low-latency transfers between the processing chips and main memory, thereby helping to alleviate main memory bottlenecks.77

Nanophotonics Nanophotonics, which combines nanocomputing and photonics research, offers a potential alternative opportunity to overcome the fundamental limitations of both electronic and regular photonic circuits. In practice, light confinement is limited by losses in the structure. However, when working with metallic nanophotonics, the diffraction limit is a matter of optimization as the losses in metal can be managed through engineering. This makes nanophotonics a clear frontrunner for on-chip applications. By working with light at the nanoscale, new science and technological advances are expected and provide a great opportunity for dense optical integrated circuits which have the potential to overcome challenges related to bandwidth and energy dissipation in electronic IC.79 1-Dimensional nanomaterials such as nanowires, and in particular nanowire heterojunctions, have been especially useful in the nanophotonics domain as they have shown promise in manipulating optical signals in nanoscale devices as well as advanced performance capabilities.3,70

To date, many different photonic devices have been realized with nanomaterials, including light generators, waveguides, modulators and detectors. The challenge for creating integrated nanophotonics is that each of these devices has separate requirements that need to be met for optimal performance and integration. The exact structural features, geometric characteristics, surface morphologies, and material compositions are all critical to proper photonic functioning and still need further study. Specific challenges for nanophotonic waveguides, for example, are the loss-versus- confinement trade-off that needs to be managed through the development of new materials. The major challenges for nano-modulators lie in their geometries along with the outstanding need to more completely characterize the various extinction ratios, propagation and coupling losses, speeds and energy consumption rates of the different possible geometries. Additionally, compatibility with standard CMOS technology is needed to allow for low-cost mass production of nanophotonic devices.70,3

As the major challenges of nanophotonics, namely matching the material and architecture to the function, are overcome, fascinating new opportunities will emerge. While nanophotonics research was initially motivated by optoelectronic integration, novel nanostructures are paving the way for on-chip all-optical isolation. By slowing down light in waveguides and confining it in optical nanocavities, optical memories can be created and light switching can be enhanced. Hybrid nanophotonic systems have the potential to couple electron spin with light, which can support the development of integrated quantum nanophotonic networks.79

Plasmonics is a branch of nanophotonics that focuses on the exploitation of surface plasmon polaritons (SPPs) in metal nanostructures and represents one of the best potential ways to build optical circuits that overcome the speed limits of electronics.80,81 SPPs are the coupling of electromagnetic waves to the motion (or the charge oscillation) of free electrons at the interface of a metallic and a dielectric

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material. SPPs can pass the diffraction limits of light by confining and guiding light at nanoscales that are significantly smaller than the wavelengths of light.3,81 This is an advantage over current optical devices which are limited in terms of miniaturization and integration into photonic chips because their dimensions are larger than their working wavelength.70 offers a synergy of electronics and photonics as it has the dimensions of electronics and speed of photonics thus acting as a bridge between similar speed dielectric photonics and similar-sized nanoelectronic devices (see Figure 3082 below).

Figure 30. Synergies of Speed and Size of Nanoplasmonic Chips

SPP waveguide detectors have been used as an interface between electronic and plasmonic circuits. In particular, metallic nanowire plasmonic waveguides have been used to carry optical signals and electric currents through the same circuitry.81 While SPPs enable fabrication of optical signal processing devices at sub-wavelength scales, this is done at the cost of losses that make the nanostructures extremely difficult to work with in current devices.3,81 As such, compensating for these losses are of current research interest, with hybrid dielectric-metallic systems as one proposed solution.70

Various metallic nanostructures have been tested to support SPP use in nanophotonic devices including nanoparticle chains, nanogaps, thin metal films, metal slits, grooves, nanowires, and sharp metal wedges.81 Overall, enough plasmonic components have been developed that support the conviction that an entire plasmonic chip should be available in the near future. Successfully demonstrated components include plasmonic waveguide-based nanochip, plasmon nanolasers, plasmonic gates, plasmonic tri-state gates, plamonic switches, repeaters and detectors, plasmonic-based logic operations in nanowire heterojunctions, control of plasmon propagation in graphene and plasmonic heat-assisted magnetic recording for data storage.70,79,81 Attaining the goal of a fully functional plasmonic chip still faces challenges related to propagation and energy losses, power compensation, efficient coupling, integration and fabrication.81

Following from the plasmonic ability to guide and localize light at sub-wavelength scales, optical metamaterials have been synthesized. These three-dimensional metamaterials are artificially engineered materials that have novel, not found in nature, optical properties resulting from collections of resonant nanoscale plasmonic scattering. Using metamaterials in nanophotonic devices provides a high level of control over all properties of light. Two-dimensional metamaterials, planarized, ultrathin, patterned artificial surfaces known as metasurfaces, avoid the absorption losses by light propagation that occur in the third dimension and move the technology towards integration and large area fabrication. “[M]etasurfaces and metamaterials can operate as all-optical circuitry, processing the

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impinging signals at the nanoscale with nanocircuit elements that may form thin metasurfaces acting as complex operators. These concepts may lead to all-analog filtering, signal processing, and even computing functionalities performed as light interacts with these devices”.79

Metasurfaces offer exciting potential for nanophotonic computing research. When plasmonic metasurfaces are coupled with inter-sub-band transitions in semiconductors, giant nonlinear responses have been observed. This is a notable advantage over natural materials which typically have weak nonlinear optical responses, and is a critical component for successful optoelectronic integration. Future research in nanophotonic metasurfaces will likely explore dynamically tunable integrated photonics, the use of electrically tunable metasurfaces to steer and multiplex light on a chip as well as how metatronic optical signal processing and computing circuits can be built.79

Another opportunity in nanophotonic computing is the use of photons or plasmons to create quantum computers, given that light exhibits quantum features at room temperature. At the nanoscale, it is possible to control light to the level of illuminating a single molecule with a single photon. With the discovery of the boson sampling algorithm, it has become possible to generate quantum states that could not be efficiently computed using conventional machines. Advantages of quantum light are its reduced noise compared to classical optics and its strong correlations, particularly quantum entanglements, which are stronger than those possible between classical light beams. Using photonics in quantum computers is very advantageous due to the large information capacity per photon, very robust dephasing of superposition states and the ability to move photons over very long distances. Recent research has focused on the extension of nonlinear optics to single-photons which opens the door for integrated quantum circuits based on single photons in which plasmons and emitters take on the role of information carriers and processors. Such a device would offer the potential for single- photon transistors and quantum-logic gates.79,83

While it is known that an all-photonic quantum computer is possible in principle, there are still numerous challenges that are being researched. For instance, photons do not interact strongly with each other, making deterministic quantum operations difficult to build. Additionally, photons can be lost, along with the information they are carrying, because they are easily absorbed and scattered when they reach a receiver. Unlike in conventional optical computing, which can use an amplifier to reduce loss, the amplifiers corrupt the quantum aspects of the signal.83 Ultimately, “[T]he goal of building a quantum computer using light remains a grand challenge, because the probabilistic nature of quantum operations and the imperfections leading to photon loss demand a tremendous overhead to ensure fault tolerance” 83, and as such, hybrid technologies will likely be the first step for information processing machines.

The field of integrated computational devices, and in particular nanophotonic circuits, is still largely under development. For the near future, it is predicted that reaching the goal of integrated nanophotonic circuits will still require the effective use of electronic, photonic and plasmonic technologies. By combining all three, each may compensate for the weaknesses of the other (i.e., “the losses in plasmonics with photonics, the size of photonics with plasmonics, and the interface to the outside world with electronics”).3 A roadmap for the development of nanophotonic devices to 2020, produced by the Nanophotonics Europe Association (NEA) in 2012, is available in Appendix C.

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4.4.1 Top Topics The top topics in the Optical/Photonic Computing dataset are presented in Figure 31 and show the predominance of Quantum computing, Silicon photonics, and the high correlation with Nanotechnologies.

Figure 31. Optical/Photonic Computing Top Topics

Figure 32 presents a cluster map of an extended group of top topics in the Optical/Photonic Computing dataset. Here we see a clear subset of research on silicon photonics (green), quantum computing (purple) and nanophotonics (yellow). Many of the individual component parts that fit into optical computing systems also show up on the map, e.g. optical resonators, optical switches, optical interconnects, multiplexers, etc.

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Figure 32. Optophotonic Cluster Map

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4.4.2 Major players and Area of Focus Figure 33 presents the top affiliation in the Optical/Photonic Computing dataset.

Figure 33. Optical/Photonic Computing Top Affiliations

Figure 34 shows the number of publications in the top 20 countries. Canada ranks 6th, with 72 publications and 33 institutions working in the field.

Figure 34. Geographic Distribution of Optical/Photonic Computing Publications

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Canada’s most prolific institutions include:

 University of Waterloo (14);  University of Toronto (11);  University of British Columbia (10);  University of Ottawa (7);  University of Calgary (6);  D-Wave Systems Inc, National Research Council and Simon Fraser University, all with five publications.

Figure 35 presents the areas of focus for the top affiliations.

Figure 35. Optical/Photonic Computing Major Players and Areas of Focus

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4.4.3 Collaboration Networks Figure 36 presents the collaboration networks in the field of optical/photonics computing. There are very few interconnections and only a few collaborations. The majority of those with 10 or more publications have only 1 co-publication with the others in this group. While this figure maps those with 2 or more co-publications, only a few have at least three including:

 Macquarie University and Sydney University Australia (4) on silicon photonics, quantum computing, and photonic integrated circuits;  Chinese Academy of Sciences and Tsinghua University (3) on resonators and photonic integrated circuits;  University of Oxford and National University of Singapore (6) on quantum computing;  University of Oxford and University of Southhampton (3) on quantum computing and photonic integrated circuits;  National University Singapore and MIT (3) on quantum computing.

Figure 36. Optical/Photonic Computing Affiliation Collaboration Map

An additional collaborative project which was not included in the dataset but might still be of interest is the 2015-2019 EU Photonic REServoir COmputing (PHRESCO) project which is coordinated by the Catholic University of Leuven, Belgium and includes the University of Ghent, Belgium, IBM Research GMBH, Switzerland, Centralesupelec, France and the Leibniz Institute for Innovative Microelectronics,

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Germany and whose objective is to bring photonic reservoir computing to the next level of maturity by designing a new all-optical reservoir computing chip.84

Figure 37 presents the collaborations of the top Canadian collaborators, which were not shown in Figure 36 due to their (or their collaborator’s) low overall publication map. Six collaboration networks can be seen including:

 University of Calgary (2) with the Chinese Academy of Sciences, Hefei University of Technology, China and the Canadian Institute for Advanced Research on quantum computing;  University of Ottawa (2) with the University of the Algarve, Portugal and University of the Balearic Islands, Spain on Optoelectronics and modulators;  University of Toronto with Oak Ridge National Laboratory, USA and University of Tennessee at Knoxville, USA (2) on logic gates, nonlinear optics and quantum computing, one of which was co- published with QKD Corp, Canada;  Simon Fraser University and D-Wave Systems Inc, Canada (2) on quantum computing;  University of British Columbia with Mentor Graphic Corp., USA and Lumerical Solutions Inc., Canada (3) on silicon photonics and photonic integrated circuits;  University of Waterloo and University of Ulm, Germany (2) on quantum computing.

Figure 37. Optical/Photonic Computing Canadian Collaboration Map

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5 CONCLUSIONS

While approaching the limits of Moore’s Law may be viewed as a challenge or pending crisis by some, for those researchers who are looking beyond CMOS, it is a very exciting time. Numerous opportunities are being explored by academia and industry. Four fascinating avenues toward the next generation of computing were reviewed in this scientometric study, each with their own opportunities and challenges. While developments and advancements are occurring rapidly in each field, none are advanced enough to provide an obvious answer to the question of what will be the next generation computing paradigm post-Moore’s law. For most, the current state of the art as yet only provides a complement to existing technology as much of the research is still focused on replacing on-chip electronic parts with new technologies rather than on the integration of all parts into a fully functional non-CMOS device. Ultimately, more research is needed in each in order to both advance the technology to the point of replacing CMOS and in order to determine the best way forward.

In terms of the sub-domains in biocomputing, there is continued debate as to the potential for DNA computing to replace traditional computing. While some suggest molecular computing can compete with electronic computing, others foresee a DNA co-processor that uses silicon for normal processing and DNA for computational hard problems. In regards to neuromorphic computing, challenges in understanding and mimicking human brain functionality mean that neuromorphic computing does not yet provide a notable advantage over conventional computing architectures. While there is potential for neuromorphic computing to ultimately reshape the computing industry, market analysts view neuromorphic systems as being at a very early prototype stage and forecast that fully functional complete neuromorphic chips will only hit the market after 7-8 years.

The nanocomputing subset was the smallest in the study but numerous nanoscale devices were part of the other three topics. While on the one hand additional searching is recommended to increase the size of this set (on such terms as nanoscale, nanophotonics and nanoelectronics, coupled with relevant computing technology terms), a reclassification of (and additional searching on) the now known nanoscale devices into the nanocomputing dataset would also have a dramatic impact on the results for this set. According to the ITRS, various emerging nanocomputing memory devices show promise, including spin transfer torque magnetic random-access memory (STT-MRAM), conductive-bridge RAM, Oxid-based ReRAM and phase change memories, while carbon nanomaterial devices, tunnel field effect transistors (TFET), Nanowire FET, nanoelectromechanical systems (NEMS) and spin-torque logic are identified by the ITRS as the most promising emerging nano-based logic devices. Memristors, which are also nanoscale devices, are currently under intensive development, and with advances in basic research there is high potential to use memristors to advance neuromorphic circuits. Finally, nanomagnetic logic devices are projected to be most effective with stochastic computing and are viewed to likely be a useful complement to CMOS-based circuitry.

Looking more specifically at the spintronic devices, Spin transfer torque (STT) is viewed as one of the most promising breakthroughs for spin-based circuits and switching mechanisms in particular. Magnetic random access memory (MRAM) is a major promising candidate for next-generation memory. STT- MRAM in particular, has been recommended for additional R&D by the ITRS and is expected to be commercialized and widely used within a 5-10 year timeframe. The concept of spinwave-based logic architecture also shows great potential advantage for future implementation. However, like all the other technologies reviewed in this study, many challenges still exist. Magnetic tunnel junction (MTJ)-based STT logic gates are the most mature technological option for spin-based logic applications due to their

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good power, reliability, and speed capabilities. Some suggest that these components will be used in the near future for commercial logic computing and that over the long term, spin transistors and spin injection in graphene have high potential for building an all-spin processing system. That being said, it has similarly been argued that spin-based logic circuitry is still in its infancy and that it will more likely only complement CMOS in specific data processing tasks, rather than replace CMOS circuitry.

Currently, photonics technologies have many advantages for the development of integrated devices and are a strong candidate for next-generation computing. Photonics continues to have the potential to play a significant role in future computing by allowing high bandwidth and low-latency transfers between the processing chips and main memory, thereby helping to alleviate main memory bottlenecks. However, as of yet, no all-optical computing devices have been developed and much research is still, and is expected to continue to be, focused on heterogeneously mixed silicon photonic devices as a path towards photonic integrated circuits. Nanophotonics and, in particular, plasmonics, offers a potential alternative opportunity to overcome the fundamental limitations of both electronic and regular photonic circuits making nanophotonics a clear leader for optical circuits and on-chip applications. This branch of research is still considered to be largely under development. For the near future, it is predicted that reaching the goal of integrated nanophotonic circuits will still require the effective use of electronic, photonic and plasmonic technologies.

Table 8 provides one summary of technological options for extending and moving beyond CMOS (bottom section).85 From this we see that nanophotonics is viewed as having the most near term ability to replace CMOS technologies among those that were reviewed in this report.

Table 8. Summary of Replacement Technologies, Timelines and Opportunities

Improvement class Technology Timescale Complexity Risk Opportunity Architecture Advanced energy management Near-term Medium Low Low and software Advanced circuit design Near-term High Low Medium advances System-on-chip specialization Near-term Low Low Medium Logic specialization/dark silicon Mid-term High High High Near-threshold voltage (NTV) operation Near-term Medium High High 3D Chip stacking in 3D using through-silicon vias Near-term Medium Low Medium integration (TSVs) and Metal layers Mid-term Medium Medium Medium packaging Active layers (epitaxial or other) Mid-term High Medium High Resistance Superconductors Far-term High Medium high reduction Crystalline metals Far-term Unknown Low Medium Millivolt Tunnel field-effect transistors (TFETs) Mid-term Medium Medium High switches (a Heterogeneous semiconductors/strained Mid-term Medium Medium Medium better silicon transistor) Carbon nanotubes and graphene Far-term High High High Piezo-electric transistors (PFETs) Far-term High High High Beyond Spintronics Far-term Medium High High transistors Topological insulators Far-term Medium High High (new logic Nanophotonics Near-/Far-term Medium Medium High paradigm) Biological and chemical computing Far-term High High High

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This scientometric study used a two phased approach that began with a very broad search for potential next generation computing paradigms and selected four for further analysis. In many ways though, this analysis has only provided a high level overview of the topics in each of the fields. It is highly recommended that additional searching and analysis be conducted in any of the four fields in order to get a clearer picture of the state of the art and the trends. This study also highlighted a number of sources that should be reviewed for additional information. In particular, the U.S. National Science Foundation’s Nanoelectronics for 2020 and Beyond program and the work of the International Technology Roadmap for Semiconductors (ITRS) should be monitored for developments and succinct analyses of trends in the field. Additionally, the IEEE’s Rebooting Computing initiative86 along with their conferences may be of interest.

It has been argued that roughly 10 years are required for basic devices to reach mainstream use. Many of the technologies reviewed here are still being simulated in the lab and will require long lead times and sustained R&D of up to two decades to reach the consumer market. The race to become the next generation of computing and to completely redefine chip technology and possibly the entire computing industry has not yet been won.85 Continual monitoring of the research in each of the four fields is highly recommended to keep abreast of technological developments and to maintain awareness of any leapfrog advances that may allow one of the approaches to become an obvious frontrunner.

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APPENDIX A: DEFINITIONS OF TOPICS IN PHASE 1

Table 9. Definitions of Topics in Phase 1

# Records Topics Definition 79 3D computing Includes articles that discuss 3D integration (12 articles), processor/ing (22), stacking (11), Computing/ation (11), IC (8) 171 Adiabatic computing Adiabatic quantum computation (AQC) relies on the adiabatic theorem to do calculations[1] and is closely related to, and may be regarded as a subclass of, quantum annealing. Proposed in the context of quantum computation 27 Alternative computing Was a term used to search. No coherent sub topics can be detected by keywords alone 19 Arrayed waveguide Arrayed waveguide gratings (AWG) are commonly used as optical gratings (de)multiplexers in wavelength division multiplexed(WDM) systems. These devices are capable of multiplexing a large number of wavelengths into a single , thereby increasing the transmission capacity of optical networks considerably 29 Bacteria included to see what it connects with in visualization 49 Beyond CMOS Search term. Includes articles on nanoelectronics (11), graphene 7, magnetoelectronics 7, spintronics 6 9 Beyond Moore's laws Search term.One 2015 article states If the end of Moore's law is real, a research agenda is needed to assess the viability of novel semiconductor technologies and navigate the ensuing challenges 1036 BioComputing search term. Includes keywords related to DNA computing (90), membrane computing (146), parallel processing (64), P systems (49) 36 Boson sampling Constitutes a restricted model of non-universal quantum computation introduced by S. Aaronson and A. Arkhipov.[1] It consists of sampling from the probability distribution of identical bosons scattered by a linear interferometer. Although the problem is well defined for any bosonic particles, its photonic version is currently considered as the most promising platform for a scalable implementation of a boson sampling device, which makes it a non- universal approach tolinear optical quantum computing. Moreover, while not universal, the boson sampling scheme is strongly believed to implement a classically hard task using far fewer physical resources than a full linear-optical quantum computing setup. This makes it an outstanding candidate for demonstrating the power of quantum computation in the near term. 9 Carbon Nanotube FETs only 9 articles, a few relate specifically to beyond CMOS 118 Cellular automata A cellular automaton is a discrete model consisting of a regular grid of cells, each in one of a finite number of states, such as on and off (in contrast to a coupled map lattice). These are articles that do not specify which type of cellular automata they are talking about but at least (58) relate to quantum computing, Biocomputing (23), Nanoelectronics/techn 15, reversible computing 7, unconventional computing 7 7 Cellular computing relates to Biocomputing. approaches to cellular computing include developing an in vivo programmable and autonomous finite-state automaton with E. coli,[45] and designing and constructing in vivo cellular logic gates and genetic circuits that harness the cell's existing biochemical processes

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376 Cloud computing Group is based strictly on the term cloud computing and not all other cloud concepts that are related. Group was created because of how many records were in the dataset without being a search term Includes the following subtopics computer centres, optical fibre netowkrs, fog computing, , , virtual machines. 26 Cognitive computing is the simulation of human thought processes in a computerized model. Cognitive computing involves self-learning systems that use data mining, pattern recognition and natural language processing to mimic the way the human brain works. 214 Computer generated Surprised to see so many articles related to it so I created a group to see if it hologram connected to anything else - it doesn’t. Includes topics such as Spatial light modulators (47), image reconstruction (44), optical design techniques (35) 10 Conjugation computing the use of bacteria’s ability to conjugate (transfer information/communicate) . Is used in molecular, bio, DNA computing and was a topic in Proceedings of the 14th international conference on Unconventional Computation and Natural Computation. 2015. 349 Cryptography Large subset in data. Is a Quantum computing application. Also relates to bio and DNA computing. 20 D-Wave a first quantum computer on the market. In 2010 we released our first commercial system, the D-Wave One™ quantum computer. We have doubled the number of qubits each year, and in 2013 we shipped our 512- D- Wave Two™ system. In 2015 we announced general availability of the 1000+ qubit D-Wave 2X™ system. We are developing different layers of software to make the systems easier to use and more accessible to users. 412 DNA (Molecular) is a branch of computing which uses DNA, biochemistry, and molecular biology Computing hardware, instead of the traditional silicon-based computer technologies. Molecular Computers are bio-molecules put together so that they can perform computational tasks. The bio-molecules involved are several variants of DNA, RNA, proteins and other bio-molecules. Talks about solving NP-Complete problem (a decision problem in computational complexity theory) 302 Echo State Networks Echo state networks (ESN) provide an architecture and supervised learning principle for recurrent neural networks (RNNs) (first developed in 2001). (ESN and Liquid State Machines tend to get grouped under Reservoir computing - http://www.scholarpedia.org/article/Echo_state_network) 91 Emergent Computing Search term. Subtopics include emergent computation (of complex systems) (11), neural nets (6), cloud computing (5), cellular automata (4). Emerging non- volatile memory technologies 1 7 Evolutionary is a subfield of (more particularly soft computing) that can computing be defined by the type of algorithms it is concerned with. These algorithms, called evolutionary algorithms, are based on adopting Darwinian principles, hence the name. 27 Fabric based Includes subtopics such as – flexible silicon fabric (3), optical switching fabric computing (4) 15 Field-coupled Field-coupled nanocomputing (FCN) paradigms offer fundamentally new nanocomputing approaches to digital information processing that do not utilize transistors or require charge transport. Field-Coupled Nanocomputing Paradigms, provides valuable background information and perspectives on the quantum dot cellular automata, molecular quantum cellular automata, nanomagnetic logic, and atomic quantum cellular automata .

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60 Finite automata (state A finite-state machine (FSM) or finite-state automaton (FSA, plural: automata), machines) or simply a state machine, is a mathematical model of computation used to design both computer programs and sequential logic circuits. It is conceived as an abstract machine that can be in one of a finite number of states. Relates to quantum computing 124 Fog computing or fog networking, also known as fogging,[2][3] is an architecture that uses one or a collaborative multitude of end-user clients or near-user edge devices to carry out a substantial amount of storage (rather than stored primarily in cloud data centers), communication (rather than routed over the internet backbone), and control, configuration, measurement and management (rather than controlled primarily by network gateways such as those in the LTE core network). Fog computing can be perceived both in large cloud systems and big data structures 537 Granular computing Granular computing, as a new and rapidly growing paradigm of information processing, has attracted many researchers and practitioners. Granular computing is an umbrella term to cover any theories, methodologies, techniques, and tools that make use of information granules in complex problem solving. Granular computing is one of the fastest growing information-processing paradigms in the domain of computational intelligence and human-centric systems 96 Graphic processing A parallel processing architecture units-GPU 23 Grid computing is the collection of computer resources from multiple locations to reach a common goal. The grid can be thought of as a distributed system with non- interactive workloads that involve a large number of files. 8 Heterotic computing is a combination of two or more computational systems such that they provide an advantage over either substrate used separately. 64 High performance Already on the market. Was not a search term. Just showing how many articles computing related to HPC. High Performance Data Analysis is a growing subfield. 290 Logic gates Includes various kinds of logic gates such as reversible (~50 articles), Boolean (8), molecular (13), quantum (20), optical (25), DNA (16) 309 Membrane computing is an area within computer science that seeks to discover new computational models from the study of biological cells, particularly of the cellular membranes. (Computing with membranes (P systems) is a branch of Molecular Computing ) Membrane computing (known as P systems) is a novel class of distributed parallel computing models. 9 Memcomputing Memcomputing is an emergent computing paradigm that employs two- terminal electronic devices with memory, namely, memristive, memcapacitive or meminductive systems, to store and process information at the same physical location. 426 Memory Includes various kinds of memory such as quantum memory (32), Non-volatile memory (31), phase change (16)resistive memory (38) 191 Memristor is a hypothetical non-linear passive two-terminal electrical component relating electric charge and magnetic flux linkage. These devices are intended for applications in nanoelectronic memories, computer logic and neuromorphic/neuromemristive computer architectures.[9] Commercial availability of memristor memory has been estimated as 2018.

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44 Molecular electronics Molecular electronics is the study and application of molecular building blocks for the fabrication of electronic components. It is an interdisciplinary area that spans physics, chemistry, and materials science. The unifying feature is the use of molecular building blocks for the fabrication of electronic components. 40 Nanocomputing a computer whose physical dimensions are microscopic. The field of nanocomputing is part of the emerging field of nanotechnology 16 Nanomagnetic logic Magnetic logic devices retain state without power, dissipate little energy when switching, and are radiation-hard. Researchers at Notre Dame pioneered magnetic implementations of the Quantum-dot Cellular Automata (QCA) scheme, a novel transistor-less approach to computing, based on direct physical interactions between neighboring nano-elements. The goal of the group is to pave the road for building large nanomagnet logic (NML) systems. 53 Natural computing also called natural computation, is a terminology introduced to encompass three classes of methods: 1) those that take inspiration from nature for the development of novel problem-solving techniques; 2) those that are based on the use of computers to synthesize natural phenomena; and 3) those that employ natural materials (e.g., molecules) to compute. The main fields of research that compose these three branches are artificial neural networks,evolutionary algorithms, swarm intelligence, artificial immune systems, fractal geometry, artificial life, DNA computing, and quantum computing, among others. 14 Network on chip or network on a chip (NoC or NOC) is a communication subsystem on an integrated circuit (commonly called a "chip"), typically between intellectual property (IP) cores in a system on a chip (SoC). NoCs can span synchronous and asynchronous clock domains or use unclocked asynchronous logic. NoC technology applies networking theory and methods to on-chip communication and brings notable improvements over conventional bus and crossbar interconnections. NoC improves the scalability of SoCs, and the power efficiency of complex SoCs compared to other designs. 266 Neurocomputing Includes brain inspired computing. very loosely based on how the brain is thought to work, it is an emulation of primitive neural processes in software (or hardware), it attempts to mimic (it cannot yet copy) the workings of a biological brain, best neural net is currently equivalent to a brain damaged worm but astonishingly this is good enough for many practical problem 259 Neuromorphic Neuromorphic engineering, also known as neuromorphic computing, is a Computing concept developed by Carver Mead, ] in the late 1980s, describing the use of very-large-scale integration (VLSI) systems containing electronic analog circuits to mimic neuro-biological architectures present in the nervous system. to create a chip that operates on the same principles of the brain. The goal that has not been met, however, is the delivery of a revolution in computing. But the full story has not played out quite yet—neuromorphic devices may see a second (albeit tidal) wave of interest in coming years. Projects of interest include: DARPA synapse program, IBM True North Chip, Human Brain Project, SpiNNaker neuromorphic device. http://www.nextplatform.com/2016/02/09/the-second-coming-of- neuromorphic-computing/ 51 Next generation Search term. No obvious themes in the keywords of these articles besides 12 computing on cloud computing 15 Non-boolean A new type of computing architecture that stores information in the computing frequencies and phases of periodic signals . Often discuss with spintronics

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12 Non-von Neumann Search Term talks about FETS, Biocomputing, cellular neural nets, graphene transistors, mangetic tunnel junctions etc.. 371 Optical Computing Optical or photonic computing uses photons produced by lasers or diodes for computation. For decades, photons have promised to allow a higher bandwidth than the electrons used in conventional computers. Most research projects focus on replacing current computer components with optical equivalents, resulting in an optical digital computer system processing binary data. This approach appears to offer the best short-term prospects for commercial optical computing, since optical components could be integrated into traditional computers to produce an optical-electronic hybrid. However, optoelectronic devices lose 30% of their energy converting electronic energy into photons and back; this conversion also slows the transmission of messages. All-optical computers eliminate the need for optical-electrical- optical (OEO) conversions.[1] 8 P Automata P automata are automata-like accepting variants of membrane systems or P systems. 355 P system A P system is a computational model in the field of computer science that performs calculations using a biologically-inspired process. They are based upon the structure of biological cells, abstracting from the way in which chemicals interact and cross cell membranes 49 Photonic Computing Optical or photonic computing uses photons produced by lasers or diodes for computation. For decades, photons have promised to allow a higher bandwidth than the electrons used in conventional computers. 54 Plasmonics is the study of the interaction between electromagnetic field and free electrons in a metal. Free electrons in the metal can be excited by the electric component of light to have collective oscillations. Relates to quantum computing 34 Quantum cellular or QCA is an abstract model of quantum computation, devised in analogy to automata conventional models of cellular automata introduced by von Neumann. The same name may also refer to quantum dot cellular automata, which are a proposed physical implementation of "classical" cellular automata by exploiting quantum mechanical phenomena. QCA have attracted a lot of attention as a result of its extremely small feature size (at the molecular or even atomic scale) and its ultra-low power consumption, making it one candidate for replacing CMOS technology. 2023 Quantum computing computing studies theoretical computation systems (quantum computers) that make direct use of quantum-mechanical phenomena, such as superposition and entanglement, to performoperations on data.[1] Quantum computers are different from binary digital electronic computers based on transistors. Whereas common digital computing requires that the data are encoded into binary digits (bits), each of which is always in one of two definite states (0 or 1), quantum computation usesquantum bits, which can be in superpositions of states. A quantum Turing machine is a theoretical model of such a computer, and is also known as the universal quantum computer. Quantum computers share theoretical similarities with non-deterministic and probabilistic computers 43 Quantum dot cellular see quantum cellular automata A cellular automaton (pl. cellular automata, automata abbrev. CA) is a discrete model

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602 Qubits In quantum computing, a qubit (/ˈkjuːbɪt/) or quantum bit (sometimes qbit) is a unit ofquantum information—the quantum analogue of the classical bit. A qubit is a two-state quantum-mechanical system, such as the polarization of a single photon: here the two states are vertical polarization and horizontal polarization. In a classical system, a bit would have to be in one state or the other. However, quantum mechanics allows the qubit to be in asuperposition of both states at the same time, a property which is fundamental to quantum computing. 260 Reservoir Computing Reservoir Computing (RC) is an approach to design, train, and analyse recurrent neural networks (RNNs). More specifically, RC offers methods for designing and training artificial neural networks, and it yields computational and sometimes analytical models for biological neural networks. echo state network and liquid-state machines are types of reservoir . http://organic.elis.ugent.be/ (total count might actually be lower if false hits are removed). 440 Reversible Computing is a model of computing where the computational process to some extent is (includes reversible reversible, i.e., time-invertible. In a computational model that uses transitions logic) from one state of the abstract machine to another, a necessary condition for reversibility is that the relation of the mapping from states to their successors must be one-to-one. Reversible computing is generally considered an unconventional form of computing. 42 RRAM Resistive random-access memory (RRAM or ReRAM) is a type of non-volatile (NV) random-access (RAM) computer memory that works by changing the resistance across a dielectric solid-state material often referred to as a memristor. 59 Silicon-photonics is an evolving technology in which data is transferred among computer chips by optical rays 34 Soft computing (sometimes referred to as computational intelligence, though CI does not have an agreed definition) is the use of inexact solutions to computationally hard tasks such as the solution of NP-complete problems, for which there is no known algorithm that can compute an exact solution in 32 Spin torque Spin-transfer torque is an effect in which the orientation of a magnetic layer in a magnetic tunnel junction or spin valve can be modified using a spin-polarized current. Charge carriers (such as electrons) have a property known as spin which is a small quantity of angular momentum intrinsic to the carrier 70 Spintronics Spintronics (a portmanteau meaning spin transport electronics[1][2][3]), also known as spinelectronics or fluxtronics, is the study of the intrinsic spin of the electron and its associated magnetic moment, in addition to its fundamental electronic charge, in solid-state devices. Spintronics differs from the older magnetoelectronics, in that spins are manipulated by both magnetic and electrical fields. 31 Supercomputing A is a computer with a high-level computational capacity compared to a general-purpose computer. Performance of a supercomputer is measured in floating-point operations per second (FLOPS) instead of million instructions per second (MIPS). As of 2015, there are which can perform up to quadrillions of FLOPS 29 Terahertz Article titles or keywords contain the word terahertz. Not specifically related to computing but might be about microwave photonics, quantum computing, imaging, optical computing etc…

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71 Topological quantum A topological quantum computer is a theoretical quantum computer that computing employs two-dimensional quasiparticles called anyons, whose world lines cross over one another to form braids in a three-dimensional spacetime (i.e., one temporal plus two spatial dimensions). These braids form the logic gates that make up the computer. The advantage of a quantum computer based on quantum braids over using trapped quantum particles is that the former is much more stable 75 Topological A topolological superconductor has a superconducting gap in the bulk but superconductivity show protected metallic states on its boundaries or surfaces. However, unlike a topological insulator where the surface states consist of electrons, the surface states in a topological superconductor are made up of Majorana fermions. A topological insulator is a material with non-trivial topological order that behaves as an insulator in its interior but whose surface contains conducting states, meaning that electrons can only move along the surface of the material. 136 Topological (others) Other articles in dataset not specifically about topological quantum computing, superconductivity or insulators. Still typically relates to quantum computing and granular computing to a lesser extent 131 Tunneling Quantum tunnelling or tunneling (see spelling differences) refers to the quantum mechanical phenomenon where a particle tunnels through a barrier that it classically could not surmount. It has important applications to modern devices such as the tunnel ,[2] quantum computing, and the scanning tunnelling microscope. A European research project has demonstrated field effect transistors in which the gate (channel) is controlled via quantum tunnelling rather than by thermal injection, reducing gate voltage from ~1 volt to 0.2 volts and reducing power consumption by up to 100×. If these transistors can be scaled up into VLSI chips, they will significantly improve the performance per power of integrated circuits 51 Ubiquitous computing Ubiquitous computing (or "ubicomp") is a concept in software engineering and computer science where computing is made to appear anytime and everywhere. In contrast to desktop computing, ubiquitous computing can occur using any device, in any location, and in any format. 124 Unconventional Unconventional computing is computing by a wide range of new or unusual computing methods. It is also known as alternative computing.Unconventional computing is, according to a recent conference description,[2] "an interdisciplinary research area with the main goal to enrich or go beyond the standard models, such as the Von Neumann computer architecture and the Turing machine, which have dominated computer science for more than half a century". These methods model their computational operations based on non-standard paradigms, and are currently mostly in the research and development stage. This computing behavior can be "simulated" using the classical silicon-based micro-transistors or solid state computing technologies, but aim to achieve a new kind of computing engineering inspired in nature. Includes computing using physarum polycephalum/slime mold. P. polycephalum has also been proposed to model logic gates, enabling the construction of biological computers. In a book[14] and several preprints that have not been scientifically peer reviewed,[15][16] it has been claimed that because plasmodia appear to react in a consistent way to stimuli, they are the "ideal substrate for future and emerging bio-computing devices"

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APPENDIX B: NANOTECHNOLOGY INSPIRED GRAND CHALLENGE GOALS

The research and development needed to achieve the Grand Challenge can be categorized into the following seven focus areas: 1. Materials; 2. Devices and Interconnects; 3. Computing Architectures; 4. Brain-Inspired Approaches; 5. Fabrication/Manufacturing; 6. Software, Modeling, and Simulation; 7. Applications.

Table 10. Nanotechnology Inspired Grand Challenge Goals

Area of Research 5 Year goal 10 Year Goal 15 Year Goal Materials Identify promising emerging Enable physical Achieve a fundamental materials systems suitable and modeling and simulation understanding of materials with high potential for device at scales that will allow properties, scaling, and fabrication and CMOS for the characterization, prediction for the properties integration. Concurrently, simulation, and of new materials systems begin development of the prediction of potential and their performance and measurement science and device behavior and characterization; of their technology required to performance for future suitability for the design, determine materials properties circuit designs and fabrication, and scalability and scaling effects. analysis. Conduct of new devices; and of their parallel efforts to integration with CMOS. address multiple aspects of the materials problem (discovery, characterization, manufacturability), where integration of such efforts will inform the direction of each individual effort. Devices and Fabricate and characterize Develop standard Enable device and circuit Interconnects emerging devices, circuits, and libraries incorporating design, modeling, and interconnects with promising nonlinear phenomena simulation environments scalability properties and and fabrication with the capability of potential integration with variations. Develop predicting device structure, CMOS. Develop open-sourced design and simulation behavior, and performance device models and simulation environments suitable based on future computing techniques, and integrate with for large-scale circuit system requirements. The open and industry standard architectures in both ultimate goal is to minimize circuit design and simulation analog and digital expert knowledge tools and environments. It will domains. requirements in materials be critical to understand and or device physics in order incorporate reliability to create and design fundamentals from the start, devices based on new considering lifetimes and materials systems and degradation as soon as circuits driven by desired promising new materials, user properties, behaviors, devices, interconnects, and and applications. architectures are identified.

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Area of Research 5 Year goal 10 Year Goal 15 Year Goal Computing Enable large-scale design, Be able to predict the Be able to predict the Architectures modeling, characterization, and performance of new design and characterization verification of future architectures of computing architectures computing architectures in incorporating new based on user applications both digital and analog material systems and needs. These results should domains. Leverage advances in physical nonlinear enable ready-to-fabricate high performance computing phenomena. designs and specifications platforms to enable parallel, high-concurrence, and large- scale simulations beyond exascale performance. This will enable the hybridization and interfacing of current digital computing with quantum- or biology-inspired computing approaches that require analog and other novel interfaces. Brain-Inspired Translate knowledge from Identify and reverse Enable large-scale design, Approaches biology, neuroscience, engineer biological or development, and materials science, physics, and neuro-inspired simulation tools and engineering into useable computing environments able to run at information for computing architectures, and exascale computing system designers. translate results into performance levels or models and systems that beyond. The results should can be prototyped. enable development, testing, and verification of applications, and be able to output designs that can be prototyped in hardware. Fabrication/ Develop tools and fabrication Achieve the ability to Develop a cost-effective Manufacturing capabilities able to integrate prototype new foundry process and design new materials systems, computing architectures methodology widely potentially similar to additive incorporating new accessible to a broad range manufacturing, at scales materials systems and of research and relevant to this challenge. nonlinear phenomena development groups with relatively fast suitable for both low- and turnaround times (from high-volume device years to months) fabrication/manufacturing. compatible with state- of-the-art microelectronics practices.

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Area of Research 5 Year goal 10 Year Goal 15 Year Goal Software, Modeling, Create programing and Incorporate nonlinear Develop software methods and Simulation development languages and physical and materials and techniques capable of environments, libraries, phenomena within automated discovery and solvers, and compilers that do modeling and simulation exploration of large, not require deep knowledge systems capable of complex parameter spaces and expertise to use. Resulting design, simulation, and from a mathematical, software and solutions must verification of future materials, physical, support state-of-the-art and computing biological, fabrication, or beyond-exascale high- architectures, including computing architecture performance computing accurate prediction of point of view platforms. performance. Systems should be capable of application exploration and demonstration at large scales. Applications Achieve autonomous Achieve autonomous Achieve fully autonomous capabilities for routine attack capabilities for capabilities for scenarios, utilizing sophisticated attack sophisticated attack enterpriselevel computing scenarios, utilizing scenarios with compact and resources, and human-machine enterprise-level energy-efficient computing augmented capabilities for computing resources, resources. sophisticated attack scenarios. with routine attack scenarios resolved with compact and energy- efficient computing resources.

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APPENDIX C: ROADMAP FOR NANOPHOTONIC DEVICES 2014- 2020

The following are a series of roadmaps for various components of nanophotonic devices produced in 2012 by the Nanophotonics Europe Association (NEA). The full report87 from which these are extracted can be found here. Table 11. Nano-Engineered Photonics Materials Roadmap

2014/2015 2016/2017 2018/2019 2020 Critical path from Identify market Identify production Create market needs Generate SMEs and science to market opportunities and technologies and pass on upscale industries to make industries for novel adaptable to large and demo products with materials and scale top-down (NIL) commercialization appropriate funding processes in EU & bottom-up strategies support manufacturing, colloidal chemical synthesis Technological Large area low cost Controlled Low cost fabrication challenges fabrication of multi- properties of of advanced functional materials bottom-up photonic for high nanomaterials (QDs, nanostructures performance CNT, graphene) for (metamaterials, displays, windows, novel optoelectronic plasmonic screens, solar cells, devices (safety, structures) etc. security, health, surveillance, For solar cells, communications) biosensors, photodetectors Research actions Investigate novel Combined electronic Create/exploit new materials with tuning in the physics for tailored optical- photonic properties combining classical plasmonic of the materials and quantum properties (tuneable properties of absorption & materials for hybrid emission, non-linear light matter properties) interactions Innovation Increased light Co-optimization of Multifunctionality Novel hybrid requirements trapping electronic and Demonstration: nanomaterials based optical properties of optical and on metal- Improved non- novel Nanomaterials mechanical semiconductors. linearities (QDs, graphene, properties (friction, Graphene metallic robustness, nanostructures for For wavelength nanostructures impermeability) control of light- conversion matter interactions Cross-cutting KET Interact with Involve PV The role of issues advanced materials community to nanotechnology KET and nanophotonics address challenges to nanophotonics communities and vice versa

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Table 12. Nanoscale Quantum Optics Roadmap

2014/2015 2016/2017 2018/2019 2020 Nanoscale quantum One nanophotonic Two coupled Multiple coupled Small quantum computer quantum bit nanophotonic qubits qubits integrated on computer integrated a chip on a chip Quantum Q-cryptography at Development of Implementation in Q-cryptography at cryptography video speeds over optical memories fibre and satellite video rates across tens of km and quantum based quantum the oceans repeaters communication Single-photon Efficient single Controlled single- Development of Easy-to-use single- sources &CNOT gate photon sources that photon in nanoscale solid-state single photon sources and emit in a random sources photon source with CNOT gates fashion better performance integrated on a chip Metrology Development of Better and more Nanophotonic solid- Reliable (measuring accurate and convenient state frequency nanophotonic frequency, time) practical optical oscillators standard oscillator on chip oscillators Plasmonic devices Efficient optical Nonlinear plasmonic Active plasmonic Q-plasmonics for quantum and devices benefit from devices at lower devices incorporate switches operating nonlinear evanescent power levels optical gain with single quanta operations (plasmon) field

Table 13. Communications & All-Optical Signal Processing Roadmap

2014/2015 2016/2017 2018/2019 2020 Critical path from Optical I/O CMOS compatible Demonstrator of CMOS-compatible science to market interfaces on chips optical network on Nanophotonics- (optically interposer chip enabled 3R transparent) all- (optically passive, components optical network on optically non- interposer chip transparent) Technological Technological merging of nanophotonics with CMOS micro-nano- challenges fab (including plasmonics, graphene, non-linear materails, etc) Research actions Bring together the stakeholders from academy, applied research photonic, microelectronics foundries and large industrial companies. The competencies needed cover silicon photonics, nonlinear optics, plasmonics, metamaterials, graphene photonics, microelectronic design, computer system architecture, optical networks. Innovation See the line on “research actions” requirements Provide access to European ‘More-than-Moore’ CMOS foundries Cross-cutting KET Tight links with nanotechnology KET and with micro-nano- issues electronics KET

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Table 14. Plasmon-Enhanced Magentic Storage Roadmap

2014/2015 2016/2017 2018/2019 2020 Critical path from High yield coupling Manufacturing ramp Manufacturing ramp science to market scheme sources into 2nd generation of plasmonic HDDs with laser structures; Very diodes integrated large scale with plasmonic production of laser antennas diodes; Large scale production of Very large scale plasmonic antennas; production of low Production of new cost lasers magnetic materials integrated with for disk material. plasmonic Technological Light delivery to Light delivery to Design of HDD challenges magnetic material; magnetic material; heads with vertical High Hc magnetic High Hc magnetic emission, beam material; material; controlled laser Tailored optical field Power robust near diodes and in laser diodes; field transducers; plasmonic structures Vertical emission Tailored optical field laser diodes; in laser diodes. TM polarization control laser diodes. Research actions New material Design of 2nd Design of second Reliable lasers with system for laser generation antenna; generation antennas integrated diodes; Co-design of laser plasmonic Magnetic material diode source with Reliable lasers with with high Hc and plasmonic antenna; integrated fast cooling and Reliable lasers with plasmonic good heat integrated conductivity; plasmonic; Antenna shape; Magnetic materials Metal used for with high Hc and transducer; fast cooling and In-coupling scheme good heat in antenna. conductivity Innovation Low loss, high local Integration of laser HDD head design to requirements field, efficient diode source with use integrated laser transducers plasmonic antenna diode with plasmonic Cross-cutting KET Tight links with KETs involved with nanotechnology, data storage, issues micro-nano-electronics and manufacturing

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APPENDIX D: ATTACHMENTS

The following files have been provided as attachments to the recipients of this report.

Filename Description Comments 1. Mind map of Next Generation Computing Topics – .png Delivered at midterm Phase 1 2. Mind map of Next Generation Computing Topics – .png Orientation has changed from Phase 2 image in text to facilitate viewing. This mapping should be viewed as a work in progress and is not a full or completely accurate representation of the field, but a working overview.

3. Biocomputing collaboration raw data .xls File from which biocomputing collaboration map was produced

4. Nanocomputing collaboration raw data .xls File from which nanocomputing collaboration map was produced

5. Spintronics collaboration raw data .xls File from which spintronics collaboration map was produced

6. Optical-Photonic computing collaboration raw .xls File from which optical/photonic data computing collaboration map was produced

7. Optical-Photonic computing Canadian .xls File from which optical/photonic collaboration raw data computing Canadian collaboration map was produced

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APPENDIX E: METHODOLOGY Searches To address the key questions in this project, a broad search on next generation computing was conducted in several databases including Scopus, Inspec, and Association for Computing Machinery (ACM) Digital Library between 2013-2013. The terms listed in Table 15 were used in multiple combinations with various Boolean operators depending on the database that was searched. Additional terms (already listed below) were searched in phase 2 following the initial analysis. Spintronics was not directly searched in phase 1 as articles on the topic were already found through the phase 1 search terms, however it was searched in phase 2 within tight configuration with “computing” terms. In the end, the majority of the final publications were found in Scopus.

Table 15. Search Terms

Generic Biocomputing Nanocomputing Optical/Photonic

Processor Biocomputing Nanocomputing Optic* computing Computing Biologically inspired Reversible computing Photonic computing Computer Neuromorphic Photonic architecture computation Neuro-inspired Silicon photonics Quantum Neurocomputing 3D Biological Terahertz Chemical Turbo tunnel Artificial computing Emergent system Breakthrough DNA computing Beyond silicon Biomolecular Beyond Moore’s computing Moore’s Law end Memcomputing Post-Moore’s law Molecular computing Next generation Reservoir computing Unconventional Membrane computing Alternative Brain-inspired Fog computing P system Beyond von Neumann Physarum architecture polycephalum Beyond CMOS Conjugate computing Continuum computing P-Automata architecture Cellular computing Non von Neumann architecture Granular Echo state Reservoir Heterotic Spintronics

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In the optical/photonic computing dataset the following concepts were removed: all medical related, imaging, data centre, cloud computing, computer-aided instruction, software defined networking, virtualization, internet, computer network reliability, telecom network typology, optical fibre communication, Optical fibre LAN, quality of service, computer network management, computerized instrumentation, computer centres, computerized monitoring, cameras, telecom traffic, computer vision, computerized numerical control, holographic, aspherical optics, lenses, LiDAR, optical scanners, computer/optical networks, computer graphics.

Analysis All references were downloaded into VantagePoint software for analysis. VantagePoint enables the creation of various groupings, statistical analyses, matrices, graphs, and cross-correlations to analyze the data and profile the activities of the major players.

Keywords, classification codes, index keywords, key phrase identifiers, subject headings, author keywords and words and phrases extracted by natural language processing of titles and abstracts were merged together to facilitate subject analysis (hereafter referred to as keywords). Keywords were then organized into subject groups through a variety of steps. This was repeated in Phase 1 and Phase 2.

Different analytical tools were used to generate graphs based on statistical operations performed in VantagePoint. TouchGraph software was used for cluster analysis and visualization of the subject groups while Tableau software was used to generate bubble graphs.

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