RF and Crosstalk Analysis of Copper and MLGNR Interconnects Using Different Repeaters in Sub-10 nm Regime
Manjit Kaur Punjab Engineering College: PEC University of Technology Sanjeev Kumar Punjab Engineering College: PEC University of Technology Balwinder Raj National Institute of Technical Teachers' Training and Research Chandigarh Neena Gupta Punjab Engineering College: PEC University of Technology Arun Kumar Singh ( [email protected] ) Punjab Engineering College: PEC University of Technology https://orcid.org/0000-0003-0853-398X
Research Article
Keywords: Equivalent Single Conductor (ESC). Energy-delay-product (EDP). Far-End Crosstalk (FEXT). In- Phase Crosstalk (IPXT). Multilayer graphene nanoribbon (MLGNR). Near-End Crosstalk (NEXT). Out-of- Phase Crosstalk (OPXT)
Posted Date: March 2nd, 2021
DOI: https://doi.org/10.21203/rs.3.rs-236432/v1
License: This work is licensed under a Creative Commons Attribution 4.0 International License. Read Full License
RF and Crosstalk Analysis of Copper and MLGNR Interconnects Using Different Repeaters in Sub-10 nm Regime
Manjit Kaur1, Sanjeev Kumar2, Balwinder Raj3, Neena Gupta1, and Arun K. Singh1*
1 Department of Electronics and Communication Engineering, Punjab Engineering College (Deemed to be University), Chandigarh, India 2 Department of Applied Sciences, Punjab Engineering College (Deemed to be University), Chandigarh, India 3 Department of Electronics and Communication Engineering, National Institute of Technical Teachers Training & Research, Sector 26, Chandigarh, India 1* Corresponding author e-mail: [email protected] Abstract This paper presents RF and crosstalk analysis of Copper (Cu) and multi-layer Graphene nanoribbon (MLGNR) based interconnects using multi-gate (FinFET) and virtual-source carbon nanotube field effect transistor (CNFET) based repeater insertions in sub-10 nm regime. The SPICE based analysis utilizes an accurate π-type equivalent single conductor (ESC) model for mutually coupled interconnects at 7 nm technology node. The transfer function and 3-dB bandwidth results of lithium-doped MLGNRs offer many fold improved RF performance than Cu. The out-of-phase crosstalk induced (OPXT) delay results with FinFET repeaters demonstrate 27.54 and 67.6 % reductions for pristine and lithium-doped MLGNRs as compared to Cu, whereas CNFET repeaters demonstrate 20.48 and 81.88 % reductions at interconnect length of 1000 µm. The peak far-end crosstalk (FEXT) noise voltage results demonstrate 86.03 and 62.5 % using FinFET repeaters and 88.14 and 69.9 % reductions using CNFET repeaters for pristine and Li-doped MLGNRs than Cu at 1000 µm length. Further, the energy-delay-product (EDP) results demonstrate 59.7 and 97 % reductions using FinFET repeaters for pristine and Li-doped MLGNRs than Cu at length of 1000 µm. The EDP results using CNFET repeaters exhibit 34 % degradations for pristine-MLGNRs than Cu while Li-MLGNR exhibit 98.61% reductions than Cu at length of 1000 µm. Keywords Equivalent Single Conductor (ESC). Energy-delay-product (EDP). Far-End Crosstalk (FEXT). In-Phase Crosstalk (IPXT). Multilayer graphene nanoribbon (MLGNR). Near-End Crosstalk (NEXT). Out-of-Phase Crosstalk (OPXT) 1. Introduction The continual feature size shrinking in modern integrated circuits (ICs) has paved the way for performance enhancements. However, at nanoscale technology nodes there starts a greater disparity in scaling factors of transistors and interconnects. This resulted in making interconnects a limiting factors in overall system performance. Moreover, the performance of CMOS transistors have started degrading significantly at nanoscale nodes. So, research community is coming up with new interconnect materials and alternatives of CMOS transistors for future ICs. The international technology roadmaps for semiconductor (ITRS) has forecasts that existing widely used interconnect material Cu is going to cross its critical current density value very soon [1]. Emerging interconnect materials having novel properties to overcome limitations of Cu at nanoscale. Carbon based GNR nanomaterials are becoming top choice of researchers to explore them for interconnect applications due to their scalability to nanoscale and novel properties such as two-dimensional current flow, ballistic transport, very high current handling capacity, larger mean free path, greater thermal stability, and improved mechanical strength [1-3]. Further, greater momentum relaxation time and the planar structure facilitates smooth control of their chiral vectors during fabrication process. This results in easy fabrication either as semiconducting or metallic as per requirement. Hence, GNRs are evolving as potential replacement of Cu for chip interconnect applications. Basically, a GNR comprise of a strip of Graphene sheet with width generally less than 50 nm. They are further categorized into armchair (ac) and zig-zag (zz) depending on profile of their edges. Normally, many Graphene layers are stacked to enhance conductivity and it is known as multi-layer GNRs or MLGNRs. The signal integrity degradation due to higher packing density, dielectric imperfections, EMI/EMC issues, and skin effect etc. worsen at higher frequencies and could not be omitted in modern integrated circuits (ICs) [1-3]. So, the necessity of radio frequency and crosstalk analysis in performance characterization of chip interconnects has arisen in modern ICs. With increasing switching rate of signalling, inductance has started playing dominant role in nanoscale ICs. The global level interconnects are generally wider wires having higher conductivity as compared to local/intermediate level. So, they demonstrate larger inductive related activities. This necessitates inclusion of inductance as important parameter in modelling of emerging as well Cu interconnects at nanoscale technology nodes. It has been demonstrated that exclusion of inductance in interconnect models may result in errors up to 35% for propagation delay calculations [4]. The scaling down of feature size below 22 nm raised many issues at process and device level which has led to search for new device structures [1, 3]. Multi-gate transistors generally called Fin-FETs due to their Fin type shape are just structural improvement of traditional CMOS. They demonstrate better gate control over channel current with minimal presence of short channel effects (SCEs) as reported in [5-7]. CNFET has attracted attention of many researchers due to use of CNTs as channel material and their novel properties [8]. A CNFET compact model supporting multiple chiralties, diameters, and semiconducting/metallic CNT based channels has been introduced by Deng et al.[9]. This model includes optical/ acoustical phonon scattering, charge screening, and quantum confinement etc. Deng and Wong then demonstrated standard HSPICE CNFET model considering experimental device non-linearities [10]. Lee et al. introduced a virtual-source based semi-empirical compact CNFET model which appropriately considers effects of geometrical scaling, tunnelling currents, and parasitic resistance/capacitance etc. [11-12]. The virtual–source CNFET model (VSCNFET) extends CNFET technology to sub-10-nm technology nodes [13]. The RF analysis of MLGNRs is discussed by only few researchers [14-17]. The skin-depth and surface impedance based high frequency performance of pristine and intercalated MLGNRs is studied in [14-15]. However, the validation of RF behaviour at circuit level is missing. The Bode plots based relative stability of Cu, side-contact (SC) and top-contact (TC) MLGNRs is investigated in [16] for only local/intermediate level pristine MLGNR omitting the global level interconnects. Further, A research article compared MLGNRs and MWCNTs using driver-interconnect-load (DIL) system in terms absolute transfer function and bandwidth [17]. To improve the performance of nowadays ICs, repeaters are invariably inserted into longer resistive interconnect lines. Ismail and Friedman have derived analytical expressions for calculating the optimum number and size of repeaters [4]. M. Kaur et. al. presented crosstalk analysis using different types of repeaters for coupled MLGNR interconnects at 21 nm technology node [18]. They demonstrated that CNFET repeaters have better OPXT and IPXT delay reduction than FinFET counterparts. Different repeater insertion techniques for bundled SWCNT/MWCNT interconnects have been investigated in [19-20]. The impact of contact resistances on performance of interconnects among the CNTs and metallic electrodes for repeater insertions have been analysed in [21]. They authors of [21] and [22] introduced repeater insertion techniques for optimizing power for RC interconnect models. Zhao et al. analysed optimum repeater insertions for CNT/Cu based nanointerconnects to minimize power consumption and delay considering impact of contact resistance. They have used particle swarm optimization (PSO) method to estimate optimum number of repeaters and their size [23]. The rest of this paper is organized as follows. Section 2 introduces RLC models of Cu/MLGNR interconnects. The repeater insertions are enumerated in Section 3 along with calculation of optimum number and sizing of repeaters. Section 4 discusses about RF analysis of Cu and MLGNR interconnects. Section 5 illustrates crosstalk induced delay and noise results. The comparative results for Cu/MLGNR interconnects using FinFET/CNFET repeaters are covered in Section 6. The conclusions are presented in Section 7.
2. Interconnect Model The Cu resistivity at nanoscale started increasing sharply due to electron scattering caused by surface and grain boundary effects [1]. The per unit length (p.u.l.) resistance of Cu [20-21] is estimated using (1) as R (1) cu W H where, W and H are width and thickness of Cu interconnects. The resistivity (ρ) at nanoscale is a function of surface and grain boundary scattering and is calculated using (2) as
ss gb (2) 3 1 1 cu where, ss 0 fs 4W where, ρ0 is bulk resistivity of Cu, λcu is mean free path of nanoscale Cu at room temperature, and fs represents Fuch’s scattering parameter assumed 0.6 [22-23] in this paper. 3 1 1 1 3 2 3 3 1 gb 0 ln (3) 2 where, is λcu R / g(1 - R). g and R represent mean grain size (≈360nm) and reflection coefficient (≈0.4) at grain boundaries [22]. The p.u.l. inductance (Lcu) and capacitance (Ccu) of copper interconnects are calculated using analytical models [20] (4) and (5) as 2L 0.22 W H 0 50 Lcu ln . (4) 2 W H L 0.09 1.14 0.16 1.18 H T W W T C 1.14 0.74 1.16 (5) cu 0 r S T 2.06S W 1.59S W 1.87S T 0.98S where, ε0 and εr are free space and relative permittivities. The free space permeability is denoted by μ0. The parameters L, T, and S represent interconnect length, height above ground plane, and spacing between adjacent interconnect lines. In this paper, a simplified π-type ESC model [38] depicted in Fig. 1 is used for all SPICE simulations. A typical MLGNR interconnect model comprise of multiple layers of graphene arranged in the form of a stack. The layers are separated from each other by Van der Waals spacing (δ≈ 0.34 nm). The number of layers in MLGNR [28] are 1 calculated as Nlayer Int. H . The Int. [ ] specifies integer part to be considered only. A. Resistance Model
The MLGNR contact resistance ( Rc ) is calculated as [25] 1 Nshell / Nlayer 2 1 (6) Rc (R j,mc R ,qj )/ j1 th where, Rj,q and Rj,mc are j layer quantum resistance and imperfect metal contact resistance, respectively. The growth process of GNRs decides the value of Rj,mc resistance and its value may range from few kilo-ohms to hundreds of kilo-ohms [24-25].
Fig. 1 Equivalent π-type ESC model used in driver-interconnect load (DIL) configuration [15]
The single layer quantum resistance (Rq) for each conducting channel [24-25] is estimated as in (7) h 12.94k R (7) ,qj 2 2 e Nch, j Nch, j where, h, e, and Nch denote Planck’s constant, electronic charge, and conducting channel count, respectively.
The conducting channel count for each layer [26-27] is estimated as in (8) nc 1 nv 1 E E E E i F kT 1 i F kT 1 (8) Nch e e i1 i1 where, EF denote Fermi level, Ei is the sub-band energy below/ above the Fermi level, k denote Boltzmann’s constant, and T temperature, respectively. The terms nv and nc represent valence and conduction sub-bands, respectively. The p.u.l. distributed (scattering) resistance (rs,MLGNR) of MLGNR [24-25] is estimated using (9) as 12.94k rs (9) ,MLGNR N .N . layer ch,j eff where, effective mean free path (MFP) is denoted by λeff . The previous literature readings in [24-26] highlighted that Fermi energy can be varied by substrate effects. In addition the electron scattering due to defects, phonons, and rough edges significantly impact the mean free path [27]. All values of λeff are taken from previous experimental results [1, 28-31]. The λeff is calculated for all materials at room temperature (T=300 K). The MLGNR total resistance (R) for length L [24-25] is calculated using (10) as 2 R Rc S Lr (10)
B. Inductance Model The p.u.l. kinetic inductance of MLGNRs [28-29] is estimated using (11) as h L (11) kMLGNR 4 2 F Nvelayer Nch 5 where, vF (≈8 x 10 m/s) represents Fermi velocity. The p.u.l magnetic inductance of MLGNR [28-29] is estimated using (12) as
T L ro (12) mMLGNR W where, μr and μ0 are relative and free space permeabilities, respectively. Due to much smaller value of magnetic inductance, it is ignored for MLGNR nanointerconnects in this work.
C. Capacitance Model
The equivalent quantum (Cq) and electrostatic (Ce) capacitances are present in MLGNRs. The Ce is usually due to electric field coupling between bottommost layer and the ground plane. The Cq and Ce capacitances for MLGNR interconnects [28-29] is estimated using (13) and (14) as
4 e2 C N N (13) qMLGNR ch layer vhF W C ro (14) eMLGNR T where, ε0 and εr are permittivities of free space and material, respectively.
Table 1 Interconnect geometrical and minimum sized buffer parameters at 7 nm technology node [1]
Parameters 7 nm W (nm) 10.5 H (nm) 25.2 Global level T (nm) 15.75
εr 1.65 Rdr (kΩ) 69.7 Minimum sized inverter Cdr (fF) 0.13
Cl (fF) 0.06
c The p.u.l equivalent. r , escs , l , esck and esc values for π-type ESC model of MLGNR interconnects of length L are estimated using (15a – 15c), respectively as r ,escs s.Lr (15a) lk, esc Lk .L (15b) 1 1 1 1 1 1 cesc (15c) Cq . L C e . L c ,escq c ,esce
The Table 1 lists global level interconnect geometrical parameters along with minimum sized inverter parameters for 7 nm technology node taken from ITRS-2013 roadmaps [1].
3. Repeater Insertions To improve the performance of nowadays ICs, repeaters are invariably inserted into longer resistive 2 interconnect lines. The RC time constant of an interconnect line is RTCT = RCl with square dependence on length. So, dividing the interconnect line into smaller segments and inserting repeaters to reduce delay is most commonly used strategies in modern ICs [4]. At global level large number of repeaters are required and they consume significant proportion of area and total circuit power.
Fig. 2 Repeater insertion to improve delay performance of interconnects To mitigate larger propagation delay and to improve signal levels on global lines, sufficient numbers of repeaters of uniform size are generally inserted. To insert repeaters an RLC interconnect line is divided into n number of uniform segments as shown in Fig. 2. All repeaters are of uniform size and h times larger than minimum sized buffer in that particular technology node. Accordingly, the repeater output resistance (Rdr), capacitance (Cdr), and load capacitance (Cl) are scaled to Rdr /h, hCdr , and hCl, respectively. The total propagation delay of a global interconnect line with inserted repeaters is summation of delay of n line segments and delay of of inserted repeaters (including driver).
A very important role is played by sizing of interconnect sections in estimating optimal number of repeaters required and the repeater sizing [4, 18]. The analytical expressions (20-22) have been derived in [4] for determining optimal number of repeaters (nopt) insertions required and optimal repeater sizing (Sopt) for chip interconnects.
Resc Cesc 1 n (16) opt 2 1 0 18 .303 Rdr Cdr . (TL /R ) esc esc R C 1 S dr esc (17) opt 1 0 16 03 .24 Resc Cdr . (TL / R ) esc esc where,
Lesc R T esc Lesc / Resc (18) Rdr Cdr
In this paper, we have calculated the optimal number of required FinFET and CNFET inverting repeaters and their sizing using expressions (16-17) for uniform segmented nanoscale Cu, pristine and Li-doped MLGNRs interconnects. The Table 2 lists the optimal number of CNFET and FinFET repeaters required for Cu, pristine and Li doped MLGNRs interconnects at different lengths. The number of repeaters required for pristine and Li-doped interconnects in Table 2 clearly indicate that emerging nanomaterials need far less repeaters than conventional Cu material. As evident from Table 2, the pristine and lithium-doped MLGNRs need 56 and 94 % less repeaters in comparison to Cu at length of 1000 µm. Table 2 Comparison of optimal number of repeaters required
Interconnect Repeater type Length (µm) Material 100 500 1000 Copper FinFET 3 17 34 CNFET 3 17 34 Pristine-MLGNR FinFET 1 7 15 CNFET 1 7 15 Lithium-MLGNR FinFET NR 1 2 CNFET NR 1 2 NR-not required 4. RF Analysis The RF behaviour of Cu, pristine and Li-doped MLGNRs have been calculated and characterized in this section considering skin-depth, transfer gain, and 3-dB bandwidth RF centric parameters. 4.1 Skin-Depth Analysis
The current conduction in a conductor restricts to its outer periphery at radio frequencies mainly attributed to skin-effect. The skin-depth for GNRs [14-15] is calculated using (19-20) as
' [1 ( 2 [])1 ()2 ()] (19) 2 ' (20) 0 where, δ’ is skin depth at lower frequencies, ω, τ, and σ are angular frequency, momentum relaxation time, and conductivity, respectively. The µ0 is free space permeability.
The skin-depth variations with frequency sweeping from 1 GHz to 1 THz are plotted for Cu, pristine and Lithium doped MLGNR materials in Fig. 3. The plots reveal skin-depth degradations for all materials. This happens due to reduced effective conductor area for current flow at RF frequencies due to skin-effect. For all calculations in this work, we have taken material dependent parameters such as τ, σ, and λeff from experimental results reported in [1, 14, 32-34].
Fig. 3 Skin-depth degradations for Cu and GNR materials
The skin-depth degradations observed for Cu, pristine and Lithium-doped MLGNRs are 9.56, 2.29, and 2.72 μm, respectively as frequency is varied from 1 GHz to 1 THz. As can be seen from Fig. 3 the pristine MLGNR undergoes highest skin-depth degradation as its conductivity is about 17 and 12 times lesser than Cu and Lithium doped MLGNR materials [14, 34]. It is observed that skin-depth performance is dependent on effective mean free path, conductivity and momentum relaxation time parameters of a material. So, interconnect material choice for optimal RF performance can be made based on these parameters. 4.2 Transfer Gain Analysis
The transfer gain is one of very important parameter used to describe RF performance. The transfer gain of Cu, pristine and Lithium-doped MLGNRs at 7 nm technology node is calculated and analysed. The π-type ESC model of Fig. 1 is used in all simulations. The minimum-size inverter parameters for FinFET and CNFET transistors are taken from [1, 37]. We have considered driver and repeater parameters 50 times the minimum-size inverter size. The transfer gain graphs as frequency is varied from 1 GHz to 1 THz for different interconnect materials considered for evaluation are illustrated in Figs. 4a-d. As evident from graphs in Fig. 4a for Cu, CNFET repeater demonstrate 5 folds better frequency response than FinFET counterparts at global length of 1000 µm. For pristine MLGNRs shown in Fig. 4b, CNFET repeaters exhibit 3 folds better response. The frequency response of Lithium doped MLGNR calculated at transfer gain value of 0.5 is 110 and 115 folds better than Cu and pristine- MLGNRs at length of 1000 µm using CNFET repeaters as is evident from Fig. 4d. Similarly, the frequency response of Lithium doped MLGNR is 223 and 140 folds better than Cu and pristine-MLGNRs at length of 1000 µm with FinFET repeaters. The improved frequency response of Lithium doped MLGNR is mainly due to its much lower distributed resistance (≈ 5.9 kΩ) than pristine MLGNR (≈ 410 kΩ), and Cu (≈ 270 kΩ) at 1000 µm length.
(a) (b)
(c) (d) Fig. 4 Transfer gain graphs of Cu, pristine and Lithium-doped MLGNRs interconnects extracted using SPICE for lengths of 500, 700, and 1000 μm with FinFET and CNFET repeaters. All transfer gain values are calculated at W=10.5 nm, H=25.2 nm. In a. Cu transfer gain graphs, in b. pristine-MLGNR graphs for Fermi energy of 0.2 eV, MFP=419 nm, and number of layers=75 in c. Stage-2 Lithium-doped MLGNR for Fermi energy of 1.5 eV, MFP=300 nm, and number of layers=68, and in d. comparative transfer gain graphs of different materials at length 1000 μm. 4.3 3-dB Bandwidth Gain Analysis
The 3-dB bandwidth (f3dB) values for Cu, pristine and Lithium-doped MLGNR interconnect materials are extracted using FinFET and CNFET repeaters at 7 nm technology node and analysed with length varying from 100 to 1000 µm. The 3-dB bandwidth graphs are illustrated in Fig 5. The f3dB values of Cu at 100/1000 μm length with FinFET and CNFET repeaters are 565/4.88 and 1197/25.7 MHz, respectively. For pristine-MLGNR, the f3dB values at 100/1000 μm length with FinFET and CNFET repeaters are 586/7.82 and 932/24.4 MHz, respectively. The Lithium-doped MLGNRs exhibit highest f3dB values of 10.4/1.07 and 45.2/2.89 GHz with FinFET and CNFET repeaters at lengths of 100/1000 μm. The Lithium-doped MLGNRs demonstrates 219 and 110 folds enhancement in f3dB bandwidth with FinFET and CNFET repeaters in comparison to Cu at 1000 μm. Similarly, it demonstrates 136 and 116 folds enhancement in f3dB bandwidth with FinFET and CNFET repeaters in comparison to pristine-MLGNRs. Based on f3dB bandwidth results, it could be explicitly concluded that Lithium-doped MLGNRs could be suitable choice as replacement of Cu to achieve better RF performance.
Fig. 5 f3dB bandwidth graphs of different interconnect materials with FinFET and CNFET repeaters 5. Crosstalk Induced Delay and Noise Results Crosstalk is redundant electromagnetic coupling/interference between the signal carrying nearby interconnect lines in ICs. The major source of crosstalk is unwanted capacitive, inductive, and conductive couplings. With ever-increasing signal switching rates, crosstalk is becoming a major design issue to be handled carefully in modern ICs. In this paper, a standard three-line bus model is utilized to predict the crosstalk behaviour of Cu and MLGNR based interconnects in sub-10 nm regime. The crosstalk induced delay is caused predominantly by capacitive coupling in global level chip interconnects. The capacitive coupling of Cu [24, 35] and MLGNR [36] are estimated using analytical expressions (21-22). In case of Cu, the coupling capacitance (CCCU) is approximated using semi-empirical approach in which the CCCU contemplates variations in electric flux with reference to geometrical parameters illustrated in Fig. 6.
0.09 H T 1.14 S T 2.06S 1.14 0 74 W (21) CCCU 0 r . W 1.59S 0.16 1.18 W H 1.16 1 87 0 98 W . S H . S
Where, H, T, and W describe geometrical parameters of the interconnect structure shown in Fig. 6. The parameter S specify the adjacent interconnect line spacing.
Fig. 6 Interconnect geometry for crosstalk analysis [1, 24]
The conformal mapping method introduced in [36] has been used to estimate the coupling capacitance (CGNR) of GNR interconnects. The whole geometry is segregated into elementary vertical and horizontal interconnect capacitances. Then, these capacitances are added to estimate the overall coupling capacitance (CGNR) of MLGNR interconnects as
.50 T 2H C , 2 BCP][ S 2 S 2 S 1 H T C (22) CGNR 0.87 W C CP][ S 2 S 2 1 H T where, C[BCP] represents line to ground capacitance and C[CP] represent capacitive coupling between two coplanar lines. The standard three-line bus model adopted to estimate crosstalk induced delay is enumerated in Fig. 7. The crosstalk performance is characterized in terms of out-of-phase/in-phase crosstalk induced delay and near- end/far-end crosstalk noise in this paper. The multi-gate (FinFET) transistor model parameters are adopted from predictive technology model (PTM) [24] while the Stanford virtual-source CNFET model is utilized for CNFET based transistors [11-13].
Fig. 7 Three-line bus structure used for capacitive crosstalk induced delay calculations The Table 3 lists device parameters of FinFET and virtual-gate CNFET based drivers and repeaters used in this work. Table 3 FinFET and CNFET device parameters
FinFET Parameters [5-7, 24] CNFET Parameters[11-13]
Technology node (nm) 7 Technology node (nm) 7 Gate length (nm) 7 Physical channel length (nm) 7 Equivalent oxide thickness (nm) 0.84 High-k top gate dielectric thickness (nm) 3.0 Height of Fin (nm) 172 CNT diameter (nm) 1.2 Effective transistor channel width 350 Width of metal gate (nm) 350 (nm) Relative gate dielectric constant 3.9 High-k top gate material dielectric constant 16.0
Relative substrate dielectric constant 11.9 Substrate material (SiO2) dielectric constant 3.9 Supply voltage (V) 0.7 Supply voltage (V) 0.7 Channel doping (cm-3) 1022 Number of total CNTs under metal gate 20
The crosstalk induced delay is primarily of two types-out-of-phase and in-phase depending upon phase of victim- line signal with respect to aggressor-lines. A step input of 0.7V is applied to aggressors as well as victim-line at 1GHz frequency. A load capacitance of 3fF is utilized for all simulations. The OPXT delay is worst-type as both aggressor-lines influence the victim-line signal in opposite phase direction. This causes severe deterioration of signal quality on victim-line resulting in increased delay. The Fig. 8a illustrates victim-line out-of-phase waveforms achieved at near/far end of the line driven by FinFET driver and repeaters for Cu, pristine-MLGNR, and Li-MLGNR interconnect materials at 1000 µm length. As the waveforms reveal near-end nodes experience minimum crosstalk-induced delay while the far-end node undergoes maximum delay. The Fig. 8b describes victim-line out-of-phase waveforms achieved at near/far end of the line driven by CNFET driver and repeaters. In case of IPXT delay, since victim-line signal is in phase with aggressor-line signals, it almost does not experience any signal deterioration.
(a) (b) Fig. 8 Comparative out-of-phase victim-line output waveforms for worst-case crosstalk induced delay of Cu, pristine-MLGNR, and Li-MLGNR, nanointerconnect materials using a. FinFET and b. CNFET repeaters
(a) (b) Fig. 9 a. OPXT induced delay results calculated using three-line bus model for Cu, pristine, and Li-MLGNR nanointerconnect materials with FINFET and CNFET repeaters. Crosstalk induced delay computations, and b. IPXT induced delay results The waveforms in Fig. 9a illustrates comparative OPXT induced delay exhibited by Cu, pristine-MLGNR, and Li- MLGNR materials for interconnect lengths ranging from 100 to 1000 µm driven by FinFET and CNFET repeaters, respectively. As can be seen from Fig. 9a in case Cu, CNFET repeaters offer OPXT delay reductions of 15.5 and 5% at 100 and 500 µm lengths as compared to their FinFET counterparts while they exhibit reductions of 5 and 9.8% at 600 and 1000 µm lengths. For pristine-MLGNR interconnects CNFET repeaters suffers OPXT delay reductions of 5.5 and 18.6 % at 100 and 1000 µm lengths as compared to their FinFET counterparts. In case of Li-MLGNR interconnects, CNFET repeaters exhibits OPXT delay reductions of 38.5 and 37.6 % at 100 and 1000 µm lengths as compared to their FinFET counterparts. Similarly, in case of in-phase crosstalk delay calculations as can be seen from Fig. 9b, for Cu, FinFET repeaters offer IPXT delay reductions of 12.9 and 23.4 % at 100 and 1000 µm lengths as compared to their CNFET counterparts. For pristine-MLGNR interconnects, FinFET repeaters offer IPXT delay reductions of 16.1 and 33.4 % at 100 and 1000 µm lengths. In case of Li-MLGNR interconnects CNFET repeaters exhibits IPXT delay reductions of 34.7 and 33.2 % at 100 and 1000 µm lengths as compared to their FinFET counterparts.
(a) (b) Fig. 10 a. Peak NEXT noise voltage calculated using three-line bus model for Cu, pristine, and Li-MLGNR nanointerconnect materials with FinFET and CNFET repeaters, and b. Peak FEXT noise voltage. The results in Fig. 10a-b illustrate peak near-end and far-end crosstalk noise voltages calculated using three-line bus model with interconnect length varying from 100 to 1000 µm for Cu, pristine-MLGNR, and Li-MLGNR materials driven by FinFET and CNFET based drivers and repeaters, respectively. As can be seen from Fig. 10a in case of Cu, CNFET repeaters offer peak NEXT noise reductions of 23 and 22.6% at 100 and 1000 µm lengths as compared to their FinFET counterparts. For pristine-MLGNR interconnects CNFET repeaters offer peak NEXT noise reductions of 43.9 and 40.8 % at 100 and 1000 µm lengths as compared to their FinFET counterparts. In case of Li-MLGNR interconnects FinFET repeaters exhibits peak NEXT noise reductions of 45.7 and 19.6 % at 100 and 1000 µm lengths as compared to CNFET counterparts. Similarly, in case of peak FEXT noise voltage calculations as can be seen from Fig. 10b, for Cu, CNFET repeaters offer reductions of 37.4 and 5.7 % at 100 and 700 µm lengths as compared to their FinFET counterparts while afterwards CNFET repeaters exhibit reductions of 14.5 and 13.8 % at 800 and 1000 µm lengths. For pristine-MLGNR, both FinFET and CNFET repeaters exhibit almost equal FEXT peak noise voltage. In case of Li-MLGNR, FinFET repeaters exhibits peak FEXT noise reductions of 45.7 and 41.3 % at 100 and 1000 µm lengths as compared to their CNFET counterparts.
6. Transient Analysis The transient analysis of equivalent π-type ESC model of bundled MLGNR has been presented in this work and compared against the conventional Cu nanointerconnects. The SPICE simulations were performed to calculate the delay, power, and energy-delay-product results. The Fig. 11a illustrates comparative delay results of Cu, pristine-MLGNR, and Li-doped MLGNR for interconnect length varying from 100 to 1000 µm. The delay results of Cu using FinFET repeaters demonstrate reductions of 13 to 23.6 % as compared to CNFET repeaters at lengths of 100 and 1000 µm. In case of pristine-MLGNR, FinFET repeaters exhibit 26.1 and 46.3% reductions as compared to CNFET repeaters. For Li-MLGNR using CNFET repeaters, reductions of 34.7 and 29.8 % are observed in delay over FinFET repeaters.
(a) (b) Fig. 11: Comparative a. propagation delay and b. Average power results of Cu, pristine-MLGNR, and Li-doped MLGNR nanointerconnect materials using FinFET and CNFET repeaters.
Fig. 12 Comparative energy-delay-product (EDP) results of Cu, pristine-MLGNR, Li-doped MLGNR nanointerconnect materials using FinFET and CNFET repeaters. The Fig. 11b illustrates comparative average power results of Cu, pristine-MLGNR, and Li-doped MLGNR for interconnect length varying from 100 to 1000 µm. The average power results of Cu using CNFET repeaters demonstrate reductions of 56.4 and 57.2 % for lengths of 100 and 1000 µm as compared to FinFET repeaters. In case of pristine MLGNR, CNFET repeaters exhibit 24.1 and 22.6 % reductions as compared to FinFET repeaters. For Li-MLGNR using CNFET repeaters, average power reductions of 92.8 and 88.7 % are observed over FinFET repeaters. The Fig. 12 illustrates comparative energy-delay-product results of Cu, pristine-MLGNR, and Li-doped MLGNR for length varying from 100 to 1000 µm. The EDP results of Cu using CNFET repeaters demonstrate reductions of 42.5 and 26.7 % as compared to FinFET repeaters at lengths of 100 and 1000 µm, respectively. In case of pristine MLGNR, FINFET repeaters exhibit 28.3 and 62.7 % EDP reductions as compared to CNFET repeaters. For Li-MLGNR using CNFET repeaters, EDP reductions of 97 and 94.5 % are observed over FinFET repeaters. 7. Conclusion This paper presents RF and crosstalk analysis of Cu, pristine-MLGNR, and Lithium-doped MLGNR nanointerconnects at 7 nm technology node. The results reveal that pristine and lithium-doped MLGNRs need 56 and 94 % less repeaters as compared to Cu at length of 1000 µm. The Lithium-doped MLGNRs demonstrates 219 and 110 folds enhancement in f3dB bandwidth with FinFET and CNFET repeaters in comparison to Cu at 1000 μm. The OPXT induced delay results for Cu and Pristine MLGNR demonstrate 9.8 and 18.5% reductions using FinFET repeaters for global level length of 1000 µm as compared to CNFET repeaters. However, for Li-MLGNR, CNFET repeaters exhibit 37.6 % reduction in OPXT delay than FinFET repeaters. The peak NEXT noise voltage calculations for Cu and pristine-MLGNR reveal 22.6 and 40.8% reductions using CNFET repeaters at length of 1000 µm while for Li-MLGNR FinFET repeaters exhibit 24.4 reduction in comparison to CNFET repeaters. Similarly, peak FEXT noise calculations for Cu and Li-MLGNR demonstrate 13.75 and 41.22 % reductions using FinFET repeaters while for pristine-MLGNRs CNFET repeaters exhibit 14.9 % reductions. CNFET repeaters demonstrate 26.7 and 94.5 % EDP reductions for Cu and Li-MLGNR materials whereas in case of pristine-MLGNR FinFET repeaters provide 62.8 % EDP reductions.
Conflict of Interest The authors declare that they have no conflict of interest. REFERENCES
1. 2013 Edition Interconnects, International Technology Roadmap for Semiconductor. Accessed: March 20, 2020. [Online]. Available: http://www.itrs2.net/ 2. Li, H., Xu, C., Srivastava, N., Banerjee, K.: Carbon nanomaterials for next-generation interconnects and passives: Physics, status, and prospects. IEEE Trans. on electron devices, 56(9), 1799-1821 (2009) 3. Pan, C., Naeemi, A.: A paradigm shift in local interconnect technology design in the era of nanoscale multigate and gate-all- around devices. IEEE Electron Device Letters, 36(3), 274-276 (2015). 4. Ismail, Y. I., Friedman, E. G.: Effects of inductance on the propagation delay and repeater insertion in VLSI circuits. In procc. 1999 Design Automation Conference. New Orleans, LA, USA, 1999, 721-724. 5. Shapiro, A.E., Friedman, E.G.: Interconnect Delay Model for Wide Supply Voltage Range Repeater Insertion in Sub-22 nm FinFET Technologies. Journal of Low Power Electronics, 13(3), 395-401 (2017) 6. Sinha, S., Yeric, G., Chandra, V., Cline, B., Cao, Y.: Exploring sub-20nm FinFET design with predictive technology models. In DAC Design Automation Conference. 283-288 (2012) 7. Sinha, S., Cline, B., Yeric, G., Chandra, V., Cao, Y.: Design benchmarking to 7nm with FinFET predictive technology models. In Proceedings of the 2012 ACM/IEEE international symposium on Low power electronics and design. 15-20 (2012) 8. Sethi, D., Kaur, M., Singh, G.: Design and performance analysis of a CNFET-based TCAM cell with dual-chirality selection. Journal of Computational Electronics, 16(1), 106-114 (2017) 9. Deng, J., Wong, H.S.P.: A compact SPICE model for carbon-nanotube field-effect transistors including nonidealities and its application—Part I: Model of the intrinsic channel region. IEEE Transactions on Electron Devices, 54(12), 3186-3194 (2007) 10. Deng, J., Wong, H.S.P.: A compact SPICE model for carbon-nanotube field-effect transistors including nonidealities and its application—Part II: Full device model and circuit performance benchmarking. IEEE Transactions on Electron Devices, 54(12), 3195-3205 (2017) 11. Lee, C.S., Pop, E., Franklin, A.D., Haensch, W., Wong, H.S.: A compact virtual-source model for carbon nanotube FETs in the sub- 10-nm regime—Part I: Intrinsic elements. IEEE transactions on electron devices, 62(9), 3061-3069 (2015) 12. Lee, C.S., Pop, E., Franklin, A.D., Haensch, W., Wong, H.S.P.: A compact virtual-source model for carbon nanotube FETs in the sub-10-nm regime—part II: Extrinsic elements, performance assessment, and design optimization. IEEE Transactions on Electron Devices, 62(9), 3070-3078 (2015) 13. Lee, C.S., Wong, H.S.P.: Stanford virtual-source carbon nanotube field-effect transistors model, Technical User’s Manual. Dept. Elect. Eng., Stanford Univ., Stanford, CA, USA (2015) 14. Sarkar, D., Xu, C., Li, H., Banerjee, K.: High-frequency behavior of graphene-based interconnects—Part I: Impedance modeling. IEEE Transactions on Electron Devices, 58(3), 843-852 (2011) 15. Sarkar, D., Xu, C., Li, H., Banerjee, K.: High-frequency behavior of graphene-based interconnects—Part II: Impedance analysis and implications for inductor design. IEEE transactions on electron devices, 58(3), 853-859 (2011) 16. Bhattacharya, S., Das, D. and Rahaman, H.: Stability analysis in top-contact and side-contact graphene nanoribbon interconnects. IETE Journal of Research, 63(4), 588-596 (2017) 17. Majumder, M.K., Kukkam, N.R. and Kaushik, B.K.: Frequency response and bandwidth analysis of multi-layer graphene nanoribbon and multi-walled carbon nanotube interconnects. Micro & Nano Letters, 9(9), 557-560 (2014) 18. Kaur, M., Gupta, N., Singh, A.K.: Crosstalk analysis of coupled MLGNR interconnects with different types of repeater insertion. Microprocessors and Microsystems, 67, 18-27 (2019) 19. Lu, Q., Zhu, Z., Yang, Y., Ding, R.: Analysis of propagation delay and repeater insertion in single-walled carbon nanotube bundle interconnects. Microelectronics Journal, 54, 85-92 (2016) 20. Liang, F., Wang, G., Ding, W.: Estimation of time delay and repeater insertion in multiwall carbon nanotube interconnects. IEEE transactions on electron devices, 58(8), 2712-2720 (2011) 21. Liu, P.W., Cheng, Z.H., Zhao, W.S., Lu, Q., Zhu, Z., Wang, G.: Repeater insertion for multi-walled carbon nanotube interconnects. Applied Sciences, 8(2), 236 (2018) 22. Banerjee, K., Mehrotra, A.: A power-optimal repeater insertion methodology for global interconnects in nanometer designs. IEEE Transactions on Electron Devices, 49(11), 2001-2007 (2002) 23. Zhao, W.S., Liu, P.W., Yu, H., Hu, Y., Wang, G., Swaminathan, M.: Repeater insertion to reduce delay and power in copper and carbon nanotube-based nanointerconnects. IEEE Access, 7, 13622-13633 (2019) 24. Predictive technology model, Available from: https://ptm.asu.edu 25. Kumari, B., Sahoo, M.: Performance and signal integrity analysis of intercalation-doped MLVGNR interconnects. IET Circuits, Devices & Systems, 14(2), 192-199 (2019) 26. Steinhögl, W., Schindler, G., Steinlesberger, G., Engelhardt, M.: Size-dependent resistivity of metallic wires in the mesoscopic range. Physical Review B, 66(7), 075414 (2002) 27. Im, S., Srivastava, N., Banerjee, K., Goodson, K.E.: Scaling analysis of multilevel interconnect temperatures for high-performance ICs. IEEE Transactions on Electron Devices, 52(12), 2710-2719 (2005) 28. Zhao, W.S. and Yin, W.Y.: Comparative study on multilayer graphene nanoribbon (MLGNR) interconnects. IEEE transactions on electromagnetic compatibility, 56(3), 638-645 (2014) 29. Hamedani, S.G. and Moaiyeri, M.H.: Comparative analysis of the crosstalk effects in multilayer graphene nanoribbon and MWCNT interconnects in sub-10 nm technologies. IEEE Transactions on Electromagnetic Compatibility, 62(2), 561-570 (2019) 30. Naeemi, A. and Meindl, J.D.: Compact physical models for multiwall carbon-nanotube interconnects. IEEE Electron Device Letters, 27(5), 338-340 (2006) 31. Nasiri, S.H., Faez, R., Moravvej-Farshi, M.K.: Compact formulae for number of conduction channels in various types of graphene nanoribbons at various temperatures. Modern Physics Letters B, 26(01), 1150004 (2012) 32. Nishad, A.K., Sharma, R.: Lithium-intercalated graphene interconnects: Prospects for on-chip applications. IEEE Journal of the Electron Devices Society, 4(6), 485-489 (2016) 33. Benedict, L.X., Crespi, V.H., Louie, S.G., Cohen, M.L.: Static conductivity and superconductivity of carbon nanotubes: Relations between tubes and sheets. Physical Review B, 52(20), 14935-14940 (1995) 34. Bao, W., Wan, J., Han, X., Cai, X., Zhu, H., Kim, D., Ma, D., Xu, Y., Munday, J.N., Drew, H.D. and Fuhrer, M.S.: Approaching the limits of transparency and conductivity in graphitic materials through lithium intercalation. Nature communications, 5(1), 1-9 (2014) 35. Wong, S.C., Lee, G.Y. and Ma, D.J.: Modeling of interconnect capacitance, delay, and crosstalk in VLSI. IEEE Transactions on semiconductor manufacturing, 13(1), 108-111 (2000) 36. Stellari, F. and Lacaita, A.L.: New formulas of interconnect capacitances based on results of conformal mapping method. IEEE Transactions on Electron Devices, 47(1), 222-231 (2000) 37. Ceyhan, A., Naeemi, A.: System-level design and performance modeling for multilevel interconnect networks for carbon nanotube field-effect transistors. In proce. of IEEE International Conference on IC Design & Technology, 1-4 IEEE (2012) 38. Kumbhare, V.R., Paltani, P.P., Venkataiah, C., Majumder, M.K.: Analytical study of bundled MWCNT and edged MLGNR interconnects: impact on propagation delay and area. IEEE Transactions on Nanotechnology, 18, 606-610 (2019) Figures
Figure 1
Equivalent π-type ESC model used in driver-interconnect load (DIL) con guration [15]
Figure 2
Repeater insertion to improve delay performance of interconnects Figure 3
Skin-depth degradations for Cu and GNR materials Figure 4
Transfer gain graphs of Cu, pristine and Lithium-doped MLGNRs interconnects extracted using SPICE for lengths of 500, 700, and 1000 μm with FinFET and CNFET repeaters. All transfer gain values are calculated at W=10.5 nm, H=25.2 nm. In a. Cu transfer gain graphs, in b. pristine-MLGNR graphs for Fermi energy of 0.2 eV, MFP=419 nm, and number of layers=75 in c. Stage-2 Lithium-doped MLGNR for Fermi energy of 1.5 eV, MFP=300 nm, and number of layers=68, and in d. comparative transfer gain graphs of different materials at length 1000 μm. Figure 5 f3dB bandwidth graphs of different interconnect materials with FinFET and CNFET repeaters Figure 6
Interconnect geometry for crosstalk analysis [1, 24] Figure 7
Three-line bus structure used for capacitive crosstalk induced delay calculations
Figure 8
Comparative out-of-phase victim-line output waveforms for worst-case crosstalk induced delay of Cu, pristine-MLGNR, and Li-MLGNR, nanointerconnect materials using a. FinFET and b. CNFET repeaters Figure 9 a. OPXT induced delay results calculated using three-line bus model for Cu, pristine, and Li-MLGNR nanointerconnect materials with FINFET and CNFET repeaters. Crosstalk induced delay computations, and b. IPXT induced delay results
Figure 10 a. Peak NEXT noise voltage calculated using three-line bus model for Cu, pristine, and Li-MLGNR nanointerconnect materials with FinFET and CNFET repeaters, and b. Peak FEXT noise voltage.
Figure 11
Comparative a. propagation delay and b. Average power results of Cu, pristine-MLGNR, and Li-doped MLGNR nanointerconnect materials using FinFET and CNFET repeaters. Figure 12
Comparative energy-delay-product (EDP) results of Cu, pristine-MLGNR, Li-doped MLGNR nanointerconnect materials using FinFET and CNFET repeaters.