Transistor Biasing

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Transistor Biasing Module 2:BJT Biasing Quote of the day "Peace cannot be kept by force. It can only be achieved by understanding”. ― Albert Einstein DC Load line and Bias Point • DC Load Line – For a transistor a straight line drawn on transistor output characteristics. IC – For CE circuit, the load line is a graph of collector current I versus V for a fixed C CE IB + value of R and supply voltage V C CC + VCE – Load Line? VCC VCE I C RC VBE - - V V I R – From Figure VCE=? CE CC C C – If VBE =0 then IC=0, VCE = VCC plot this point on characteristics(A). – Now assume that ICRC = VCC, i.e. IC = VCC /RC then VCE =0. Plot this point on characteristics(B). – Join points A and B by a straight line. DC Load line contd.. VCE VCC I C RC VV IC CC CE IC RC V CC B IC(sat) RC DC load line VVCE(off ) CC V A CE Example 1. Plot the dc load line for the circuit shown in Fig. Then, find the values of VCE for IC = 1, 2, 5 mA respectively. VVIRCE CC C C VCE 10 for I c 0 10 I 10mA c 110 3 IC (mA) VCE (V) 1 9 2 8 5 5 4 Example 2. For the circuit shown and Plot of the dc load line in Fig. find the values of IC for VCE = 0V and VCE for IC = 0. VVIRCE CC C C 5 I C 4.54mA V CC15V For the previous circuit shown observe the Plot of the dc load line with Rc=4.8 K find the values of IC for VCE = 0V and VCE for IC = 0. I C 3.125mA V CC15V DC Bias Point • DC Bias point or Q point – Identifies the transistor current IC and voltage VCE when no input is applied to the base terminal of the transistor. ~Vi – When an ac signal is applied to the transistor base, IB varies according to the instantaneous =+20 amplitude of signal. This causes IC to vary and consequently produces a variation in VCE. – Now consider the circuit . IC=1mA – Assume the Bias conditions shown in fig. i.e. values of IB,IC & VCE. IB=20A + – What is RC=? VCE + - 10V – The 10 K load line drawn for this circuit is VBE - shown in the next slide. Fig. DC Load line for transistor with a bias point at VCE=10V and IC =1mA. The transistor may be biased to any point on the DC Load Line. IC(mA) IB=40A 2.0 1.95 mA IB=30A 1.6 IB=+20A Q- Point 1.2 IB=20A 0.8 IB=10A IB=-20A 0.4 I =0 V 0.05 mA B CE 0 0 4 8 12 16 20 VCE=-9.5V VCE=+9.5V 19.5V 0.5V Selection of Q point • Note the collector current swings do not exceed the limits of operation(saturation and cutoff). However, as you might already know, applying too much ac voltage to the base would result in driving the collector current into saturation or cutoff resulting in a distorted or clipped waveform. Selection of Q point Optimum Q-point with amplifier operation. IC IC(sat) IB = 50 A IB IICB β IB = 40 A Q-Point IC(sat)/2 IB = 30 A IB = 20 A IB = 10 A IB = 0 A VCE VCC/2 VCC VVIRCE CC C C 11 Effect of Emitter resistance RE • Consider this Fig. • In this case RE is the DC load and the output equation will be VCC VCE IE RE • Now consider the below fig. • Collector and emitter resistors are both present , and total dc load in series with transistor is(RC + RE) VCC VCE I C RC I E RE IC IE VCC VCE IC RC RE Assignment questions 1) Problem 4.6 & 4.7 from David Bell exercise. 2) Draw the common emitter circuit and sketch the input and output characteristics. Also explain active region, cutoff region and saturation region by indicating them on the characteristic curve. 3) Draw the common base circuit and sketch the input and output characteristics. Also explain active region, cutoff region and saturation region by indicating them on the characteristic curve. 4) Determine the operating point for a silicon transistor biased by base bias method with β = 100, RB = 500KΩ RC = 2.5KΩ and VCC = 20V. Also draw the DC load line. Base Bias Method • Circuit operation & Analysis – The circuit arrangement shown in Fig is known as base bias and also as fixed IC current bias. – The Base current is constant and IB + determined by VCC and RB. V – From fig voltage drop across R is + CE B VBE - - VB =IBRB also VB = (VCC-VBE ) since VCC = VB +VBE . – Therefore the base current IB is VCC VBE I B I CQ hFE I B RB – You know that IC is I C I B can be replaced by hFE Base Bias Method contd.. V V I R This collector current can be used with CC CE C C V V I R to calculate VCE. CEQ CC CQ C • Effect of hFE(max) and hFE(min) – Practically the precise current is normally not known. – The transistor is usually identified by its type, number and maximum and minimum values of current gain that can be obtained from manufacturer’s data sheet. – In circuit analysis it is convenient to use a typical value of hFE. Which value of hFE do I use? Transistor specification sheet may list any combination of the following hFE: max. hFE, min. hFE, or typ. hFE. Use typical value if there is one. Otherwise, use hFE(ave) h FE (min) h FE (max) Consider the next example to observe the effect of maximum and minimum value of hFE 16 Example 1. The base bias circuit shown in Fig has RB =470K, RC=2.2K 1)Determine the values of VCE ,IC andIB for hFE=100. 2Calculate the maximum and minimum levels of VCE, IC when hFE(max) =50 and hFE(min) = 200. Plot load line =+18V VCC VBE 18 0.7 I B I B I B 36.8A RB 470 I C I 3.68mA IC hFE IB IC 10036.8A C 3 3 VCE VCC IC RC VCE 18 3.6810 2.210 IB + V + CE VBE - - VCE 9.9V 17 Example 1 contd. • For hFE(min) = 50: I 1.84mA IC 5036.8A C 3 3 VCE 18 1.8410 2.210 VCE 13.95V • For hFE(max) = 200: I 7.36mA IC 20036.8A C 3 3 VCE 18 7.3610 2.210 VCE 1.8V IC hFE IB • Plot the DC load line and mark Q point for three V V I R values of hCEFE. CC C C • Because of this uncertainty of Q point this method is rarely used. Fig. DC Load line for transistor with different hFE plotted for Example 1 IC(mA) 10 Q- Point for hFE=200 8 7.36 mA 6 Q- Point for hFE=100 3.68 mA4 Q- Point for hFE=50 1.84 mA2 VCE 0 0 2 4 6 8 10 12 14 16 18 13.95V 1.8V 9.9V Example 2. Determine the operating point for a silicon transistor biased by base bias method with β = 100, RB = 500KΩ RC = 2.5KΩ and VCC = 20V. Also draw the DC load line. =+20V 20 0.7 I B 3 I B 38.6A VCC VBE 50010 I B RB I C I 3.86mA IC hFE IB IC 10038.6A C 3 3 VCE VCC IC RC VCE 20 3.8610 2.510 IB + VCE + VBE - - VCE 10.35V 20 Example 2. V 20 I CC 8mA IC c(sat) 3 Rc 2.510 VCC I c(sat) 8mA IC(sat) RC Q- Point 3.86mA VVCE(off ) CC = 20V VCE 10.35V Base bias characteristics. Circuit recognition: A single resistor (RB) between the base terminal and VCC. No emitter resistor. Advantage: Circuit simplicity. Disadvantage: Q-point shift with temp. Applications: Switching circuits only. 22 Base bias characteristics. (2) Load line equations: VCC I c(sat) Rc VCE(OFF ) VCC Q-point equations: VCC VBE I B RB I CQ hFE I B VCEQ VCC I CQ RC 23 Design of Base bias circuit To design the circuit means to compute the values of resistors RB and RC for the required specifications i.e. (ICQ,VCEQ and available hFE) Design equations: I CQ hFE I B VCC VBE RB I B VCC VCEQ RC I CQ 24 Example 3. Design a base bias circuit as in fig below to have β = 100, VCE = 7 V, IC = 5mA and VCC = 20V. 3 I C 510 =+20V I B I B I B 50A hFE 100 V V 20 0.7 IC CC BE RB RB 6 I B 5010 RB 386K IB + VCE Use 390KΩ standard value + VBE - - VCC VCE 20 7 RC RC 3 I C 510 RC 2.6K Use 2.2K standard value 25 Voltage Divider method • Voltage-divider bias is the most widely used type of bias circuit. Only one power supply is needed and voltage-divider bias is more + + V stable(less variation with ) + + CE - V - than other bias types. For BE + VC this reason it will be the VB primary focus for study. VE - - - Voltage Divider method • It is seen from the fig that along with the resistor RC there is an emitter resistor RE connected in series with transistor. • Therefore the total load in series with transistor is(RC + RE), and this must be used when drawing the DC load line.
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