Vi Xử Lý,Nguyễn Hoàng Dũng,Dhbkhn

1. Giới thiệu chung về hệ vi xử lý 2. Bộ vi xử lý Intel 8088/8086 3. Lập trình hợp ngữ cho 8086 4. Tổ chức vào ra dữ liệu 5. Ngắt và xử lý ngắt 6. Truy cập bộ nhớ trực tiếp DMA 7. Các bộ vi xử lý trên thực tế

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7.1 General purpose microprocessors 7.1.1 Intel 80x86 7.1.2 Xu hướng phát triển 7.2 Microcontrollers 7.2.1 Vi điều khiển của Microchip và Motorola 7.2.2 Họ vi điều khiển 8051 7.2.3 Họ vi điều khiển AVR 7.2.4 PSOC 7.2.5 Xu hướng phát triển 7.3 Digital signal processors 7.3.1 Texas Instrumentscuu duong than cong . com 7.3.2 Motorola 7.3.3 Philips 7.3.4 Xu hướng phát triển

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Nguồn Intel 5 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 7.1.1 Vi xử lý của Intel

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6 CuuDuongThanCong.com https://fb.com/tailieudientucnttNguồn Intel © DHBK 2005 7.1.1 Vi xử lý của Intel

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7 CuuDuongThanCong.com https://fb.com/tailieudientucnttNguồn Intel © DHBK 2005 7.1.1 Intel 4004

• First microprocessor (1971) • 4-bit processor • 2300 Transistors (P- MOS), 10 mm • 0.06 MIPS, 108 KHz, 640 bytes addressable memory • -15V power supply

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• First 8-bit processor (1972) • Cost $500; at this time, a 4- bit processor costed $50 • Complete system had 2 Kbyte RAM • 200 KHz clock frequency, 10 mm, 3500 TOR, 0.06 MIPS, 16 Kbyte addressable memory • 18 pin package, multiplexed address and data bus

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• Second gen. 8-bit processor, introduced in 1974 • 40 pin package, NMOS, 500K instructions/s, 6 mm, 2 MHz, ±5V & +12V power supply, 6 KTOR, 0.64 MIPS • 64 Kbyte address space (“as large as designers want”, EDN cuu duong than cong . com1974)

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• 16-bit processor • introduced in 1979 • 3 mm, 5 a 8 MHz, 29 KTOR, 0.33 a 0.66 MIPS, 1 Mbyte addressable memory

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16 bit integer CPU 16 data

20 address

• Introduced: 1978 • Clock frequency: 8 - 10 MHz cuu duong than cong . com

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MMU 16 bit integer CPU 16 data

24 address

• Introduced: 1983 • 1.5 mm, 134 KTOR, 0.9 to 2.6 MIPS • Clock frequency: 6 -cuu25 MHz duong than cong . com

13 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 7.1.1 Intel 80386sx

MMU 32 bit integer CPU 16 data

24 address

• Introduced: 1986 • 1 mm, 275 KTOR, 16 to 33 MHz, 5 to 11 MIPS • Clock frequency: 16 cuu- 25 MHz duong than cong . com • Software support and hardware protection for multitasking

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MMU 32 bit integer CPU 32 data

32 address

• Introduced: 1988 • Clock frequency: 16 - 40 MHz • Software support andcuu hardware duong protection than cong for multitasking . com

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8 Kbyte cache 32 bit integer CPU 32 data

MMU 64 bit FPU 32 address

• Introduced: 1989 • Clock frequency: 25 - 50 MHz • Software support andcuu hardware duong protection than cong for multitasking . com • Support for parallel processing • Cache required: external memory is not fast enough

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8 Kbyte cache 32 bit integer CPU 32 data

MMU 32 address

• Introduced: 1989 • 0.8 mm, 1.2 MTOR, 20 to 41 MIPS • Clock frequency: 25 cuu- 50 MHz duong than cong . com • Software support and hardware protection for multitasking • Support for parallel processing • Cache required: external memory is not fast enough

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8 Kbyte cache 32 bit integer CPU 32 data

MMU 64 bit FPU 32 address

• Introduced: 1992 • Clock frequency: internal: 50 - 66 MHz, external: 25 - 33 MHz • Software support andcuu hardware duong protection than cong for multitasking . com • Support for parallel processing • Cache required: external memory is not fast enough

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8 Kbyte 32 bit integer 64 program cache pipelined CPU data

8 Kbyte 32 bit integer 32 data cache pipelined CPU address Static branch 64 bit FPU prediction unit

MMU

• Introduced: 1993 • (.8 mm, 3.1 MTOR) up to (.35 mm, 4.5 MTOR incl. MMX) • Clock frequency: internal:cuu duong 60 - 166 MHz,than external: cong . 66com MHz • Support for parallel processing: cache coherence protocol • Super scalar

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8 Kbyte L1 32 bit integer 64+ECC program cache pipelined CPU data

8 Kbyte L1 32 bit integer 36 data cache pipelined CPU address Dynamic branch 32 bit integer prediction unit pipelined CPU 64 bit MMU pipelined FPU to L2 cache Instruction Address dispatch unit generation unit

• Introduced: 1995, 0.35 mm, 3.3 V, 5.5 MTOR, 35W, 387 pin • Clock frequency: 150 - 200 MHz Internal, 60 - >100 MHz External • Super scalar (4 Instr./cycle),cuu duong super pipelinedthan cong (12 stages). com • Support for symmetrical multiprocessing (4 CPU) • MCM: 256-1024 Kbyte L2 4-way set associative cache

20 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 7.1.1 Intel Pentium II

16 Kbyte L1 32 bit integer 64+ECC program cache pipelined CPU data

16 Kbyte L1 32 bit integer 36 data cache pipelined CPU address Dynamic branch 64 bit prediction unit pipelined FPU 64 bit ECC MMU pipelined FPU to L2 cache Instruction Address dispatch unit generation unit

• Introduced: 1997, 0.25 mm, 2.0 V, 9 MTOR, 43 W, 242 pin • Clock frequency: 200 - 550 MHz Internal, 100 - 225 MHz L2 cache, 66 - 100 MHz External cuu duong than cong . com • Super scalar (4 Instr./cycle), super pipelined (12 stages) • Support for symmetrical multiprocessing (8 CPU) • Single Edge Contact Cartridge with Thermal Sensor: 256-1024 Kbyte L2 4-way set associative cache

21 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 7.1.1 Intel Pentium III

16 Kbyte L1 program cache 16 Kbyte L1 32 bit integer 64+ECC data cache pipelined CPU data

256 Kbyte L2 unified 32 bit integer 36 cache pipelined CPU address Dynamic branch 64 bit prediction unit pipelined FPU 64 bit MMU pipelined FPU Instruction Address dispatch unit generation unit

• Introduced: 1999, 0.18 mm , 6LM, 1.8 V, 28 MTOR, 370 pin • Clock frequency: 450 - 1130 MHz Internal, 100-133 MHz External • Super scalar (4 Instr./cycle),cuu duong super pipelinedthan cong (12 stages). com • Support for symmetrical multiprocessing (2 CPU)

22 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 7.1.1 Intel Pentium IV

16 Kbyte L1 program cache 16 Kbyte L1 32 bit integer 64+ECC data cache pipelined CPU data 32 bit integer 256/512/1024 Kbyte L2 36 pipelined CPU address Dynamic branch 64 bit prediction unit pipelined FPU 64 bit MMU pipelined FPU Instruction Address dispatch unit generation unit

• Introduced: 2002, 0.13 mm or 90nm , 1.8 V, 55 MTOR • Clock frequency: 1,4 to 3.8 GHz Internal, 400 to 800 MHz External • Super scalar (4 Instr./cycle),cuu duong super pipelinedthan cong (12 stages). com • Newer versions: Hyper threading, 3.8 MHz

23 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 7.1.1 Intel Pentium IV

• Available at 3.80F GHz, 3.60F GHz, 3.40F GHz and 3.20F GHz • • Supports Hyper-Threading Technology1 (HT Technology) for all frequencies with 800 MHz front side bus (FSB) • • Supports Intel® Extended Memory 64Technology2 (Intel® EM64T) • Supports Execute Disable Bit capability • Binary compatible with applications running on previous members of the Intel microprocessor line • Intel NetBurst® microarchitecture • FSB frequency at 800 MHz • Hyper-Pipelined Technology • Advance Dynamic Execution • Very deep out-of-ordercuu execution duong than cong . com • Enhanced branch prediction • 775-land Package

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• 16-KB Level 1 data cache • 1-MB Advanced Transfer Cache (on-die, fullspeed Level 2 (L2) cache) with 8-way associativity and Error Correcting Code (ECC) • 144 Streaming SIMD Extensions 2 (SSE2) instructions • 13 Streaming SIMD Extensions 3 (SSE3) instructions • Enhanced floating point and multimedia unit for enhanced video, audio, encryption, and 3D performance • Power Management capabilities • System Management mode • Multiple low-power states • 8-way cache associativity provides improved cache hit rate on load/store operations cuu duong than cong . com

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33 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 7.1.1 IA-64 (Itanium)

• Design started in 1994; first samples on the market in 2001 • 64-bit address space (4x109 Gbyte; we will never need that much…) • 256 64-bit integer and 128 82-bit floating point registers; 64 branch target registers; 64 1-bit predicate registers • 41 bit instruction word length • 10-stage pipeline • separate L1 data and program, 96 Kbyte L2 unified on-chip, 4 Mbyte L3 unified off-chip cuu duong than cong . com

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35 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 7.1.2 Trends for general purpose processors • Higher clock frequencies: 4.7 -> 30 GHz • Faster memory: 120 ns -> 50 ns  not proportional to clock frequency increase => use of caches and special DRAM memories (e.g. SDRAM) • Limited by power dissipation => decreasing power supply voltage  P ~ VxVxFrequency • Parallel processing-> Multi-core • Memory with processor instead of processor with memory

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36 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 7.1.2 The future: general characteristics

Roadmap 2001 2002 2004 2007 2010 2013 2016

Roadmap 1998 1997 1999 2002 2005 2008 2011 2014

Roadmap 1995 1995 1998 2001 2004 2007 2010

Line width (nm ) 350 250 180 130 90 65 45 32 22

N u m b e r o f 18 22 22- 24 24- 26- 28 29-

m a s k s 24 26 28 30

W a f e r s i z e 200 200 300 300 3 00 3 00

( m m )

N u m b e r o f 4 - 5 6 6 - 7 7 7 - 8 8 - 9 9 10

w iring levels

Power supply 3 . 3 1 . 8 - 1 . 5 - 1 . 1 - 1 . 0 - 0 . 7 - 0 . 6 0 . 5 0 . 4

V : d e s k t o p 2 . 5 1 . 8 1 . 5 1 . 2 0 . 9

Max. power 80 70 90 130 160 170 175 183

dissipation/chip

Will 22 cuunm beduong the end than of thecong scaling . com race for CMOS? Some believe10 nm will be the end… …thereafter, semiconductor drive will be scattered (MEMS, sensors, magnetic, optic, polymer, bio, …) Depending on application domain: besides and beyond silicon 37 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 7.1.2 Besides and beyond silicon (e.g. polymer electronics)

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38 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 Besides and beyond silicon: applied to future ambient intelligent environments

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39 CuuDuongThanCong.com https://fb.com/tailieudientucntt© Emile Aarts, HomeLab, Philips © DHBK 2005 Besides and beyond silicon: applied to future ambient intelligent environments

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40 CuuDuongThanCong.com https://fb.com/tailieudientucntt© Emile Aarts, HomeLab, Philips © DHBK 2005 Besides and beyond silicon: applied to ambient intelligent HomeLab (2002)

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41 CuuDuongThanCong.com https://fb.com/tailieudientucntt© Emile Aarts, HomeLab, Philips © DHBK 2005 The future: high performance (mP)

Roadmap 2001 2001 2004 2007 2012 2016

Roadmap 1998 1997 1999 2002 2005 2008 2011 2014

Roadmap 1995 1995 1998 2001 2004 2007 2010

Number of TOR 6M 11M 21M 76M 200M 520M 1 . 4 G 3 . 6 G

On chip local 750 1250 2100 3500 6000 10000 16903

clock freq. (M Hz)

On chip global 300 375 1200 1600 2000 2500 3000 3674

clock freq. (M Hz)

Chip size (m m 2 ) 250 300 340 430 520 620 750 901

• CTO Intel says in 2001  2005 425 MTOR 100 nm 1600 mm2 30 GHz on chipcuu duong than cong . com without specific measures like individual transistor power-down: 3000 W, i.e. 3000 amps...  1.8 GTOR in 2010

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Performance 1M 100K

10K 55%/year 1K 100 10

1 Time 1980 1985 1990 1995 2000 2005 cuu duong than cong . com Exponential growth for 3 decades! This is called „Moore‟s law‟: number of transistors doubles every 18 months (Gordon Moore, founder Intel Corp.) 44 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 7.1.2 Processor performance

• Smaller line size  More transistors => parallelism 1983: 1 instruction per 4 clock cycles 2002: 8 instructions per clock cycle  Smaller capacitors => faster 1983: 4 MHz 2002: 2800 MHz  Speed-up: 25000 • Enables new applications  UMTS with large rolled-up OLED screen enabling web downloadable services (e.g. virtual meetings) • Do we find applicationscuu duong that than are cong demanding . com enough for next decade‟s processors?

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7.1.2 The future: DRAM

Roadmap 2001 2003 2007 2011 2016 ? ?

Roadmap 1998 1997 1999 2002 2005 2008 2011 2014

Roadmap 1995 1995 1998 2001 2004 2007 2010

Num ber of bits 64M 256M 1G 4G 16G 64G 256G 1T

p e r c h i p

Chip size (m m 2 ) 190 280 400 560 790 1120 1580 2240

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Performance 1M Processor 100K

10K 55%/year Gap 1K 100 10 Memory 10%/year 1 Time 1980 1985 1990 1995 2000 2005 cuu duong than cong . com

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• Skills: center of gravity  USA: processors (Intel, Motorola, TI, …)  Japan: memory (NEC, Toshiba, …)  Future: IC = processor + memory Where??? • Memory density grows faster than needs  1983: 512 Kbyte @ 64 Kbit/chip = 64 chips/PC  2001: 256 Mbyte @ 512 Mbit/chip = 4 chips/PC  Compensated if you sell at least 16 times more PCs…  … or if you find new applications (UMTS, car,…)  2010: 4 Gbyte @ 64 Gbit/chip = 0.5 chip/PC  No need for suchcuu a largeduong memory than chip…cong . com  … unless you find new applications (3D video…)

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Power (W/cm2) 1K

Nuclear reactor 100

P 4 Hot plate P II P III 10 P Pro 386 P 486 1

1.5m 1m 0.7m 0.5m 0.35m 0.25m 0.18m 0.13m 0.1m Line width cuu duong than cong . com Processor architecture design driven by memory bottleneck & power problem!

Nevertheless, „cooling tower‟ is necessary!

49 CuuDuongThanCong.com https://fb.com/tailieudientucntt© Fred Pollack, Keynote at Micro99 © DHBK 2005 7.1.2 Power consumption

Cooling “tower”

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• Let us do a calculation:  How long could a GSM using a Pentium 3 (hardly powerful enough…) last on a single battery charge?  Capacity of a battery: 600 mAh @ 4V = 2400 mWh  Power consumption Pentium 3: 45 W  One charge lasts for … 3 minutes!!! • Let us turn the computation upside down:  We want a GSM to last for 240 hours on a single charge. How much power may be consumed by the processor?  Capacity of a battery: 600 mAh @ 4V = 2400 mWh  Power consumptioncuu duong processor: than 10 cong mW . com  Possible via specialization to the application: dedicated hardware…

51 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 7.1.2 Summary on technological trends • Technologically speaking, we can have the same exponential evolution for another decade • This gives us at least 4 decades of exponential evolution, never seen in history • End-user price stayed the same or even decreased  Since 30 years, the price for a brand new processor is 1000 USD • So far for the good news…

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52 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 7.1.2 Design issues

Performance Design 1M complexity 100K

10K 55%/year Gap 1K 100 Design 10 productivity 10%/year 1 Time 1980 1985 1990 1995 2000 2005

Unfortunately,cuu duong Gordon than Moore‟s cong law. com is also valid for the design complexity, which doubles every 18 months…

… and worse, design productivity doubles only every 10 years

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• We can build exponentially complex circuits, but we cannot design them  Design of Pentium 4: 8 years, during last 2 years with a team of 1000 persons  Who can afford this???

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55 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 7.2.1 Giới thiệu về vi điều khiển

• Vi điều khiển = CPU + Bộ nhớ + các khối ghép nối ngoại vi + các khối chức năng  EEPROM  RAM  ADC/DAC  Timer  Bộ tạo xung nhịp  PWM  UART  USB  ... cuu duong than cong . com

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• Vi xử lý là một CPU được sử dụng trong các máy tính. • Các vi bộ điều khiển và các bộ vi xử lý có ba điểm khác nhau chính sau:kiến trúc phần cứng, phạm vi ứng dụng, và đặc điểm tập lệnh. • Kiến trúc phần cứng: Một bộ vi xử lý chỉ là một CPU đơn lẻ trong khi một bộ vi điều khiển là một IC chứa CPU và các mạch ngoại vi chính của một máy tính hoàn chỉnh (như RAM, ROM, giao diện nối tiếp, giao diện song song, bộ định thời, mạch xử lý ngắt) • Ứng dụng: Vi xử lý thường được dùng như một CPU trong các máy tính trongcuu khiduong các than vi điều cong khiển . com được sử dụng trong các thiết bị nhỏ để điều khiển các hoạt động.

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• Tập lệnh:  Tập lệnh của vi xử lý thiên về xử lý dữ liệu. Chúng có thể làm việc với 4 bit, byte, word, thậm chí double word. Chế độ địa chỉ cho phép truy nhập các mảng dữ liệu lớn bằng cách sử dụng con trỏ và địa chỉ offset.  Tập lệnh của vi điều khiển dùng để điều khiển các truy nhập vào và ra. Chúng có các lệnh cho phép thiết lập và xoá các bit riêng rẽ và thực hiện các thao tác với bit. Có các lệnh cho các hoạt động vào/ra, đo thời gian các sự kiện, cho phép và thiết lập các mức độ ưu tiên cho các ngắt ngoài. • Khả năng xửcuu lý của duong vi điều than khiển cong thấp. com hơn rất nhiều so với vi xử lý.

58 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 7.2.1 Microcontroller facts

• 99% processor market • Shipments- > 16 Billion in 2000, 8 bit > 1/2 market • Major Players: Microchip 16Fxx, Intel 8051, Motorola MC68HC05, National COP800, SGS/Thomson ST62, Zilog Z86Cxx

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• High-Performance RISC CPU:  Only 33 single word instructions to learn  All instructions are single cycle (200 ns) except for program branches which are two-cycle  Operating speed: DC - 20 MHz clock input  DC - 200 ns instruction cycle  12-bit wide instructions  8-bit wide data path  Seven or eight special function hardware registers  Two-level deep hardware stack  Direct, indirect and relative addressing modes for data and instructionscuu duong than cong . com

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• Peripheral Features:  8-bit real time clock/counter (TMR0) with 8-bit programmable prescaler  Power-On Reset (POR)  Device Reset Timer (DRT)  Watchdog Timer (WDT) with its own on-chip  RC oscillator for reliable operation  Programmable code-protection  Power saving SLEEP mode • Applications:  high-speed automotive and appliance motor control  low-power remotecuu ransmitters/receivers duong than cong . com  pointing devices and telecom processors.

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32 bit 2 Timers 16 integer CPU data 1 Serial asynch. FT unit: watchdog 24 Buffered I/O clock&bus monitor address 12 Programmable chip selects 7 Interrupt logic

• Clock frequency: > 16 MHz • MC683xx: modular microcontroller unit: MC68000 core plus customized peripherals cuu duong than cong . com • Website: www.freescale.com

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32 bit Timer PU 16 integer CPU data 1 Serial asynch. FT unit: watchdog 24 Buffered I/O clock&bus monitor address 12 Programmable 2 Kbyte RAM chip selects 7 Interrupt logic

 48 Parallel I/O

• Clock frequency: > 16 MHz • MC683xx: modular microcontroller unit: MC68000 core plus customized peripherals cuu duong than cong . com

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32 bit 2 Timers 16 integer CPU data 2 Serial asynch. FT unit: watchdog 32 I/O clock&bus monitor address 4 Programmable 2 channel chip selects DMA controller 7 Interrupt logic

 16 Parallel I/O

• Clock frequency: > 16 MHz • MC683xx: modular microcontroller unit: MC68000 core plus customized peripherals cuu duong than cong . com

65 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 7.2.1 Motorola MC68F333

• 64 Kbyte on chip flash EEPROM • 68020 processor • 4 Kbyte SRAM cuu duong than cong . com • 8 channel 10-bit ADC • 16 channel 16-bit timer • several interfaces • Introduced in 1994 66 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005

7.2.1 Motorola MC68HC16

cuu duong than cong . com • 16-bit microprocessor • Introduced in 1994 www.freescale.com

67 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 7.2.1 Motorola MC68HC05

cuu duong than cong . com

68 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 7.2.1 Motorola MC68HC05

Hardware features • Fully static design featuring the industry standard M68HC05 family CPU core • On chip crystal oscillator with divide by 2 or a software selectable divide by 32 option (SLOW mode) • 2.1 MHz internal operating frequency at 5V; 1.0 MHz at 3V • High speed version available • 176 bytes of RAM • 5936 bytes of user ROM plus 14 bytes of user vectors • 256 bytes of byte erasable EEPROM with internal charge pump and security bit cuu duong than cong . com • Write/erase protect bit for 224 of the 256 bytes EEPROM • Self test/bootstrap mode • Power saving STOP, WAIT and SLOW modes

69 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 7.2.1 Motorola MC68HC05

• Three 8-bit parallel I/O ports and one 8-bit input-only port • Software option available to output the internal E-clock to port pin PC2 • 16-bit timer with 2 input captures and 2 output compares • Computer operating properly (COP) watchdog timer • Serial communications interface system (SCI) with independent transmitter/receiver baud rate selection; receiver wake-up function for use in multi-receiver systems • 8 channel A/D converter • 2 pulse length modulation systems which can be used as D/A converters • One interrupt request input plus 4 on-board hardware interrupt sources • Available in 52-pin plastic leaded chip carrier (PLCC), 64-pin quad flat pack (QFP) and 56-pin shrink dual in line (SDIP) packages • Complete development system support available using the MMDS05 development stationcuu with duong than cong . com the M68HC05B32EM emulation module • Extended operating temperature range of -40 to +125 °C

70 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 Chương 7: Các bộ vi xử lý trên thực tế

71 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 7.2.2 Họ vi điều khiển 8051

• Hiện nay có hơn 40 công ty sản xuất các loại vi điều khiển khác nhau của họ 8051. • Một số công ty có trên 40 version 8051. • Các CORE 8051 có thể được tổ hợp trong các FPGA hay ASIC. • Trên 100 triệu vi điều khiển 8051 được bán ra mỗi năm. • Họ 8051 gặt hái được rất nhiều thành công và nó cũng trực tiếp ảnh hưởng đến cấu trúc của các họ vi điều khiển hiện nay. cuu duong than cong . com

72 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 7.2.2 MCS-51

• 8051 thuộc họ vi điều khiển MCS-51. • MCS-51 được phát triển bởi Intel và các nhà sản xuất khác (như Siemens, Philips) là các nhà cung cấp đứng thứ hai của họ này. • Tóm tắt một số đặc điểm chính của họ 8051:  4K bytes ROM trong  128 bytes RAM trong  4 cổng I/O 8-bit  2 bộ định thời 16 bit  Giao diện nối tiếp  Quản lý được 64Kcuu bộ duong nhớ code than bên cong ngoài . com  Quản lý được 64K bộ nhớ dữ liệu bên ngoài

73 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 7.2.2 Họ vi điều khiển 8051

C¸c ng¾t ngoµi C¸c sù kiÖn cÇn ®Õm

Ram trong Thanh ghi 128 byte FF chøc n¨ng ram ®Æc biÖt 80 §iÒu khiÓn Nguån 128 byte 7F ng¾t Ng¾t Trong RAM 00

CPU

Bé Qu¶n Port Port Port Port Cæng dao ®éng lý Bus 0 1 2 3 nèi cuu duong than cong . com tiÕp

XTAL 1,2 PSEN ALE §Þa chØ §Þa Më réng thÊp/d÷ liÖu chØ cao trong 8032 74 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 7.2.2 Tham khảo

• Họ vi điều khiển 8051 • www.atmel.com/products/8051/ • http://chaokhun.kmitl.ac.th/~kswichit/ • http://www.sunrom.com/

cuu duong than cong . com

75 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 Chương 7: Các bộ vi xử lý trên thực tế

76 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 7.2.3 Họ vi điều khiển AVR

Bus d÷ liÖu 8 bÝt Bé nhí flash Bé ®Õm Tr¹ng th¸i vµ Thanh ghi 1k x 16 cho ch•¬ng tr×nh kiÓm tra ®iÒu khiÓn ch•¬ng tr×nh Thanh ghi §¬n vÞ ng¾t Thanh ghi ®a n¨ng lÖnh 32 x 8 §¬n vÞ SPI

UART nèi tiÕp Bé gi¶i m· lÖnh ALU Timer/Counter 8 bÝt C¸c ®•êng ®iÒu Timer/Counter khiÓn 128 x 8 Data 16 bit víi SRAM Bé PWM®Þnh thêi cuu duong than cong . com watchdog

128x8 Bé so s¸nh EEPROM analog 15 ®•êng dÉn vµo/ra 77 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 Chương 7: Các bộ vi xử lý trên thực tế

78 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 7.2.4 Giới thiệu chung về PSoC

• PSoC là gì?  Do hãng Cypress sản xuất  Một loại công nghệ IC mới phát triển trong vài năm gần đây.  Khả năng tích hợp động các loại linh kiện số và tương tự để tạo ra các khối số hoặc tương tự với chức năng tuỳ thuộc người dùng.  Kết hợp với một vi điều khiển trung tâm.

cuu duong than cong . com

79 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 7.2.4 Cấu trúc PSoC

• Lõi PSoC  Vi xử lý 8bit, 24MHz, 4MIPS  Flash ROM (từ 16K)  RAM (128b-2kb)  Bộ điều khiển ngắt  Bus • Các khốI số  Flip-Flop, cổng logic • Các khốI tương tự  Các bộ khuếch đạI thuật toán  Điện trở  Tụ điện điều khiểncuu đóng duong ngắt than cong . com • Tài nguyên hệ thống • Đặc biệt: Debugger core

80 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 7.2.4 Ứng dụng

Xử lý tín hiệu Giao tiếp với cảm biến • Phát hiện sóng Sin • Điện trở nhiệt • Đo điện áp • Cặp nhiệt • Đo tần số • Đo tín hiệu hồng ngoạI thụ động • Điền chế/giảI điều chế • Thu siêu âm • Lọc • Đo áp suất • Nhân tương tự • FSK

cuu duong than cong . com

81 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 7.2.4 Thiết kế hệ thống sử dụng PSoC

• Chuẩn bị  IC  Chương trình thiết kế: PSoC Designer  Chương trình nạp và mạch nạp • Các bước thiết kế PSoC sử dụng PSoC designer  Thiết kế “cứng” Lựa chọn “linh kiện” để đưa vào các khốI số, tương tự Đưa các linh kiện vào các khốI và kết nốI Thiết lập các thông số  Lập trình Kích hoạt các linh kiện: Component_Start() Viết các thuậtcuu toán duong sử dụng than linh kiện cong . com Vòng lặp vô tận

82 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 7.2.4 Một số linh kiện

• ADC (6-14 bit) • DAC (6-9 bit) • Khuếch đạI • DTMF • Bộ lọc (thông thấp, thông dảI) • Bộ đếm, bộ định thờI (8-24 bit) • Dồn kênh: số+tương tự • Các linh kiện số: I2C, UART, giao tiếp LCD, mã CRC, mã giả ngẫu nhiên, giao tiếp chuẩn thu /phát hồng ngoại cuu duong than cong . com

83 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 7.2.4 Chọn linh kiện

Linh kiện trong hệ thống

Tài nguyên hệ thống

Chọn Hướng linh dẫn sử kiện cuu duong than cong . com dụng linh kiện

Thông số chung

Thông

số linh ố

kiện S ự

cuu duong than cong . com t ng

ươ T

Quản lý theo dự án

cuu duong than cong . com

7.2.5 Trends for microcontrollers • Standard CPU core surrounded by peripherals taken from a vast library • Single architecture line is whole family  different memory & on-chip peripherals  for embedded applications  Deterministic behavior no caches, no virtual memory, but on-chip RAM no out-of-order execution delayed branch prediction

cuu duong than cong . com

7.2.5 Trends for microcontrollers • Word length as small as possible  4 bit: 2%  8 bit: 36%  16 bit: 25%  32 bit: 34%  64 bit: 3% • Not pushing the limits of performance for cost reasons

cuu duong than cong . com

90 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 7.3.1 Texas Instruments TMS320C20x Low end consumer Fixed Point

Dual access fixed MAC 16 data RAM 16x16+32->32 data

PROM Selection of 18 peripherals: address serial comm., Loop controller timers,... I/O 16 data

16 address

• Series continued; typicalcuu app.:duong Digital than camera, cong feature . com-phones, disk drives, Point-of-Sales Terminal • 40 MHz, 3.3-5V, 3LM • Available as core

91 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 7.3.1 Texas Instruments TMS320C24x Low end consumer Fixed Point

Dual access fixed MAC 16 data RAM 16x16+32->32 data

PROM 8 output PWM 16 address Loop controller 8 channel A/D

Selection of CAN bus peripherals: controller serial comm., timers,... watchdog

• Series continued; typicalcuu app.:duong electrical than motorcong control . com • 50 MHz, 5V

32 bit XRAM 32 floating add data 32 bit YRAM 24 floating multiply address PRAM ACU I/O 32 Loop controller ACU data

Selection of 24 peripherals: address serial comm., timers, DMA, ... • Series discontinued;cuu typical duong app.: speech,than cong audio . com • 60 MHz, 3.3-5V, 144 pin • Super scalar

93 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 7.3.1 Texas Instruments TMS320C4x Floating Point Message Passing 20 MB/s 32 bit 4KByte XRAM 32 floating add data 32 bit 4KByte YRAM 32 floating multiply address 8 PRAM ACU

32 Loop controller ACU data

12 channel 32 DMA controller Serial link, address timers

• Series discontinued; typical app.: prototyping, radar • 60 MHz, 5V, 325 pin cuu duong than cong . com • Super scalar; message passing multiprocessor

94 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 7.3.1 Texas Instruments TMS320C54xx High end consumer Fixed Point

Dual access Fixed ALU 32 XRAM 32+32->40 data Fixed Add YRAM 17 32+32->40 address Fixed multiply PROM 17x17->34 I/O 16 Loop controller Viterbi data

6 channel ACU 16 DMA controller address Buffered serial ACU links, timers, ... • Series continued; typicalcuu app.:duong GSM, than set- topcong box, . audiocom • 1.8-5V, max. 160 MHz, 144 pin, .15mm (1999), 0.32mW/MIPS for the core • Specialized on-chip unit: will occur more often in future • e.g. C5420: dual core + 2x100 MW on-chip SRAM e.g. C5402: 5$ for 100 MIPS

95 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 7.3.1 Texas Instruments TMS320C5510 High end consumer Fixed Point

Dual access Fixed ALU XRAM (256 Kbyte) 32+32->40 YRAM Fixed Add 32 (64 Kbyte) 32+32->40 data

PROM Fixed multiply 24 32 KByte 17x17->34 address P-cache Fixed multiply 24 KByte 17x17->34 I/O 16 Power Mgment Viterbi data

6 channel ACU 16 DMA controller address Buffered serial ACU links,cuu timers, duong ... than cong . com • Series continued; typical app.: UMTS handheld • 1.6V, 200 MHz, .15mm (2000), 400 MIPS,0.05mW/MIPS (core), power management per unit and per cycle

96• Specialized on-chipCuuDuongThanCong.com unit: will occur more often in futurehttps://fb.com/tailieudientucntt © DHBK 2005 7.3.1 Texas Instruments TMS320C8x Fixed Point Video

2 Kbyte RAM1 DSP processor 1 32 DSP processor 2 address 2 Kbyte RAM16 X- DSP processor 3 data bar 64 2 Kbyte I-cache1 DSP processor 4

2 Kbyte I-cache4 General purpose 4 Kbyte D-cache RISC processor

4 KByte I-cache Video controller

Transfer 2 KByte RAM cuu duong than congcontroller . com • Series discontinued; typical app.: video phone, video conferencing, multimedia workstations • Introduced: 1995, 50 MHz, 305 pin • Multiprocessor-on-a-chip; sub-word SIMD for each DSP 97 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 7.3.1 Texas Instruments TMS320C6201 High end Fixed Point

fixed MUL 16KByte D-SRAM 16x16->32 External memory fixed MUL 23 16KByte D-SRAM 16x16->32 address fixed ALU 16KByte D-SRAM data 32+32->40 32 fixed ALU 16KByte D-SRAM 32+32->40 64KByte fixed ALU/branch P-SRAM/cache 32+32->40 JTAG / clock pump fixed ALU/branch Host interface 4 channel DMA 32+32->40 Ext. memory integer ACU 17 address interface 32+32 2 Serial ports integer ACU data 2 Timerscuu duong than cong32+32 . com 16 • Series continued; typical app.: modems, multimedia • 1997, 0.25 mm, 5ML, 352 pin, 200 MHz, 2.5V, 1.9W, $85 • Super scalar (8 Instr./cycle), 1600 MIPS • VLIW: 256 bit instruction word 98 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 7.3.1 Texas Instruments TMS320C6202 High end Fixed Point

2x16KByte D-RAM fixed MUL (Shadow load) 16x16->32 External memory 2x16KByte D-RAM fixed MUL 23? (Shadow load) 16x16->32 address 2x16KByte D-RAM fixed ALU data (Shadow load) 32+32->40 32 2x16KByte D-RAM fixed ALU (Shadow load) 32+32->40 2x128KB P-RAM fixed ALU/branch (Shadow load) 32+32->40 JTAG / clock pump fixed ALU/branch Expansion bus 4 channel DMA 32+32->40 Ext. memory integer ACU 17? address interface 32+32 2 Serial ports integer ACU data 2 Timerscuu duong than cong32+32 . com 32 • Series continued; typical app.: modems, multimedia • 1999, 0.18 mm, 5ML, 352 pin, 250 MHz, 1.8V, 1.9W, $130 • Super scalar (8 Instr./cycle), 2000 MIPS, scales well till 700 MHz (6000 MIPS) • Optimum choice when all data fits in on-chip memory

99 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 7.3.1 Texas Instruments TMS320C6203 High end Fixed Point

2x64KByte D-RAM fixed MUL (Shadow load) 16x16->32 External memory 2x64KByte D-RAM fixed MUL 23? (Shadow load) 16x16->32 address 2x64KByte D-RAM fixed ALU data (Shadow load) 32+32->40 32 2x64KByte D-RAM fixed ALU (Shadow load) 32+32->40 256KByte P-RAM fixed ALU/branch 128KB P-cache/RAM 32+32->40 JTAG / clock pump fixed ALU/branch Expansion bus 4 channel DMA 32+32->40 Ext. memory integer ACU 17? address interface 32+32 2 Serial ports integer ACU data 2 Timerscuu duong than cong32+32 . com 32 • Series continued; typical app.: base stations • 2000, 0.15 mm, 5ML, 18 mm2 package size, 300 MHz, 1.5V, 1.5W • Super scalar (8 Instr./cycle), 2400 MIPS • Optimum choice when all data fits in on-chip memory

100 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 7.3.1 Texas Instruments TMS320C6211 High end Fixed Point

4KByte L1 Dcache fixed MUL (2 way set assoc.) 16x16->32 External memory 4KByte L1 Pcache fixed MUL 30 (2 way set assoc.) 16x16->32 address 4x16KByte L2 fixed ALU data cache (direct map) 32+32->40 32 fixed ALU 32+32->40 fixed ALU/branch 32+32->40 JTAG / clock pump fixed ALU/branch Host port 16 channel DMA 32+32->40 Ext. memory integer ACU 17 address interface 32+32 2 Serial ports integer ACU data 2 Timerscuu duong than cong32+32 . com 16 • Series continued; typical app.: modems, multimedia • 1999, 0.18 mm, 5ML, 256 pin, 150 MHz, 1.8V, 1.5W, $25 • VLIW, 1.2 GIPS; cheap (25$ in „99, 5$ in „01) • Optimum for random access to large memory space

101• 80% of performanceCuuDuongThanCong.com of C6x with infinite on-chip memoryhttps://fb.com/tailieudientucntt © DHBK 2005 7.3.1 Texas Instruments TMS320C6416 High end Fixed Point 16 Kbyte L1P fixed MUL direct mapped 16x16->32 External memory 16 Kbyte L1D fixed MUL 30 2way dual access 16x16->32 address 1 Mbyte RAM/L2 fixed ALU data 4way 32+32->40 64 Dual EMIF & HPI & fixed ALU PCI & Utopia 32+32->40 30 address JTAG / clock pump fixed ALU/branch 64 channel DMA 32+32->40 data 3 Serial ports fixed ALU/branch 16 3 Timers 32+32->40 HPI Viterbi decoder integer ACU ? accelerator 32+32 address Turbo decoder integer ACU data accelerator 32+32 cuu duong than cong . com 32 • Samples June 2001, 0.12 mm, 6 LM, 532 pin, 400 MHz-600 MHz, 1.2V, starts at 95$ in volume • Super scalar (8 Instr./cycle), 3200-4800 MIPS • Sub-word (8bit or 16bit) parallelism

102• Specialized instr.:CuuDuongThanCong.com Galois Field Mult, bit manipulationhttps://fb.com/tailieudientucntt © DHBK 2005 7.3.1 Texas Instruments TMS320C6701 High end Floating Point

Fixed/Float MUL 16KByte D-SRAM 32x32/64x64 External memory Fixed/Float MUL 23 16KByte D-SRAM 32x32/64x64 address Fixed/Float ALU 16KByte D-SRAM data 32+32/64+64 32 Fixed/Float ALU 16KByte D-SRAM 32+32/64+64 64KByte Fixed ALU/Branch P-SRAM/cache Float 1/x & x JTAG / clock pump Fixed ALU/Branch Host interface 4 channel DMA Float 1/x & x Ext. memory integer ACU 17 address interface 32+32 Serial interface integer ACU data 2 Timerscuu duong than cong32+32 . com 16 • Series continued; typical app.: video compression • Introduced: 1998, 0.18 mm, 5ML, 352 pin, 167 MHz, 1.8V • Super scalar (8 Instr./cycle); VLIW; 1 GFLOP • Foreseen for „00: 50$ (cf. C6211) & 3 GFLOP (cf. C6202) 103 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 7.3.1 Texas Instruments TMS320C6711 High end Floating Point

4KByte L1 Dcache Fixed/Float MUL (2 way set assoc.) 32x32/64x64 External memory 4KByte L1 Pcache Fixed/Float MUL 23 (2 way set assoc.) 32x32/64x64 address 4x16KByte L2 Fixed/Float ALU data cache (direct map) 32+32/64+64 32 Fixed/Float ALU 32+32/64+64 Fixed ALU/Branch Float 1/x & x JTAG / clock pump Fixed ALU/Branch Host interface 4 channel DMA Float 1/x & x Ext. memory integer ACU 17 address interface 32+32 Serial interface integer ACU data 2 Timerscuu duong than cong32+32 . com 16 • Series continued; typical app.: video compression • 2000, 0.18 mm, 5ML, 256 pin, 100 MHz, 1.8V, 2W, $20 • VLIW, 600 MFlops • Optimum for random access to large memory space

104• 80% of performanceCuuDuongThanCong.com of C6x with infinite on-chip memoryhttps://fb.com/tailieudientucntt © DHBK 2005 7.3.1 Texas Instruments

cuu duong than cong . com

TMS320C541 (1995)

cuu duong than cong . com

TMS320C545 (1995)

cuu duong than cong . com

TMS320C80 (1994)

16 or 24 bit XRAM 24 integer CPU data

YRAM ACU 18 address PRAM ACU

Loop controller Selection of peripherals: ADC, DAC, comm., timers, PIO, ...

• 24 bit for audio: 16 bit data + overflow cuu duong than cong . com

cuu duong than cong . com

• General purpose microprocessors  Intel 80x86  Xu hướng phát triển • Microcontrollers  Vi điều khiển của Motorola  Họ vi điều khiển 8051  Họ vi điều khiển AVR  PSOC  Xu hướng phát triển • Digital signal processors  Texas Instrumentscuu duong than cong . com  Motorola  Philips  Xu hướng phát triển

112 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 Philips VSP-1 Fixed Point Video 12 512x12 bit 12 bit Memory element integer ALU 512x12 bit 12 bit Memory element integer ALU 12 bit 10x18 cross-bar integer ALU 12 10

• 12 bit for video: 8 bit data + overflow • Clock Frequency: 27 MHz • 1 instruction per samplecuu period duong for HDTV, than cong . com 2 instructions per sample period for TV

Inputs

ALU ALU ALU ME ME cuu duong than cong . com

Outputs

• 206K Transistors • 1.1W dissipation • 27 MHz clock • 176 pin • Introduced in 1991

cuu duong than cong . com

Memory ALU Element

115 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 Philips VSP-2 Fixed Point Video 12 512x12 bit 12 bit

Memory element1 integer ALU1 512x12 bit 12 bit

Memory element2 integer ALU2

12 512x12 bit 12 bit

Memory element4 integer ALU12

22x50 cross-bar 22

• 12 bit for video: 8 bit data + overflow • Clock Frequency: 54 MHz • 2 instructions per samplecuu period duong for HDTV, than cong . com 4 instructions per sample period for TV

• 1.15 M Transistors cuu duong than cong . com • 5W dissipation • 54 MHz clock frequency • 208 pin • Introduced in 1994 117 CuuDuongThanCong.com https://fb.com/tailieudientucntt © DHBK 2005 Sony Graphics Engine

• Playstation 3  Status: prototype in 2001  287.5 MTOR  256 Mbit on-chip embedded DRAM  2000-bit wide internal bus  462 mm2  180 nm CMOS

cuu duong than cong . com

Trends for DSP processors • No new generations that replace old generations, but multiple co-existing architecture lines • Word length application dependent  Automotive: 16-bit fixed point (e.g. C2x)  Speech: 32-bit floating point (e.g. C30)  Audio: 24-bit fixed point (e.g. MC56K)  Telecommunications: 16-32 bit fixed point (e.g. C5x, C6x)  Video: 12-32 bit fixed point (e.g. C8x) • Single architecture line is whole family  different memory & on-chip peripherals  for embedded applicationscuu duong (cf.than microcontrollers) cong . com

Trends for DSP processors • Deterministic behavior  no caches, no virtual memory, but on-chip RAM banks  no out-of-order execution  delayed branch prediction • Increasing address space: 12 -> 32 • Multiple functions on single chip: CPU, FPU, multiple RAM banks, ACUs, loop controller, ADC, DAC, PWM, serial interfaces, … • Often provisions for parallel processing

cuu duong than cong . com

121 CuuDuongThanCong.com https://fb.com/tailieudientucntt