DOCSLIB.ORG

Transistors to Integrated Circuits

Total Page：16

File Type：pdf, Size：1020Kb

Download full-text PDF Read full-text
Transistors to Integrated Circuits resistanc collectod ean r capacit foune yar o t d commercial silicon controlled rectifier, today's necessarye b relative .Th e advantage lineaf so r thyristor. This later wor alss kowa r baseou n do and circular structures are considered both for 1956 research [19]. base resistanc r collectofo d an er capacity. Parameters, which are expected to affect the In the process of diffusing the p-type substrate frequency behavior considerede ar , , including wafer into an n-p-n configuration for the first emitter depletion layer capacity, collector stage of p-n-p-n construction, particularly in the depletion layer capacit diffusiod yan n transit redistribution "drive-in" e donophasth f ro e time. Finall parametere yth s which mighe b t diffusion at higher temperature in a dry gas obtainabl comparee ear d with those needer dfo ambient (typically > 1100°C in H2), Frosch a few typical switching applications." would seriously damag r waferseou wafee Th . r surface woul e erodedb pittedd an d r eveo , n The Planar Process totally destroyed. Every time this happenee dth s e apparenlosexpressiowa th s y b tn o n The development of oxide masking by Frosch Frosch' smentiono t face t no , ourn o , s (N.H.). and Derick [9,10] on silicon deserves special We would make some adjustments, get more attention inasmuch as they anticipated planar, oxide- silicon wafers ready, and try again. protected device processing. Silicon is the key ingredien oxids MOSFEr it fo d ey an tpave wa Te dth In the early Spring of 1955, Frosch commented integrated electronics [22]. An account of their to Holonyak t again,i ,d "Weldi "e meaninw l g revolutionary developmen utilizatiod an t f SiOno s 2a e waferth s were again destroyed t thee Bu .nh vitae th l foundatio f today'o n s 1C industr s beeyha n smile displayed dan silicoe dth n wafer - snic e described by Holonyak [22]: and gree n coloi n n furthe(i r r instances also s techniciahi d an pink) ne H Deric. d ha k buildinn "I r variougou s experimental devices, switched from a dry-gas (typically N2 or H2) we were in contact with various groups and impurity diffusio wet-ambiena o nt t (H2O vapor individuals, but above all with Carl Frosch. carrie+ r gas) diffusion a consequenc, n a f o e Frosc consummata s hwa e process chemiso twh accident of the exhaust H2 igniting and flashing- was familiar with many types of processing back int diffusioe oth n chamber (becauss ga f eo procedure d beeha n d workingan s , wits hi h flow fluctuations) and causing H2O to cover, technician Derick n impurito , y diffusion into react with protecd an , silicoe th t n samples with silicon for several years. In spite of his oxide. The "wet" ambient, which was then considerable experience, Frosch, with dry gas immediately evaluated and adopted, created a diffusion procedures utilizing N2 or H2, protective oxide on silicon. It could be regularly reduced many of our silicon wafers to selectively remove r gaseoudfo s diffusion into "cinders, " particularly at higher temperatures the bare regions, which could the resealee nb d with oxide for higher temperature anneals or further diffusion. Many processing sequences Because we had mastered building a diff used- protective th coul f o devisee e db eus r oxidedfo , base alloyed-emitter silicon p-n-p transistor (in which f courseo , , prevented crystal pittind gan r problemspitou f o e s with diffusion)f o e on , erosion. Frosch and Derick quickly found out the p-n-p-n configurations that we could which impurities were blocked from diffusion explore was simply a modification of the p-n-p into silicon by the natural protective oxide (SiO ) transistor coule :W d fabricat diffused-base eth e 2 created in an H2O-vapor ambient and which alloyed-emitter p-n-p on one side of a p-type impurities would permeate the oxide (e.g., Ga). substrate wafer after it first was prepared with It was easy, once the issue of the oxide was an n-type diffused region (symmetrical) on known deviso t , e various scheme diffuso st e into both wafere sideth f o s. Either side coule db bloco t r o k impurity diffusion into silicone Th . chosen to form the p-n-p. The result was a p-n- process was so flexible that planar n-type p-n switch, in fact, the p-n-p-n switch of regions of any desired pattern could be prepared s exampla describe ) (b en i [19]d . (The o p-typna e substrate silicon oppositee th r o , - p , complementary versio f thino s exact structure, on-n diffused regions could be prepared on n- an n-p-n-p with Ga diffused into both sides of type silicon. All other diffusion procedures were an n-type silicon wafe d the an a rAu-Sn b suddenly rendered obsolete. We readily emitter alloyed on one side, was later converted the Frosch-diffused silicon n-p-n into introduce t a Generad l Electrie firsth ts a c a working p-n-p-n switch [19]." 12 Holonyak [22] noted "what Frosc Dericd han k added during the heating may be useful for revolutione basia th r t fo s hase do t n I don.s wa e protecting an electrical device from fact, it is the oxide on silicon that is the basis, the atmospheric conditions. For example, the vital foundatio f today'e no th f o sl 1al C f o chip d an , device might prove more stable if left silicon devices so critical to the electronics industry. enclose n i suc da hquart z envelope. Because of our (Holonyak) exploratory silicon possible b t Howeverno mako et y l ma eal t i , device work and our involvement with Frosch, we of the necessary electrical contacts through were close observers and witnesses of his work. For the quartz. In these cases some protection n a extensiv f L o BT e5 1 . examplep n o , ma e retaine yb e remova th a smaly db f o l l memorandum [177], Frosch wrote:" area of the envelope for the application of the contacts." "Thin silicon slices also were diffused with . HolonyaN r fo r preliminarb kfo S y device Holonya summarizes kha d Frosch's innovation development investigations. These were by "Frosch had, indeed, anticipated planar, oxide- hour6 1 d s an respectivel 5 diffuse , 2 r fo d y protected device processing e appreciateH . d at 1300°C in N2 saturated with water vapor immediatel e importancth y e oxides i th t f I o .e at room temperature. After diffusion, these questionabl f anyoni e e else's contributios a d ha n slices were green in color with an excellent o witmuce d existenc th ho e "chip t h th d f o an e" surface appearance. These layers were today's electronic Frosch's sa s oxide. Thi easils si y reporte havo dt e resistivitie o f t fro o s0 m1 see y simplb n y raisin e questionth g : Removee th 0 ohm 2 r squarepe s e diffusioTh . n layers oxide, say it doesn't exist, and then what would were reporte e uniforb o t d n thicknesmi s there Siliconbe? itself is,course,of criticalthe being 0.26, 0.39 and 0.76 mils respectively ingredient followed by its unique natural oxide. In for the 3 heating times. An additional run some sense it could its saidbe and that Si was made for Holonyak to produce layers of technology (its oxide) "invented" the 1C" (italics somewhat higher resistivity. In this run the entered by the author). thin silicon slices were heated for 1 hour at The benefits of SiO2 on the surface properties 1200°C followed by 16 hours at 1300°C in of silicon were concurrently, or shortly thereafter, N2 saturated with water vapo t a roor m assesse Attala'y db s group [11,178]. They believed temperature. These samples again were that growing an oxide under clean and controlled gree n i colon r with excellent surface conditions, on a properly cleaned silicon wafer, appearance. These were reporte o havt d e would lead to both a reduction of surface states 0 ohm 9 resistivitier squaro pe t s 5 e4 f o s and passivatio e silicoth f no n surface e planaTh . r with a diffusion depth of 0.66 mils. The diffused transistor develope Hoerny db i [12-15f o ] higher resistivity values obtained indicate Fairchild Semiconductor Corporatio e latth e n i n not only a lower solubility of the Sb 1950's pulled together a number of these strands as compoun quarte th n di z envelop t 1200°ea C regards the benefits of SiO2 and was in production than at 1300°C but also the essential by 1959. These included the concept that the SiO2 absencb compounS f o e d e th vapo n i r masking layer, e utilizefabricatioth n i d f o n carrier gas when the temperature was raised diffused silicon transistors, be left in place for the to 1300°C. Holonyak was able to produce passivation of p-n junctions intersecting the very promising cross-point switches from surfacgrowe case th th f eo nn ei junction , allod yan some of these Sb diffusions." diffused mesa transistors, without the necessity of growing a passivating oxide under meticulously Holonyak [22] continue sayiny sb knee g"w w clean condition se insigh[179]th r f Hoerno pe t, i Frosch's work at first hand, and realized [12-15] as well as ensuring a dielectric layer for immediately what he and Derick had done.
Load more

Recommended publications
  • High Performance Power Distribution Networks with On-Chip Decoupling Capacitors for Nanoscale Integrated Circuits
    High Performance Power Distribution Networks with On-Chip Decoupling Capacitors for Nanoscale Integrated Circuits by Mikhail Popovich Submitted in Partial Ful¯llment of the Requirements for the Degree Doctor of Philosophy Supervised by Professor Eby G. Friedman Department of Electrical and Computer Engineering The College School of Engineering and Applied Sciences University of Rochester Rochester, New York 2007 ii It has become appallingly obvious that our technology has exceeded our humanity. | Albert Einstein iii Dedication This work is dedicated to my parents, Mr. Evgeniy Antonovich and Mrs. Lyud- mila Mikhailovna, my wife Oksana, and my daughter Elizabeth Michelle. iv Curriculum Vitae Mikhail Popovich was born in Izhevsk, Russia in 1975. He received the B.S. degree in electrical engineering from Izhevsk State Technical University, Izhevsk, Russia in 1998, and the M.S. degree in electrical and computer engineering from the University of Rochester, Rochester, NY in 2002, where he is completing the Ph.D. degree in electrical engineering. He was an intern at Freescale Semiconductor Corporation, Tempe, AZ, in the summer 2005, where he worked on signal integrity in RF and mixed-signal ICs and developed design techniques and methodologies for placing distributed on-chip de- coupling capacitors. His professional experience also includes characterization of sub- strate and interconnect crosstalk noise in CMOS imaging circuits for the Eastman Kodak Company, Rochester, NY. He has authored a book and several conference and journal papers in the areas of power distribution networks in CMOS VLSI circuits, placement of on-chip decoupling capacitors, and the inductive properties of on-chip v interconnect. His research interests are in the areas of on-chip noise, signal integrity, and interconnect design including on-chip inductive e®ects, optimization of power distribution networks, and the design of on-chip decoupling capacitors.
    [Show full text]
  • Introduction to the Course. in This Lecture I Would Try to Set the Course in Perspective
    Introduction to the course. In this lecture I would try to set the course in perspective. Before we embark on learning something, it is good to ponder why it would be interesting, besides the fact that it can fetch useful course credits. What do you understand by VLSI? In retrospect, integrated circuits having 10s of devices were called small scale integrated circuits (SSI), a few hundreds were called medium scale few thousands large scale. The game stopped with VLSI as people lost the count (not really). What does the word VLSI bring to your mind? Discussion to follow. What do you understand by technology? Discussion to follow. Technology is the application of scientific knowledge for practical purposes. For example, why you may not call VLSI circuit design as VLSI technology? This is by convention in the semiconductor business research and business community. The convention is to treat fabrication technology as the “technology”. In this course we would discuss and try to learn how Silicon Integrated Circuits are fabricated. Integrated circuits are fabricated by a sequence of fabrication steps called unit processes. A unit process would add to or subtract from a substrate. Examples of unit processes can be cleaning of a wafer, deposition of a thin film of a material and so on. The unit processes are not uniquely applied to VLSI fabrication only. I can combine several of these unit processes to make solar cells. I can do same for making MEMS devices. So the unit processes can be thought of as pieces in a jigsaw puzzles. The outcome would depend on how you sequence the unit processes.
    [Show full text]
  • MOSFET - Wikipedia, the Free Encyclopedia
    MOSFET - Wikipedia, the free encyclopedia http://en.wikipedia.org/wiki/MOSFET MOSFET From Wikipedia, the free encyclopedia The metal-oxide-semiconductor field-effect transistor (MOSFET, MOS-FET, or MOS FET), is by far the most common field-effect transistor in both digital and analog circuits. The MOSFET is composed of a channel of n-type or p-type semiconductor material (see article on semiconductor devices), and is accordingly called an NMOSFET or a PMOSFET (also commonly nMOSFET, pMOSFET, NMOS FET, PMOS FET, nMOS FET, pMOS FET). The 'metal' in the name (for transistors upto the 65 nanometer technology node) is an anachronism from early chips in which the gates were metal; They use polysilicon gates. IGFET is a related, more general term meaning insulated-gate field-effect transistor, and is almost synonymous with "MOSFET", though it can refer to FETs with a gate insulator that is not oxide. Some prefer to use "IGFET" when referring to devices with polysilicon gates, but most still call them MOSFETs. With the new generation of high-k technology that Intel and IBM have announced [1] (http://www.intel.com/technology/silicon/45nm_technology.htm) , metal gates in conjunction with the a high-k dielectric material replacing the silicon dioxide are making a comeback replacing the polysilicon. Usually the semiconductor of choice is silicon, but some chip manufacturers, most notably IBM, have begun to use a mixture of silicon and germanium (SiGe) in MOSFET channels. Unfortunately, many semiconductors with better electrical properties than silicon, such as gallium arsenide, do not form good gate oxides and thus are not suitable for MOSFETs.
    [Show full text]
  • Readingsample
    Springer Series in Materials Science 106 Into The Nano Era Moore's Law Beyond Planar Silicon CMOS Bearbeitet von Howard Huff 1. Auflage 2008. Buch. xxviii, 348 S. Hardcover ISBN 978 3 540 74558 7 Format (B x L): 15,5 x 23,5 cm Gewicht: 725 g Weitere Fachgebiete > Technik > Elektronik > Mikroprozessoren Zu Inhaltsverzeichnis schnell und portofrei erhältlich bei Die Online-Fachbuchhandlung beck-shop.de ist spezialisiert auf Fachbücher, insbesondere Recht, Steuern und Wirtschaft. Im Sortiment finden Sie alle Medien (Bücher, Zeitschriften, CDs, eBooks, etc.) aller Verlage. Ergänzt wird das Programm durch Services wie Neuerscheinungsdienst oder Zusammenstellungen von Büchern zu Sonderpreisen. Der Shop führt mehr als 8 Millionen Produkte. 2 The Economic Implications of Moore’s Law G.D. Hutcheson 2.1 Introduction One hundred nanometers is a fundamental technology landmark. It is the demarca- tion point between microtechnology and nanotechnology. The semiconductor indus- try crossed it just after the second millennium had finished. In less than 50 years, it had come from transistors made in mils (one-thousandth of an inch or 25.4 mi- crons); to integrated circuits which were popularized as microchips; and then as the third millennium dawned, nanochips. At this writing, nanochips are the largest single sector of nanotechnology. This, in spite of many a nanotechnology expert’s predic- tion that semiconductors would be dispatched to the dustbin of science – where tubes and core memory lie long dead. Classical nanotechnologists should not feel any dis- grace, as pundits making bad predictions about the end of technology progression go back to the 1960s. Indeed, even Gordon Moore wondered as he wrote his clas- sic paper in 1965 if his observation would hold into the 1970s.
    [Show full text]
  • Integrated Circuit
    PREMLILA VITHALDAS POLYTECHNIC S. N. D. T. Women’s University, Juhu Campus, Santacruz (West), Mumbai- 400 049. Maharashtra (INDIA). Integrated Circuit PREPARED BY Miss. Rohini A. Mane (G. R. No.: 15070113) Miss. Anjali J. Maurya (G. R. No.: 15070114) Miss. Tejal S. Mejari (G. R. No.: 15070115) . Diploma in Electronics: Semester VII (June - November 2018) Introduction: History: The separately manufactured components like An integrated circuit is a thin slice of silicon resistor, capacitor, diode, and transistor are joined by or sometimes another material that has been specially wires or by printed circuit boards (PCB) to form processed so that a tiny electric circuit is etched on its circuit. These circuits are called discrete circuits and surface. The circuit can have many millions of they have following disadvantages. microscopic individual elements, including 1. In a large electronic circuit, there may be very transistors, resistors, capacitors, and conductors, all large number of components and as a result electrically connected in a certain way to perform the discrete assembly will occupy very large some useful function. space. 2. They are formed by soldering which causes a problem of reliability. To overcome these problems of space conservation and reliability the integrated circuit were developed(IC). Figure2 The first Integrated circuit The first integrated circuits were based on the idea that the same process used to make clusters of transistors on silicon wafers might be used to make a functional circuit, such as an amplifier circuit or a computer logic circuit. Slices of the semiconductor Figure1 Integrated Circuit materials silicon and germanium were already being printed with patterns, the exposed surfaces etched with An integrated circuit (IC), sometimes called a chemicals, and then the pattern removed, leaving chip or microchip, is a semiconductor wafer on which dozens of individual transistors, ready to be sliced up thousands or millions of tiny resistors, capacitors, and and packed individually.
    [Show full text]
  • Copyrighted Material
    pter O ha n C e An Historic Overview of Venture Capitalism • Those who cannot remember the past are condemned to repeat it. —George Santayana Why is an historical overview of VC important? Because history does in fact repeat itself, and a study of history allows us to frame an ­understanding of the present and the future. The playersCOPYRIGHTED and the investment climate MATERIAL change, but the entrepreneur’s innate instinct to risk capital for a return is no different today from what it was when John D. Rockefeller became America’s first billionaire in 1900. When Andrew c01.indd 1 10-12-2013 8:50:11 [2] The Little Book of Venture Capital Investing Carnegie joined forces with his childhood friend, Henry Phipps, to form Carnegie Steel in 1892, they were driven by the same conviction to improve the status quo as are the idealistic dream chasers of the twenty-first century. It was these early trailblazers who paved the way and developed the techniques that have laid the foundation for VC as we know it today. Arguably, historians will debate the nature of history and its usefulness. This includes using the discipline as a way of providing perspective on the problems and opportu- nities of the present. I believe it to be an important tool in providing a systematic account and window to the future. It is patently dishonest and irresponsible to perpetuate the popular mythology that those who created great wealth in America are to be despised and that there are no useful les- sons to be learned from an objective, historical review of their contributions to the subject at hand.
    [Show full text]
  • HOW DID SILICON VALLEY BECOME SILICON VALLEY? Three Surprising Lessons for Other Cities and Regions
    HOW DID SILICON VALLEY BECOME SILICON VALLEY? Three Surprising Lessons for Other Cities and Regions a report from: supported by: 2 / How Silicon Valley Became "Silicon Valley" This report was created by Rhett Morris and Mariana Penido. They wish to thank Jona Afezolli, Fernando Fabre, Mike Goodwin, Matt Lerner, and Han Sun who provided critical assistance and input. For additional information on this research, please contact Rhett Morris at [email protected]. How Silicon Valley Became "Silicon Valley" / 3 INTRODUCTION THE JOURNALIST Don Hoefler coined the York in the chip industry.4 No one expected the term “Silicon Valley” in a 1971 article about region to become a hub for these technology computer chip companies in the San Francisco companies. Bay Area.1 At that time, the region was home to Silicon Valley’s rapid development offers many prominent chip businesses, such as Intel good news to other cities and regions. This and AMD. All of these companies used silicon report will share the story of its creation and to manufacture their chips and were located in analyze the steps that enabled it to grow. While a farming valley south of the city. Hoefler com- it is impossible to replicate the exact events that bined these two facts to create a new name for established this region 50 years ago, the devel- the area that highlighted the success of these opment of Silicon Valley can provide insights chip businesses. to leaders in communities across the world. Its Silicon Valley is now the most famous story illustrates three important lessons for cul- technology hub in the world, but it was a very tivating high-growth companies and industries: different place before these businesses devel- oped.
    [Show full text]
  • Planar Process with Noyce’S Interconnection Via a Diffused Layer of Metal Conductors
    Future Horizons Ltd Blakes Green Cottage TN15 0LQ, UK Tel: +44 1732 740440 Fax: +44 1732 608045 [email protected] www.futurehorizons.com Research Brief: 2019/01 – The Planar IC Process The Planar IC Process On 1 December 1957, Jean Hoerni, a Swiss physicist and Fairchild Semiconductor co-founder, recorded in his patent notebook an entry called "A method of protecting exposed p-n junctions at the surface of silicon transistors by oxide masking techniques." This was the first formal documentation of the planar semiconductor process, a radically new transistor design in which the oxide layer was left in place on the silicon wafer to protect the sensitive p-n junctions underneath. Focused on getting its first semiconductor devices into production, Fairchild did not pursue Hoerni’s planar approach at that time and it was not until 14 January 1959 that Hoerni finally wrote up his disclosure for what would become U.S. Patent 3025589. One week later, on 23 January 1959, Robert (Bob) Noyce, a fellow Fairchild co-founder, wrote up a disclosure for the planar IC. Fairchild’s first working planar IC was built some 16 months later in May 1960. Sixty years on, this technology remains the basis for virtually all semiconductor manufacturing today. The Early Days By the late 1950s, even though barely a decade old, transistors had already gone through several stages of development, including the material transition from germanium to silicon and the move from piece by piece to batch manufacturing through a simple photolithographic and Page 1 of 8 © Future Horizons 1989-2019, Reproduction Prohibited - All Rights Reserved The Planar IC Process The Global Semiconductor Industry Analysts Research Brief: 2019/01 etching technique known as the Mesa process.
    [Show full text]
  • BOOK PROPOSAL a NATION of INNOVATORS: by Gregory
    BOOK PROPOSAL A NATION OF INNOVATORS: The Social, Cultural, and Economic Pioneers who Forged the American Century By Gregory Mitrovich Saltzman Institute of War and Peace Studies Columbia University Mitrovich Proposal Synopsis Is American preeminence doomed? Hundreds of books and thousands of articles have argued that the United States’ position as global leader is under threat by rising authoritarian nations—notably China—and the legacy of the Donald Trump presidency. TURNING POINTS challenges this consensus, demonstrating that throughout history, American liberal democracy has prevailed even under threat because of the unique strengths that first made the nation great: Its egalitarian society and innovative, risk-taking, national culture. TURNING POINTS makes this case by examining six crises that could have derailed America’s rise, yet did not—because its citizens enjoyed the liberty to find solutions where the federal government had failed. TURNING POINTS will begin with America’s first crisis point: Its brutal early years that the Colonists survived by creating a society that valued risk-taking, individual initiative and innovation, laying the foundation for the American liberal democracy. It will discuss the build-up to the Civil War when abolitionists led a crusade to convince America’s political leaders to end slavery—demonstrating to the world America’s sincere belief in the democratic system. During Reconstruction, while the federal government was paralyzed by incompetence and scandal, a group of ruthless business tycoons turned America into a global power. In the late 19th century, progressives reformed American labor and inspired the spread of democracy around the world. When the United States government withdrew into isolationism following World War I, private American bankers rebuilt the European financial system while American jazz musicians spread American culture, laying the foundation for American globalism after the Second World War.
    [Show full text]
  • ELEC3221 Digital IC & Sytems Design Iain Mcnally Koushik Maharatna Basel Halak ELEC3221 / ELEC6241 Digital IC & Sytems D
    ELEC3221 ELEC3221 / ELEC6241- module merge for 2016/2017 Digital IC & Sytems Design Digital IC & Sytems Design SoC Design Techniques Iain McNally Iain McNally 10 lectures 10 lectures ≈ ≈ Koushik Maharatna Koushik Maharatna 12 lectures 12 lectures ≈ ≈ Basel Halak Basel Halak 12 lectures 12 lectures ≈ ≈ 1001 1001 ELEC3221 / ELEC6241 Digital IC & Sytems Design Assessment Digital IC & Sytems Design • SoC Design Techniques 10% Coursework L-Edit Gate Design (BIM) 90% Examination Iain McNally Books • 10 lectures ≈ Integrated Circuit Design Koushik Maharatna a.k.a. Principles of CMOS VLSI Design - A Circuits and Systems Perspective Neil Weste & David Harris 12 lectures ≈ Pearson, 2011 Basel Halak Digital System Design with SystemVerilog Mark Zwolinski 12 lectures ≈ Pearson Prentice-Hall, 2010 1001 1002 Digital IC & Sytems Design History Iain McNally 1947 First Transistor Integrated Circuit Design John Bardeen, Walter Brattain, and William Shockley (Bell Labs) Content • 1952 Integrated Circuits Proposed – Introduction Geoffrey Dummer (Royal Radar Establishment) - prototype failed... – Overview of Technologies 1958 First Integrated Circuit – Layout Jack Kilby (Texas Instruments) - Co-inventor – CMOS Processing 1959 First Planar Integrated Circuit – Design Rules and Abstraction Robert Noyce (Fairchild) - Co-inventor – Cell Design and Euler Paths – System Design using Standard Cells 1961 First Commercial ICs – Wider View Simple logic functions from TI and Fairchild Notes & Resources 1965 Moore’s Law • http://users.ecs.soton.ac.uk/bim/notes/icd Gordon Moore (Fairchild) observes the trends in integration. 1003 1004 History 1947 Point Contact Transistor Collector Emitter 1947 First Transistor John Bardeen, Walter Brattain, and William Shockley (Bell Labs) Base 1952 Integrated Circuits Proposed Geoffrey Dummer (Royal Radar Establishment) - prototype failed..
    [Show full text]
  • The Emergence of Tools Suppliers in the Semiconductor Industry Unni Pillai
    The Emergence of Tools Suppliers in the Semiconductor Industry Unni Pillai (SUNY Polytechnic Institute) Abstract While the R&D intensive semiconductor tools industry has become pivotal to the advancement of technology and the growth of the downstream semiconductor chip manufacturing industry, this was not always the case. In the early stages of the industry, the chip manufacturers made their own tools in-house. Using data at the initial stages of the industry and a wealth of publicly available information from interviews with industry pioneers conducted as part of oral history projects, I examine how (i) market size (ii) intellectual property protection (iii) geographic proximity to downstream firms, influenced the process of emergence of the tools suppliers. 1. Introduction An extensive literature spanning many decades has identified a diverse array of factors that influence why a firm might buy an input or component from an outside supplier rather than make it in-house. The factors include market size, geographical concentration of downstream firms, economies of scale in production, transaction costs, asset specificity, complexity of the product, the extent of intellectual property protection, product and market uncertainty, strategic control of input market, technological change, among others.1 Although the literature has made definite progress in furthering our understanding of the determinants of vertical structure, much work remains to be done in putting forward a tractable and comprehensive theory that can explain when and why
    [Show full text]
  • Computer History a Look Back Contents
    Computer History A look back Contents 1 Computer 1 1.1 Etymology ................................................. 1 1.2 History ................................................... 1 1.2.1 Pre-twentieth century ....................................... 1 1.2.2 First general-purpose computing device ............................. 3 1.2.3 Later analog computers ...................................... 3 1.2.4 Digital computer development .................................. 4 1.2.5 Mobile computers become dominant ............................... 7 1.3 Programs ................................................. 7 1.3.1 Stored program architecture ................................... 8 1.3.2 Machine code ........................................... 8 1.3.3 Programming language ...................................... 9 1.3.4 Fourth Generation Languages ................................... 9 1.3.5 Program design .......................................... 9 1.3.6 Bugs ................................................ 9 1.4 Components ................................................ 10 1.4.1 Control unit ............................................ 10 1.4.2 Central processing unit (CPU) .................................. 11 1.4.3 Arithmetic logic unit (ALU) ................................... 11 1.4.4 Memory .............................................. 11 1.4.5 Input/output (I/O) ......................................... 12 1.4.6 Multitasking ............................................ 12 1.4.7 Multiprocessing .........................................
    [Show full text]