ELEC3221 ELEC3221 / ELEC6241- module merge for 2016/2017

Digital IC & Sytems Design Digital IC & Sytems Design SoC Design Techniques

Iain McNally Iain McNally

10 lectures 10 lectures ≈ ≈ Koushik Maharatna Koushik Maharatna

12 lectures 12 lectures ≈ ≈ Basel Halak Basel Halak

12 lectures 12 lectures ≈ ≈

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ELEC3221 / ELEC6241 Digital IC & Sytems Design

Assessment Digital IC & Sytems Design • SoC Design Techniques 10% Coursework L-Edit Gate Design (BIM) 90% Examination Iain McNally Books • 10 lectures ≈ Integrated Circuit Design Koushik Maharatna a.k.a. Principles of CMOS VLSI Design - A Circuits and Systems Perspective Neil Weste & David Harris 12 lectures ≈ Pearson, 2011 Basel Halak Digital System Design with SystemVerilog Mark Zwolinski 12 lectures ≈ Pearson Prentice-Hall, 2010

1001 1002 Digital IC & Sytems Design History

Iain McNally 1947 First Transistor Integrated Circuit Design John Bardeen, Walter Brattain, and William Shockley (Bell Labs) Content • 1952 Integrated Circuits Proposed – Introduction Geoffrey Dummer (Royal Radar Establishment) - prototype failed... – Overview of Technologies 1958 First Integrated Circuit – Layout Jack Kilby (Texas Instruments) - Co-inventor – CMOS Processing 1959 First Planar Integrated Circuit – Design Rules and Abstraction Robert Noyce (Fairchild) - Co-inventor – Cell Design and Euler Paths – System Design using Standard Cells 1961 First Commercial ICs – Wider View Simple logic functions from TI and Fairchild Notes & Resources 1965 Moore’s Law • http://users.ecs.soton.ac.uk/bim/notes/icd Gordon Moore (Fairchild) observes the trends in integration.

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History 1947 Point Contact Transistor

Collector Emitter 1947 First Transistor John Bardeen, Walter Brattain, and William Shockley (Bell Labs) Base 1952 Integrated Circuits Proposed Geoffrey Dummer (Royal Radar Establishment) - prototype failed... 1958 First Integrated Circuit Jack Kilby (Texas Instruments) - Co-inventor Gold Point Contacts 1959 First Planar Integrated Circuit for Collector Robert Noyce (Fairchild) - Co-inventor and Emitter 1961 First Commercial ICs Simple logic functions from TI and Fairchild Germanium Base N 1965 Moore’s Law Gordon Moore (Fairchild) observes the trends in integration. Each contact creates a metal/semiconductor (Schottky) diode Depletion regions are shown for zero bias voltage. 1004 Source: Bell Labs History 1958 First Integrated Circuit

1 Transistor 1947 First Transistor 1 Capacitor John Bardeen, Walter Brattain, and William Shockley (Bell Labs) 3 Resistors 1952 Integrated Circuits Proposed Hand soldered interconnect Geoffrey Dummer (Royal Radar Establishment) - prototype failed...

1958 First Integrated Circuit Source: Texas Instruments Jack Kilby (Texas Instruments) - Co-inventor 1959 First Planar Integrated Circuit Robert Noyce (Fairchild) - Co-inventor 1961 First Commercial ICs Simple logic functions from TI and Fairchild 1965 Moore’s Law Gordon Moore (Fairchild) observes the trends in integration.

1004 Source: Jack Kilby (Patent Application)

History History

1947 First Transistor 1947 First Transistor John Bardeen, Walter Brattain, and William Shockley (Bell Labs) John Bardeen, Walter Brattain, and William Shockley (Bell Labs) 1952 Integrated Circuits Proposed 1952 Integrated Circuits Proposed Geoffrey Dummer (Royal Radar Establishment) - prototype failed... Geoffrey Dummer (Royal Radar Establishment) - prototype failed... 1958 First Integrated Circuit 1958 First Integrated Circuit Jack Kilby (Texas Instruments) - Co-inventor Jack Kilby (Texas Instruments) - Co-inventor 1959 First Planar Integrated Circuit 1959 First Planar Integrated Circuit Robert Noyce (Fairchild) - Co-inventor Robert Noyce (Fairchild) - Co-inventor 1961 First Commercial ICs 1961 First Commercial ICs Simple logic functions from TI and Fairchild Simple logic functions from TI and Fairchild 1965 Moore’s Law 1965 Moore’s Law Gordon Moore (Fairchild) observes the trends in integration. Gordon Moore (Fairchild) observes the trends in integration.

1004 1004 History

1947 First Transistor John Bardeen, Walter Brattain, and William Shockley (Bell Labs) 1952 Integrated Circuits Proposed Geoffrey Dummer (Royal Radar Establishment) - prototype failed... 1958 First Integrated Circuit Jack Kilby (Texas Instruments) - Co-inventor 1959 First Planar Integrated Circuit Robert Noyce (Fairchild) - Co-inventor 1961 First Commercial ICs Simple logic functions from TI and Fairchild 1965 Moore’s Law Source: Fairchild Gordon Moore (Fairchild) observes the trends in integration.

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1961 First Commercial ICs Using Planar Bipolar Transistors R Q Fairchild Bipolar RTL RS Flip−Flop Q S

Source: Fairchild Back to back PN junctions to provide isolation Integrated interconnect Resistor Transistor Logic

VCC

Z

Source: Robert Noyce (Patent Application) AB

Source: Fairchild RTL NOR gate History

1947 First Transistor John Bardeen, Walter Brattain, and William Shockley (Bell Labs) 1952 Integrated Circuits Proposed Geoffrey Dummer (Royal Radar Establishment) - prototype failed... 1958 First Integrated Circuit Jack Kilby (Texas Instruments) - Co-inventor 1959 First Planar Integrated Circuit Robert Noyce (Fairchild) - Co-inventor 1961 First Commercial ICs Simple logic functions from TI and Fairchild 1965 Moore’s Law Source: Intel Gordon Moore (Fairchild) observes the trends in integration.

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History History

Moore’s Law 1 Predicts exponential growth in the number of components per chip. Moore’s Law at Intel

18−core Xeon E5 v3 10,000,000,000 1965 - 1975 Doubling Every Year 22−core Dual Core Itantium 2 10−core XeonXeon E5 1,000,000,000 In 1965 Gordon Moore observed that the number of components per chip had Itantium 2 Westfield−Ex Itantium doubled every year since 1959 and predicted that the trend would continue 100,000,000 through to 1975. Pentium 4 Pentium III 10,000,000 Moore describes his initial growth predictions as ”ridiculously precise”. Pentium II Pentium 1,000,000 486 DX 1975 - 201? Doubling Every Two Years 286 386 100,000 In 1975 Moore revised growth predictions to doubling every two years. 8086 10,000 Growth would now depend only on process improvements rather than on 4004 8080 8008 more efficient packing of components. 1,000 1970 1980 1990 2000 2010 In 2000 he predicted that the growth would continue at the same rate for an- other 10-15 years before slowing due to physical limits. 1Intel was founded by Gordon Moore and Robert Noyce from Fairchild 1005 1006 History

Moore’s Law; a Self-fulfilling Prophesy The whole industry uses the Moore’s Law curve to plan new fabrication facilities.

Slower - wasted investment Must keep up with the Joneses2.

Faster - too costly Cost of capital equipment to build ICs doubles approximately ev- ery 4 years.

Moore’s law is not dead (at least not quite), although there are worries that below 20nm, clever processing required for smaller transistors means that cost per transistor goes up rather than down.

2or the Intels 1007

1947 Point Contact transistor1961 Fairchild Bipolar RTL RS Flip−Flop (4 Transistors)

Source: Bell Labs Source: Fairchild Moore’s Law (1965) Number of transistor has doubled every year and will continue to do so until 1975

Moore’s Law (1975) Number of transistors will double every two years

18−core Xeon E5 v3 10,000,000,000 22−core Dual Core Itantium 2 Xeon E5 1,000,000,000 10−core Xeon Itantium 2 Westfield−Ex Itantium Self−fulfilling 100,000,000 Pentium 4 Prophecy Pentium III 10,000,000 Pentium II Pentium 1,000,000 486 DX 286 386 100,000 8086

10,000 4004 8080 8008 1,000 1970 1980 1990 2000 2010

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