Michael J. Chudobiak Ii

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Michael J. Chudobiak Ii New Approaches For Designing High Voltage, High Current Silicon Step Recovery Diodes for Pulse Sharpening Applications by Michael John Chudobiak, B.Sc. (Hons.) A thesis submitted to the Faculty of Graduate Studies and Research in partial fulfillment of the requirements for the degree of Doctor of Philosophy Ottawa-Carleton Institute for Electrical Engineering Department of Electronics Carleton University Ottawa, Ontario, Canada July 30, 1996 Copyright 1996, Michael J. Chudobiak ii Acceptance Sheet iii Abstract Two promising new approaches for designing step recovery diodes (SRDs) for operation at voltages of several hundred volts are considered in this thesis. An entirely new type of step recovery diode is presented, which can operate with reverse voltages of several hundred volts and which exhibits exceptionally long lifetimes of several microseconds. These diodes have been named “wide field step recovery diodes (WFSRDs)”. Experimental results for two batches of fabricated devices are presented for 300 V operation into a 50 Ω load. Pulse sharpening operation with rise times as low as 0.9 ns and storage times as large as 9 ns has been observed for fabricated diodes with effective carrier lifetimes of 4500 ns. Pulse sharpening operation has also been observed with rise times as low as 0.6 ns and storage times as large as 30 ns for fabricated diodes with effective carrier lifetimes of 950 ns. These diodes have a diffused p-π-n structure. A comprehensive design theory is developed by considering the nature of the reverse transient in the diode. A method of calculating the breakdown voltage of diffused structures without resorting to simulations is also presented. It is shown that fabrication difficulties will limit the usefulness of the WFSRD to operating voltages below 1 kV. High-voltage drift step recovery diodes (DSRDs), previously proposed in other work, are also considered. As DSRDs are biased with a pulse, the nature of the forward transient in the diode is considered in detail here. From this, the existing design theory is greatly extended. In particular, the optimum values of the width of the lightly doped layer and the bias current can now be predicted based on the new theory. The maximum storage time consistent with good step recovery action can also now be calculated. These theoretical results are compared to experimental results presented elsewhere, and are in good agreement. It is shown that storage time limitations restrict the use of the DSRD to operating voltages above 1 kV. iv Acknowledgments The author acknowledges the support of many people and organizations in making this thesis possible. In particular, the author thanks Dr. Walter J. Chudobiak for suggesting the topic, and for making the financial and laboratory resources available, particularly at Avtech Electrosystems Ltd. The author also thanks Dr. David Walkey at Carleton University for acting as his faculty advisor, and Dr. N. Garry Tarr at Carleton University for providing guidance on device fabrication issues. He also thanks Lyall Berndt, Carol Adams, and Chris Pawlowicz at Carleton University for performing most of the device fabrication in the laboratory. Dr. Alexei Kardo-Sysoev at the A. F. Ioffe Physico-Technical Institute of the Russian Academy of Science in St. Petersburg is also thanked for his interesting correspondence regarding the design and use of drift step recovery diodes. Dr. Arokia Nathan of the University of Waterloo is thanked for suggesting an approach for quantifying the impact of thermal effects on the diodes described in this thesis. The author also acknowledges the generous financial support from the governments of Canada and Ontario, in the form of scholarships from the Natural Sciences and Engineering Research Council and Carleton University. v Table Of Contents Acceptance Sheet............................................................................................................... ii Abstract............................................................................................................................. iii Acknowledgments ............................................................................................................ iv Table Of Contents..............................................................................................................v List of Tables .................................................................................................................... ix List of Figures.....................................................................................................................x List of Symbols ...................................................................................................................x Chapter 1 - Introduction ...................................................................................................1 1.1 - Motivation .............................................................................................................1 1.2 - New Approaches for Step Recovery Diodes .........................................................4 1.3 - Remarks on the Philosophy Adopted in This Study..............................................6 1.4 - Main Contributions................................................................................................8 1.5 - Organization ..........................................................................................................9 Chapter 2 - Review of Diode Reverse Transient Physics .............................................11 2.1 - Introduction..........................................................................................................11 2.2 - Review of Power Diode Switching Principles.....................................................14 2.2.1 - Principles of Power Rectifier Operation - pin Diodes ...............................14 2.2.2 - Principles of Power Rectifier Operation - psn Diodes...............................19 2.2.3 - Principles of Power Rectifier Operation - Diffused Diodes.......................22 2.3 - Review of Conventional Step Recovery Diode Switching Principles.................23 2.4 - Difficulties with High Voltage Step Recovery Operation ...................................25 Chapter 3 - Experimental Evidence from Commercial Devices..................................28 3.1 - Introduction..........................................................................................................28 3.2 - Experimental Observations With Commercial Diodes .......................................28 3.3 - Usefulness of Commercial Diodes as High-Voltage SRDs.................................39 Chapter 4 - Calculation of V BR for Diffused Diodes .....................................................42 4.1 - Introduction..........................................................................................................42 vi 4.2 - Basic Method.......................................................................................................43 4.3 - Calculating E C......................................................................................................46 4.4 - Conclusions Regarding the Method of Calculating V BR .....................................54 4.5 - Qualitative Observations on the Nature of V BR (λ,L)...........................................54 Chapter 5 - The Theory of Wide-Field Step Recovery Diodes (WFSRD) ..................62 5.1 - Remarks on the Philosophy Adopted in This Study............................................62 5.2 - Introductory Reference Structures .......................................................................62 5.2.1 - Abrupt Structures versus Diffused Structures ............................................63 5.2.2 - The Influence of Background Doping.........................................................67 5.3 - General Description of the New SRD Mechanism..............................................78 5.4 - Parameter Determination.....................................................................................80 5.4.1 - N B................................................................................................................80 5.4.2 - V RAMP ...........................................................................................................80 5.4.3 - The Transition Time t R................................................................................83 5.4.4 - RC Time Constant.......................................................................................85 5.4.5 - Storage Time t S ...........................................................................................85 5.5 - Design Methodology............................................................................................86 5.5.1 - Optimization ...............................................................................................87 5.6 - The Chosen Device..............................................................................................89 5.7 - Operating Range Limitations...............................................................................90 Chapter 6 - Fabrication Method for WFSRD Devices .................................................93 6.1 - Introduction..........................................................................................................93 6.2 - General Approach................................................................................................93 6.3 - Substrate Preparation and Dopant Implantation..................................................94
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