WELCOME FROM THE MAYOR, CITY OF LAS VEGAS, NEVADA
From the Office of Mayor Carolyn G. Goodman
CAROLYN G. GOODMAN MAYOR ECTC 2019 ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE LAS VEGAS, NEVADA MAY 28-31, 2019
Greetings:
As Mayor, I am very pleased to welcome you to America’s most dynamic, entertaining, and intriguing city! You could not have chosen a better locale. I am convinced that once you get a taste of what the city has to offer, you will never want to leave. Las Vegas continues to capture the world's imagination as the city where anything is possible. With world-class hotels, award-winning restaurants, luxurious spas, fantastic shopping, the finest golf courses, and spectacular entertainment, Las Vegas remains one of the most electrifying destinations in the world.
At its heart Las Vegas is all about making sure residents and visitors are well taken care of, treated courteously, and shown a great time. Beyond the neon of the fabulous Strip and the Fremont Street Experience, there is another Las Vegas--one in which we are building a world-class city featuring the best in arts, culture, sporting opportunities, and quality medical care. The Smith Center for the Performing Arts has set a high standard for art and culture in our city, and I encourage everyone to take in a concert or Broadway show at this magnificent venue. Regardless of your age, a must-visit spot is the children’s interactive Discover Museum adjacent to the Smith Center. Buzzing with excitement is the Fremont East Entertainment District, a place with an energy and enthusiasm through its taverns, restaurants, and music venues.
The city also offers beautiful weather and outdoor activities, from top class golfing to opportunities for world-class hiking and rock climbing at the Red Rock Canyon National Conservation Area, to skiing at Mount Charleston, and a visit to the awe-inspiring Hoover Dam at the Lake Mead National Recreation Area. If history is more your speed, you are in luck because the National Museum of Organized Crime and Law Enforcement and the Neon Museum are two of the most interesting and unique experiences in the country.
CITY OF LAS VEGAS I want to thank you for choosing Las Vegas and look forward to seeing you around town. 495 S. MAIN STREET LAS VEGAS, NEVADA 89101 I know you will have a fabulous time enjoying our great city and everything it has to offer. Now what are you waiting for? The party has already started! Welcome.
VOICE 702.229.6241 Sincerely, FAX 702.385.7960 TTY 702.386.9108
EMAIL [email protected] WEBSITE www.lasvegasnevada.gov Carolyn G. Goodman Mayor, City of Las Vegas
2 WELCOME TO LAS VEGAS FROM THE 69th ECTC GENERAL CHAIR AND PROGRAM CHAIR
On behalf of the Program Committee and Executive Committee, it is our pleasure to welcome you to the 69th Electronic Components and Technology Conference (ECTC), which will be held at The Cosmopolitan of Las Vegas in Las Vegas, Nevada from May 28-31, 2019. This premier international conference brings together key stakeholders of the global microelectronics packaging industry, such as semiconductor companies, foundry and OSAT service providers, equipment manufacturers, materials suppliers, research institutions and universities all under one roof. For the 69th ECTC, the ECTC Program Committee has selected over 350 papers which will be presented in 36 oral sessions and five interactive presentation sessions including one interactive presentation session exclusively featuring papers by student authors. The oral sessions will feature selected papers on key topics such as fan-out packaging, wafer-level packaging, flip-chip packaging, 3D/TSV technologies, design for RF performance and signal/power integrity, thermal and mechanical modeling, optoelectronics packaging, materials and reliability. Interactive presentation sessions will showcase papers in a format that encourages more in-depth discussion and interaction with authors about their work. Authors from over twenty countries are expected to present their work at the 69th ECTC, covering ongoing technology development within established disciplines or emerging topics of interest for our industry such as additive manufacturing, heterogeneous integration, flexible and wearable electronics. ECTC will also feature six special sessions with invited industry experts covering several important and emerging topic areas. On Tuesday, May 28 at 9 a.m., W. Hong Yeo and Mikel Miller will chair a special session covering “Transient Electronics: A Green Revolution for Packaging.” On the same day at 2 p.m., Rena Huang and Soon Jang will chair a session focused on “Photonics on the Cutting-Edge of Technology Evolution.” Tuesday evening will also include the ECTC Panel Session “Future (Visions) of Electronic Packaging” at 7:45 p.m. chaired by IEEE EPS President Avi Bar-Cohen and Karlheinz Bock, where young researchers will share their visions of future packaging technologies and participate in discussions with experts in the field. This conference will also feature a Women’s Panel and Reception jointly organized by ECTC and ITherm on Wednesday, May 29 at 6:30pm. This year, panelists from around the globe will share their perspectives on efforts to enhance the participation of women in engineering, and the panel will be chaired by Kristina Young-Fisher and Cristina Amon. On the same day at 7:30 p.m., Tanja Braun will chair the ECTC Plenary Session titled “Sensors and Packaging for Autonomous Driving.” In this plenary session, experts will address the challenges and demands for sensors and packages for autonomous driving along the value chain. On Thursday, May 30 at 8 p.m., the IEEE EPS Seminar titled “Roadmap of IC Packaging Materials to Meet Next-Generation Smartphone Performance Requirements” will be moderated by Yasumitsu Orii and Shigenori Aoki from the High-Density Substrates & Boards Technical Committee of the IEEE EPS Society. Supplementing the technical program, ECTC also offers Professional Development Courses (PDCs) and the Technology Corner exhibits. Co-located with the IEEE iTHERM Conference this year, the 69th ECTC will offer eighteen PDCs, organized by the PDC Committee chaired by Kitty Pearsall and Jeffrey Suhling. The PDCs will take place on Tuesday, May 28 and are taught by distinguished experts in their respective fields. The Technology Corner will showcase the latest technologies and products offered by leading companies in the electronic components, materials, packaging and services fields. More than one hundred Technology Corner exhibits will be open Wednesday and Thursday starting at 9 a.m. ECTC also offers attendees numerous opportunities for networking and discussion with colleagues during coffee breaks, daily luncheons and nightly receptions. Whether you are an engineer, a manager, a student or an executive, ECTC offers something unique for everyone in the microelectronics packaging and components industry. We invite you to join us during the 69th ECTC to be a part of all the 69th ECTC and be a part of all the exciting technical and professional opportunities. We also take this opportunity to thank our sponsors, exhibitors, authors, speakers, PDC instructors, session chairs, and program committee members, as well as all the volunteers who help make the 69th ECTC a success. Once again, thank you for being a part of the 69th ECTC.
Mark Poliks Nancy Stoffel 69th ECTC General Chair 69th ECTC Program Chair Binghamton University General Electric Research Center [email protected] [email protected] 3 WELCOME FROM ECTC SPONSORING ORGANIZATION
On behalf of the IEEE Electronics attending ECTC and our volunteers on the ECTC Executive Packaging Society, it is my great and Program Committees, members of the Board of pleasure and privilege to welcome Governors, volunteers from the EPS Society, and the ECTC you to the 69th Electronic and EPS staff for their commitment and dedication to making Components and Technology the 69th ECTC and its associated activities the premier annual Conference – the largest Packaging event of the electronic packaging community. We are fortunate Conference in the world. to have so many of you actively engaged in this conference, and we are indebted to the large, skilled and enthusiastic team Building on the long history of ECTC that keeps finding new ways to serve the electronic packaging and its predecessor Conferences, community. begun 69 years ago, this conference, and the electronic packaging community we serve, continue to It is very rewarding to see the impact of these technical events grow in size and in impact. We expect attendance at this year’s and networking activities on the EPS Society, our industry, ECTC, and ITherm - the co-located EPS Thermal Phenomena and our members. My deepest thanks and appreciation to all Conference - to well exceed 2000 packaging professionals. of you for the opportunity to work with you to develop the Including the forthcoming EPS Asia-Pacific Flagship Conference, breakthroughs in packaging technology that will continue to EPTC, in December, and the other sponsored and drive innovation in the microelectronic industry! co-sponsored conferences and workshops, EPS is on track to serve more than 5000 Conference attendees world-wide in 2019. Avram Bar-Cohen I would like to take this opportunity to thank all of you for EPS President 2018-2019
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4 TABLE OF CONTENTS
ECTC Luncheon Keynote ...... 5 Committee Meetings ...... 10 Session 26: High-Speed Signaling for High-Performance Computing and Memory . . . 20 ECTC Mobile App Information ...... 5 Conference at a Glance ...... 11 Session 27: Advanced Biosensors and Bioelectronics ...... 20 Registration ...... 6 Session 1: Wafer-Level Fan-Out Process and Integration ...... 12 Session 28: Embedded and Integrated Technologies ...... 21 PDC Instructors and Proctors’ Breakfast ...... 6 Session 2: Next-Generation Wirebonding and Die Attach ...... 12 Session 29: Electromigration and Innovative Reliability Test Methods ...... 21 Session Chairs & Speakers’ Breakfast ...... 6 Session 3: RDL and Additive Manufacturing ...... 12 Session 30: Assembly and Process Modeling ...... 21 Speaker Prep Room ...... 6 Session 4: Advancements in Automotive and Power Devices ...... 13 Session 31: Automotive and Power Packaging ...... 22 Conference Policies & Guidelines ...... 6 Session 5: Bonding Manufacturing Technologies ...... 13 Session 32: Power and Panel Assembly ...... 22 Miscellaneous Information ...... 7 Session 6: Emerging Flexible Hybrid Electronics ...... 13 Session 33: Fan-Out, Flip Chip, and WLCSP ...... 22 Luncheons ...... 7 Session 7: Advances in Flip Chip Packaging ...... 14 EPS Heterogeneous Integration Roadmap Workshop ...... 7 Session 8: Material and Process Trends in FOWLP and PLP ...... 14 Session 34: Emerging Materials and Processing ...... 23 ECTC Special Sessions ...... 8 Session 9: Wearables and Thin-Package Reliability and Chip Package Interaction . . . 14 Session 35: New Interconnects for Package Scaling ...... 23 Photonics Special Session ...... 8 Session 10: Dicing and Encapsulation Technologies ...... 15 Session 36: RF & Power Components and Modules ...... 23 ECTC Panel Session ...... 8 Session 11: Automotive and Harsh-Environment Reliability ...... 15 Session 37: Interactive Presentations 1 ...... 24 ECTC/ITherm Women’s Panel & Reception ...... 8 Session 12: Advanced Photonic Devices and Packaging ...... 15 Session 38: Interactive Presentations 2 ...... 24 ECTC Plenary Session ...... 8 Session 13: Technologies Enabling 3D and Heterogeneous Integration ...... 16 Session 39: Interactive Presentations 3 ...... 25 IEEE EPS Seminar ...... 8 Session 14: Fine-Pitch Solderless Bonding ...... 16 Session 40: Interactive Presentations 4 ...... 26 Young Professionals Panel & Reception ...... 9 Session 15: High-Bandwidth Packaging ...... 16 Session 41: Student Interactive Presentations ...... 26 Professional Development Courses ...... 9 Session 16: Advanced Materials for High-Speed Electronics ...... 17 Technology Corner Booth Layout ...... 28 ECTC Student Reception ...... 9 Session 17: Materials and Design for Reliability of Next-Generation Packages . . . . 17 Technology Corner Exhibits ...... 29-43 General Chair’s Speaker Reception ...... 9 Session 18: Warpage and Material Performance ...... 17 ECTC Executive Committee ...... 44 Technology Corner Reception ...... 9 Session 19: MEMS, Sensors, and IoT ...... 18 ECTC Program Committee ...... 44-46 69th ECTC Gala Reception ...... 9 Session 20: Fanout and Heterogeneous Integration ...... 18 Continuing Education Units ...... 9 Session 21: 5G, mm-Wave, and Antenna-in-Package ...... 18 70th ECTC Call for Papers ...... 47 68th ECTC Best Paper Awards ...... 10 Session 22: Advanced Substrates and Interconnect Technology ...... 19 Conference Sponsors ...... 48-49 Intel Best Student Paper ...... 10 Session 23: High-Bandwidth 3D and Photonic ...... 19 Media Sponsors ...... 49 Texas Instruments Best Student Paper ...... 10 Session 24: Advancements in Solder Joint Characterization and Reliability Evaluation . 19 Hotel Layout ...... 50 Corning Leadership in Glass Award ...... 10 Session 25: Wafer Level Packaging and Fan-In/Fan-Out Structures & Materials . . . 20 70th ECTC Dates and Location ...... 51
Conference organizers reserve the right to cancel or change this program without prior notice.
ECTC Luncheon Keynote ECTC Mobile App Soft Electronic and Microfluidic Systems ECTC is pleased to announce that a free mobile app is available for the Skin again this year. The app provides information on schedules for Wednesday, May 29, 2019 • Belmont 3, 4th Floor our technical program and PDCs as well as exhibitors, sponsors, John A. Rogers – Director of Center for Bio-Integrated and general conference information and venue maps. The Electronics, Northwestern University app also features tools to set your schedule so you don’t miss presentations important to you, social interaction functions, and Recent advances in materials, mechanics, and manufacturing establish the foundations for high- the ability to provide ratings on presentations that are used in performance classes of electronics and other selecting candidates for best paper awards. microsystems technologies that have physical properties The ECTC app is available for iOS and precisely matched to the human epidermis. The resulting devices can integrate with the skin in a physically Android devices through the QuickMobile imperceptible fashion to provide continuous, clinical- Events app available in the respective app quality information on physiological status. This talk stores. After downloading the app, search will summarize the key ideas and presents specific examples in wireless for “ECTC19” as the event ID, and follow monitoring for neonatal intensive care, and in capture, storage, and the instructions to set up your account. biomarker analysis of sweat.
5 REGISTRATION AND GENERAL INFORMATION
Registration ECTC registration will be open at the ECTC Registration Desk located in The CONFERENCE POLICIES AND GUIDELINES Cosmopolitan Las Vegas in Las Vegas, NV, 4th floor in the Belmont Commons Foyer. Badges Monday, May 27, 2019 • 3:00 p.m. – 5:00 p.m. Conference attendees MUST wear the official conference Tuesday, May 28, 2019 • 6:45 a.m. – 8:15 a.m.* badge to be admitted to all training courses, sessions, seminars, (AM PD Courses & Special Session Only)* meals, exhibits and IP areas, and all conference sponsored social Tuesday, May 28, 2019 • 8:15 a.m. – 5:00 p.m. functions. (All conference attendees) Medical Services Wednesday, May 29, 2019 • 6:45 a.m. – 4:00 p.m. For emergency medical services, locate any hotel phone, whether Thursday, May 30, 2019 • 7:30 a.m. – 4:00 p.m. in your room or elsewhere in the hotel, and follow its directions Friday, May 31, 2019 • 7:30 a.m. – 12:00 Noon for emergencies. If no phone can be located, please locate the nearest hotel staff or ECTC staff for assistance with your On Tuesday, May 28th light morning refreshments will be provided from 6:45 a.m. – 7:15 a.m. Come register and grab a bite to eat before the PDCs emergency. The closest available hotel staff person may be at the start! front desk. *The above schedule for Tuesday will be vigorously enforced to prevent Personal Property students from being late for their courses. Please make sure to take The hotel’s safety deposit box is available for storing your advantage of the 6:45am start time as registration becomes very congested prior to the start of morning Professional Development Courses. valuables; particularly cash and jewelry. If there is a mini-safe in your room, you should consider using it. Door Registration Fees Door Registration includes a Proceedings on USB drive Smoking Policy IEEE Member JOINT Registration (full ECTC + ITHERM conference) . . .$1160 Please follow hotel policies and signs regarding this. Smoking is IEEE Member Full Registration ...... $860 also NOT permitted at any ECTC activities including, but not IEEE Member Speaker / Session Chair ...... $765 limited to, functions, events, sessions, seminars, meals, exhibits and IEEE Member One Day ...... $565 IP areas, and all conference social functions. Thank you for your IEEE Member Speaker One Day ...... $430 consideration and cooperation. Exhibit Booth Attendant ...... $0 Non-Member JOINT Registration (full ECTC + ITHERM conference) . . $1375 Non-Member Full Registration ...... $1055 Non-Member Speaker / Session Chair ...... $765 Non-Member One Day ...... $565 Non-Member Speaker One Day ...... $430 Exhibit Booth Attendant ...... $0 Student ...... $315 Student Speaker ...... $315 Exhibits Only ...... $25 Tuesday Professional Development Courses IEEE Members and Non-Members Tuesday AM or PM Course with luncheon ...... $500 Tuesday All-Day Courses with luncheon ...... $710 Tuesday Student All-Day Courses with luncheon ...... $130 Extra Luncheon Tickets for Each Day ...... $65 Extra Proceedings with Registration ...... $100 Professional Development Course Instructors Breakfast PDC Instructors and Proctors are required to attend a briefing breakfast. 7:00 a.m. Tuesday – PDC Instructors and Proctor Briefing (Room Location: Belmont 3, 4th floor) Session Chairs and Speakers Breakfast Session Chairs and speakers are requested to attend a complimentary continental breakfast on the morning of their sessions/presentations. At this time, presentations will be transferred to the conference PC, which is loaded with Windows and Microsoft Office. 7:00 a.m. Wednesday thru Friday (Room Location: Belmont 3, 4th floor, Wednesday – Thursday) (Room Location: Belmont 5, 4th floor, Friday) Speaker Prep Room Speakers should prepare and review their digital presentations within the allotted times below: 7:00 a.m. – 5:00 p.m., Tuesday – Friday (Room Location: Yaletown 2, 4th floor) (It is extremely important to assure that your presentation, presentation software and computer work flawlessly with the digital projector provided.)
6 MISCELLANEOUS INFORMATION
Hotel Concierge Press Room The Hotel Concierge, located in the hotel lobby, can direct you to Press Interviews will be scheduled on an as-requested basis. To various types of entertainment or restaurants, or give suggestions for coordinate an interview with conference leadership or presenting that special night out. The Concierge can help to make your visit and technical experts please contact ECTC Publicity Chair, Eric Perfecto, conference experience a memorable one! at [email protected] or (845) 475-1290.
LUNCHEONS
Tuesday, May 28, 2019 Wednesday, May 29, 2019 Thursday, May 30, 2019 Friday, May 31, 2019 12PM 12PM 12PM 12PM Belmont 3, 4th floor Belmont 3, 4th floor Belmont 3, 4th floor Belmont 3, 4th floor Our Tuesday lunch is provided for This year’s Wednesday luncheon The IEEE Electronics Packaging Do NOT MISS Friday’s luncheon! anyone attending a Professional will feature Dr. John A. Rogers, Society will host our Thursday It’s our annual ECTC Program Development Course, whether you Director for the Center for luncheon for conference attendees. Chair luncheon where lots of high attend just a single course or both Bio-Integrated Electronics at The EPS awards will be presented. dollar, valuable, and useful prizes a morning and afternoon course. Northwestern University. We will Possession of a lunch ticket is will be raffled off! Each year the PDC Proctors, session speakers, also be celebrating award winners required for admission. prizes seem to get better and committee members or anyone else for Best and Outstanding Papers better! Remember you must with a Tuesday lunch ticket is more of 2018! Don’t miss it! Possession be present to win. Possession than welcome to join! Possession of a of a lunch ticket is required for of a lunch ticket is required for lunch ticket is required for admission. admission. admission.
Please note that due to increased attendance ECTC will have an overflow lunch room on Wednesday & Thursday located in Castellana 2, 3rd floor. Please make sure to be in line for lunch early if your preference is the main lunch room.
Heterogeneous Integration Roadmap Workshop Tuesday, May 28, 2019 • 8:00 a.m. - 5:00 p.m. Moderators: William Chen – ASE, Bill Bottoms – 3MT Solutions and Ravi Mahajan – Intel Condesa 3, 2nd Floor Our industry has reinvented itself through multiple disruptive changes in technologies, products, and markets. Our industry continues to change with the rapid migration of logic, memory, and applications to the cloud, the evolution of the Internet of Things (IoT) to the Internet of Everything (IoE), the proliferation of smart devices everywhere, the rise of 5G, the increasing presence of microelectronics in wearables & health application, and in autonomous automotive, and the rapid advancement of AI . The pace of innovation is simultaneously increasing to meet these challenges. The Heterogeneous Integration Roadmap will address the future directions of heterogeneous integration technologies and applications serving the future markets and applications. The Heterogeneous Integration Roadmap Technical Working Groups are celebrating the completion of the 1st edition of the Heterogeneous Integration Roadmap. The Technical Working Groups will be reporting out their work products and on their plan for the next edition. We like to invite all the ECTC & ITherm participants to attend this important working session for our profession and for our industry. Registration is not required.
7 SPECIAL SESSIONS
2019 SPECIAL SESSION 2019 ECTC/ITHERM WOMEN’S PANEL AND Transient Electronics: A Green RECEPTION Revolution for Packaging? Unleashing the Power of Diversity in Tuesday, May 28, 2019 our Workforce 9:00 a.m. – 11:30 a.m. Wednesday, May 29, 2019 Castellana 2, 3rd Floor 6:30 p.m. – 7:30 p.m. Chairs: W. Hong Yeo - Georgia Institute of Nolita 1, 4th Floor Technology and Mikel Miller - EMD Performance Chairs: Kristina Young-Fisher - Materials GLOBALFOUNDRIES and Cristina Amon - Speakers: University of Toronto 1. John Rogers – Northwestern University Speakers: 2. Matthew MacEwan – Washington University 1. Monica Jackson – GE Aviation 3. Paul Kohl – Georgia Institute of Technology 2. Rolf Aschenbrenner – Fraunhofer IZM 4. Mihai Irimia-Vladu – Joanneum Research 3. Dereje Agonafer – University of Texas at Arlington Forschungsgesellschaft mbH 4. Jean Trewhella – GLOBALFOUNDRIES
2019 PHOTONICS SPECIAL SESSION 2019 PLENARY SESSION Photonics on the Cutting-Edge of Sensors and Packaging for Technology Evolution Autonomous Driving Tuesday, May 28, 2019 Wednesday, May 29, 2019 2:00 p.m. – 4:30 p.m. 7:30 p.m. – 9:00 p.m. Castellana 2, 3rd Floor Mont-Royal 1 & 2, 4th Floor Chairs: Rena Huang - Rensselaer Polytechnic Chair: Tanja Braun, Fraunhofer Institute for Institute and Soon Jang - ficonTEC (USA) Reliability and Microintegration (IZM) Corporation Speakers: Speakers: 1. Scott Chen – Advanced Semiconductor 1. Bert Offrein – IBM Research GmbH-Zurich Engineerng, Inc. 2. Mark Thompson – PsiQuantum 2. Przemyslaw Jakub Gromala – Robert Bosch 3. Roy Meade – Ayar Labs GmbH 4. Charles Kuznia – Ultra Communications, Inc. 3. Tu-Anh Tran – NXP Semiconductors 5. Jason Eichenholz – LuminarTechnologies, Inc. 4. Nathan Brese – DuPont
2019 ECTC PANEL SESSION 2019 IEEE EPS SEMINAR Future (Visions) of Electronic Roadmap of IC Packaging Packaging Materials to Meet Next-Generation Tuesday, May 28, 2019 Smartphone Performance 7:45 p.m. – 9:15 p.m. Requirements Mont-Royal 1 & 2, 4th Floor Thurday, May 30, 2019 Chairs: Avi Bar-Cohen, EPS President - Raytheon 8:00 p.m. – 9:30 p.m. and Karlheinz Bock - TU Dresden Mont-Royal 1 & 2, 4th Floor Speakers: Chairs: Yasumitsu Orii - Nagase, Japan 1. Martin Schubert – TU Dresden and Shigenori Aoki - Lintec 2. Shreya Dwarakanath – Georgia Institute of Speakers: Technology 1. Toshihiko Nishio – SBR Technology Company 3. Chandrasekharan Nair – Georgia Institute of 2. Eiichi Nomura – Nagase ChemteX Technology 3. Koichi Hasegawa – JSR 4. Siddharth Ravichandran – Georgia Institute of 4. Kenji Nishiguchi – Risho Kogyo Technology 5. Mike Sakaguchi – Tatsuta Electric Wire & Cable 6. Yoshio Nishimura – Ajinomoto Fine Technology Co.
8 PROFESSIONAL DEVELOPMENT COURSES 2019 YOUNG PROFESSIONALS TUESDAY, MAY 28, 2019 PANEL & RECEPTION Tuesday, May 28, 2019 Morning Courses 8:00 a.m. – 12:00 Noon Afternoon Courses 1:30 p.m. – 5:30 p.m. 7:00 p.m. – 7:45 p.m. Nolita 1, 4th Floor Yaletown 1 Yaletown 1 1. Achieving High Reliability 10. Flip Chip Technologies Chair: Yan Liu, Medtronic of Lead-Free Solder Joints – Course Leaders: Eric Perfecto – Independent Materials Considerations Consultant; Shengmin Wen – Synaptics Inc. Panelists: EPS Board of Governors members: Avi Bar-Cohen, Chris Course Leader: Ning-Cheng Lee – Indium Corporation Bailey, Karlheinz Bock, Alan Huffman, Sam Karikalan, Beth Keser, Ravi Mahajan, Toni Mattila, David McCann, Kitty Pearsall, Eric Perfecto, Jeff Suhling, Andrew Tay, and Pat Thompson Nolita 3 Nolita 3 This event is designed just for you – young professionals (including 2. Introduction to Fan-Out 11. Wafer-Level Chip-Scale current graduate students). In this active event, we will pair you Wafer-Level Packaging Packaging (WCSP) Fundamentals Course Leader: Beth Keser – Intel Corporation. Course Leader: Patrick Thompson - Texas with senior EPS members and professionals through a series of Instruments, Inc. active and engaging activities. You will have opportunities to learn more about packaging-related topics, ask career questions, and meet some professional colleagues.
Nolita 2 Nolita 2 3. Fundamentals of Glass 12. Flexible Hybrid Electronics ECTC STUDENT RECEPTION Technology and Applications – Manufacturing and Reliability Tuesday, May 28, 2019 • 5:00 p.m. - 6:00 p.m. for Advanced Semiconductor Course Leader: Pradeep Lall – Auburn Packaging University Mont-Royal Commons, 4th Floor Course Leaders: Indrajit Dutta and Jay Zhang Hosted by Texas Instruments, Inc. – Corning Inc.
Nolita 1 Nolita 1 4. Moore’s Law for Packaging to 13. Fan-Out Wafer/Panel Replace Moore’s Law for ICs Level Packaging and 3D IC Students, have you ever wondered what career opportunities exist at Course Leader: Rao Tummala – Georgia Heterogenous Integration Texas Instruments and in the industry, and how you could use your Institute of Technology Course Leader: John Lau – ASM Pacific technical skills and innovative talent? If so, you are invited to attend the Technology Ltd. ECTC Student Reception, where you will have the opportunity to talk to industry professionals about what helped them succeed in their first Mont-Royal 2 Mont-Royal 2 job search and reach their current positions. During this reception, 5. Polymers and Nanocomposites 14. Polymers for Wafer Level you can enjoy good food while networking with industry leaders and for Electronic and Photonic Packaging achievers. Don’t miss your opportunity to interact with people who you Packaging Course Leader: Jeffrey Gotro – InnoCentrix, might not have the chance to meet otherwise! You will also be able to Course Leaders: C. P. Wong – Georgia LLC submit your resumes to our sponsoring partners. Institute of Technology; Daniel Lu – Henkel Corporation GENERAL CHAIR’S SPEAKERS RECEPTION Mont-Royal 1 Mont-Royal 1 Tuesday, May 28, 2019 • 6:00 p.m. - 7:00 p.m. 6. Fundamentals of RF Design 15. Reliability Mechanics and OUTSIDE at the North Blvd. Pool and Fabrication Processes of Fan- Modeling for IC Packaging - (Rain Backup: Belmont 3, 4th Floor) Out Wafer/Panel Level Packages Theory, Implementation and and Interposers Practices Invited session chairs and speakers Course Leaders: Ivan Ndip and Markus Course Leaders: Ricky Lee – HKUST and are requested to attend the reception. Wöhrmann – Fraunhofer IZM Xuejun Fan – Lamar University TECHNOLOGY CORNER RECEPTION Belmont 4 Belmont 4 7. Solving Package Failure 16. Robust Electronics for Wednesday, May 29, 2019 • 5:30 p.m. - 6:30 p.m. Mechanisms for Improved Automotive Applications Belmont 1 & 5 Ballroom, 4th Floor Reliability including Autonomous Driving All attendees and guests are invited. Course Leader: Darvin Edwards – Edwards Course Leaders: Matthias Petzold – Fraunhofer Enterprises IZM, Mervi Paulasto-Kröckel – Alto University, and Klaus-Jeurgen Wolter – TU Dresden 69th ECTC GALA RECEPTION Thursday, May 30, 2019 • 6:30 p.m. Belmont 8 Belmont 8 Belmont 3 & 4 Ballroom, 4th Floor 8. Characterization of Advanced EMCs 17. From Wafer to Panel Level for FO-WLP, Heterogenous Integration, Packaging All badged attendees are invited. and Automotive Electronics Course Leaders: Tanja Braun and Rolf Course Leaders: Przemyslaw Gromala Aschenbrenner – Fraunhofer, IZM CONTINUING EDUCATION UNITS – Robert Bosch GmbH; Bongtae Han – The IEEE Electronics Packaging Society (EPS) has been authorized to offer University of Maryland Continuing Education Units (CEUs) by the International Association for Continuing Education and Training (IACET) for all Professional Development Castellana 1 Castellana 1 Courses that will be presented at the 69th ECTC. CEUs are recognized by 9. Integrated Thermal Packaging 18. Electronics Cooling employers for continuing professional development as a formal measure of and Reliability of Power Technologies for Handheld participation and attendance in “non-credit” self-study courses, tutorials, Electronics Devices, Computing, and High- symposia, and workshops. Complete details, including voluntary enrollment Course Leader: Patrick McCluskey – University Power Electronics of Maryland Course Leaders: William Maltz and Guy forms, will be available at the conference. All costs associated with ECTC Wagner – Electronic Cooling Solutions Professional Development Course CEUs will be underwritten by the conference, i.e., there are no additional costs for Professional Development Course attendees Refreshment Breaks – 10:00 - 10:20 a.m. & 3:00 - 3:20 p.m. to obtain CEU credit. Mont-Royal Commons, Belmont Commons 4 & 8, & Castellana 1 9 AWARDS FROM THE 68TH ECTC
BEST OF CONFERENCE PAPERS INTEL BEST STUDENT PAPER TEXAS INSTRUMENTS OUTSTANDING STUDENT The Electronic Components and Technology The winning student receives a personalized plaque INTERACTIVE PRESENTATION Conference is proud to announce the “Best of and a check for US $2,500. The following paper The winning student receives a personalized plaque Conference” papers selected from the 68th ECTC was selected based on the Intel Best Student Paper and a check for US $1,000. The following paper was proceedings. The authors of the Best Session Paper competition conducted at the 68th ECTC: selected based on the Texas Instruments Outstanding Student Interactive Presentation competition share a check for US $2,500, and the authors of Session 23, Paper 3 conducted at the 68th ECTC: the Best Interactive Presentation share a check Miniaturized High-Performance Filters for US $1,500. The winning authors also receive for 5G Small-Cell Applications Session 39, Paper 10 a personalized plaque commemorating their Muhammad Ali, Fuhan Liu, Atom Watanabe, P. Copper Transparent Antennas on achievement. Markondeya Raj, Venkatesh Sundaram, Manos M. Flexible Glass by Subtractive and Semi- Tentzeris and Rao. R. Tummala - Georgia Institute of Additive Fabrication for Automotive Best Session Paper Technology Applications Session 27, Paper 5 Jack P. Lombardi III, Robert E. Malay, Mark D. Poliks Material Characterization of Advanced OUTSTANDING PAPERS - Binghamton University; James H. Schaffner, Hyok Jae Cement-Based Encapsulation Systems The winning authors for the Conference Outstanding Song - HRL Laboratories, LLC; Ming-Huang Huang, Scott for Efficient Power Electronics with Session Paper and Interactive Presentation C. Pollard - Corning, Inc.; and Timothy Talty – General Increased Power Density selected from the 68th ECTC proceedings receive Motors Bianca Boettge, F. Naumann, S. Klengel, M. Petzold - a personalized plaque commemorating their Fraunhofer Institute for Microstructure of Materials and achievement and will share a check for US $1,000. CORNING LEADERSHIP IN GLASS AWARD The winning authors receive an engraved Steuben Systems (IMWS); S. Behrendt, R. Eisele - FuE-Zentrum Outstanding Session Paper crystal Euclidean award and each receive a gift Fachhochschule Kiel GmbH; M. G. Scheibel, A.-Z. Miric Session 7, Paper 1 card for US $100. The following paper was Laser Sintering of Dip-Based All-Copper - Heraeus Deutschland GmbH & Co. KG; S. Kaessner, selected from submissions to the 68th ECTC: G. Hejtmann - Robert Bosch GmbH and K. G. Nickel - Interconnects University of Tuebingen Luca Del Carro, Thomas Brunschwiler – IBM Research, Session 38, Paper 18 Zurich; Martin Kossatz, Lucas Schnackenberg, Matthias A Novel Inorganic Substrate by Three Best Interactive Presentation Paper Fettke – PacTech – Packaging Technologies GmbH; and Dimensionally Stacked Glass Core Session 39, Paper 6 Ian Clark - Intrinsiq Materials Ltd. Technology Toshiki Iwai, Taiji Sakai, Daisuke Mizutani, Seiki Correlated Model For Wafer Warpage Outstanding Interactive Presentation Sakuyama - Fujitsu Laboratories Ltd.; Prediction of Arbitrarily Patterned Films Session 37, Paper 20 Kenji Iida, Takayuki Inaba, Hidehiko Fujisaki, Gregory T. Ostrowicki, Siva Gurrum and Amit Nangia – Non-destructive Assessment of the and Yoshinori Miyazawa - Fujitsu Interconnect Texas Instruments, Inc. Porosity in Silver (Ag) Sinter Joints using Technologies Ltd. Acoustic Waves Sebastian Brand, Bianca Böttge, Michael Kögel, Falk Naumann, Frank Altmann - Fraunhofer Institute for Microstructure of Materials and Systems (IMWS); Jurrian Zijl, Sebastiaan Kersjes - BESI Netherlands, B.V. and Thomas Behrens - Infineon Technologies AG
COMMITTEE MEETINGS • ASSOCIATED COMMITTEE MEMBERS ONLY Tuesday, May 28, 2019 Wednesday, May 29, 2019 Thursday, May 30, 2019 Friday, May 31, 2019 8:00 a.m. – 5:00 p.m. 7:00 a.m. – 8:00 a.m. 7:00 a.m. – 8:00 a.m. 7:00 a.m. – 8:00 a.m. EPS Heterogeneous Integration EPS Materials & Processes TC EPS Region 8 Meeting EPS Emerging Technologies TC Roadmap Workshop Jardins Boardroom, 2nd floor Condesa 5, 2nd floor Jardins Boardroom, 2nd floor Condesa 3, 2nd floor 7:00 a.m. – 8:00 a.m. 7:00 a.m. – 8:00 a.m. EPS Nanotechnology TC 7:00 a.m. – 8:00 a.m. 9:00 p.m. – 10:30 p.m. EPS Power & Energy TC Bellavista Boardroom, 2nd floor EPS Thermal & Mechanical TC ECTC OPTO Committee Bellavista Boardroom, 2nd floor 7:00 a.m. – 8:00 a.m. Condesa 5, 2nd floor Jardins Boardroom, 2nd floor EPS High Density Substrates 4:30 p.m. – 5:30 p.m. & Boards TC 7:00 a.m. – 8:30 a.m. Jardins Boardroom, 2nd floor 9:00 p.m. – 10:30 p.m. EPS Technical Committee Chairs EPS Transaction Editors TC / AE’s ECTC Interconnect Committee Bellavista Boardroom, 2nd floor 7:00 a.m. – 8:00 a.m. Condesa 2, 2nd floor EPS Electrical Design, Modeling & Bellavista Boardroom, 2nd floor Simulation TC 6:00 p.m. – 7:00 p.m. Belmont 4, 4th floor 1:30 p.m. – 4:30 p.m. Program Subcommittee Chairs & ECTC Executive Committee 7:00 a.m. – 8:00 a.m. Assistant Chairs Reception EPS Reliability TC Jardins Boardroom, 2nd floor General Chair’s Suite Condesa 6, 2nd floor (by invitation only) 5:30 p.m. – 6:30 p.m. ECTC 2020 Program Committee Meeting Nolita 1, 4th floor 8:00 p.m. 69th ECTC Governing/Executive Committee Reception General Chair’s Suite
10 Conference At A Glance REGISTRATION Photonics Special Session ECTC/ITHERM Panel & Monday 2:00 p.m. – 4:30 p.m. Reception Castellana 2, 3rd Floor 6:30 p.m. – 7:30 p.m. 3:00 p.m. - 5:00 p.m. Nolita 1, 4th Floor Tuesday Refreshment Breaks 6:45 a.m. - 5:00 p.m. 10:00 a.m. – 10:20 a.m. ECTC Plenary Session 3:00 p.m. – 3:20 p.m. 7:30 p.m. – 9:00 p.m. Wednesday Mont-Royal Commons, Belmont Commons Mont-Royal 1 & 2, 4th Floor 6:45 a.m. - 4:00 p.m. 4 & 8, & Castellana Thursday THURSDAY Lunch for PDCs Speakers Breakfast 7:30 a.m. - 4:00 p.m. 12 p.m. Noon 7:00 a.m. – 7:45 a.m. Friday Belmont 3, 4th Floor Belmont 3, 4th Floor 7:30 a.m. - 12:00 p.m. Technology Corner SetUp Belmont Commons Foyer Sessions 13 - 24 1:00 p.m. – 5:00 p.m. 8:00 a.m. – 11:40 a.m. Belmont 1 & 5, 4th Floor 1:30 p.m. – 5:30 p.m. TECHNOLOGY CORNER see pages 16 -19 for specifics EXHIBITS ECTC Student Reception Wednesday 5:00 p.m. – 6:00 p.m. Interactive Presentations Mont-Royal Commons, 4th Floor 9:00 a.m. - 12:00 p.m. Sessions 39 - 40 1:30 p.m. - 6:30 p.m. 9:00 a.m. - 11:00 a.m. or General Chair’s Speakers 2:00 p.m. - 4:00 p.m. Reception - 5:30 p.m. - 6:30 p.m. Reception see pages 25 - 26 for specifics Thursday 6:00 p.m. – 7:00 p.m. OUTSIDE at the North Blvd. Pool Refreshment Breaks 9:00 a.m. - 12:00 p.m. (Rain Backup: Belmont 3, 4th Floor) 1:30 p.m. - 4:00 p.m. 9:15 a.m. – 10:00 a.m. By invitation only 2:45 p.m. – 3:30 p.m. Belmont 1 & 5, 4th Floor Belmont 1 & 5, 4th Floor Young Professionals Networking Panel SPEAKER PREPARATION Lunch 7:00 p.m. – 7:45 p.m. 12 p.m. – 1:15 p.m. ROOM Nolita 1, 4th Floor Tuesday - Friday Belmont 3, 4th Floor 7:00 a.m. – 5:00 p.m. ECTC Panel Session Overflow: Castellana, 3rd Floor Yaletown 2 7:45 p.m. – 9:15 p.m. Mont-Royal 1 & 2, 4th Floor 69th ECTC Gala Reception 6:30 p.m. – 7:30 p.m. TUESDAY WEDNESDAY Mont-Royal 1 & 2, 4th Floor PDC Instructors and Proctors Speakers Breakfast Briefing & Breakfast 7:00 a.m. – 7:45 a.m. FRIDAY 7:00 a.m. – 7:45 a.m. Belmont 3, 4th Floor Speakers Breakfast Belmont 3, 4th Floor 7:00 a.m. – 7:45 a.m. Sessions 1 - 12 Belmont 3, 4th Floor Professional Development 8:00 a.m. – 11:40 a.m. 1:30 p.m. – 5:30 p.m. Sessions 25 - 36 Courses (PDCs) see pages 12 -15 for specifics 8:00 a.m. – 11:40 a.m. 8:00 a.m. – Noon 1:30 p.m. – 5:30 p.m. 1:30 p.m. - 5:30 p.m. Interactive Presentations see pages 20 -23 for specifics See page 9 for locations Sessions 37 - 38 9:00 a.m. - 11:00 a.m. or Interactive Presentations Session 41 EPS Heterogeneous 2:00 p.m. - 4:00 p.m. see pages 24 - 25 for specifics 8:30 a.m. - 10:30 a.m. Integration Roadmap see pages 26 - 27 for specifics Workshop Refreshment Breaks 8:00 a.m. – 5:00 p.m. 9:15 a.m. – 10:00 a.m. Refreshment Breaks Condesa 3, 2nd Floor 2:45 p.m. – 3:30 p.m. 9:15 a.m. – 10:00 a.m. Belmont 1 & 5, 4th Floor 2:45 p.m. – 3:30 p.m. Mont-Royal Commons Special Sessions: Lunch ECTC Special Session 12 p.m. – 1:15 p.m. Lunch 9:00 a.m. – 11:30 a.m. Belmont 3, 4th Floor 12 p.m. – 1:15 p.m. Castellana 2, 3rd Floor Overflow: Castellana, 3rd Floor Belmont 3, 4th Floor 11 Program Sessions: Wednesday, May 29, 8:00 a.m. - 11:40 a.m.
Session 1: Wafer-Level Fan-Out Process Session 2: Next-Generation Wirebonding Session 3: RDL and Additive Integration and Die Attach Manufacturing
Committee: Committee: Committee: Packaging Technologies in Packaging Technologies Interconnections conjunction with Emerging Technologies
Mont-Royal 1 Mont-Royal 2 Nolita 1
Session Co-Chairs: Session Co-Chairs: Session Co-Chairs: Bora Baloglu Matthew Yao Kuldip Johal Amkor Technology GE Energy Management Atotech Beth Keser Nathan Lower C. S. Premachandran Intel Corporation Rockwell Collins, Inc. GLOBALFOUNDRIES
1. 8:00 a.m. - 3D-MiM (Must-in-Must) 1. 8:00 a.m. - SB²-WB a New Process 1. 8:00 a.m. - Submicron-Scale Cu RDL Technology for Advanced System Integration Solution for Advanced Wire-Bonding Patterning Based on Semi-Additive Process An-Jhih Su, Terry Ku, Chung-Hao Tsai, Kuo-Chung Matthias Fettke, Andrej Kolbasow, Georg Friedrich, for Heterogeneous Integration Yee, and Douglas Yu – Taiwan Semiconductor Anna Palys, Vinith Bejugam, and Thorsten Teutsch – Takamasa Takano, Hiroshi Kudo, Masaya Tanaka, and Manufacturing Company Ltd. Pac Tech – Packaging Technologies GmbH Miyuki Akazawa – Dai Nippon Printing Co., Ltd.
2. 8:25 a.m. - Construction on FO-MCM 2. 8:25 a.m. - Smart Wire Bond Solutions for 2. 8:25 a.m. - Sub-Micron RDL Patterning with C4 Bumps Built First Using Chip Last SiP and Memory Packages for Advanced Packaging Assembly Technology Basil Milton, Aashish Shah, Hui Xu, Odal Kwon, Gary Ken- Ichiro Mori, Yoshio Goto, Yasuo Hasegawa, Chih-Hsun Hsu, Wen-Yang Li, Chi-Jen Chen, Yih Jenn Schulze, Ivy Qin – Kulicke and Soffa, USA; Nelson Seiya Miura and Douglas Shelton – Canon Inc. Jiang, Jui-Feng Tai, Chang-Fu Lin, and C. Key Chung – Wong – Kulicke and Soffa, Singapore Siliconware Precision Industries Co., Ltd.
3. 8:50 a.m. - Feasibility Study of Fan-Out 3. 8:50 a.m. - Preparation and Application 3. 8:50 a.m. - Optimization of Electrolytic Panel-Level Packaging for Heterogeneous of Cu-Ag Composite Solder Preforms for Plating Processes for Challenging Fan-Out Integration Power Electronic Packaging Panel-Level Package Designs Cheng-Ta Ko, Henry Yang, Curry Lin, Y.H. Chen – Unimicron Technology Corporation; John Lau, Ming Li, Penny Lo, R. So, Nelson Li Liu, Shengfa Liu, Hui Xiang, and Dongxiao Zhang Ralph Zoberbier, Britta Scheller, and Christian Ohde – Fan, Eric Kuah, Eric Ng, Y.M. Cheung– ASM Pacific Technology; Cao – Wuhan University of Technology; Zhaoxia Zhou, Atotech Deutschland GmbH Xi - Huawei Technologies Co. Ltd.; Iris Xu, Tony Chen, Zhang Li, Kim Hwee Tan– Jiangyin Changdian Advanced Packaging Co. Ltd.; Chieh-Lin Stuart Robertson, Canyu Liu, and Changqing Liu – Chang, Jhih-Yuan Pan, Hsing-Hui Wu, Rozalia Beica and Marc Lin – Dow Loughborough University; Zhiwen Chen – Wuhan Chemical Company; Sze Pei Lim, N.C. Lee – Indium Corporation; Ming Tao, Jeffery Lo, Ricky Lee - Hong Kong University of Science and University Technology Refreshment Break: 9:15 a.m. - 10:00 a.m. Exhibit Hall - Belmont 1 & 5
4. 10:00 a.m. - Ultra-Thin FO Package-on- 4. 10:00 a.m. - Au-Rich/Sn-Bi 4. 10:00 a.m. - 3D Printed Substrates for the Package for Mobile Application Interconnection in Chip-on-Module Package Design of Compact RF Systems Hsiang-Yao Hsiao, Soon Wee Ho, Simon Siak Boon Jin Wang, Qian Wang, and Jian Cai – Tsinghua Mohd Ifwat Mohd Ghazali - Universiti Sains Islam Lim, Leong Ching Wai, Ser Choong Chong, Pei Siang University; Xinnan Hou, Ke Du, and Lixin Zhao – Malaysia, Michigan State University; Saikat Mondal, Sharon Lim, Yong Han, and Tai Chong Chai – Institute GalaxyCore Inc. Saranraj Karuppuswami, and Premjeet Chahal – of Microelectronics A*STAR Michigan State University
5. 10:25 a.m. - Development of Wafer-Level 5. 10:25 a.m. - The Properties of Cu 5. 10:25 a.m. - Fully Additively Process for the Fabrication of Advanced Sinter Paste for Pressure Sintering at Low Manufactured Tunable Active Frequency Capacitive Fingerprint Sensor Using Embedded Temperature Selective Surfaces with Integrated On- Silicon Fan-Out (eSiFO®) Technology Jung-Lae Jo, Sinichi Yamauchi, Kei Anai, and Takahiko Package Solar Cells for Smart Packaging Shuying Ma, Chengqian Wang, and Fengxia Zheng – Huantian Sakaue – Mitsui Mining & Smelting Co., Ltd. Applications Technology (Kunshan) Electronics Co., Ltd.; Daquan Yu, Xiaobing Yang, Li Ma, Ping Li, and Weidong Liu – Huantian Syed Abdullah Nauroze, Xuanke He, and Manos M. Technology (Xi’an) Electronics Co., Ltd.; Hong Xie – Flipchip Tentzeris – Georgia Institute of Technology International; Jambo Yu, Jason Goodelle – Synaptics, USA
6. 10:50 a.m. - Three-Dimensional 6. 10:50 a.m. - Low Temperature Sintering 6. 10:50 a.m. - First Demonstration of a Low Integrated Circuit (3D-IC) Package Using of Dendritic Cu Based Pastes for Power Cost/Customizable Chip Level 3D Printed Fan-Out Technology Semiconductor Device Interconnection Microjet Hotspot-Targeted Cooler for High Jun Kyu Lee, Sang Yong Park, Young Ho Kim, Jae Gang Li, Jilei Fan, Siyuan Liao, Pengli Zhu, Baotan Power Applications Cheon Lee, Sung Hyuk Lee, Chul Hyo Lee, Yong Tae Zhang, Tao Zhao, Rong Sun, and Ching-Ping Wong – Tiwei Wei – IMEC & KU Leuven; Herman Oprins and Kwon, Chang Woo Lee, Jong Heon Kim, Nam Chul Shenzhen Institutes of Advanced Technology Vladimir Cherman – IMEC; Ingrid De Wolf – IMEC & Kim, and Yun Hyun Sung – NEPES Corporation KU Leuven; Eric Beyne – IMEC and Martine Baelmans – KU Leuven
7. 11:15 a.m. - Ultra High-Density I/O Fan- 7. 11:15 a.m. - A New Development of Direct 7. 11:15 a.m. - Rapid Production of Out Design Optimization with Signal and Bonding to Aluminum and Nickel Surfaces by Customized 3D Electronics via Hybrid Power Integrity Silver Sintering in Air Atmosphere Additive Manufacturing Technology Chih-Yi Huang, Keng Tuan Chang, Hung-Chun Kuo, Ly May Chew and Wolfgang Schmitt – Heraeus Ji Li, Yang Wang, Peiren Wang, Jianglin He, Handa Liu, Ming-Fong Jhong, Tsun-Lung Hsieh, Mi-Chun Hung, Deutschland GmbH & Co. KG; Tamira Stegmann, and Gengzhao Xiang – Southeast University and Chen-Chao Wang – Advanced Semiconductor Erika Schwenk, and Monique Dubis – Hochschule Engineering Inc. Aschaffenburg University of Applied Sciences, Germany 12 Program Sessions: Wednesday, May 29, 8:00 a.m. - 11:40 a.m.
Session 4: Advancements in Automotive Session 5: Bonding Manufacturing Session 6: Emerging Flexible Hybrid and Power Devices Technologies Electronics
Committee: Committee: Assembly & Manufacturing Committee: Materials & Processing Technology Emerging Technologies
Nolita 2 Nolita 3 Yaletown 1
Session Co-Chairs: Session Co-Chairs: Session Co-Chairs: Praveen Pandojirao-S Valerie Oberson Jong-Hoon Kim Johnson & Johnson IBM Canada, Ltd Washington State University Vancouver Lewis Huang Paul Houston Hongqing Zhang Senju Electronic Engent IBM Corporation
1. 8:00 a.m. - Solid-Liquid InterDiffusion 1. 8:00 a.m. - Comprehensive Study of 1. 8:00 a.m. - Stretchable and Printable (SLID) Bonding, for Thermally Challenging Copper Nano-Paste for Cu-Cu Bonding Medical Dry Electrode Arrays on Textile for Applications Ser Choong Chong and Pei Siang Lim Sharon – Electrophysiological Monitoring Knut E Aasmundtveit, Hoang-Vu Nguyen, and Institute of Microelectronics A*STAR Yougen Hu, Hui Wang, Yaoxu Xiong, Han Gu, Pengli Andreas Larsson – University of South-Eastern Zhu, Guanglin Li, and Rong Sun – Shenzhen Institutes Norway; Thi-Thuy Luu – Zimmer & Peacock; Torleif of Advanced Technology; Ommeaymen Sheikhnejad – A Tollefsen – TEGma AC2T Research GmbH; Ching-Ping Wong – Georgia Institute of Technology
2. 8:25 a.m. - Fluxless Bonding Technique 2. 8:25 a.m. - Enhanced Performance of 2. 8:25 a.m. - Screen-Printed Flexible of Diamond to Copper Using Silver-Indium Laser-Assisted Compression Bonding (LACB) Coplanar Waveguide Transmission Lines: Multilayer Structure Compared with Thermal Compression Multi-Physics Modeling and Measurement Roozbeh Sheikhi, Yongjun Huo, and Chin C. Lee – Bonding (TCB) Technology Nahid Aslani Amoli, Sridhar Sivapurapu, Rui Chen, Yi University of California, Irvine Kwang-Seong Choi, Yong-Sung Eom, Seok Hwan Moon, Jiho Joo, Zhou, Mohamed L. F. Bellaredj, Paul A. Kohl, Suresh and leeseul Jeong – Electronics and Telecommunications Research Institute; Kwangjoo Lee, Jung Hak Kim, and Ju hyeon Kim – LG K. Sitaraman, and Madhavan Swaminathan – Georgia Chem; Gil-Sang Yoon – KITECH; Kwang-Hee Lee and Chul-Hee Institute of Technology Lee – Inha University; Geun-Sik Ahn, and Moo-Sup Shim - Protec
3. 8:50 a.m. - Formulation and Processing 3. 8:50 a.m. - A Study of 3D Packaging 3. 8:50 a.m. - Inkjet-Printed Filtering of Conductive Polysulfide Sealants for Interconnection Performance Affected Antenna on a Textile for Wearable Automotive and Aerospace Applications by Thermal Diffusivity and Pressure Applications Bo Song, Fan Wu, Kyoung-Sik Moon, and C.P. Wong Transmission Hsuan-Ling Kao and Chun-Hsiang Chuang – Chang – Georgia Institute of Technology Jin-San Jung, Hyeong Gi Lee, Ji-Min Kim, Yong-Jin Gung University; Cheng-Lin Cho – National Tsing Hua Park, Ji-In Yu, Yong Sung Park, Jun Su Lim, Hyun- University Seok Choi, Sung-Il Cho, Dong wook Kim, and Sang-Ho An – Samsung Electronics Company, Ltd.
Refreshment Break: 9:15 a.m. - 10:00 a.m. Exhibit Hall - Belmont 1 & 5
4. 10:00 a.m. - Challenges and Approaches 4. 10:00 a.m. - Vertical Laser Assisted 4. 10:00 a.m. - Mechanical and Electrical to Developing Automotive Grade 1/0 FCBGA Bonding for Advanced “3.5D” Chip- Characterization of FOWLP-Based Flexible Package Capability Packaging Hybrid Electronics (FHE) for Biomedical Rajen Dias, Mike Kelly, Devarajan Balaraman - Amkor Andrej Kolbasow, Matthias Fettke and Georg Friedrich Sensor Application Technology, Inc. USA; Hideaki Shoji and Tomio - Pac Tech GmbH; Timo Kubsch and Thorsten Yuki Susumago, Qian Zhengyang, Achille Jacquemond, Shiraiwan - J-Devices Corporation, Japan; KwangSeok Teutsch – Pac Tech USA Noriyuki Takahashi, Hisashi Kino, Tetsu Tanaka, and Oh and Joon Young Park - Amkor Technology, Korea Takafumi Fukushima – Tohoku University
5. 10:25 a.m. - Advanced Substrates for 5. 10:25 a.m. - Optimization of a BEOL 5. 10:25 a.m. - A Wearable Fingernail GaN-Based HEMTs Devices Aluminum Deposition Process Enabling Deformation Sensing System and Three- Anthony Cibié, Julie Widiez, René Escoffier, Denis Wafer Level Al-Al Thermo-Compression Dimensional Finite Element Model of Blachier, Kremena Vladimirova, Jean-Philippe Colonna, Bonding Fingertip Paul-Henri Haumesser, Stéphane Bécu, Perceval Sebastian Schulze, Matthias Wietstruck, Mirko Katsuyuki Sakuma, Bucknell Webb, Rajeev Narayanan, Coudrain, William Vandendaele, Jerome Biscarrat, Fraschke, and Mehmet Kaynak – Innovations for Avner Abrami, Jeff Rogers, John Knickerbocker, and Charlotte Gillot, Matthew Charles, Lea Di Cioccio – High Performance Microelectronics; Peter Kerepesi, Stephen J. Heisig – IBM Thomas J. Watson Research CEA-LETI Helmut Kurz, and Bernhard Rebhan – EV Group, Inc. Center
6. 10:50 a.m. - A New Reliable, Corrosion 6. 10:50 a.m. - Self-Assembly Process for 3D 6. 10:50 a.m. - Heterogeneous Integration Resistant Gold-Palladium Coated Copper Die-to-Wafer Using Direct Bonding: A Step of a Fan-Out Wafer-Level Packaging Based Wire Material Forward Toward Process Automatisation Foldable Display on Elastomeric Substrate Sandy Klengel, Robert Klengel, Jan Schischka, Tino Amandine Jouve, Loïc Sanchez, Clement Castan, Arsalan Alam, Amir Hanna, Randall Irwin, Goutham Stephan, and Matthias Petzold – Fraunhofer IMWS; Maxence Laugier, Emmanuel Rolland, Brigitte Ezhilarasu, Hyunpil Boo, Yuan Hu, Chee Wei Wong, Motoki Eto, Noritoshi Araki, and Takashi Yamada – Montmayeul, Rémi Franiatte, Frank Fournel, and Timothy Fisher, and Subramanian S. Iyer – University Nippon Micrometal Corporation Severine Cheramy – CEA-LETI of California, Los Angeles
7. 11:15 a.m. - Ultrasonic-Accelerated 7. 11:15 a.m. - A Single Bonding Process for 7. 11:15 a.m. - A Study on the Flexible Chip- Intermetallic Joint Formation with Composite Diverse Organic-Inorganic Integration in IoT on-Fabric (COF) Assembly Using Anisotropic Solder for High-Temperature Power Device Devices Conductive Films (ACFs) Materials Packaging Tilo H. Yang, Yu-Shan Chiu, Hai-Yang Yu, and C. Seung-Yoon Jung and Kyung-Wook Paik – Korea Hongjun Ji, Mingyu Li, Weiwei Zhao, and Wenwu Robert Kao – National Taiwan University; Akitsu Advanced Institute of Science and Technology Zhang, – Harbin Institute of Technology Shigetou – National Institute for Materials Science
13 Program Sessions: Wednesday, May 29, 1:30 p.m. - 5:30 p.m.
Session 7: Advances in Flip Chip Session 8: Material and Process Trends in Session 9: Wearables and Thin-Package Packaging FOWLP and PLP Reliability and Chip Package Interaction
Committee: Committee: Committee: Thermal/Mechanical Packaging Technologies Materials & Processing Simulation & Characterization
Mont-Royal 1 Mont-Royal 2 Nolita 1
Session Co-Chairs: Session Co-Chairs: Session Co-Chairs: Mike Gallagher Tanja Braun Przemyslaw Gromala DuPont Electronics & Imaging Fraunhofer IZM Robert Bosch GmbH Daniel Baldwin Yi Li Yong Liu H.B. Fuller Company Intel Corporation ON Semiconductor
1. 1:30 p.m. - 7nm Chip-Package Interaction 1. 1:30 p.m. - Laser Releasable Temporary 1. 1:30 p.m. - Effect of Charging Cycle Study on a Fine-Pitch Flip Chip Package with Bonding Film with High Thermal Stability Elevated Temperature Storage and Thermal Laser Assisted Bonding and Mass Reflow Yong-suk Yang, Kyo-sung Hwang, and Robin Gorrell Cycling on Thin Flexible Batteries in Technology – 3M Wearable Applications Ian Hsu, Chi-Yuan Chen, Stanley Lin, and Ta-Jen Yu Pradeep Lall and Amrit Abrol – Auburn University; – MediaTek, Inc.; NamJu Cho and Ming-Che Hsieh Ben Leever – US AFRL; Scott Miller – NextFlex – JCET Manufacturing Institute
2. 1:55 p.m. - Ultra Large Area SIPs and 2. 1:55 p.m. - Design and Demonstration of 2. 1:55 p.m. - Bladder Inflation Stretch Test Integrated mmW Antenna Array Module for 1µm Low Resistance RDL Using Panel Scale Method for Reliability Characterization of 5G mmWave Outdoor Applications Processes for High-Performance Computing Wearable Electronics Pouya Talebbeydokhti, Sidharth Dalmia, Trang Thai, Applications Benjamin G. Stewart and Suresh K. Sitaraman – Raanan Sover, Sharon Tal – Intel Corporation Bartlet DeProspo, Chandrasekharan Nair, Varun Rajagoapal, Georgia Institute of Technology Jenefa Kannan, Emanuel Surillo, Fuhan Liu, Mohananlingam Kathaperumal, and Rao Tummala – 3D Systems Packaging Research Center, Georgia Institute of Technology; Aya Momozawa and Atsushi Kubo – Tokyo Ohka Kogyo Co., Ltd.
3. 2:20 p.m. - Hybrid Approach for Large 3. 2:20 p.m. - Advances in Temporary Carrier 3. 2:20 p.m. - Study of BEOL Failure Mode Size FC-BGA to Enhance Thermal and Technology for High-Density Fan-Out in Flip-Chip Packages at High-Temperature Electrical Performance Including Power Device Build-Up Conditions Delivery Arnita Podpod, Alain Phommahaxay, Pieter Bex, John Wei Wang, Yangyang Sun, Xuefeng Zhang, Lejun Heeseok Lee, Yunheok Im, Junghwa Kim, Jisoo Slabbekoorn, Julien Bertheau, Adbellah Salahouelhadj, Wang, Lily Zhao, Mark Schwarz, Bill Stone, and Hwang, James Jeong, Youngsang Cho, Heejung Choi, Erik Sleeckx, Andy Miller, Gerald Beyer, and Eric Ahmer Syed – Qualcomm Technologies, Inc. and Youngmin Shin – Samsung Electronics Company, Beyne – IMEC; Alice Guerrero, Kim Yess, and Kim Ltd. Arnold – Brewer Science, Inc.
Refreshment Break: 2:45 p.m. - 3:30 p.m. Exhibit Hall - Belmont 1 & 5
4. 3:30 p.m. - Package-on-Package Micro- 4. 3:30 p.m. - Development of Novel 4. 3:30 p.m. - A Novel Metal Scheme BGA Microstructure Interaction with Bond Low-Temperature Curable Positive-Tone and Bump Array Design Configuration and Assembly Parameter Photosensitive Dielectric Materials with to Enhance Advanced Si Packages CPI Pascale Gagnon and Clément Fortin – IBM Canada High-Reliability Reliability Performance by Using Finite Limited; Thomas Weiss – IBM Systems Yutaro Koyama, Yu Shoji, Keika Hashimoto, Yuki Element Modeling Technique Masuda, Hitoshi Araki, and Masao Tomikawa – Toray Kuo-Chin Chang, Mirng-Ji Lii, Steven Hsu, Hao-Chun Industries, Inc. Liu, Yen-Kun Lai, Sheng-Han Tsai, and Chieh-Hao Hsu – Taiwan Semiconductor Manufacturing Company Ltd.
5. 3:55 p.m. - Low-Cost Flip-Chip Stack for 5. 3:55 p.m. - Highly Reliable Photosensitive 5. 3:55 p.m. - Assessment of CMP Fill Pattern Partitioning Processing and Memory Negative-Tone Polyimide with Low Cure Effect on the Thermal Performance of Andy Heinig and Fabian Hopsch – Fraunhofer IIS/EAS Shrinkage Interconnects in Integrated Circuits BEOL Daisaku Matsukawa, Hiroko Yotsuyanagi, Shiori Assaad Helou and Peter Raad – Southern Methodist Sakakibara, Noriyuki Yamazaki, Tetsuya Enomoto, University; Archana Venugopal – Texas Instruments, and Takeharu Motobe – Hitachi Chemical DuPont Inc. MicroSystems, Ltd., Japan
6. 4:20 p.m. - High-Density Ultra-Thin 6. 4:20 p.m. - High Rate and Low Damage 6. 4:20 p.m. - Three-Dimensional Simulation Organic Substrate for Advanced Flip-Chip Etching Method as Pre Treatment of Seed of the Thermo-Mechanical Interaction Package Layer Sputtering for Fan Out Panel Level Between the Micro-Bump Joints and Cu Nokibul Islam, Seung Wook Yoon, KH Tan, and Tony Packaging Protrusion in Cu-Filled TSVs of the High Chen – STATS ChipPAC Pte. Ltd. Tetsushi Fujinaga – ULVAC, Inc. Bandwidth Memory (HBM) Structure Jie-Ying Zhou, Shui-Bao Liang, Cheng Wei, Wen-Kai Le, Chang-Bo Ke, Min-Bo Zhou, Xiao Ma, and Xin- Ping Zhang – South China University of Technology
7. 4:45 p.m. - Impact of Low Temperature 7. 4:45 p.m. - Investigation and Methods 7. 4:45 p.m. - Study of Design Optimization Solder on Electronic Package Dynamic Using Various Release and Thermoplastic Method for Ultra-Low Power Micro Gas Warpage Behavior and Requirement Bonding Materials to Reduce Die Shift Sensor Wei Keat Loh - Intel Corporation; Ron W. Kulterman and Wafer Warpage for eWLB Chip-First Eiji Nakamura, Keiji Matsumoto, Andrea Fasoli, Luisa - Flex Ltd.; Haley Fu – iNEMI; Chih Chung Hsu - Processes Bozano, and Hiroyuki Mori – IBM Research CoreTech System (Moldex3D) Michelle Fowler and John P. Massey – Brewer Science, Inc.; Tanja Braun, Steve Voges, Robert Gernhardt, and Markus Wohrmann – Fraunhofer Institute IZM 14 Program Sessions: Wednesday, May 29, 1:30 p.m. - 5:30 p.m.
Session 10: Dicing and Encapsulation Session 11: Automotive and Session 12: Advanced Photonic Devices Technologies Harsh-Environment Reliability and Packaging
Committee: Committee: Committee: Assembly & Manufacturing Technology Applied Reliability Photonics
Nolita 2 Nolita 3 Yaletown 1
Session Co-Chairs: Session Co-Chairs: Session Co-Chairs: Garry Cunningham Sandy Klengel Stephane Bernabe JHU/APL Fraunhofer Institute for Microstructure of Materials and Systems CEA Leti Paul Tiner Vikas Gupta Gordon Elger Texas Instruments Texas Instruments, Inc. Technische Hochschule Ingolstadt
1. 1:30 p.m. - A More Than Moore Enabling 1. 1:30 p.m. - Effect of Substrate Preheating 1. 1:30 p.m. - Micro-Fabricated SERF Atomic Wafer Dicing Technology Treatment on Thermal Reliability and Magnetometer for Weak Gradient Magnetic Jeroen van Borkulo, Rogier Evertsen, and Richard van Micro-Structure of Ag Paste Sintering on Au Field Detection der Stam – ASM Pacific Technologies Inc. Surface Finish Xiang Yue, Jintang Shang, and Chen Ye – Southeast Zheng Zhang, Chuantong Chen, and Katsuaki University Suganuma – Osaka University; Seigo Kurosaka – C. Uyemura & Co., Ltd.
2. 1:55 p.m. - Plasma Dicing Integration 2. 1:55 p.m. - Package Material Selection 2. 1:55 p.m. - Novel Solder Pads for Self- Schemes for Scribe Lane Layout and the Criteria for High Temperature Automotive Aligned Flip-Chip Assembly Impact on Die Strength Applications Yves Martin, Swetha Kamlapurkar, Nathan Marchack, David Parker, Emmanuel Gourvest, and Boris Bouillard Rene Rongen, Amar Mavinkurve, Orla O’Halloran, Jae-Woong Nah, and Tymon Barwicz – IBM – STMicroelectronics Norman Owens, Yann Weber, Pascal Oberndorff, Corporation Mark Luke Farrugia, Erik Van Olst, and Michiel van Soestbergen – NXP Semiconductors
3. 2:20 p.m. - Advanced Dicing Technologies 3. 2:20 p.m. - Solder Joint Reliability of 3. 2:20 p.m. - Collective Curved CMOS Sensor for Combination of Wafer-to-Wafer and Double-Side Mounted DDR Modules for Process: Application for High-Resolution Collective Die to Wafer Direct Bonding Consumer and Automotive Applications Optical Design and Assembly Challenges Fumihiro Inoue, Alain Phommahaxay, Arnita Podpod, Dongji Xie, Joe Hai, Zhongming Wu, and Manthos Bertrand Chambion, Christophe Gaschet, Marc Samuel Suhard, Erik Sleeckx, Kenneth June Rebibis, Economou – Nvidia Corp. Lombard, Maïlys Fernandez, Pierre Joly, Stéphane Andy Miller, and Eric Beyne – IMEC; Hitoshi Hoshino Caplet, Fabien Zuber, Aurélie Vandeneynde, Patrick and Berthold Moeller – Disco Hi-Tech Europe GmbH Peray, Gilles Lasfargues, Marc Zussy, Jerome Deschamps, Alexi Bedoin, and David Henry – CEA LETI Refreshment Break: 2:45 p.m. - 3:30 p.m. Exhibit Hall - Belmont 1 & 5
4. 3:30 p.m. - Active Control of NCF Fillet 4. 3:30 p.m. - Reliability Investigation of 4. 3:30 p.m. - Integration and Shape for 3D CoW by Multi Beam Laser Extremely Large Ratio Fan-Out Wafer-Level Characterization of InP Die on Silicon Bonder Package With Low Ball Density for Ultra- Interconnect Fabric Keiko Ueno, Kazutaka Honda, Tsuyoshi Ogawa, and Short-Range Radar Eric Sorensen, Boris Vaisband, SivaChandra Jangam, Toshihisa Nonaka – Hitachi Chemical Company, Ltd. PuShan Huang, C.K. Yu, W.S. Chiang, M.Z. Lin, Y.H. and Subramanian S. Iyer – University of California, Los Fang, M.J. Lin, N.W. Liu, Benson Lin, and Ian Hsu – Angeles; Tim Shirley – Keysight Technologies MediaTek Inc.
5. 3:55 p.m. - Ultrafast Laser Scribe: An 5. 3:55 p.m. - Fatigue Behavior of Lead-Free 5. 3:55 p.m. - Y-Branched Multimode/Single- Improved Metal and ILD Ablation Process Solder Joints Under Combined Thermal and Mode Polymer Optical Waveguides for Low- Julia Chiu, Aaron Gore, and Tyler Osborn – Intel Vibration Loads Loss WDM MUX Device: Fabrication and Corporation; Daragh Finn, Zhibin Lin, David Lord, and Karsten Meier, Maria Winkler, and Karlheinz Bock – Characterization Jon Mellen – Electro Scientific Industries, Inc. Dresden University of Technology; David Leslie and Takaaki Ishigure, Tomoki Nakayama, Fukino Nakazaki, Abhijit Dasgupta – University of Maryland and Hiroki Hama – Keio University
6. 4:20 p.m. - Reliability and Benchmark 6. 4:20 p.m. - Prognostication of Accrued 6. 4:20 p.m. - Vertically Stacked and of 2.5D Non-Molding and Molding Damage and Impending Failure Under Directionally Coupled Cavity-Resonator- Technologies Temperature-Vibration in Lead Free Integrated Grating Couplers for Integrated- Yu-Hsiang Hsiao, Che-Ming Hsu, Yi-Sheng Lin, and Electronics Optic Beam Steering Chien-Lin Chang Chien – Advanced Semiconductor Pradeep Lall, Tony Thomas, and Jeff Suhling – Auburn Shogo Ura and Junishi Inoue – Kyoto Institute of Engineering, Group, Inc. University; Ken Blecker – US Army ARDEC Technology; Kenji Kintaka – National Institute of Advanced Industrial Science and Technology
7. 4:45 p.m. - Laser-Induced Trench Design, 7. 4:45 p.m. - Electrochemical Impedance 7. 4:45 p.m. - CiB(Chip-in-Board) Optical Optimisation and Validation for Restricting Spectroscopy (EIS) for Monitoring the Water Engine Module Using Advanced Fan-Out Capillary Underfill Spread in Advanced Load on PCBAs under Cycling Condensing Package Technology Packaging Configurations Conditions to Predict Electrochemical Sang Yong Park, Ju Hyun Nam, Ji Ni Shim, Jun Kyu Gul Zeb and David Danovitch – Université de Migration Under DC Loads Lee, Yong Tae Kwon, Chang Woo Lee, Jong Heon Sherbrooke; Eric Turcotte – IBM Canada Ltd. Simone Lauser and Theresia Richter – Robert Bosch Kim, and Nam Chul Kim - NEPES Corporation GmbH; Verdingovas Vadimas and Rajan Ambat – Technical University of Denmark 15 Program Sessions: Thursday, May 30, 8:00 a.m. - 11:40 a.m.
Session 13: Technologies Enabling 3D Session 14: Fine-Pitch Solderless Bonding Session 15: High-Bandwidth Packaging and Heterogeneous Integration
Committee: Committee: Committee: Packaging Technologies Interconnections High-Speed, Wireless & Components
Mont-Royal 1 Mont-Royal 2 Nolita 1
Session Co-Chairs: Session Co-Chairs: Session Co-Chairs: Peng Su Chuan Seng Tan P. Markondeya Raj Juniper Networks Nanyang Technological University Florida International University Subhash L. Shinde Tom Gregorich Amit P. Agrawal University of Notre Dame Zeiss Semiconductor Manufacturing Technology Microsemi Corporation
1. 8:00 a.m. - Active Interposer Technology 1. 8:00 a.m. - Fine-Pitch (≤10 µm) Direct Cu- 1. 8:00 a.m. - Electrical Performance for Chiplet-Based Advanced 3D System Cu Interconnects Using In-Situ Formic Acid Limits of Fine-Pitch Interconnects for Architectures Vapor Treatment Heterogeneous Integration Perceval Coudrain, Jean Charbonnier, Arnaud Garnier, Pascal Vivet, Rémi Vélard, Andrea Vinci, Fabienne Ponthenier, Roselyne Segaud, Pascal Chausse, Lucile Arnaud, SivaChandra Jangam, Umesh Mogera, Pranav Ahmet Durgun, Zhiguo Qian, Kemal Aygun, Ravi Didier Lattard, Eric Guthmuller, Giovanni Romano, Alain Gueugnot, Frédéric Berger, Ambhore, and Subramanian Iyer – University of Mahajan, Tim Tri Hoang, and Sergey Yuryevich Therry Mourier, Mathilde Gottardi, Stéphane Minoret, Céline, Ribière, Gilles Romero, Pierre-Emile Philip, Yorrick Exbrayat, Daniel Scevola, Maxime Argoud, Nacima Allouti, California, Los Angeles; Adeel Ahmed Bajwa, Shumarayev – Intel Corporation Raphaël Eleouet, César Fuguet Tortolero, Christophe Aumont, Denis Dutoit, Corinne Tom Colosimo, and Bob Chylak – Kulicke & Soffa Legalland, Séverine Chéramy, and Gilles Simon - CEA, LETI; Alexis Farcy, Jérôme Beltritti, Didier Campos, and Jean Michailos – STMicroelectronics Industries, Inc.
2. 8:25 a.m. - Process Development of Power 2. 8:25 a.m. - Low-Temperature Cu 2. 8:25 a.m. - A High-Bandwidth Fine-Pitch Delivery Through Wafer Vias for Silicon Interconnect With Chip-to-Wafer Hybrid 2.57Tbps/mm In-Package Communication Interconnect Fabric Bonding Link Achieving 48fJ/Bit/mm Efficiency Meng-Hsiang Liu, Boris Vaisband, Amir Hanna, Guilian Gao, Laura Mirkarimi, Thomas Workman, Nicolas Pantano, Geert Van der Plas, Pieter Bex, Philip Yandong Luo, Zhe Wan, and Subramanian Iyer – Gill Fountain, Jeremy Theil, Gabe Guevara, Ping Liu, Nolmans, Dimitrios Velenis, and Eric Beyne – IMEC; University of California, Los Angeles Bongsub Lee, Pawel Mrozek, and Michael Huynh– Xperi Marian Verhelst – KU Leuven Corporation; Catharina Rudolph, Thomas Werner, and Anke Hanisch – Fraunhofer Institute, IZM-ASSID
3. 8:50 a.m. - Active Through-Silicon 3. 8:50 a.m. - Cu Microstructure of High 3. 8:50 a.m. - A New SI-PI Co-Simulation Interposer Based 2.5D IC Design, Fabrication, Density Cu Hybrid Bonding Interconnection Approach for Efficient Consideration of Assembly and Test Seokho Kim, Pilkyu Kang, Taeyeong Kim, Kyuha Lee, Coupling Between PDN and SDN Jayasanker Jayabalan, Vivek Chidambaram, Sharon Lim Joohee Jang, Kwangjin Moon, Hoonjoo Na, Sangjin Heeseok Lee, Jisoo Hwang, Hoi-Jin Lee, and Pei Siang, Wang Xiangyu, Jong Ming Chinq, and Surya Hyun, and Kihyun Hwang – Samsung Electronics Youngmin Shin – Samsung Electronics Company, Ltd Bhattacharya – Institute of Microelectronics A*STAR Company, Ltd.
Refreshment Break: 9:15 a.m. - 10:00 a.m. Exhibit Hall - Belmont 1 & 5
4. 10:00 a.m. - System on Integrated 4. 10:00 a.m. - Low-Resistance and 4. 10:00 a.m. - Signal Integrity of Submicron Chips (SoIC (TM)) for 3D Heterogeneous High-Strength Copper Direct Bonding InFO Heterogeneous Integration for High Integration in No-Vacuum Ambient Using Highly Performance Computing Applications Ming-Fa Chen, Fang- Cheng Chen, Wen-Chih (111)-Oriented Nano-Twinned Copper Chuei-Tang Wang, Jeng-Shien Hsieh, Victor C. Y. Chiou, and Doug C.H. Yu – Taiwan Semiconductor Jing-Ye Juang, Kai-Cheng Shie, Po-Ning Hsu, Yu Jin Li, Chang, Shih-Ya Huang, T. Ko, Han-Ping Pu, and Manufacturing Company Ltd. and Chih Chen – National Chiao Tung University; K. Douglas Yu – Taiwan Semiconductor Manufacturing N. Tu – University of California, Los Angeles Company Ltd.
5. 10:25 a.m. - Die-to-Wafer (D2W) 5. 10:25 a.m. - Sub-10µm Pitch Hybrid Direct 5. 10:25 a.m. - 28GHz Through Glass Via Processing and Reliability for 3D Packaging Bond Interconnect Development for Die-to- (TGV) Based Band Pass Filter Using Through of Advanced Node Logic Die Hybridization Fused Silica Via (TFV) Technology Luke England, Daniel Fisher, Katie Rivera, and Bill John P. Mudrick, Jonatan A. Sierra-Suarez, Matthew B. Renuka Bowrothu, Seahee Hwangbo, Todd Guthrie – GLOBALFOUNDRIES; Ping-Jui Kuo, Jordan, T. A. Friedmann, Robert Jarecki, and M. David Schumann, and Yong- Kyu Yoon – University of Chang-Chi Lee, Che-Ming Hsu, Fan-Yu Min, Kuo- Henry – Sandia National Laboratories Florida Chang Kang, and Chen-Yuan Weng – Advanced Semiconductor Engineering
6. 10:50 a.m. - Enabling Ultra-Thin Die 6. 10:50 a.m. - Cu Pillar with Nanocopper 6. 10:50 a.m. - Innovative Packaging to Wafer Hybrid Bonding for Future Caps: The Next Interconnection Node Solutions of 3D Double Side Molding Heterogeneous Integrated Systems Beyond Traditional Cu Pillar with System in Package for IoT and 5G Alain Phommahaxay, Samuel Suhard, Pieter Bex, Ramon Sosa, Kashyap Mohan, Antonia Antoniou, Application Serena Iacovo, John Slabbekoorn, Fumihiro Inoue, Lan Vanessa Smet, and Rao Tummala – Georgia Institute Mike Tsai, Ryan Chiu, Dick Huang, Feng Kao, Eric He, Peng, Koen Kennes, Erik Sleeckx, Gerald Beyer, and of Technology; Luu Nguyen – Texas Instruments Inc. J. Y. Chen, Simon Chen, Jensen Tsai, and Yu-Po Wang Eric Beyne – IMEC – Siliconware Precision Industries Co., Ltd.
7. 11:15 a.m. - The Thermal Dissipation 7. 11:15 a.m. - Cu-Cu Bonding by Low- 7. 11:15 a.m. - Enhancing Efficiency of Characteristics of the Novel System-in- Temperature Sintering of Self-Healable Cu Antenna-in-Package (AiP) by Through- Package Technology (ICE-SiP) for Mobile Nanoparticles Silicon-Interposer (TSI) with Embedded and 3D High-End Packages Junjie Li, Qi Liang, Chen Chen, Tielin Shi, Guanglan Air Cavity and Polyimide Dielectric Micro- Taejoo Hwang, Dan(Kyung Suk ) Oh, Eunseok Song, Liao, and Zirong Tang – Huazhong University of Substrate Jaechoon Kim, Taehun Kim, Kilsoo Kim, Joungphil Lee, Science and Technology Yunna Sun, Yunting Sun, Jiangbo Luo, Huiying Wang, and Taehwan Kim – Samsung Electronics Company, Zhuoqing Yang, Yan Wang, and Guifu Ding - Shanghai Ltd. Jiao Tong University; Kwangwoo Han – Samsung Electronics Company Co., Ltd. 16 Program Sessions: Thursday, May 30, 8:00 a.m. - 11:40 a.m.
Session 16: Advanced Materials for Session 17: Materials and Design for Session 18: Warpage and Material High-Speed Electronics Reliability of Next-Generation Packages Performance
Committee: Committee: Committee: Thermal/Mechanical Materials & Processing Applied Reliability Simulation & Characterization
Nolita 2 Nolita 3 Yaletown 1
Session Co-Chairs: Session Co-Chairs: Session Co-Chairs: Yoichi Taira Varughese Mathew Pradeep Lall Keio University NXP Semiconductors Auburn University Yu-Hua Chen Lakshmi N. Ramanathan Karsten Meier Unimicron Microsoft Corporation Technische Universität Dresden
1. 8:00 a.m. - Low-Loss Glass Substrates 1. 8:00 a.m. - Highly (111)-Oriented 1. 8:00 a.m. - Improved Finite Element Formulated With a Variety of Dielectric Nanotwinned Cu for High Fatigue Resistance Modeling of Moisture Diffusion Considering Characteristics for mm Wave Applications in Fan-Out Wafer-Level Packaging Discontinuity at Material Interfaces in Kazutaka Hayashi, Nobutaka Kidera, and Yoichiro Yu-Jin Li, Chih-Han Theng, I-Hsin Tseng, and Chih Electronic Packages Sato – AGC Inc. Chen – National Chiao Tung University; Benson Lin Lulu Ma and Xuejun Fan – Lamar University; Rahul and Chia-Cheng Chang – MediaTek Inc. Joshi and Keith Newman – Advanced Micro Devices, Inc.
2. 8:25 a.m. - Evaluation of Fine-Pitch 2. 8:25 a.m. - WLCSP Package and PCB 2. 8:25 a.m. - Study of Thermal Aging Routing Capabilities of Advanced Dielectric Design for Board Level Reliability Behavior of Epoxy Molding Compound for Materials for High-Speed Panel-RDL in 2.5D Jason Chiu, Kuo-Chin Chang, Pei-Haw Tsao, Steve Applications in Harsh Environments Interposer and Fan-Out Packages Hsu, and Mirng-Ji Lii – Taiwan Semiconductor Adwait Inamdar, Alexandru Prisacaru, Martin Shreya Dwarakanath, Pulugurtha Markondeya Raj, Atsushi Kubo, Manufacturing Company, Ltd. Fleischman, Erick Franieck, and Przemyslaw Gromala Fuhan Liu, Mohanalingam Kathaperumal, and Rao R. Tummala – Robert Bosch GmbH; Agnes Veres and Csaba – Georgia Institute of Technology; Amit Agarwal – Microchips; Nemeth – Robert Bosch Kft; Yu-Hsiang Yang and Daichi Okamaoto – Taiyo Ink Mfg. Co., Ltd. Bongtae Han – University of Maryland
3. 8:50 a.m. - Attenuation of High-Frequency 3. 8:50 a.m. - Assessing the Reliability of 3. 8:50 a.m. - Warpage Variation Analysis Signals in Structured Metallization on Highly Stretchable Interconnects for Flexible and Model Prediction for Molded Packages Glass: Comparing Different Metallization Hybrid Electronics Yuling Niu, Wei Wang, Zhijie Wang, Karthik Techniques with 24 GHz, 77 GHz and 100 Rajesh Sharma Sivasubramony, Ashwin Varkey Dhandapani, Mark Schwarz, and Ahmer Syed – GHz Structures Zachariah, Mohammed Alhendi, Manu Yadav, Peter Qualcomm Technologies, Inc. Martin Letz, Mathias Mydlak – SCHOTT AG; Matthias Jost – Technische Universität Darmstadt; Brandon T. Gore and William J. Kozlovsky – Samtec Borgesen and Mark D. Poliks – Binghamton University; Inc.; Romeo Premerlani and Alex Bruderer – Varioprint AG; Manuel Martina Nancy C. Stoffel, David M. Shaddock, and Liang Yin – and Thomas Gottwald – Schweizer Electronic AG; Tetsuya Onishi – Grand Joint Technology Ltd.; Siddharth Ravichandran – Packaging Research Center; GE Global Research Holger Maune – Institute for Microwave Engineering and Photonics Refreshment Break: 9:15 a.m. - 10:00 a.m. Exhibit Hall - Belmont 1 & 5
4. 10:00 a.m. - The Highly Effective 4. 10:00 a.m. - The How and Why of Biased 4. 10:00 a.m. - Peridynamics for Predicting EMI Shielding Materials for Electric and Humidity Tests with Copper Wire Thermal Expansion Coefficient of Graphene Magnetic Fields Over the Wide Range of Amar Mavinkurve, Rene Rongen, Leon Goumans, Erdogan Madenci, Atila Barut, and Mehmet Dorduncu Frequency in Near-Field Region Mark Luke Farrugia, Erik van Olst, Orla O’Halloran, – The University of Arizona Yoon-Hyun Kim, Kisu Joo, Kyu Jae Lee, Jung Woo and Michiel van Soestbergen – NXP Semiconductors Hwang, Se Young Jeong Seung Jae Lee, and Hyun Ho Park – Ntrium Inc.
5. 10:25 a.m. - Low-Loss NCF Material for 5. 10:25 a.m. - Twist Testing for Flexible 5. 10:25 a.m. - Machine Learning Approach High-Frequency Device Electronics to Improve Accuracy of Warpage Simulations Kazutaka Honda, Keiko Ueno, Tsuyoshi Ogawa, and Justin Chow and Suresh Sitaraman – Georgia Institute Cheryl Selvanayagam, Pham Luu Trung Duong, Toshihisa Nonaka – Hitachi Chemical Company, Ltd. of Technology; Jeffrey Meth – DuPont and Nagarajan Raghavan – Singapore University of Technology and Design; Rathin Mandal - Advanced Micro Devices Inc.
6. 10:50 a.m. - In-Situ Redox Nanowelding 6. 10:50 a.m. - Mechanical Properties and 6. 10:50 a.m. - Study on Warpage of Fan-Out of Copper Nanowires with Surficial Oxide Microstructural Fatigue Damage Evolution in Panel Level Packaging (FO-PLP) Using Gen-3 Layer as Solder for Flexible Transparent Cyclically Loaded Lead-Free Solder Joints Panel Electromagnetic Interference Shielding Sinan Su, Mohd Aminul Hoque, Md Mahmudur Fa Xing Che, Kazunori Yamamoto, Vempati Srinivasa Xianwen Liang, Jianwen Zhou, Gang Li, Tao Zhao, Chowdhury, Sa’d Hamasha, Jeffrey C. Suhling, John L. Rao and Vasarla Nagendra Sekhar– Institute of Pengli Zhu, and Rong Sun – Shenzhen Institutes of Evans, and Pradeep Lall – Auburn University Microelectronics A*STAR Advanced Technology; Ching-Ping Wong – Georgia Institute of Technology
7. 11:15 a.m. - Compartmental EMI 7. 11:15 a.m. - Reliability Studies of Silicon 7. 11:15 a.m. - Mechanical Properties Shielding Material with Jet-Dispensed Interconnect Fabric of Intermetallic Compounds at Elevated Material Technology Niloofar Shakoorzadeh, Siva Chandra Jangam, Pranav Temperature by Nanoindentation Xuan Hong, Qizhuo Zhuo Zhuo, Xinpei Cao, Ambhore, Amir Hanna, and Subramanian Iyer – Fan Yang, Sheng Liu, and Zhiwen Chen – Wuhan Dan Maslyk, Noah Ekstrom, Juliet Sanchez, Selene University of California, Los Angeles; Kaysar Rahim University; Zhaoxia Zhou, Canyu Liu, and Changqing Hernandez, and Jinu Choi – Henkel Corporation – Global Foundries; Han Chien – National Chiao Tung Liu – Loughborough University; Li Liu – Wuhan University University of Technology
17 Program Sessions: Thursday, May 30, 1:30 p.m. - 5:30 p.m.
Session 19: MEMS, Sensors, and IoT Session 20: Fan-Out and Heterogeneous Session 21: 5G, mm-Wave, and Antenna- Integration in-Package
Committee: Committee: Committee: High-Speed, Wireless & Packaging Technologies Interconnections Components
Mont-Royal 1 Mont-Royal 2 Nolita 1
Session Co-Chairs: Session Co-Chairs: Session Co-Chairs: Joseph W. Soucy Jean-Charles Souriau Maciej Wojnowski Draper Laboratory CEA Leti Infineon Technologies AG Ning Ge Wei-Chung Lo Xiaoxiong (Kevin) Gu Consultant ITRI IBM Corporation
1. 1:30 p.m. - A MEMS Microphone in a 1. 1:30 p.m. - Feasibility Study of Fan-Out 1. 1:30 p.m. - Vivaldi Antenna Array FOWLP Wafer-Level Packaging for Heterogeneous Fabricated Using a Hybrid Process Horst Theuss, Christian Geissler, Franz-Xaver Integrations Vincens Gjokaj, Cameron Crump, John Albrecht, John Muehlbauer, Claus von Waechter, Thomas Kilger, Juergen John Lau, Ming Li, Nelson Fan, Eric Kuah, Raymond So, Penny Lo, Y. M. Papapolymerou, and Premjeet Chahal – Michigan State Cheung, Cao Xi – ASM Pacific Technology; Iris Xu, Tony Chen, Kim Hwee Wagner, Thomas Fischer, Ulf Bartl, Stephan Helbig, Alfred Tan, and Zhang Li – Jiangyin Changdian Advanced Packaging Co., Ltd.; Cao Xi University Sigl, Dominic Maier, Bernd Goller, Matthias Vobl, Matthias (Huawei Technologies Co. Ltd.); Rozalia Beica – Dow Chemical Company; Herrmann, Johannes Lodermeyer and Ulrich Krumbein – Sze Pei Lim, NC Lee – Indium Corporation; Cheng-Ta Ko, Henry Yang, and Infineon Technologies; Alfons Dehe - Hahn-Schickard YH Chen – Unimicron Technology Corporation; Mian Tao, Jeffery Lo, and Ricky Lee – Hong Kong University of Science and Technology 2. 1:55 p.m. - Fan-Out Wafer Level 2. 1:55 p.m. - Experiment of 22FDX® Chip 2. 1:55 p.m. - Novel Multicore PCB and Packaging - A Platform for Advanced Sensor Board Interaction (CBI) in Wafer Level Substrate Solutions for Ultra Broadband Packaging Packaging Fan-Out (WLPFO) Dual Polarized Antennas for 5G Millimeter Tanja Braun, Karl-Friedrich Becker, Ole Hoelck, Jae Kyu Cho, Jens Paul, Simone Capecchi, Wave Covering 28GHz & 39GHz Range Steve Voges, Ruben Kahle, Pascal Graap, Markus Frank Kuechenmeister, and Ta-Chien Cheng – Trang Thai, Sidharth Dalmia, Josef Hagn, Pouya Wöhrmann, and Rolf Aschenbrenner – Fraunhofer GLOBALFOUNDRIES Talebbeydokhti, and Yossi Tsfati – Intel Corporation IZM; Marc Dreissigacker, Martin Schneider-Ramelow, and Klaus-Dieter Lang – Technical University Berlin
3. 2:20 p.m. - 3D-MID Evaluation and 3. 2:20 p.m. - FOWLP Design for Digital and 3. 2:20 p.m. - 3D Glass Package-Integrated, Validation for Space Applications RF Circuits High-Performance Power Dividing Networks Etienne Hirt and Klaus Ruzicka – Art of Technology Teck Guan Lim, David Soon Wee Ho, Eva Wai Leong for 5G Broadband Antennas AG; Benedikt Wigger, Maximilian Barth, Rafat Saleh, Ching, Zihao Chen and Surya Bhattacharya – Institute Muhammad Ali, Atom Watanabe, Tong-Hong Lin, and Florian Janek – Hahn Schickard; Ernst Müller – of Microelectronics A*STAR Manos Tentzeris, and Rao Tummala – Georgia Universitat Stuttgart Institute of Microintegration Institute of Technology; Markondeya Raj Pulugurtha – Florida International University
Refreshment Break: 2:45 p.m. - 3:30 p.m. Exhibit Hall - Belmont 1 & 5
4. 3:30 p.m. - High-Temperature Pressure 4. 3:30 p.m. - Next-Generation of 2-7 4. 3:30 p.m. - Advanced Wafer-Level PKG Sensor Package and Characterization of Micron Ultra-Small Microvias for 2.5D Panel Solutions for 60GHz WiGig (802.11ad) Thermal Stress in the Assembly up to 500 °C Redistribution Layer by Using Laser and Telecom Infrastructure Nilavazhagan Subbiah, Qingming Feng, and Juergen Photolithography Technologies Dapeng Wu, Robin Dahlbäck, Erik Öjefors, and Mats Wilde – University of Freiburg; Gudrun Bruckner - Fuhan Liu, Chandrasekharan Nair, Gaurav Khurana, Atom Carlsson - Sivers IMA AB; Francis Chee Peng Lim, CTR AG, Austria Watanabe, Bartlet H. DeProspo, and Rao R. Tummala – Yew Kheng Lim, Aung Kyaw Oo, Won Kyung Choi, Georgia Institute of Technology; Atsushi Kubo – Tokyo and Seung Wook Yoon – STATS ChipPAC Pte. Ltd. Ohka Kogyo Co., Ltd. Japan; Cheng Ping Lin, Toshiyuki Makita and Naoki Watanabe – Panasonic Corporation
5. 3:55 p.m. - Development of 3D WLCSP 5. 3:55 p.m. - Multilayer RDL Interposer 5. 3:55 p.m. - Low-Loss Additively-Deposited with Black Shielding for Optical Finger Print for Heterogeneous Device and Module Ultra-Short Copper Paste Interconnections Sensor for the Application of Full Screen Integration in 3D Antenna-Integrated Packages for 5G Smart Phone Yi Hang Lin, M.C. Yew, M.S. Liu, S.M. Chen, T.M. and IoT Applications Daquan Yu, Yichao Zou, Xirui Xu, Aihua Shi, Lai, Pravin Kavle, C.H. Lin, T.J. Fang, C.S. Chen, C.T. Atom Watanabe, Yiteng Wang, Markondeya R. Pulugurtha, Xiaobing Yang and Zhiyi Xiao – Huantian Technology Yu, P.Y. Lin, Shin-Puu Jeng and K.C. Lee – Taiwan Vanessa Smet, Manos Tentzeris, and Rao Tummala – Georgia (Kunshan) Electronics Co., Ltd. Semiconductor Manufacturing Company Ltd. Institute of Technology; Nobuo Ogura – Nagase & Co., Ltd.; P. Markondeya Raj – Florida International University
6. 4:20 p.m. - Micro Fountain-Like 6. 4:20 p.m. - Effects of Dielectric Curing 6. 4:20 p.m. - Advanced Thin-Profile Fan- Resonators Conditions on the Interfacial Adhesion of Cu Out with Beamforming Verification for 5G Jianfeng Zhang, Jintang Shang, Bin Luo, and Zhaoxi Su RDL for Fan-Out Wafer Level Packaging Wideband Antenna – Southeast University Gahui Kim and Kirak Son, and Young-Bae Park – Ricky Hsieh, Fu-Cheng Chu, Cheng-Yu Ho, and Chen- Andong National University; Dogeun Kim - Korea Chao Wang – Advanced Semiconductor Engineering Institute of Materials Science; Seok-Hyun Lee – Inc. Samsung Electronics Co., Ltd.
7. 4:45 p.m. - Novel Additively 7. 4:45 p.m. - Al-Al Direct Bonding with Sub- 7. 4:45 p.m. - Integrated Compact Planar Manufactured Packaging Approaches for µm Alignment Accuracy for Millimeter Wave Inverted-F Antenna (PIFA) with a Shorting via 5G/mm-Wave Wireless Modules SiGe BiCMOS Wafer Level Packaging and Wall for Millimeter-Wave Wireless Chip-to- Tong-Hong Lin, Aline Eid, Jimmy Hester, Bijan Heterogeneous Integration Chip (C2C) Communications in 3D-SiP Tehrani, and Manos Tentzeris – Georgia Institute of Matthias Wietstruck, Sebastian Schulze, Selin Tolunay Seahee Hwangbo, Renuka Bowrothu, Hae-in Kim, and Technology; Jo Bito – Texas Instruments, Inc. Wipf, Christian Wipf, and Mehmet Kaynak – IHP Leibniz Yong-Kyu Yoon – University of Florida Institute for Innovative Microelectronics; Bernhard Rebhan, Peter Kerepesi, Helmut Kurz, Gerald Silberer, and Josef Meiler – EV Group, E. Thallner GmbH 18 Program Sessions: Thursday, May 30, 1:30 p.m. - 5:30 p.m.
Session 22: Advanced Substrates and Session 23: High-Bandwidth 3D and Session 24: Advancements in Solder Joint Interconnect Technology Photonic Characterization and Reliability Evaluation
Committee: Committee: Photonics in conjunction with Committee: Materials & Processing Interconnections Applied Reliability
Nolita 2 Nolita 3 Yaletown 1
Session Co-Chairs: Session Co-Chairs: Session Co-Chairs: Kimberly Yess Takaaki Ishigure Scott Savage Brewer Science Keio University Medtronic Microelectronics Center Mikel Miller Dingyou Zhang Pei-Haw Tsao EMD Performance Materials Broadcom Inc. Taiwan Semiconductor Manufacturing Company, Ltd.
1. 1:30 p.m. - Temporary SiC-SiC Wafer 1. 1:30 p.m. - A Highly Reliable 1.4um Pitch 1. 1:30 p.m. - Effects of In and Zn Double Bonding Compatible With High Temperature Via-last TSV Module for Wafer-to-Wafer Addition on Eutectic Sn-58Bi Alloy Annealing Hybrid Bonded 3D-SOC Systems Shiqi Zhou, Yu-An Shen, and Hiroshi Nishikawa Fengwen Mu and Tadatomo Suga – The University Stefaan Van Huylenbroeck, Joeri De Vos, Zaid – Osaka University; Tiffani Uresti, Vasanth of Tokyo; Miyuki Uomoto and Takehito Shimatsu – El-Mekki, Geraldine Jamieson, Nina Tutunjyan, Karthik Shunmugasamy, and Bilal Mansoor – Texas A&M Tohoku University Muga, Michele Stucchi, Andy Miller, Gerald Beyer, and University at Qatar Eric Beyne – IMEC
2. 1:55 p.m. - Ultrathin Glass to Ultrathin 2. 1:55 p.m. - Nanoscale Topography 2. 1:55 p.m. - Microstructural Evolution in Glass Bonding Using Laser Sealing Approach Characterization for Direct Bond SAC+X Solders Subjected to Aging Messaoud Bedjaoui, Johnny Amiran, and Jean Brun – Interconnect Jing Wu, Jeffrey C. Suhling, and Pradeep Lall – Auburn CEA-LETI Bongsub Lee, Pawel Mrozek, Gill Fountain, John University Posthill, Jeremy Theil, Guilian Gao, Rajesh Katkar, and Laura Mirkarimi – Xperi Corporation
3. 2:20 p.m. - Development of Resins for 3. 2:20 p.m. - Fully-Filled, Highly-Reliable 3. 2:20 p.m. - Microstructure Signature Bumpless Interconnects and Wafer-on- Fine-Pitch Interposers With TSV Aspect Ratio Evolution in Solder Joints, Solder Bumps, Wafer (WOW) Integration >10 for Future 3D-LSI/IC Packaging and Micro-Bumps Interconnection in a Naoko Araki and Shinji Maetani – Daicel Corporation; Murgesan Murugesan, Takafumi Fukushima, Large 2.5D FCBGA Package During Thermo- Kim Young Suk and Shoichi Kodama – Disco Kiyonharu Mori, Ai Nakamura, Yisang Lee, Makoto Mechanical Cycling Corporation; Takayuki Ohba – Tokyo Institute of Motoyoshi, J.C Bea, and Mitsumasa Koyanagi – Global Arman Ahari, Andy Hsiao, Tae-Kyu Lee, and Greg Technology INTegration Initiative; Shigeru Watariguchi – Meltex Baty – Portland State University; Peng Su – Juniper Inc. Networks
Refreshment Break: 2:45 p.m. - 3:30 p.m. Exhibit Hall - Belmont 1 & 5
4. 3:30 p.m. - Development of Novel 4. 3:30 p.m. - 3D Silicon Photonics Interposer 4. 3:30 p.m. - Long-Term Reliability of Solder Photosensitive Dielectric Material for for Tb/s Optical Interconnects in Data Joints in 3D ICs Under Near-Application Reliable 2.1D Package Centers With Double-Side Assembled Active Conditions Yune Kumazawa, Seiji Shika, Shunsuke Katagiri, Takuya Components and Integrated Optical and Omar Ahmed, Golareh Jalilvand, Hector Fernandez, Suzuki, Tsuyoshi Kida, and Shu Yoshida – Mitsubishi Electrical Through Silicon Via on SOI and Tengfei Jiang – University of Central Florida; Peng Gas Chemical Company, Inc. Bogdan Sirbu, Yann Eichhammer, Hermann Oppermann, and Su – Juniper Networks; Tae-Kyu Lee – Portland State Tolga Tekin – Fraunhofer IZM; Victor Sidorov and Jochen Kraft – AMS AG; Xin Yin and Johan Bauwelinck – IMEC; Christian University Neumeyr – VERTILAS GmbH; Francisco Soares – Fraunhofer HHI
5. 3:55 p.m. - High Reliability Solder Resist 5. 3:55 p.m. - Flip-Chip III-V-to-Silicon 5. 3:55 p.m. - Experimental Investigation With Strong Adhesion and High Resolution Photonics Interfaces for Optical Sensor of the Correlation between a Load-Based for High Density Packaging Yves Martin, Jason Orcutt, Chi Xiong, Laurent Metric and Solder Joint Reliability of BGA Sawako Shimada, Kazuya Okada, Tomoya Kudo, Schares, Tymon Barwicz, Martin Glodde, Swetha Assemblies on System Level Chiho Ueta, and Yuya Suzuki – Taiyo Ink Mfg. Co., Kamlapurkar, Eric J. Zhang, and William M.J. Green Fabian Schempp, Marc Dressler, Daniel Kraetschmer, Ltd. – IBM Corporation; Victor Dolores-Calzadilla, Martin and Friederike Loerke – Robert Bosch GmbH; Juergen Moehrle and Ariane Sigmund – Fraunhofer HHI Wilde – University of Freiburg, IMTEK
6. 4:20 p.m. - Method for Mitigating 6. 4:20 p.m. - Extremely Low-Profile Single 6. 4:20 p.m. - Fatigue Life Predictive Model the Warpage of Ultra-thin FC-CSPs by Mode Fiber Array Coupler Suitable for Development for Decoupling Capacitors Controlling of EMC Properties Silicon Photonics Krishna Tunga, Joseph Ross, Kamal Sikka, and Bakul Chika Arayama, Takahiro Akashi, Yasunari Tomita, Mitsuharu Hirano, Akira Furuya, Hideki Machida, Parikh – IBM Corporation and Naoki Kanagawa – Panasonic Corporation Koichi Koyama, Yasunori Murakami, and Kazunori Tanaka – Sumitomo Electric Industries, Ltd.
7. 4:45 p.m. - Innovative Socketable and 7. 4:45 p.m. - Micro-Lens Array Assembly for 7. 4:45 p.m. - A Study of Substrate Models Surface-Mountable BGA Interconnections Optical Organic Substrates and Its Effect on Package Warpage Omkar Gupte, Kristie Teoh, Vanessa Smet, and Rao Patrick Jacques, Richard Langlois, Elaine Cyr, Prediction Tummala – Georgia Institute of Technology; Gregorio Alexander Janta-Polczynski, and Paul Fortier – IBM Van Lai Pham, Jiefeng Xu, Jing Wang, Huayan Murtagian – Intel Corporation Bromont, Canada; Koji Masuda, Masao Tokunari, and Wang and Seungbae Park – Binghamton University; Hsiang-Han Hsu – IBM Tokyo Research Charandeep Singh – Corning, Inc.
19 Program Sessions: Friday, May 31, 8:00 a.m. - 11:40 a.m.
Session 25: Wafer Level Packaging and Session 26: High-Speed Signaling for High- Session 27: Advanced Biosensors and Fan-In/Fan-Out Structures & Materials Performance Computing and Memory Bioelectronics
Committee: Committee: Committee: Packaging Technologies High-Speed, Wireless & Components Emerging Technologies
Mont-Royal 1 Mont-Royal 2 Nolita 1
Session Co-Chairs: Session Co-Chairs: Session Co-Chairs: Albert Lan Rockwell Hsu Zhuo Li Applied Materials Cisco Systems, Inc. Fudan University Andrew Kim Jaemin Shin Jimin Yao Intel Corporation Qualcomm Corporation Intel Corporation
1. 8:00 a.m. - 3D Fan-Out Package 1. 8:00 a.m. - Hybrid Prepreg Conventional 1. 8:00 a.m. - Flexible Probe for Electrical Technology with Photosensitive Through Build-Up Laminate for 112Gbit/s SerDes Neural Signal Recording Mold Interconnects Kwang Won Choi, Edmund Blackshear, Eric Tremble, Sajay Bhuvanendran Nair Gourikutty and Ruiqi Lim – Kentaro Mori, Soichi Yamashita, Takafumi Fukuda, and David Stone – GLOBALFOUNDRIES; Jean Institute of Microelectronics A*STAR Masahiro Sekiguchi, Hirokazu Ezawa, and Shuzo Audet – IBM Canada Ltd.; Keiichi Hirabayashi – Shinko Akejima – Toshiba Corporation Electric Industries Company, Ltd.
2. 8:25 a.m. - Effects of the Materials 2. 8:25 a.m. - PI/SI Analysis and Design 2. 8:25 a.m. - Stretchable, Implantable Properties of Epoxy Molding Films (EMFs) on Approach for HPC Platform Applications Nanomembrane Biosensor for Wireless, Fan-Out Packages (FOPs) Characteristics Sungwook Moon, Chanmin Jo, and Seungki Nam – Real-Time Monitoring of Hemodynamics Sangmyung Shin, Hanmin Lee, JunMo Kim, Tae-Ik Samsung Electronics Company, Ltd. Robert Herbert and Woon-Hong Yeo – Georgia Lee, Taek-Soo Kim, and Kyung-Wook Paik – Korea Institute of Technology Advanced Institute of Science and Technology; Youjin Kyung, Minsu Jeong, and Kwangjoo Lee – LG Chem
3. 8:50 a.m. - Mechanism of Moldable 3. 8:50 a.m. - PoP LPDDR5 (6.4 Gbps) 3. 8:50 a.m. - A Wearable Passive pH Sensor Underfill (MUF) Process for RDL-1st Fan- NTODT and 1-tap DFE for Signal Integrity for Health Monitoring Out Panel Level Packaging (FOPLP) Enhancement Saikat Mondal, Saranraj Karuppuswami, Rachel Lin Bu, F.X. Che Vempati Srinivasa Rao, and Xiaowu Sunil Gupta – Qualcomm Technologies, Inc. Steinhornst, and Premjeet Chahal – Michigan State Zhang – Institute of Microelectronics A*STAR University
Refreshment Break: 9:15 a.m. - 10:00 a.m. Mont-Royal Commons
4. 10:00 a.m. - Study of the Board Level 4. 10:00 a.m. - Open CAPI Memory Interface 4. 10:00 a.m. - Novel Packaging Structure Reliability Performance of a Large 0.3 mm Signal Integrity Study for High-Speed DDR5 and Processes for Micro-TFB (Thin Film Pitch Wafer-Level Package Differential DIMM Channel With Standard Battery) to Enable Miniaturized Healthcare Bernd Waidhas, Jan Proschwitz, Christoph Pietryga, Loss FR-4 Material and SNIA SFF-TA-1002 Internet-of-Things (IoT) Devices Thomas Wagner, and Beth Keser – Intel Deutschland Connector Bing Dang, Qianwen Chen, Leanna Pancoast, Yu GmbH Biao Cai, Jose Hejase, Kyle Giesen, Junyan Tang, Brian Luo, Hongqing Zhang, Jae-woong Nah, and John Connolly, Kyu- Hyoun Kim, and Daniel Dreps – IBM Knickerbocker – IBM Corporation; Andy Shih, Po Corporation; Zhineng Fan, Rocky Huang, Luyun Yi, Qiaoli Wen Cheng, Kai Liu, Mengnian Niu, Simon Nieh – Chen, Yifan Huang, and Stephen Smith - Amphenol ICC Front Edge Technologies, Inc.
5. 10:25 a.m. - Study of Board Level 5. 10:25 a.m. - Effectiveness of Equalization 5. 10:25 a.m. - Printed Temporary Transfer Reliability of eWLB (Embedded Wafer-Level and Performance Potential in DDR5 Tattoos for Skin-Mounted Electronics BGA) for 0.35mm Ball Pitch Channels With RDIMM(s) Samuli Tuominen and Matti Mäntysalo – Tampere Seung Wook Yoon, Yeow Kheng Lim, Seng Guang Nanju Na and Hing “Thomas” To – Xilinx, Inc. University of Technology Chow, Kang Chen, Won Kyung Choi, and Kang Hai Lee – STATS ChipPAC Pte. Ltd.; NW Liu, Yenyao Chi, and Benson Lin – MediaTek, Inc.
6. 10:50 a.m. - Board Level Reliability Study 6. 10:50 a.m. - Inductive Links for 3D 6. 10:50 a.m. - Thermoset Polymers for of Fan-Out Single Die Package with 350um Stacked Chip-to-Chip Communication Bioelectronic Interfaces: Engineering of Bump Pitch Xiao Sun, Nicolas Pantano, Kim Soon-Wook, Geert Thermomechanical Properties Chieh Lung Lai, Gu-Yan Lin, Tz-Yuan Chao, Yih-Sin Van der Plas, and Eric Beyne – IMEC Adriana Carolina Duran-Martinez, Alexandra Joshi- Chen, and Feng-Lung Chien – Siliconware Precision Imre, Seyedmahmoud Hosseini, Daniel Del Nero, Industries Co., Ltd. Walter E. Voit, and Melanie Ecker – The University of Texas at Dallas
7. 11:15 a.m. - The Analysis for Bump 7. 11:15 a.m. - System Co-Design of a 600V 7. 11:15 a.m. - Direct Heterogeneous Resistance Improvement by Optimizing the GaN FET Power Stage with Integrated Driver Bonding of SiC to Si, SiO2, and Glass for Sputter Condition in a QFN System-in-Package (QFN-SiP) High-Performance Power Electronics and Ming-Sin Su, Chang-Ning Wang, Clair Tsai, T. L. Yang, Jie Chen, Yong Xie, Django Trombley, and Rajen Bio-MEMS Rolance Yang, W. C. Wu, C. S. Liu, J.M. Chiu, Y. F. Murugan – Texas Instruments, Inc. Jikai Xu, Chenxi Wang, Qiushi Kang, Shicheng Zhou, Chen, Ponder Pang, Harry Ku, Kirin Wang, C.H. Su, and Yanhong Tian – Harbin Institute of Technology Steven Hsu, Calvin Lu, K.C. Liu and Marvin Liao – Taiwan Semiconductor Manufacturing Company Ltd. 20 Program Sessions: Friday, May 31, 8:00 a.m. - 11:40 a.m.
Session 28: Embedded and Integrated Session 29: Electromigration and Session 30: Assembly and Process Technologies Innovative Reliability Test Methods Modeling
Committee: Assembly & Manufacturing Technol- Committee: Committee: Thermal/Mechanical ogy in conjunction with Packaging Technology Applied Reliability Simulation & Characterization
Nolita 2 Nolita 3 Yaletown 1
Session Co-Chairs: Session Co-Chairs: Session Co-Chairs: Christo Bojkov Keith Newman Suresh K. Sitaraman Qorvo AMD Georgia Institute of Technology John H. Lau Pilin Liu Kuo-Ning Chiang ASM Pacific Technology Intel Corporation National Tsinghua University
1. 8:00 a.m. - Development of Flexible 1. 8:00 a.m. - Effect of Intermetallic 1. 8:00 a.m. - Explicit FE Failure Prediction Hybrid Electronics Using Reflow Assembly Compound Growth on Electromigration of Interfaces and Interconnect in Potted With Stretchable Film Failure Mechanism in Low-Profile Solder Electronics Assemblies Subject to High-G Weifeng Liu, William Uy, Alex Chan, and Dongkai Joints Acceleration Loads Shangguan – Flex, Ltd.; Andy Behr, Takatoshi Abe, and Hossein Madanipour, Yi-Ram Kim, and Choong-Un Pradeep Lall and Kalyan Dornala – Auburn University; Fukao Tomohiro – Panasonic Corporation Kim – The University of Texas at Arlington; Ninad John Deep – US AFRL; Ryan Lowe – ARA Associates Shashane, Dibyajat Mishra, T. Noguchi, M. Yoshino, and Luu Nguyen – Texas Instruments, Inc.
2. 8:25 a.m. - Highly Compact RF Transceiver 2. 8:25 a.m. - Effect of Grain Orientation 2. 8:25 a.m. - Numerical Simulation on the Module Using High Resistive Silicon and Microstructure Evolution on Formation Process of Metal Droplets by Interposer with Embedded Inductors and Electromigration in Flip-Chip Solder Joint Pneumatic Diaphragm Drop-On Demand Heterogeneous Dies Integration Xing Fu, Bin Zhou, Yunfei En, and Si Chen (Science Technology Gabriel Pares, Jean-Philippe Michel, Edouard and Technology on Reliability Physics and Application Kun Ma, Sheng Liu, Zhiwen Chen, and Li Liu – Wuhan Deschaseaux, Pierre Ferris, Ayssar Serhan, and of Electronic Component Laboratory, China), Ruohe University of Technology; Hao Zheng and Yao Zhang Alexandre Giry – CEA-LETI Yao – South China University of Technology – China Ship Development and Design Center
3. 8:50 a.m. - Process Induced Wafer 3. 8:50 a.m. - High Electromigration 3. 8:50 a.m. - On Curing-Induced Residual Warpage Optimization for Multi-Chip Lifetimes of Nanotwinned Cu Redistribution Stresses After Molding Processes: Mold Integration on Wafer Level Molded Wafer Lines Shrinkage, Chemical Shrinkage or Both? Chen-Yu Huang, Daniel Ng, Hung-Ho Lee, Vito I-Hsin Tseng, Yu-Jin Li, and Chih Chen – National Changsu Kim, Sukrut Phansalkar, Hyun-Seop Lee, and Lin, Chang Fu Lin, and C. Key Chung – Siliconware Chiao Tung University; Benson Lin and Chia-Cheng Bongtae Han – The University of Maryland Precision Industries Co., Ltd. Chang – MediaTek, Inc.
Refreshment Break: 9:15 a.m. - 10:00 a.m. Mont-Royal Commons
4. 10:00 a.m. - Improved Structure for 4. 10:00 a.m. - Non-Destructive Failure 4. 10:00 a.m. - Realistic Solder Joint Package Substrates with Embedded Thin- Analysis of Various Chip to Package Geometry Integration with Finite Element Film Capacitor Interaction Anomalies in FCBGA Packages Analysis for Reliability Evaluation of Printed Tomoyuki Akahoshi and Daisuke Mizutani – Fujitsu Subjected to Temperature Cycle Reliability Circuit Board Assembly Laboratories, Ltd.; Kei Fukui, Shogo Yamawaki, and Testing Chun Sean Lau, Ning Ye, and Hem Takiar – Western Hidehiko Fujisaki – Fujitsu Interconnect Technologies, Vishnu Vardhan Busi Reddy and I. Charles Ume – Digital Corporation Ltd.; Manabu Watanabe and Masateru Koide – Fujitsu Georgia Institute of Technology; Jaimal Williamson and Advanced Technologies, Ltd. Luu Nguyen – Texas Instruments, Inc.
5. 10:25 a.m. - 3D Packaging with Embedded 5. 10:25 a.m. - Assessment of Accelerometer 5. 10:25 a.m. - Multi-Physics Modelling and High-Power-Density Passives for Integrated Versus LASER for Board Level Vibration Experimental Investigation – An Original Voltage Regulators Measurements Approach for Laser-Dicing/Grooving Process Teng Sun, Robert Spurney, Atom Watanabe, Varun Thukral, Maëlle Cahu, Jeroen Zaal, Jeroen Optimization Pulugurtha Markondeya, Himani Sharma, Rao Jalink, Romuald Roucou, and Rene Rongen – NXP Jeff Moussodji Moussodji and Dominique Drouin – 3IT Tummala, and – Georgia Institute of Technology; Semiconductors University de Sherbrooke; Oswaldo Chacon and Furukawa Yoshihiro – Nitto Denko Corporation Francis Santerre – IBM Canada Ltd.
6. 10:50 a.m. - A Novel Panel Level Double 6. 10:50 a.m. - Effect of Process Parameters 6. 10:50 a.m. - Thermal Characteristics Side-Embedded Package for Small Size on the Long-Run Print Consistency and of Vertically Integrated GaN/SiC-on-Si Power Devices Material Properties of Additively Printed Assemblies: A Comparative Study Kunpeng Ding and Mian Huang - Shenzhen Siptory Electronics Kimmo Rasilainen and Christian Fager – Chalmers Technologies Co., Ltd.; Zhichao Wu and Jian Cai – Pradeep Lall, Amrit Abrol, Nakul Kothari, Jeff Suhling, University of Technology; Per Ingelhag and Peter Melin Tsinghua University; Bowei Zhang – Wuxi Sky Chip and Sudan Ahmed – Auburn University; Ben Leever – Ericsson AB; Torbjörn M. J. Nilsson – Saab AB; Interconnection Technology Co., Ltd. – US AFRL; Scott Miller – NextFlex Manufacturing Mattias Thorsell – Chalmers University of Technology Institute & Saab AB
7. 11:15 a.m. - Chiplet Microassembly 7. 11:15 a.m. - A Viscoplastic-Based 7. 11:15 a.m. - Comprehensive Investigation Printer Fatigue Reliability Model for the Polyimide on Warpage Management of FOPLP With Brad Rupp, Anne Plochowietz, Lara S. Crawford, Dielectric Thin-Film Multi-Embedded Ring Designs Matthew Shreve, Sourobh Raychaudhuri, Sergey Yu-Chen Chang and Tz-Cheng Chiu – National Chang-Chun Lee, Yan-Yu Liou, and Pei-Chen Huang – Butylkov, Yunda Wang, Ping Mei, Qian Wang, Jamie Cheng Kung University; Yu-Ting Yang, Yi-Hsiu Tseng, National Tsing Hua University; Fussen Hsu, Puru Bruce Kalb and Yu Wang, Eugene M. Chow and Jeng Ping and Xi-Hong Chen – Advanced Semiconductor Lin, Cheng-Ta Ko, and Yu-Hua Chen – Unimicron Lu – Palo Alto Research Center Inc. Engineering Group, Inc. Technology Corporation
21 Program Sessions: Friday, May 31, 1:30 p.m. - 5:30 p.m.
Session 31: Automotive and Power Session 32: Power and Panel Assembly Session 33: Fan-Out, Flip Chip, Packaging and WLCSP
Committee: Committee: Assembly & Manufacturing Committee: Thermal/Mechanical Packaging Technologies Technology in conjunction with Applied Reliability Simulation & Characterization
Mont-Royal 1 Mont-Royal 2 Nolita 1
Session Co-Chairs: Session Co-Chairs: Session Co-Chairs: Young-Gon Kim Habib Hichri Ning Ye Integrated Device Technology, Inc. Suss Microtech Photonic Systems Inc. Western Digital Kuo-Chung Yee Shichun Qu Wei Wang Taiwan Semiconductor Manufacturing Corporation, Inc. Intersil, a Renesas Company Qualcomm Technologies, Inc.
1. 1:30 p.m. - Development of High Power 1. 1:30 p.m. - An RDL-First Fan-out 1. 1:30 p.m. - A Sequential Finite Volume and High Junction Temperature SiC Based Panel-Level Package for Heterogeneous Method / Finite Element Analysis of a Power Power Packages Integration Applications Electronic Semiconductor Chip Gongyue Tang, Leong Ching Wai, Teck Guan Lim, Yu-Min Lin, Sheng-Tsai Wu, Ang-Ying Lin, Shin-Yi Huang, and Mario Gschwandl, Peter Fuchs, and Ivaylo Mitev – Polymer Yong Liang Ye, Ravinder Pal Singh, Lin Bu, Boon Tao-Chih Chang – Industrial Technology Research Institute (ITRI); Competence Center Leoben GmbH; Thomas Antretter – Long Lau, Tai Chong Chai, Kazunori Yamamoto, Chun-Min Wang, Puru Bruce Lin, Yu-Hua Chen and Cheng-Ta University of Leoben; Martin Pfost – Technical University of and Xiaowu Zhang – Institute of Microelectronics Ko – Unimicron Technology Corporation; Chia-Hsin Lee and Jay Dortmund; Tao Qi and Thomas Krivec – AT & S Austria Su Jay Su – Brewer Science; Kuan-Neng Chen – National Chiao Technologie & Systemtechnik AG; Angelika Schingale, and Michael A*STAR Tung University Decker – CPT Group, GmbH 2. 1:55 p.m. - New Developments of Copper 2. 1:55 p.m. - High-Density Flexible Substrate 2. 1:55 p.m. - Failure Life Prediction of Plating Technology for Embedded Power Technology with Thin Chip Embedding and Wafer Level Packaging Using DoS with AI Chip Packages Challenges Partial Carrier Release Option for IoT and Technology Yung-Da Chiu, Shiu-Chih Wang, David Tarng, An-Tai Sensor Applications K.N Chiang, H.Y. Hsiao, and P.H Chou – National Wu, Allenyl Chen, Louis Chen, and Chi-Tsung Chiu – Kai Zoschke, Piotr Mackowiak, Ha-Duong Ngo, Tsing Hua University Advanced Semiconductor Engineering Inc. Christian Tschoban, Carola Fritsche, Kevin Kröhnert, Thorsten Fischer, and Ivan Ndip – Fraunhofer IZM; Klaus-Dieter Lang – Technical University Berlin
3. 2:20 p.m. - Innovative Flip Chip Package 3. 2:20 p.m. - Advances in High-Speed 3. 2:20 p.m. - Thermal Cycling Simulation Solutions for Automotive Applications Plating for Vertical Glass Panel Fine-Line and Sensitivity Analysis of Wafer-Level Chip- Tom Tang, Bo-Siang Fang, David Ho, B.H. Ma, Plating Scale Package with Integration of Metal- Jensen Tsai, and Yu-Po Wang – Siliconware Precision Raoul Schroeder, Herbert Ötzlinger, Christian Dunkel, Insulator-Metal Capacitors Industries Co., Ltd. and Tetsuya Onishi – Semsysco GmbH Yong Liu and Liangbiao Chen – ON Semiconductor; Yi Zhou and Suresh K. Sitaraman – Georgia Institute of Technology
Refreshment Break: 2:45 p.m. - 3:30 p.m. Mont-Royal Commons
4. 3:30 p.m. - Reliability of Laminated Bond 4. 3:30 p.m. - High-Yield Precision Transfer 4. 3:30 p.m. - Effect of Time-Dependent Structure Using (Cu,Ni)/Sn TLP Bonding with and Assembly of GaN µLEDs Using Laser Bulk Modulus on Reliability Assessment of Al Interlayer for High-Temperature Power Assisted Micro Transfer Printing Automotive Electronic Control Unit Electronics Packaging Goutham Ezhilarasu, Amir Hanna, and Subramanian Hyun Seop Lee and Bongtae Han – University of Yanghe Liu, Shailesh Joshi, and Ercan M. Dede – Iyer – University of California, Los Angeles; Ajit Maryland; Przemyslaw Gromala – Robert Bosch Toyota Research Institute North America Paranjpe – Veeco Instruments, Inc. GmbH
5. 3:55 p.m. - Silver Sintering on Organic 5. 3:55 p.m. - Study of the Properties of AlN 5. 3:55 p.m. - Thermal and Mechanical Substrates for the Embedding of Power PMUT Used as a Wireless Power Receiver Simulations for Fan-Out Wafer-Level Semiconductor Devices Dan Gong, Shenglin Ma, Yihsiang Chiu, and Hungping Packaging Technology: Introduction of a Alexander Schiffmacher, Lorenz Litzenberger, and Lee – Xiamen University; Yufeng Jin – Peking “Solder Heatsink” Juergen Wilde – IMTEK University of Freiburg; University Jean Colonna, Mathilde Cartier, Gabriel Pares, Till Huesgen and Vladimir Polezhaev – Kempten Dominique Noguet, and Loic Marnat – CEA-LETI University of Applied Sciences
6. 4:20 p.m. - High-Temperature Resistant 6. 4:20 p.m. - Large Panel Size Bonder With 6. 4:20 p.m. - Wafer-Level Warpage Packaging Technology for SiC Power Module High-Performance and High-Accuracy Modeling and Validation for FOWLP by Using Ni Micro-Plating Bonding Hubert Selhofer, Hugo Pristauz, and Andreas Mayr – Considering Effects of Viscoelastic Material Kohei Tatsumi, Isamu Morisako, Keiko Wada, Minoru Fukuomori, and Besi Austria GmbH Properties Under Process Loadings Tomonori Iizuka – Waseda University; Nobuaki Sato, Koji Shimizu, and Kazutoshi Ueda – Mitsui High-tec Inc.; Masayuki Hikita – Kyushu Institute of Xiaowu Zhang, Zhaohui Chen, Sharon Pei Siang Lim, Technology; Rikiya Kaminura – Kittakyushu Foundation for the Advancements Simon Siak Boon Lim, Boon Long Lau, Yong Han, Ming of Industry, Science and Technology; Naoki Kawanabe – WALTS Co., Ltd. Chinq Jong, Songlin Liu, Xiaobai Wang, and Yosephine Kazuhiko Sugiura and Kazuhiro Tsuruta – DENSO Corporation; Keiji Toda – Andriani – Institute of Microelectronics A*STAR Toyota Motor Corporation
7. 4:45 p.m. - Pb-Free, High Thermal and 7. 4:45 p.m. - Advance Embedded Packaging 7. 4:45 p.m. - Ultra-Thin Package Board Electrical Performance Driven Die Attach for Power Discrete Device Level Drop Impact Modeling and Validation Jing Jiang, Guanqiang Song, Jiaren Huo, Juntao Wang, Shu-Shen Yeh, P. Y. Lin, M. C. Yew, W. Y. Lin, K. C. Material Development for Power Packages Byong Jin Kim, DongSu Ryu, Hyeong Il Jeon, Weng and Lingwen Kong – Wuxi Sky Chip Interconnention Lee, C. C. Yang, J. H. Wang, P. C. Lai, C. K. Hsu, and Tuck Chim, Jin Young Khim, and Muhammad Hadhari Technology Co., Ltd. Shin-Puu Jeng – Taiwan Semiconductor Manufacturing Hazellah – Amkor Technology, Inc. Company Ltd.
22 Program Sessions: Friday, May 31, 1:30 p.m. - 5:30 p.m.
Session 34: Emerging Materials and Session 35: New Interconnects for Session 36: RF and Power Components Processing Package Scaling and Modules
Committee: Materials & Processing in Committee: Committee: High-Speed, Wireless & conjunction with Applied Reliability Interconnections Components
Nolita 2 Nolita 3 Yaletown 1
Session Co-Chairs: Session Co-Chairs: Session Co-Chairs: Ziyin Lin David Danovitch Yong-Kyu Yoon Intel Corporation University of Sherbrooke University of Florida Dwayne Shirley Katsuyuki Sakuma Craig Gaw Inphi IBM Corporation NXP Semiconductor
1. 1:30 p.m. - Flexible Graphene-Glass Fiber 1. 1:30 p.m. - Development of 2.3D High 1. 1:30 p.m. - Multilayer Decoupling Composite Film With Ultrahigh Thermal Density Organic Package Using Low Capacitor Using Stacked Layers of BST and Conductivity and Mechanical Strength as Temperature Bonding Process With Sn-Bi LNO Highly Efficient Thermal Interface Materials Solder Todd Schumann, Sheng-Po Fang, and Yong-Kyu Yoon Xiaoliang Zeng, Linlin Ren, and Rong Sun – Shenzhen Shota Miki, Hiroshi Taneda, Naoki Kobayashi, Kiyoshi – University of Florida; Jongmin Yook and Dongsu Kim Institutes of Advanced Technology; Jianbin Xu – The Oi, Koji Nagai, and Toshinori Koyama – Shinko – Korea Electronics Technology Institute Chinese University of Hong Kong; Ching-Ping Wong – Electric Industries Co. Ltd. Georgia Institute of Technology
2. 1:55 p.m. - Highly Thermal Conductive 2. 1:55 p.m. - PowerTherm Attach Process 2. 1:55 p.m. - System Co-Design of a High and Electrically Insulated Graphene Based for Power Delivery and Heat Extraction Current (40A) Synchronous Step-Down Thermal Interface Material With Long-Term in the Silicon-Interconnect Fabric Using Converter in an Innovative Multi-chip Reliability Thermocompression Bonding Module (MCM) in LQFN-Type Packaging Ya Liu and Johan Liu – Chalmers University of Pranav Ambhore, Boris Vaisband, Umesha Mogera, Technology Technology; Shujing Chen – Shanghai University; Lilei Ujash Shah, Timothy Fisher, Mark Goorsky, and Todd Harrison, Jie Chen, and Rajen Murugan – Texas Ye and Nan Wang – SHT Smart High Tech AB Subramaniam S. Iyer – University of California, Los Instruments, Inc. Angeles
3. 2:20 p.m. - Further Enhancement of 3. 2:20 p.m. - Interconnect Scheme for 3. 2:20 p.m. - Integrating Solid State Thermal Conductivity through Optimal Uses Die-to-Die and Die-to-Wafer Level Protection with a RF-MEMS Switch for of h-BN Fillers in Polymer-Based Thermal Heterogeneous Integration for High- Achieving ESD Robustness Interface Material for Power Electronics Performance Computing Srivatsan Parthasarathy, Padraig Fitzgerald, Javier Han Jiang, Han Zhou, Stuart Robertson, Rabindra N. Das, Vladimir Bolkhovsky, Christopher Salcedo, Ray Goggin, and Jean-Jacques Hajjar – Analog Zhaoxia Zhou, Liguo Zhao, and Changqing Liu – Galbraith, Daniel Oates, Jason J. Plant, Renée Lambert, Devices, Inc. Loughborough University Scott Zarr, Ravi Rastogi, Dmitri Shapiro, Manuel Docanto, Terence Weir, Leonard Johnson – MIT Lincoln Laboratory Refreshment Break: 2:45 p.m. - 3:30 p.m. Mont-Royal Commons
4. 3:30 p.m. - Wafer-Level Integration of 4. 3:30 p.m. - Ultra-Wide Micro Bumps 4. 3:30 p.m. - A Zero Height Small Size Low Thin Silicon Bare Dies Within Flexible Label Interconnection Matrix for Particle Cost RF Interconnect Substrate Technology Jean-Charles Souriau, Ahmad Itawi, and Laëtitia Detection: Process and Assembly for RF Front Ends for M.2 Modules and Sip Castagné – CEA-LETI Jean Charbonnier, Myriam Assous, Thierry Mourier, Swathi Vijayakumar, Kirthika Nahalingam, Sidharth Celine Ribière, Stéphane Minoret, Sophie Verrun, Dalmia, and Pouya Talebbeydokhti – Intel Pierre Tissier, Remi Coquand, Mehmet Bicer, Corporation Fabienne Allain, Rémi Franiatte, Gabriel Paras – CEA- LETI
5. 3:55 p.m. - Laser Sintering of Aerosol Jet 5. Low-Temperature Transient Liquid Phase 5. 3:55 p.m. - Open and Closed Loop Printed Conductive Interconnects on Paper (TLP) Bonding Using Eutectic Sn-In Solder Inductors for High-Efficiency System-on- Substrates Anisotropic Conductive Films (ACFs) for Package Integrated Voltage Regulators Mohammed Alhendi, Darshana Weerawarne, Jack Flexible Ultrasonic Transducers Claudio Alvarez, Mohamed Bellaredj, and Madhavan Lombardi, Rajesh S. Sivasubramony, Peter Borgesen, Jae-Hyeong Park and Kyung-Wook Paik – Korea Swaminathan – Georgia Institute of Technology and Mark Poliks – Binghamton University; Azar Advanced Institute of Science and Technology; Alizadeh – GE Global Research Jongcheol Park – National NanoFab Center
6. 4:20 p.m. - In-Situ Investigation of 6. 4:20 p.m. - Development of a No Reflow 6. 4:20 p.m. - RF Inductors Integrated in Organic Additive Interactions in Copper Cu Pillar Bump to Improve Chip/Package Organic Packaging Electroplating Solutions With Surface Interactions (CPI) Process and Reliability Denis Mercier, Jean-Philippe Michel, Christine Enhanced Raman Spectroscopy (SERS) Performance Raynaud, and Christophe Billard – CEA-LETI Nithin Nedumthakady, Bartlet DeProspo, Himani Sharma, Kuei Hsiao (Frank) Kuo, Yen Neng Wang, Feng Lung Nasrin Hooshmand, Sajanlal Panikkanvalappil, and Rao Chien, Rick Lee, and Jiunn Jie Wang – Siliconware Tummala – Georgia Institute of Technology; Rahul Precision Industries Co., Ltd. Manepalli and Sashi Kandanur – Intel Corporation
7. 4:45 p.m. - C4 Compatible Ultra-Thick 7. 4:45 p.m. - A Novel Interconnection 7. 4:45 p.m. - 3D Printed Interposer Layer Cu On-Chip Magnetic Inductor Architecture Technology Using Ultra-Thin Under Barrier for High-Density Packaging of IoT Devices Integrated With Advanced Polymer/Cu Metal for Multiple Chip-on-Chip Stacking Saikat Mondal, Mohd. Ifwat Mohd. Ghazali, Kanishka Planarization Process Structure Wijewardena, Deepak Kumar, and Premjeet Chahal – S.B Yang, CC. Kuo, Y.N. Chen, K.S Yuan, G.C. Takuya Nakamura, Kan Shimizu, Masataka Maehara, Michigan State University Huang, C.N Ke, Grace Chang, C.C. Hsu, H.L. Huang, Toshihiko Hayashi, Kentaro Akiyama, and Junichiro Kirin Wang, Harry Ku, C.S. Chen, K.C. Liu, Alex Fujimagari – Sony Semiconductor Solutions Corporation; Kalnitsky and Marvin Liao - Taiwan Semiconductor Tomohiro Ohkubo, Atsushi Fujiwara, and Hayato Manufacturing Company Ltd. Iwamoto – Sony Semiconductor Manufacturing 23 Interactive Presentations: Wednesday, May 29, 9:00 a.m. - 11:00 a.m. and 2:00 p.m. - 4:00 p.m.
Wednesday, May 29, 2019 10. Wireless Transfer of Power and Data via Wednesday, May 29, 2019 Session 37: Interactive Presentations 1 a Single Resonant Inductive Link Session 38: Interactive Presentations 2 9:00 AM - 11:00 AM Lih-Tyng Hwang, Yi-Chen Hsieh, Chin-Wei Chan, 2:00 PM - 4:00 PM Committee: Interactive Presentations I-Fang Lo, Heri Suryoatmojo, and Shiang-Hwua Yu – Committee: Interactive Presentations Room: Belmont Commons National Sun Yat-Sen University Room: Belmont Commons Session Co-Chairs: 11. Adaptive Patterning of Optical and Session Co-Chairs: Nam Pham Electrical Fan-Out for Photonic Chip Patrick Thompson IBM Corporation Packaging Texas Instruments, Inc. Pavel Roy Paladhi Ahmed Elmogi, Andres Desmet, Jeroen Missinne, Rao Bonda IBM Corporation Hannes Ramon, Joris Lambrecht, Johan Bauwelinck, Amkor Technology 1. Comprehensive Solution for Micro Bump and Geert Van Steenberge – Ghent University; 1. Laundering Reliability of Electrically Coplanarity Control Peter De Heyn, Marianna Pantouvaki, and Joris Van Conductive Fabrics for E-Textile Rung-De Wang, J.H. Chen, Y.N. Hsu, Chun-Chen Liu, Campenhout – IMEC Applications Y.C. Wang, B.E. Ho, Y.H. Wu, Ponder Pan, Harry Ku, Jeffrey Lee, ChangHo Lo, and Cheng-Chih Chen – 12. Low Surface Reflectance at Near and Kirin Wang , Calvin Lu, K.C. Liu, and Marvin Liao– Integrated Service Technology; Weifeng Liu – Flex, Infrared Wavelength Thermoplastic Optical Taiwan Semiconductor Manufacturing Company Ltd. Ltd. Lens Without AR Coating 2. Structural Enhancement for a CMOS- Sho Yakabe, Takuro Watanabe, and Takayuki Shimazu 2. Preconditioning Technologies for MEMS Microphone Under Thermal Loading – Sumitomo Electric Industries, Ltd.; Ryohei Hokari Sputtered Seed Layers in FOPLP by Taguchi Method and Kazuma Kurihara – National Institute of Advanced Johannes Weichart, Jürgen Weichart, and Andreas Chun-Lin Lu and Meng-Kao Yeh – National Tsing Hua Industrial Science and Technology Erhart – Evatec Corporation; Kay Viehweger – University Fraunhofer IZM, Berlin 13. A Novel Design of a Bandwidth 3. Impact of Thermal Boundary Resistance 3. A Methodology to Correct In-Fixture Enhanced Dual-Band Impedance Matching Measurement of Impedance by a Machine on the Thermal Design of GaN-on-Diamond Network with Coupled Line Wave Slowing Learning Model HEMTs Deepayan Banerjee and Antra Saxena – Indraprastha Bo-Siang Fang, Cha-Chu Lai, Ying-Wei Lu, Kuan-Ta Huaixin Guo, Yuechan Kong, and Tangsheng Chen – Institute of Information Technology, Delhi; Chen, Mike Tsai, and Don-Son Jiang – Siliconware Nanjing Electronic Devices Institute Mohammad Hashmi – Nazarbayev University Precision Industries Co., Ltd. 4. Measuring the Electric Properties of 4. Material and Structure Design 14. Effects of Electromigration on Thin Film Shape Memory Polymers in Optimization for Panel-Level Fan-Out Microstructural Evolution and Mechanical Simulated Physiological Conditions Packaging Properties of Preferential Growth Daniel Del Nero, Alexandra Joshi-Imre, and Walter Ian Hu, Dao-Lang Chen, Karen Yu Chen, Meng-Kai Intermetallic Compound Interconnects for Voit – The University of Texas at Dallas
Shih, David Tarng, Dinos Huang, and JY On – 3D Packaging 5. Evaluation of WLP Dielectrics for High- Advanced Semiconductor Engineering Inc. Mingliang Huang and Lin Zou – Dalian University of Voltage Applications Technology 5. The Microstructure and Mechanical Markus Woehrmann, Marcus Paeck, and Michael Property of the High Entropy Alloy as a Low 15. Telemetry for Implantable Biosensors Toepper – Fraunhofer IZM; Klaus-Dieter Lang – TU Temperature Solder Ryan Green and Erdem Topsakal – Virginia Berlin Yingxia Liu, Xiuchen Zhao, Zhuangzhuang Hou, and Li Commonwealth University 6. Mitigating the Effects of Microvortices Pu – Beijing Institute of Technology; Quanfeng He and 16. Ultra-Thin QFN-Like 3D Package With in High-Re Deterministic Lateral Yong Yang – City University of Hong Kong; King-Ning Displacement by Using Symmetric Airfoil- 3D Integrated Passive Devices Tu – University of California, Los Angeles Shaped Pillars Ayad Ghannam – 3DiS Technologies; Niek van Haare 6. A Versatile Fan-Out Infrastructure Jong-Hoon Kim, Kawkab Ahasan, and Brian Dincau – and Sebastiaan Kersjes – Besi NL; Julian Bravin and Washington State University Based on Die-Stencil Substrate Promoted Elisabeth Brandl – EV Group; Birgit Brandstätter, by an Advanced Multifunctional Temporary Hannes Kingler, and Benedikt Auer – Besi AT; Philippe 7. Plasma Dry Process Technology Bonding Material Meunier – NXP Semiconductors Development of Glass-Epoxy Film on the Xiao Liu, Baron Huang, Hong Zhang, Lisa Kirchner, Silicon Substrate to Fabricate RDL for Future Arthur Southard, Rama Puligadda, and Tony Flaim – 17. Low-Cost Non-TSV Based 3D Packaging GPU/AI Application. Brewer Science, Inc. Using Glass Panel Embedding (GPE) Takahide Murayama, Muneyuki Sato, Akiyoshi Suzuki, 7. Low Temperature and Pressureless for Power-Efficient, High-Bandwidth Atsuhito Ihori, Tetsushi Fujinaga, and Yasuhiro Microfluidic Electroless Bonding Process for Heterogeneous Integration Morikawa – ULVAC, Inc. Siddharth Ravichandran, Fuhan Liu, Vanessa Smet, Vertical Interconnections 8. Fully Solid-State Integrated Capacitors Han-Tang Hung, S. Yang, I. A. Weng, and C. R. Kao – Mohanalingam Kathaperumal, and Rao Tummala Based on Carbon Nanofibers and Dielectrics National Taiwan University; Y. H. Chen – Unimicron – Georgia Institute of Technology; Shuhei Yamada – with Specific Capacitances Higher than 200 Technology Corporation Murata Manufacturing Co., Ltd. nF/mm^2 8. 3D Integration of CMOS-Compatible 18. Polylithic Integration of 2.5D and 3D Amin Saleem, Rickard Andersson, Maria Bylund, Surface Electrode Ion Trap and Silicon Chiplets Using Interconnect Stitching Guilhem Pacot, Shafiq Kabir, and Vincent Desmaris – Photonics for Scalable Quantum Computing Paul Jo, Ting Zheng, and Muhannad Bakir – Georgia Smoltek AB; Charlotte Goemare – SmoltekAB Jing Tao, Yu Dian Lim, Nam Piau Chew, Peng Zhao, Institute of Technology 9. Application of Fan-Out Panel Level and Chuan Seng Tan – Nanyang Technological Packaging Techniques for Flexible Hybrid 19. Characterization of the Current University; Hong Yu Li, Anak Agung Alit Apriyana, Electronics Systems and Lin Bu – Institute of Microelectronics, Agency Mechanisms and Improved Leakage Current Wei-Yuan Cheng, Chen-Tsai Yang, Shau-Fei Cheng, for Science, Technology and Research A*STAR; Luca in Silver Doped Barium Stronium Titanate Wei-Han Chen, Hsin-Cheng Lai, Tai-Jui Wang, and Guidoni – Université Paris Diderot and Chuan Seng Todd Schumann, Kyoung-Tae Kim, Sheng-Po Fang, Yuh-Zheng Lee – Industrial Technology Research Tan-Nanyang Technological University and Yong-Kyu Yoon – University of Florida Institute (ITRI) 9. Integrated RTD Sensors for Maintaining 20. High-Temperature Aging Effects in SAC 10. Structuring of Laser Activated Polymers Thermal Uniformity During TCB Process and SAC+X Lead-Free Solders for Sensor Applications Salwa Ben Jemaa and Julien Sylvestre – University de Mohmmad Alam, KM Rafidh Hassan, Jeffrey C. Suhling, Kevin Cromwell, Sebastian Bengsch, Aue, and Marc Sherbrooke; Pascale Gagnon – IBM Canada, Ltd. and Pradeep Lall – Auburn University Wurz – Leibniz University Hanover
Wednesday Refreshment Breaks: 9:15 a.m. - 10:00 a.m. and 2:45 p.m. - 3:30 p.m. in Exhibit Hall - Belmont 1 & 5 24 Interactive Presentations: Thursday, May 30, 9:00 a.m. - 11:00 a.m.
11. A Deep Learning Approach for Volterra 21. Effects of Oven and Laser Sintering 5. Simulation and Experimental Validations Kernel Extraction for Time Domain Parameters on the Electrical Resistance of of EM/TM/SM Physical Reliability for Simulation of Weakly Nonlinear Circuits IJP Nano-Silver Traces on Mesoporous PET Interconnects Utilized in Stretchable and Thong Nguyen, Xinying Wang, Xu Chen, and Jose Before and During Fatigue Cycling Foldable Electronics Schutt-Aine – University of Illinois Gurvinder Singh Khinda, Maan Z. Kokash, Mohammed Oscar Chuang, Chang-Chun Lee, and Chia-Ping Hsieh Alhendi, M. Yadav, Jack P. Lombardi, Darshana L. – National Tsing University; Wei-Yuan Cheng and 12. 224G Package Interconnect Study Based Weerawarne, Mark D. Poliks, and Peter Borgesen – Steve Chiu – Industrial Technology Research Institute on Artificial Neural Network Modeling Binghamton University; Nancy C. Stoffel – GE Global 6. A Complex Integrated Circuit Structure Approach Research Transformation, Modeling and Simulation Hui Liu, Qian Ding, and Penglin Liu – Intel Corporation 22. Multilayer Glass Substrate With High- Method 13. Enhanced Reliability of a RF-SiP With Density Via Structure for All Inorganic Daixing Wang, Yufeng Jin, and Wei Wang – Peking Mold Encapsulation and EMI Shielding Multi-Chip Module University Chan-Yuan Liu, Kuo-Hsien Liao, Yu-Chou Tseng, Toshiki Iwai, Taiji Sakai, Daisuke Mizutani, and Seiki 7. A Study on the Oxygen Plasma Dao-Long Chen, Alex Chan, Mengkai Shih, Mark Sakuyama – Fujitsu Laboratories, Ltd.; Kenji Iida, Treatment on the Peel Adhesion Strength Gerber, and Jason Chien – Advanced Semiconductor Takayuki Inaba, Hidehiko Fujisaki, Akira Tamura, and Solder Wettability of SnBi58 Based Engineering Inc. and Yoshinori Miyazawa – Fujitsu Interconnect Anisotropic Conductive Films Technologies Limited Shuye Zhang, Tiesong Lin, and Peng He – Harbin 14. Study of the Effect and Mechanism of 23. The Poisson’s Ratio of Lead-Free Institute of Technology; Mingliang Huang and Yang a Cap Layer in Controlling the Statistical Wu – Dalian University of Technology; Ming Yang – Variation of Via Extrusion Solder – The Often Forgotten but Important Material Property Hisilicon Optoelectronics Co., Ltd.; Kyung-Wook Paik Golareh Jalilvand and Tengfei Jiang – University of – Korea Advanced Institute of Science and Technology Central Florida KM Rafidh Hassan, Mohammad Alam, Jeffrey C. Suhling, and Pradeep Lall – Auburn University 8. Numerical Analysis of the Influence 15. Least-Squares Method Built in of Polymeric Materials on a MEMS 24. Additive Laser Metal Deposition onto Processing Model of Finite Element Analysis Package Performance Under Humidity and Silicon for Enhanced Microelectronics Utilized to Obtain Accurate Prediction for Temperature Loads Cooling Non-Axisymmetric Warpage of 2L ETS MUF Mahesh Yalagach, Peter Filipp Fuchs, and Mario Arad Azizi, Matthias Daeumer, Jacob C. Simmons, Gschwandl – Polymer Competence Center Leoben FCCSP SiP Bahgat G. Sammakia, Bruce T. Murray, and Scott GmbH; Archim Wolfberger and Coen Tak Coen Tak Chih-Sung Chen, Nicholas Kao, Poyu Liao, Ssu- Schiffres – Binghamton University Cheng Lai, and Don Son Jiang – Siliconware Precision – ams AG; Thomas Antretter and Michael Feuchter – Industries Co., Ltd. 25. Moisture Barrier, Mechanical, and University of Leoben; Tao Qi – AT&S Thermal Properties of PDMS-PIB Blends for 16. Three-Dimensional Copper Foam- 9. Electromigration-Induced β-Sn Grain Solar Photovoltaic (PV) Module Encapsulant Rotation in Lead-Free Flip Chip Solder Filled Elastic Conductive Composites With Jinho Hah, Michael Sulkis, Chao Ren, Kyoung-Sik (Jack) Bumps Simultaneously Enhanced Mechanical, Moon, Samuel Graham, and C. P. Wong – Georgia Mingliang Huang, Jiameng Kuang, and Hongyu Sun – Electrical, Thermal and Electromagnetic Institute of Technology Dalian University of Technology Interference (EMI) Shielding Properties Yougen Hu, Han Gu, Tao Zhao, Tan Lu, Pengli Zhu, Thursday, May 30, 2019 10. Low-Cost MT-Ferrule-Compatible and Rong Sun – Shenzhen Institutes of Advanced Session 39: Interactive Presentations 3 Optical Connector for Co-Packaged Optics Using Single-Mode Polymer Waveguide Technology; Ching-Ping Wong – Georgia Institute of 9:00 AM - 11:00 AM Akihiro Noriki and Takeru Amano – National Institute Technology Committee: Interactive Presentations of Advanced Industrial Science and Technology; Room: Belmont Commons 17. Vertical Interconnect Technology for Masatoshi Tsunoda and Toshiaki Michihiro – Kyocera Session Co-Chairs: Enlarging Capacity on Micro Solid Thin Film Corporation Michael Mayer Rechargeable Battery University of Waterloo 11. Characterization of Coated Silver Wire Akihiro Horibe, Kuniaki Sueoka, Risa Miyazawa, Alan Huffman Bond Interface Using TEM Takahiro Mori, and Hiroyuki Mori – IBM Corporation Micross Advanced Interconnect Murali Sarangapani, Eric Tan Swee Seng, and Jason Wong Chin Yeung – Heraeus Holding GmbH 18. Characterization of Fine Pitch Hybrid Technology Bonding Pads Using Electrical Misalignment 12. Research on Applied Reliability of BGA 1. Modeling and Design of Power Test Vehicles Solder Balls in Extreme Marine Environment Distribution Network for a Heterogeneous Imed Jani, Didier Lattard, Pascal Vivet, Edith Beigné, Liyuan Liu, Tao Lu, Daojun Luo, and Hui Xiao – China Integrated Active Interposer With and Lucile Arnaud – CEA-LETI; Alexis Farcy, Joris Electronic Product Reliability and Environmental Neuromorphic Computing Circuits Testing Research Institute Jourdan, Yann Henrion, Emilie Deloffre, and Haim Min Miao, Tianfang Chen, Jincan Zhang, Na Li, Kunkun Bilgen – STMicroelectronics Li, and Liyuan Wang – Beijing Information Science 13. Influence of Single/Double Sweeping 19. Dynamic Characteristics Evaluation on and Technology University; Yang Yang, Xiaole Cui, Modes and Sweeping Voltage Increment/ NCF Under Challenging Conditions and Its and Yufeng Jin – Shenzhen Graduate School, Peking Polarity on Measurement of TSV Leakage Current Application University; Huan Liu – Peking University Qinghua Zeng, Jing Chen, and Yufeng Jin – Peking Tomonori Nakamura, Hiromi Shibahara, Osamu 2. PCB Microstrip Line Far-End Crosstalk University Watanabe, Tetsuya Utano, Daisuke Tani, Sung Mitigation by Surface Mount Capacitors Chenhsiu, Toru Maeda, and Doug Day – Shinkawa Zhaoqing Chen – IBM Corporation 14. Improving the Solder Wettability via Ltd.; Hidekazu Yagi, Ryoji Kojima, Daichi Mori, Atmospheric Plasma Technology 3. New Cost-Effective Via-Last Approach Tatsuo Nagamatsu, and Junichi Kaneko – Dexerials Sagung Kencana, Yee-Wen Yen, and Yu-Lin by “One-Step TSV” After Wafer Stacking for Corporation Kuo – National Taiwan University of Science and 3D Memory Applications Technology; Wallace Chuang and Eckart Schellkes – 20. Study of Electrical and Mechanical Masaya Kawano, Xiang-Yu Wang, and Qin Ren – Robert Bosch Taiwan Co., Ltd. Characteristics of Inkjet-Printed Patch Institute of Microelectronics A*STAR 15. Orthogonal Quilt Packaging 3D Antenna Under Uniaxial and Biaxial 4. Microstructure and Property Changes Integration for High Energy Particle Bending in Cu/Sn-58Bi/Cu Solder Joints During Detectors Yi Zhou, Rui Chen, Nahid Aslani Amoli, Sridhar Thermomigration Jason Kulick, Tian Lu, Carlos Ortega, Gary Bernstein, Sivapurapu, Mohamed Bellaredj, Madhavan Yu-An Shen, Shiqi Zhou, and Hiroshi Nishikawa – and Edit Varga – Indiana Integrated Circuits, LLC; Swaminathan, and Suresh Sitaraman – Georgia Osaka University; Jiahui Li – City University of Hong Christopher Kenney and Julie Segal – SLAC National Institute of Technology Kong; K. N. Tu – University of California, Los Angeles Accelerator Laboratory Thursday Refreshment Breaks: 9:15 a.m. - 10:00 a.m. and 2:45 p.m. - 3:30 p.m. in Exhibit Hall - Belmont 1 & 5 25 Interactive Presentations: Thursday, May 30, 2:00 p.m. – 4:00 p.m. / Friday, May 31, 8:30 a.m. – 10:30 p.m.
16. Carbonized Electrodes for 7. Epoxy Composites with Surface Modified 18. Direct Bonding of Low-Temperature Electrochemical Sensing Silicon Carbide Filler for High-Temperature Heterogeneous Dielectrics Mohammad Aminul Haque and Nicole McFarlane Molding Compounds Serena Iacovo, Lan Peng, Alain Phommahaxay, – The University of Tennessee, Knoxville; Nickolay Fan Wu, Nicholas C Mitchell, Bo Song, Kyoung- Fumihiro Inoue, Patrick Verdonck, Soon-Wook Kim, V. Lavrik and Dale Hensley – Oak Ridge National Sik Moon, and C.P. Wong – Georgia Institute of Erik Sleeckx, Andy Miller, Gerald Beyer, and Eric Beyne – IMEC Laboratory Technology 19. Millimeter Wave Dual Polarization 17. Moldability Challenges Associated With 8. Ultra Low Resistivity and High Electrical Design Using Frequency Selective Surface the Assembly of Thicker IC Packages for Stability Silo-Ag ECAs Produced from (FSS) for 5G Base-Station Applications High Voltage and Power Applications Curing Chemistry Optimization for Flexible Lih-Tyng Hwang, Chung-Yi Hsu, and Chi-Hau Yang – Sadia Naseem, Jack Chiang, Megan Chang, Bob Lee, Electronics National Sun Yat-Sen University and Jason Chien – Texas Instruments, Inc. Xueqiao Wang, Kyoung-Sik Moon, Bo Song, and C.P. 18. Highly Compact, Multiband Composite- Wong – Georgia Institute of Technology Friday, May 31, 2019 Session 41: Student Interactive Right/Left-Handed (CRLH) Transmission 9. Physics of Failure Based Simulation and Presentations Line Based Stub for GPS Applications Experimental Testing of Quad Flat No-Lead 8:30 AM - 10:30 AM Hae-In Kim, Seahee Hwangbo, Renuka Bowrothu, and Package Room: Belmont Commons Yong-Kyu Yoon – University of Florida Jia-Shen Lan and Mei-Ling Wu – National Sun Yat-Sen Session Co-Chairs: University Thursday, May 30, 2019 Kristina Young-Fisher 10. An Assessment of Electromigration in GLOBALFOUNDRIES Session 40: Interactive Presentations 4 2.5D Packaging Ibrahim Guven 2:00 PM - 4:00 PM Jiefeng Xu, Huayan Wang, Jing Wang, VanLai Pham, Virginia Commonwealth University Committee: Interactive Presentations Stephen R. Cain, and S.B. Park – Binghamton 1. Room-Temperature Wire Bonding with Room: Belmont Commons University; Scott McCann and Gamal Refai-Ahmed – Pd Coated Cu Wire on Al Pads: Ball Bond Session Co-Chairs: Xilinx, Inc. Optimization with 2-Stage Methodology Mark Eblen Nicholas Kam, Michael Hook, and Michael Mayer – Kyocera International SC 11. Diffusion Enhanced Drive Sub University of Waterloo; Celal Con and Karim Karim Jeffrey Lee 100 ˚C Wafer Level Fine-Pitch Cu-Cu – KA Imaging Inc. Thermocompression Bonding for 3D IC iST-Integrated Service Technology Inc. 2. On-Chip ESD Monitor Integration Kannan Kalappurakal Thankappan, Boris Vaisband, 1. Die Thickness Optimization for Asisa Kumar Panigrahy, Satish Bonam, Tamal Ghosh, Preventing Electro-Thermal Fails Induced by and Subramanian S. Iyer – University of California, Los Siva Rama Krishna Vanjari, and Shiv Govind Singh – Angeles Solder Voids in Power Devices Indian Institute of Technology, Hyderabad Dario Vitello, Andrea Albertinetti, and Marco Rovitto 3. Preparation and Characterization of – STMicroelectronics 12. Development of Sheet Type Molding Electroplated Cu/Graphene Composite Compounds for Panel-Level Package Xin Wang, Qian Wang, Jian Cai, Changming Song, and 2. 3-T (8-T) Decoupling Capacitors for Kenichi Ueno, Kazuhiro Dohi, Yui Suzuki, Masakazu Yang Hu – Tsinghua University; Yang Zhao and Yu Pei Improved PDN in LPDDR4/4X/5 System Hirose, and Akira Nakao – Sanyu Rec Co., Ltd. – University of Science and Technology of China Sunil Gupta – Qualcomm Technologies, Inc. 13. Defect Detection for the TSV 4. Quantifying the Impact of RF Probing 3. Improved Correlation Between Transmission Channel Using Machine Variability on TRL Calibration for LTCC Substrates Accelerated Board Level Reliability (BLR) Learning Approach Ömer Faruk Yildiz, David Dahl, and Christian Schuster Testing and Customer BLR Results Using Huan Liu, Runiu Fang, Yufeng Jin, and Yang Yang – – Hamburg University of Technology a Hybrid Closed-Form/Finite Element Peking University; Min Miao – Beijing Information Methodology Science & Technology University 5. Effects of NCF and UBM Materials Maxim Serebreni, Natalie Hernandez, Gil Sharon, on Electromigration Reliabilities of Sn-Ag Nathan Blattau, and Craig Hillman – DfR Solutions; 14. Direct Printing of Heat Sinks, Cases and Microbumps for Advanced 3D Packaging Ken Symonds – Western Digital Corporation Power Connectors on Insulated Substrate Kirak Son, Gahui Kim, Hyodong Ryu, Young-Cheon Using Selective Laser Melting Techniques Kim, Jeong Sam Han, and Young-Bae Park – Andong 4. Fabrication and Reliability Rabih Khazaka, Donatien Martineau, Toni Youssef, National University; Gyu-Tae Park – Amkor Demonstration of 3 µm Diameter Photo Thanh Long Le, and Stephane Azzopardi – Safran Technology, Inc.; Ho-Young Son and Nam-Seog Kim Vias at 15 µm Pitch in Thin Photosensitive – SK hynix Inc.; Cheol-Woong Yang – Sungkyunkwan Dielectric Dry Film for 2.5 D Glass Interposer 15. Server CPU Package Design Using PoINT University Applications Architecture 6. Ag Diffusion Control Through Sn on a Arun Chandrasekhar, Vijaya Boddu, Erich Chuh, Daichi Okamoto, Yoko Shibasaki, Daisuke Shibata, Sequential Plating-Based Bumping Process and Tadahiko Hanada – Taiyo Ink Mfg. Co., Ltd.; Krishna Bharath, Farzaneh Yahyaei-Moayyed, Abderrahim El Amrani, Etienne Paradis, David Fuhan Liu, Mohanalingam Kathaperumal, and Rao R Srikrishnan Venkataraman, Sriram Srinivasan, Ram Danovitch, and Dominique Drouin – Université de Tummala – Georgia Institute of Technology Viswanath, Ritesh Jain, and Huthasana Kalyanam – Intel Sherbrooke Corporation 5. Pre-Cure Modification of Electrically 7. Mechanical Reliability Assessment Conductive Adhesive for Low Temperature 16. Highly Reliable Die Attach Silver Joint of Cu6Sn5 Intermetallic Compound and Interconnection with Pressure-Less Sintering Process Multilayer Structures in Cu/Sn Interconnects Jinto George and David Danovitch – University de Sihai Chen, Christine LaBarbera, and Ning-Cheng Lee for 3D IC Applications Sherbrooke; Alexandre Leblanc and Eric Savage – IBM – Indium Corporation; William Shambach and Jordan Jui-Yang Wu and C. Robert Kao – National Taiwan Corporation; Michael Ayukawa and Dexter Macaisa – Palmer – Rochester Institute of Technology; Xuanyi University; Jenn-Ming Yang – University of California, Los Angeles Redlen Technologies Ding – Cornell University 8. A Study on the Anchoring Polymer Layer 6. RDL-1st Fan-Out Panel Level Packaging 17. 3D Power Packaged Device Thermo- (APL) Anisotropic Conductive Films (ACFs) (FOPLP) for Heterogeneous and Economical Mechanical Modeling and Stress Analysis with Self-Exposed Surface of Conductive Packaging after Reliability Trials Particles for Ultra-Fine Pitch Chip-on-Glass Vasarla Nagendra Sekhar, Vempati Srinivasa Rao, F.X. Lucrezia Guarino – STMicroelectronics; Lucia Zullino, (COG) Applications Che, Ser Choong Chong, and Kazunori Yamamoto – Luca Cecchetto, Fiorella Pozzobon, and Antonio Dal-Jin Yoon and Kyung-Wook Paik – Korea Institute of Microelectronics A*STAR Andreini Advanced Institute of Science and Technology
Refreshment Breaks: 9:15 a.m. - 10:00 a.m. and 2:45 p.m. - 3:30 p.m. for Thursday in Exhibit Hall - Belmont 1 & 5 and Friday in Mont-Royal Commons 26 Interactive Presentations: Friday, May 31, 8:30 a.m. - 10:30 a.m.
9. Bending Properties of Fine Pitch Flexible 14. Low-Temperature Ag-Ag Direct Bonding 19. Quintuple Band lamda/4 Stub by Using CIF (Chip-in-Flex) Packages Using APL Technology for Advanced Chip-Package Unbalanced Bridged CRLH Transmission (Anchoring Polymer Layer) ACFs (Anisotropic Interconnection Lines Conductive Films) Jiaqi Wu and Chin C. Lee – University of California, Renuka Bowrothu, Seahee Hwangbo, Yong-Kyu Ji-Hye Kim, Dal-Jin Yoon, and Kyung-Wook Paik – Irvine Yoon, and Haein Kim – University of Florida Korea Advanced Institute of Science and Technology 15. Reliability of Micro-Alloyed SnAgCu 20. Product Level Design Optimization for 10. Effects of the Curing Properties and Based Solder Interconnections for Various 2.5D Package Pad Cratering Reliability Viscosities of Non-Conductive Films (NCFs) Harsh Applications during Drop Impact on Sn-Ag Flip Chip Solder Bump Joint Sinan Su, Francy Akkara, Anto Raj, Seth Huayan Wang, Jing Wang, Jiefeng Xu, Vanlai Pham, Morphology and Reliability Gordon, Sharath Sridhar, Sivasubramanian Ke Pan, and Seungbae Park – Binghamton University; HanMin Lee, SeYong Lee, SangMyung Shin, and Thirugnanasambandam, Sa’d Hamasha, Jeffery Suhling, Hohyung Lee and Gamal Refai-Ahmed – Xilinx, Inc. Kyung-Wook Paik – Korea Advanced Institute of and John Evans – Auburn University; Cong Zhao – 21. Microstructure of Pb-Free Solder Science and Technology; TaeJin Choi and SooIn Park – Apple Inc. Joints by Reflow and Thermo-Compression Doosan Corporation Electro-Materials BG 16. A Novel Approach of Copper-Ceramic- Bonding (TCB) Process 11. Experimental Investigations on Vertical Joints Manufactured by Selective Laser Jinho Hah, Yongja Kim, Patxi Fernandez-Zelaia, Sangil Ultrasonic Assisted Low Temperature Melting Lee, Shreyes Melkote, Kyoung-Sik Moon, and Ching- Sintering Process Thomas Stoll and Matthias Kirstein – Institute for Ping Wong – Georgia Institute of Technology; Leroy Henning Seefisch and Jens Twiefel – Leibniz University Factory Automation and Production Systems; Joerg Christie – ASM Pacific Assembly Products, Inc.; Paul Hanover Franke Houston – Engent Inc. 12. Pressureless Transient Liquid Phase 17. Automatic Transient Thermal Impedance 22. Reduction of Ag Corrosion Rate During Sintering Bonding of Sn-58Bi with Ni Tester for Quality Inspection of Soldered Decapsulation of Ag Wire Bond Packages Particles for High-Temperature Packaging and Sintered Power Electronic Devices on Jinho Hah, Kyoung Sik (Jack) Moon, and C. P. Wong Applications Panel and Tile Level – Georgia Institute of Technology; Yong Ja Kim – Kyung Deuk Min, Kwang-Ho Jung, Choong-Jae Lee, Maximilian Schmid, Sri Krishna Bhogaraju, and Gordon Samsung Electronics Company, Ltd. and Seung-Boo Jung – Sungkyunkwan University Elger – Technical University of Applied Research 13. Epoxy/Triazine Copolymer Resin 18. Time 0 Void Evolution and Effect on System for High Temperature Encapsulant Electromigration Applications Jiefeng Xu, Van Lai Pham, Huayan Wang, Stephen R. Jiaxiong Li, Chao Ren, Kyoung-Sik Moon, and CP Cain, and S.B. Park – Binghamton University; Scott Wong – Georgia Institute of Technology McCann, Ho Hyung Lee, and Gamal Refai-Ahmed – Xilinx, Inc.
Friday Refreshment Break: 9:15 a.m. - 10:00 a.m. in Mont-Royal Commons
27 2019 TECHNOLOGY CORNER EXHIBITS AND INTERACTIVE PRESENTATIONS
Technology Corner Exhibits Wednesday, May 29 9:00 a.m. - 12:00 Noon / 1:30 p.m. - 6:30 p.m. Thursday, May 30 9:00 a.m. - 12:00 Noon / 1:30 p.m. - 4:00 p.m. Belmont 1 & 5
Interactive Presentation Sessions Wednesday, May 29 Session 37: 9:00 a.m. - 11:00 a.m. / Session 38: 2:00 p.m. - 4:00 p.m. Thursday, May 30 Session 39: 9:00 a.m. - 11:00 a.m. / Session 40: 2:00 p.m. - 4:00 p.m. Friday, May 31 Session 41: 8:30 a.m. - 10:30 a.m. Belmont Commons
28 27 TECHNOLOGY CORNER EXHIBITORS
Booth 323 Booth 319 AIT’s non-adhesive products include conformal 3D Systems Packaging Research AGC coatings for ultimate moisture and/or humid- Center (PRC) 4375 NW 235th Avenue ity protection. AIT’s Wafer Processing Adhesive Georgia Institute of Technology Hillsboro, OR 97124 (WPA) is a temporary film format, high tempera- 813 Ferst Drive, NW Phone: +1-714-745.3193 ture bonding adhesive for thin wafer processing of Atlanta, GA 30332-0560 Fax: +1-503-844-9308 bonding device wafer to carrier wafer. Phone: +1-404-894-9097 www.agcem.com Fax: +1-404-894-3842 Contact: Vern Stygar Booth 506 www.prc.gatech.edu Email: [email protected] Akrometrix, LLC Email: [email protected] AGC is a leader of glass, quartz, and chemical 2700 NE Expressway The 3D Systems Packaging Research Center (PRC) products for Life Science, multi-frequency Building B, Suite 500 at the Georgia Institute of Technology is a Center electronics, automotive and photonic for Atlanta, GA 30345 dedicated to leading-edge research, education of advance packaging applications. AGC advance Phone: +1-404-486-0880 Ext. 21 highly-interdisciplinary students and global industry glass manufacturing allows quick turn specialized Fax: +1-404-486-0890 collaborations in the System-on-a-Package (SOP) formulations of alkali-free alumino-borosilicate www.akrometrix.com vision to enable highly miniaturized, mega-function- glass with a wide range of CTE’s suitable for Contact: Mark Venco al systems in a single package. The PRC’s research LED, MEMS, glass interposer, FOWLP, WLP and Email: [email protected] encompasses advanced 3D systems packaging other specialized packaging substrates. AGC’s Akrometrix manufactures, sells, and services technologies including: electrical, mechanical and high volume capability for glass and value-added worldwide: Thermal warpage metrology systems thermal design; ultra-thin and ultra-high-density services such as vias drilling, AR coatings, and via -50°C to 300°C; Thermal strain metrology glass interposers and packages; ultrafine pitch chip- fill technologies makes AGC a valuable partner systems 25°C to 300°C; Low cost room level and board-level interconnections; passive and for your next generation mobile, IoT or Life temperature warpage metrology systems; Unique active components and integration into power, RF, Science product. AGC’s premier synthetic quartz software solutions and reports to enable effective photonic and analog modules. The PRC model for with extraordinary low insertion loss and nearly use of warpage/strain data; Test services for industry collaboration is enabled by a world-class zero autofluorences makes this material idea for thermal warpage and strain metrology team of cross-disciplinary academic and research mm wave applications and photonic detection faculty, students, visiting industry engineers, and systems. When combined with specialized Booth 316 supply-chain manufacturers. The current industry metallized vias, AGC’s synthetic quartz, enables Alpha Novatech, Inc. consortium at PRC consists of the most compre- the engineer to design revolutionary designs in 473 Sapena Ct. #12 hensive industry ecosystem of material and tool high frequency applications. In addition AGC’s Santa Clara, CA 95054 suppliers, substrate and assembly manufacturers, synthetic quartz low auto fluorescence makes this Phone: +1-408-567-8082 and end users in a wide variety of consumer and AGC’s AQ an excellent substrate for photonic Fax: +1-408-567-8053 high-performance applications including high per- applications in Lab on a Chip reactors. AGC’s www.alphanovatech.com formance cloud computing and networking. fluorinated polymer is ideally suited for dielectric Contact: Glenn Summerfield Email: [email protected] coatings, or creating micro or nano-sized vias Alpha Novatech, Inc. is your partner for Thermal Booth 512 for Lab on a Chip applications in the Life Science Solutions. We offer a wide variety of standard Advance Reproductions Corp technologies sector. AGC’s fluorinated polymer heat sinks and accessories. Our product line 100 Flagship Dr. is highly transparent down to 250 nanometers. includes natural convection, forced convection, North Andover, MA 01845 GLASS IS ONLY THE BEGINNING Phone: +1-978-685-2911 and active heat sinks. We also offer various Fax: +1-978-685-1771 Booth 309 attachment methods and hardware for almost www.advancerepro.com AI Technology Inc. any application. In addition, we can offer free heat [email protected] 70 Washington Rd. sink thermal simulations, standard or custom heat Advance Reproductions Corporation is a leading Princeton Junction, NJ 08550 sinks in prototype to production quantities, quick supplier of Large-Area and Optical Photomasks Phone: +1-609-799-9388 and easy customization without NRE fees, while and Phototools. Innovative by nature, Advance Fax: +1-609-799-9308 featuring short lead times. Standard parts are works closely with customers to find solutions www.aitechnology.com carried in stock. Lead times for custom parts of for all of their imaging requirements. Whether it Contact: Maurice LeBlon 1–2 weeks are possible for initial quantities. be complex lithography patterning for prototype Email: [email protected] R&D or high volume mask manufacturing, our For over 30 years, AI Technology, Inc. (AIT) has Booth 305 expert staff sets itself apart by providing a cre- provided adhesive pastes and film products, avail- Amkor Technology, Inc. ative approach to each and every request. able as electrically conductive or non-electrically 2045 E. Innovation Circle conductive for ultimate reliability. AIT’s adhesives Tempe, AZ 85284 are critical to commercial and industrial semicon- Phone: +1-480-821-5000 ductor, electronic and microelectronic applications. www.amkor.com Our diverse product line includes molecularly flex- Email: [email protected] ible epoxy adhesives for die and substrate attach Amkor Technology, Inc. is one of the world’s and bonding; adhesives and underfills for multi largest providers of outsourced semiconductor size die bonding. AIT’s Thermal Interface Materials packaging and test services. Founded in product line offers unparalleled thermal manage- 1968, Amkor pioneered the outsourcing of ment. AIT manufactures TIM in numerous form IC packaging and test, and is now a strategic factors, such as greases, gels, and variously sized manufacturing partner for more than 250 of dry or tacky pads. DAF for stack-chip packaging the world’s leading semiconductor companies, with high temperature capabilities past 230ºC. foundries and electronics OEMs. Amkor’s operating base includes more than 10M ft2 of 29 floor space, with production facilities, product Booth 221 Booth 109 development centers, and sales and support ASM Pacific Technology Binghamton University offices located in key electronics manufacturing 7850 South Hardy Drive, Suite 110 Small Scale Systems Integration and regions in Asia, Europe and the U.S. Tempe, AZ 85284 Packaging (S3IP) Center Phone: +1-602-437-4892 P.O. Box 6000 Booth 120 Cell: +1-480-560-0020 Binghamton, NY 13902-6000 Asahi Kasei Corporation www.asmpacific.com Phone: +1-607-777-7270 1-1-2 Yurakucho, Chiyoda-ku, Tokyo, Contact: Terence DeCoteau Contact: Steve Czarnecki 100-0006 Japan Email: [email protected] Email: [email protected] Phone: +81-3-6699-3991 ASM Pacific Technology is the World Leader in The S3IP is a research and development www.asahi-kasei.co.jp/asahi/en/ Advanced Packaging Equipment Solutions, SMT organization that addresses research challenges Contact: Reiko Mishima Equipment, and Lead frame Materials. With in electronics packaging system design, process Email: [email protected] a vision of providing customer focused cost development, prototyping, and manufacturing Asahi Kasei is a leading chemical company effective solutions, we offer IC Assembly, Opto- for academia and the microelectronics industry. developing and supplying high performance electronic, Electronic Manufacturing, Physical Located at Binghamton University, the Center materials to electronics industry for years. Our Vapor Deposition / Chemical Vapor Deposition brings together partners from government, PIMEL™ are photosensitive polyimide, PBO and Equipment and Lead frame technology that is in industry and academia, providing opportunities for new polymer base material for semiconductor the forefront of the Semiconductor Equipment collaborations that will advance microelectronics buffer coatings, insulation layer for redistribution Industry. ASMPT is the only IC Assembly research and development, with particular focus layers (RDL) in semiconductor packaging. Equipment provider recognized as one of 2018 on electronics packaging design and manufacturing PIMEL™ has been widely used in many IC fabs Thomson Reuters Top 100 Global Technology technology; thermal analysis and management for / OSATs with proven track records in most Leaders. electronics; characterization of materials, surfaces, of semiconductor companies. Based on our and physical interfaces for electronics devices technology expertise and experiences in the field, Booth 308 and assemblies; and failure analysis and reliability our low temperature cure polyimides have rapidly Atotech Group improvement for electronics. Subject areas increased its applications for Wafer Level Fan- Erasmussstr.20 addressed include packaging of microelectronics, Out (WLFO), and other advanced packages for Berlin, Germany 10553 2.5D/3D chip assemblies, power electronics, and mobile, automotive, server and other emerging Phone: +49-30-34985-0 integrated photonics. technologies. Asahi Kasei continues to develop Contact: Daniel Schmidt new materials to meet future technologies by Email: [email protected] Booth 311 communicating with advanced market and our Atotech Group - A leading surface finishing Cadence Design Systems, Inc. valued customers. solutions provider, delivering chemistry, 2655 Seely Ave. equipment, and unparalleled on-site customer San Jose, CA 95134 Booths 124, 126 service making us a valuable partner for the Phone: +1-408-943-1234 ASE Group many industries we serve. We develop, produce Fax: +1-408-758-6610 1255 E. Arques Ave. and sell plating chemicals and equipment for www.cadence.com Sunnyvale, CA 94085 manufacturing printed circuit boards, package Cadence enables global electronic design Phone: +1-408-636-9500 substrates, semiconductors, leadframes and innovation and plays an essential role in the Fax: +1-408-636-9485 connectors and are recognized as the leading creation of today’s integrated circuits, packages, www.aseglobal.com innovator within the electronics plating industry. and PCBs. Cadence® IC packaging and cross- Contact: Patricia MacLeod The trends towards better connectivity, domain co-design automation provide efficient Email: [email protected] greater device functionality, performance, and solutions in system-level co-design and advanced With the rise of Heterogeneous Integration miniaturization, are leading to a higher complexity mixed-signal packaging, delivering the automation as a key technology enabler, ASE is innovating of our customers products, which require and accuracy to expedite the design process. for new achievement in performance, power, advanced technology solutions more than ever. Cadence also offers an integrated system design footprint, and much more. Alongside our broad Today, we are serving global manufacturers with solution for TSMC’s advanced wafer-level portfolio of long-established technologies, ASE is leading horizontal equipment and wet chemical Integrated Fan-Out (InFO) packaging technology. delivering innovative advanced packaging, System- process technology in the areas of surface The solution includes implementation, signoff, in-Package and MEMS solutions to meet growth treatment, metallization, electrolytic plating, final and electro-thermal analysis tools that enable momentum across end markets such as AI, finishes, as well as pad metallization, copper concurrent multi-chip optimization for designs HPC, 5G, automotive, IoT, and mobile. As such, pillar, RDL, TSV, and dual damascene plating. incorporating InFO technology. With complex collaboration within our expanding ecosystem Our comprehensive portfolio, consisting of advanced packages, designers are faced with is more important than ever, so please drop for horizontal and vertical processes, allows us to power integrity (PI) and signal integrity (SI) a chat by our booth @ the 2019 IEEE ECTC. participate in various future growth areas, such issues driven by increasing IC speeds and data We’re here to discuss our advances in Wire as next generation smartphones, electrical and transmission rates combined with decreases Bond, System-in-Package, Wafer Level Packaging, autonomous vehicles, internet of things, 5G, in power-supply voltages and denser, smaller Fan Out, Flip Chip, MEMS & Sensors, and, 2.5D virtual reality and artificial intelligence. geometries. Stacked die and packages, higher & 3D technologies, all ultimately geared towards pin counts, and greater electrical performance applications to improve human lifestyle and global constraints are making the physical design of efficiency. Please follow our ECTC activities on semiconductor packages more complex. To Twitter: @asegroup_global address these issues, Cadence provides advanced PI and power-aware SI Sigrity™ tools that can be used throughout the design process.
30 Booth 222 3D stacking, MEMS and Silicon Photonics. Based Booth 411 Camtek USA Inc. in Grenoble, France, CEA-LETI has offices in Corning Incorporated 48389 Fremont Blvd., Ste. 112 the US and Japan. Over the past ten years CEA- One Riverfront Plaza Fremont, CA 94538 LETI has developed a wide range of expertise Corning, NY 14831 Phone: +1-510-624-9905 in the fields of silicon interposers and high Phone: +1-607-974-5331 Fax: +1-408-987-9484 density interconnects to address the needs of www.Corning.com www.camtek.com the semiconductor industry in market segments Contact: Zach Barney Contact: Tommy Weiss such as mobile telephones and low power Email: [email protected] Email: [email protected] computing. Leti is working on hybrid bonding, Corning (www.corning.com) is one of the world’s Camtek provides a comprehensive, all-in-one wafer-to-wafer or chip-to wafer integration. Pitch leading innovators in materials science, with a inspection and metrology equipment along of few microns is envisioned, without underfill, more-than 165-year track record of life-changing with software solutions serving the Advanced room temperature and ambient pressure inventions. Corning applies its unparalleled Packaging, Memory, CMOS Image Sensors, bonding. Self-alignment using capillary force is also expertise in glass science, ceramics science, and MEMS, RF and other segments in the compound developed for high precision, high throughput optical physics along with its deep manufacturing semiconductors industry. We provide automated chip-to-wafer bonding. With the support of and engineering capabilities to develop category- solutions and crucial yield-enhancement data for its internal IC design teams LETI provides defining products that transform industries and enhancing production processes. Camtek has industrial partners with a unique environment enhance people’s lives. Corning Precision Glass introduced a complete AOI solution for Front for validating new concepts through models, Solutions is a newer business unit dedicated to End-EPI substrates and complete Backend-Line new design tools, test vehicles and implementing glass-based solutions enabling applications in inspection, utilizing an In-Line process. We have a fully functional demonstrators such as wide I/O Semiconductors, Computing, and the Internet of patented solution for Surface Topography Sensor memory standard, 60 GHz RF SOCs for video Things. (STS™), and include Wafer BOW metrology, data transfer or photonic interposers. Recently Post Dicing, and Reconstructed wafers, identifying CEA-LETI has developed CoolCube, an original Booth 407 crucial defects at high throughput rate. Our technique for stacking transistors sequentially CPS Technologies Corporation innovations have made Camtek one of the in the same process flow for 3D-VLSI. The 111 S. Worcester St. Norton, MA 02766 technological leaders in the field of inspection technology is designed to allow a connection of Phone: +1-407-341-3359 and metrology in this industry. By developing the stacked active layers on a nanometric scale, Fax: +1-508-222-0220 core competencies and solutions, Camtek is with a very high density, due to their alignment the industry standard for many applications. www.alsic.com by a standard lithographic process. CEA-LETI Contact: Cheryl Oliveira Our winning combination of performance and is embedded in a dynamic and international flexibility with ease of operation and reliability Email: [email protected] ecosystem that include European and Global CPS Technologies Corporation is the worldwide delivers to customers the optimal capital leaders. investment. leader in the design and high-volume production of AlSiC (aluminum silicon carbide) for high Booth 520 Booth 122 thermal conductivity (up to 1000 W/mK with Circuits Multi-Projets (CMP) embedded Pyrolytic Graphite) and device Canon USA 46 Avenue Felix Viallet compatible thermal expansion. AlSiC thermal 3300 North 1st St. 38000 Grenoble, France management components manufactured by CPS San Jose, CA 95134 Phone: +33-476-57-46-17 include hermetic electronic packages, heat sinks, Phone: +1-408-468-2000 Fax: +33-476-47-38-14 www.usa.canon.com/industrial www.mycmp.fr microprocessor & flip chip heat spreader lids, Contact: Doug Shelton Contact: Dr. Ajith-Sivadasan Moreau Thermal substrates, IGBT base plates, cooler Email: [email protected] Email: [email protected] baseplates, Pin Fin baseplates for hybrid electric Canon USA Industrial Products Division provides CMP offers, at very attractive prices, a set vehicles, microwave & optoelectronic housings advanced wafer & panel process equipment for of advanced packaging solutions for 3D IC applications including semiconductor, advanced prototyping. Both active and passive Silicon Booth 117 packaging, power device & display. Canon interposer solutions are now available to CVInc 990 N. Bowser, Suite 860 provides cost-effective processing solutions designer as well as wafer-level or die –level post- Richardson, TX 75081 including i-line & KrF optical lithography, processing for process modules integration (such Phone: +1-972-664-1568 nanoimprint lithography & Canon ANELVA as TSV and µ-pillars), enabling Silicon to Silicon deposition & etch equipment. Canon products Fax: +1-972-664-1569 assemblies for 3D-IC applications. Since 1981, www.covinc.com supporting Compound Semiconductor CMP is a Multi-Project Wafer service organization applications include FPA-3030i5+ & FPA- Contact: Terence Q. Collier in ICs, Photonic ICs, Smart Power and MEMS Email: [email protected] 3030EX6 lithography systems & BC7000 for prototyping and low volume production. permanent wafer bonding systems. CVI offers quick turn advanced packaging CMP enables prototypes fabrication on industrial solutions for assembly and die/wafer bump; processes at very attractive costs and offers Booth 215 single die bumping, partial and complete wafer technical expertise and support in providing processing as well as reballing CSP and BGA CEA LETI MPW and related services for researchers 17 Rue des Martyrs devices. Custom and off the shelf dummy die, from Industrial companies Research Labs and 38054 Grenoble Cedex 9, France substrates and interposers of silicon, quartz, glass Universities, and More than 600 Institutions from Phone: +33633661323 and alumina are available including TGV solutions 70 countries have been served, 8100 projects www.leti.fr/en with filled vias as small as 20um diameter and 25:1 Contact: Severine Cheramy have been prototyped, 74 different technologies aspect ratios. Solder selections include standard Email: [email protected] have been interfaced. This year CMP will also offerings of Pb-free, eSnPb, indium alloys, copper CEA-LETI is an institute providing R&D and promote advanced packaging solutions from pillars, and gold stud bumps. Plating solutions are Prototyping services in the field of Micro and NEXTS-Europractice consortium, with a focus on ENIG, ENIPIG, eCu and eSn; electrolytic options Nanotechnologies. Capabilities include 8” and silicon photonics packaging. include Sn, Cu, Ni, Pb, Au and Pd. 12” wafer process flows for advanced CMOS,
3113 Booth 204 Booth 422 Booth 321 DECA Technologies DuPont Electronics & Imaging Evatec NA inc. 7855 S. River Parkway, Suite 111 455 Forest Street 780 Carillon Parkway, Suite 150 Tempe, AZ 85284 Marlborough, MA 01752 St Petersburg, Florida, 33716 Phone: +1-480-345-9895 Phone: +1-508-481-5970 Phone: +1-727-201-4313 www.decatechnologies.com www.dupont.com/electronic-materials Fax: +1-727-201-4605 Contact: Garry Pycroft Contact: Mark Markowski www.evatecnet.com Email: [email protected] Phone: +1-774-641-4969 Contact: Allan Jaunzens Deca Technologies is an electronic interconnect Email: [email protected] Email: [email protected] solutions provider that offers fan-in and fan- With the 2017 merger of Dow and DuPont, From 5G networks and the new micro LED out wafer level chip scale packaging (WLCSP) Dow Electronic Materials and DuPont Electronics display technology to EMI shielding for our services to the semiconductor industry. Our & Communications have combined their smart phones, our thin film deposition systems portfolio of proprietary, game-changing portfolios and expertise to create the new enable manufacture of the worlds highest electronic interconnect solutions delivers DuPont Electronics & Imaging business, which is performance semiconductor, optoelectronic leadership capabilities in performance, cost and part of the new Specialty Products Division of and optical devices. Evatec Advanced Process technology allied to a flexible manufacturing DowDuPont (future DuPont). DuPont Electronics Control technologies enables new levels of process that enables 200mm and 300mm wafers & Imaging is a global supplier of materials and production yields for the most challenging thin to be managed simultaneously. Deca’s process technologies serving the semiconductor, advanced film performance specifications in Advanced significantly reduces cycle time and permits chip packaging, circuit board, electronic and Packaging, Power Devices, MEMS, Wireless multiple design iterations with minimal investment, industrial finishing, photovoltaic, display, and Communication , Optoelectronics and Photonics. thereby enabling the adoption of wafer level digital and flexographic printing industries. DuPont Within Advanced Packaging our solutions on interconnect technologies for a wide array of E&I’s portfolio includes metallization, dielectric, HEXAGON and CLUSTERLINE deliver high semiconductor device types. Deca’s FOWLP lithography and assembly materials designed to yield UBM / RDL production with stable low Rc (M-Series) is rapidly gaining traction within the meet the most demanding needs for advanced values at up to 56 wafers per hour in FOWLP. market courtesy of its superior reliability plus semiconductor packaging applications, such as Combining our latest batch degas, etch and adaptive patterning capability which compensates bumping, copper pillars and redistribution layer deposition technologies achieves the even lower for die shift and enables finer design rules. (RDL), passivation, underbump metallization Rc values of <1mOhm needed for contacts (UBM), thermal interface and lid seal adhesion and interconnects for next generation power Booth 317 used for the latest fan-out wafer level packaging management in IOT applications. For FOPLP DISCO Hi-Tec America, Inc. (FOWLP), flip chip, system in package (SiP), and applications our PNL cluster tools offer high 3270 Scott Blvd. 2.5D/3D chip packages. throughput production up to 25 panels per hour Santa Clara, CA 95054-3011 on panel sizes of 500mm for low CoO. Phone: +1-408-987-3776 Booth 123 Fax: +1-408-987-3785 EMD Performance Materials Booth 409 www.discousa.com A business of Merck, KGaA EV Group, Inc. Contact: Aris Bernales Darmstadt, Germany 7700 South River Parkway Email: [email protected] 70 Meister Avenue Tempe, AZ 85284 For 50 years, DISCO Hi-Tec America, Inc. has Somerville, NJ 08876 Phone: +1-480-305-2400 been a leader in the semiconductor industry in Phone: +1-908-429-3578 Fax: +1-480-305-2401 cutting (Kiru), grinding (Kezuru), and polishing Fax: +1-908-429-3637 www.evgroup.com (Migaku) technologies. DISCO’s focus has www.emdgroup.com Email: [email protected] expanded beyond mechanical dicing to include Contact: Shaun Bennett EV Group (EVG) is a leading supplier laser and plasma singulation. DISCO continues Email: [email protected] of equipment and process solutions for to be the leader in wafer thinning and polishing/ EMD Performance Materials is a business of the manufacture of semiconductors, stress relief with technologies such as SDBG Merck KGaA, Darmstadt, Germany. Our microelectromechanical systems (MEMS), enabling thinning of die to 20um or less. To Semiconductor Solutions business unit accelerates compound semiconductors, power devices, support the increasing complexity in today’s the semiconductor industry to develop electronic and nanotechnology devices. Key products packages, DISCO has also released equipment devices that are smarter, faster, more powerful include wafer bonding, thin-wafer processing, capable of laser via drilling in non-silicon & energy efficient for a more connected world. lithography/nanoimprint lithography (NIL) and transparent materials, silicon carbide ingot We provide highly innovative material-based metrology equipment, as well as photoresist slicing (KABRA), and laser lift off. In order to solutions for the semiconductor manufacturing coaters, cleaners and inspection systems. Founded support research and development efforts, joint supply chain. From wafer fabrication towards the in 1980, EV Group services and supports an development initiatives, and next generation final stage, packaging – we are a single channel elaborate network of global customers and product prototyping, DISCO Hi-Tec America’s partner for the production of integrated circuits. partners all over the world. KKM Services lab in Santa Clara offers capability Focusing on packaging only, we e.g. offer a variety to process materials with our latest advanced of Thick Film Resists (TFR) from conventional cutting, grinding, and polishing technologies. DNQ & chemically amplified (CA) positive tone to photo polymerizing negative tone which are used to make patterned conductive circuitry in semiconductor packages. In addition we deliver high reliability and environmentally friendly interconnect materials to enable powerful semiconductors that are fully lead-free and ROHS compliant. When great minds get together, they inspire each other. We are proud to partner with ECTC again in 2019 to further accelerate innovation in Semiconductors.
32 29 Booth 315 Booth 217 Booth 418 ficonTEC FlipChip International Fraunhofer Institute for Reliability 25 Calle Canela Division of Huatian Tech. Group and Microintegration IZM San Clemente, CA 92673 3701 E. University Dr. Gustav-Meyer-Allee 25 Phone: +1-949-388-5800, Phoenix, AZ 85034 13355 Berlin, Germany +1-949-300-7715 Phone: +1-602-431-6020 Phone: +49-30-46403-100 Fax: +1-949-388-1489 www.flipchip.com Fax: +49-30-46403-111 www.ficontec.com FCI supplies turnkey advanced packaging and test www.izm.fraunhofer.de Contact: Soon Jang services focused on the consumer, automotive, Contact: Georg Weigelt Email: [email protected] medical and industrial industries. FCI supports a Email: [email protected] ficonTEC provides a wide range of micron- and wide range of customers frequently partnering Invisible – but indispensable – nowadays nothing submicron-precision T&M, vision inspection, and with them to engineer customized solutions works without highly integrated microelectronics assembly automation systems for opto-electronic, including expedite bumping and backend services and microsystem technology. Reliable and fiber-optic/array and micro-optics components, on Multi-Project Wafers. FCI is a leader in wafer cost-effective assembly and interconnection among others. Such automation systems for level packaging with patented technologies technologies are the foundation of integrating applications include submicron-precision LDB/ spanning from Cu Pillar Bumping, Spheron™ these in products. Fraunhofer IZM, a worldwide die bonding, LDB stacking-unstacking, micro- Wafer Level Chipscale Packaging, and ChipsetT™ leader in the development and reliability analysis lens assembly (e.g., FAC, SAC, mirror, etc.), Embedded Die Packaging. FCI is a division of of electronic packaging technologies, provides its OE component attachment, and integrated Huatian Technologies (HT). HT is among the customers with tailor-made system integration photonic device assembly. ficonTEC is also the top 5 OSATs in the world with 1.3 billion dollars technologies on wafer, chip and board level. Our recognized industry leader in SiPh device test, in annual revenue. It is listed on the Shenzhen research also ensures that electronic systems are inspection, and assembly automation systems for Stock Exchange Market. Huatian Technology more reliable, so that we can accurately predict various product development and production Group operates six ISO/IATF16949 factories lifecycle. requirements. Our systems are designed for located within China and the US. Huatian’s high-yield and -throughput, -precision semi- world class factories offer a complete range of Booth 518 and full-automation production environment. semiconductor packaging and turnkey services. FUJIFILM Electronic Materials ficonTEC’s system platforms are pre-engineered 80 Circuit Dr. for specific applications, where each platform Booth 416 North Kingstown, RI 02852 for given application can be optimized for the Fraunhofer Center for Applied Phone: 800-553-6546 unique needs of each customer, resulting in Microstructure Diagnostics CAM www.fujifilmusa.com a competitive technical advantage. ficonTEC Heideallee 19 Contact: Sanjay Malik assists its customers with their ‘lab-to-fab’ 06120 Halle (Saale), Germany Email: [email protected] activities through collaborative product/process Phone: +49-345-55-89-130 FUJIFILM Electronic Materials is a leading development activities, leveraging our extensive Fax: +49-345-55-89-101 supplier of advanced materials to the electronics experiences for customers’ rapid time-to-market www.cam.fraunhofer.de industry. We offer full complement of advanced needs. Please discuss ficonTEC’s capabilities for Contact: Prof. Dr. Matthias Petzold photoimageable and non-photoimageable your application(s) at our booth. Email: [email protected] polyimide and PBO materials designed to meet Fraunhofer IMWS-CAM is a leading service current and future packaging requirements, as Booth 213 provider of failure diagnostics and material well as temporary bonding materials tailored for Finetech assessment for industry including semiconductor demanding wafer thinning applications. Fujifilm 560 E. Germann Rd., Suite 103 technologies, microelectronic components, is demonstrating its innovative iACF anisotropic Gilbert, AZ 85297 microsystems and nanostructured materials. conductor technology drawn from our Phone: +1-480-893-1630 We consider the entire work flow from proprietary printing and metal substrate expertise. www.finetechusa.com non-destructive defect localization over high Contact: Robert Avila precision target preparation to cutting edge Booths 320 Email: [email protected] nanoanalytics supplemented by micro-mechanical HD MicroSystems, LLC Finetech supplies sub-micron accuracy die testing, finite element modeling and numerical 250 Cheesequake Road bonders for die attach, advanced packaging and simulation. Our goal is to support cooperation Parlin, NJ 08859 micro assembly applications. Manual, motorized partners in introducing innovative materials and Phone: +1-800-346-5656 and automated models provide a prototype to technologies, improving manufacturing process www.hdmicrosystems.com production pathway. High process flexibility within steps, securing reliable field use of components, Email: [email protected] one platform allows a wide range of bonding analyzing field returns, and consequently HD MicroSystems™ (HDM) is a 50/50 joint technologies: thermo-compression, ultrasonic, optimizing manufacturing yield, product quality, venture of Hitachi Chemical and DuPont offering eutectic, epoxy, sintering, ACF/ACP, Indium reliability, and cost efficiency. In addition, we are liquid polyimide (PI) and polybenzoxazole (PBO) and precision vacuum die bonding. Applications collaborating with suppliers of microstructure dielectric coatings. HDM will introduce new areas cover optical packages, sensors, Si diagnostics and material testing equipment in High-Reliability Low Temp Cure PI’s, including photonics, microLEDs, Cu pillar, flip chip, chip- developing innovative failure analysis methods and NMP-Free. HDM polymeric materials are the on-glass, chip-on-flex, MCM, MEMs and more. instrumentation, problem-adapted work flows for process-of-record (POR) with many front-end Finetech also provides precision dispensers and quality and reliability control, and new industry- wafer applications for interlayer dielectrics (ILD) advanced rework systems for today’s challenging compatible applications for future markets. and stress buffer coatings (SB), as well as back- applications. Our deep process knowledge end advanced packaging technologies such as adds value to our equipment – our engineering Flip Chip, WL-CSP, along with redistribution team works with customers to create effective dielectrics layers (RDL) and bonding adhesives solutions for specific applications. We understand (temporary and permanent) for 3D/TSV and that “one size” does not necessarily fit all. wafer thinning applications. HD MicroSystems™ and American Semiconductor® (ASI) announce their innovative Joint Development Agreement to produce the world’s first High Reliability Ultra-
33 Thin Packaged IC’s enabling a new evolution in an accelerated development for complex and see value in our supply chain management electronics. Semiconductor-on-Polymer™ (SoP) advanced structures. The Open Laboratory will proposition. Clearly beyond the customer- technology is set to rise to prominence for thin relocate to more convenient location, closer to supplier relationship, we value true partnerships Flexible Hybrid Electronics (FHE) by 2020 as Tokyo, in Q4 2018. Our sales offices are located for mutual growth. We have an exciting 2019 consumers seek revolutionary experiences. around the world, with technical engineers roadmap, some of the highlights include deploying stationed to support customers in case of need. high density interconnect laminates, pursuing Booth 516 Please contact us if you are interested in “Open integration and optimization of SiP packages Henkel Corporation Laboratory” and materials such as die bonding and also deploying technical milestones to 14000 Jamboree Rd. films, molding related materials (EMC of solid, prepare for dense optical integration which is Irvine, CA 91626 fine granular, liquid and film, and release film), highly anticipated by several key players of the Phone: +1-949-344-6688 underfill (CUF and NCF), temporary adhesives, communications market in the years ahead. Fax: +1-714-368-2265 photo-sensitive dielectric, dry film resist, solder www.henkel-adhesives.com/us/en/ resist, organic laminates (including low Dk/Df Booth 527 Contact: Eva Laus dielectric) and much more. Integrated Service Technology (iST) Email: [email protected] 2381 Zanker Road Suite 120 Henkel is the premier materials supplier for Booth 121 San Jose, CA 95131 the electronics assembly and semiconductor i3 Electronics Phone: +1-408-627-5749 packaging industries. Our advanced formulations 100 Eldredge St. www.istgroup.com include a range of products that facilitate electrical Binghamton, NY 13901 Contact: Edward Lee interconnect, provide structural integrity, offer Phone: +1-607-238-7077 Email: [email protected] critical protection, and transfer heat for reliable www.i3electronics.com Founded in 1994 in Taiwan, iST began its business performance. We’re proud to create products i3 Electronics, Inc., with headquarters in from IC circuit debugging and modification and that improve today’s electronic technologies and Binghamton, NY, is a vertically integrated gradually expanded its scope of operations, enable tomorrow’s advances. provider of high performance electronic solutions including Failure Analysis, Reliability Verification, consisting of design and fabrication of printed Material Analysis, Automotive Electronic Booth 100 circuit boards and advanced semiconductor Verification Platforms and Signal Integrity Testing Heraeus Electronics packaging, full turnkey services for printed Services. iST has offered full-scope verification 24 Union Hill Rd circuit board assembly and integrated circuits and analysis services to the IC engineering Conshohocken, PA 19428 assembly and test, systems integration, cable and industry, its customers cover the whole spectrum Phone: +1-610-825-6050 harness manufacturing, heterogeneous MCM, of the electronics industry from IC design to www.heraeus-electronics.com die extraction and reassembly and world class end products. In response to iST’s mission of Contact: James Wertin reliability and failure analysis laboratories. i3 unites providing integrated solutions to customers, iST Email: [email protected] advanced technology and technical know-how not only focuses on its core laboratory services Heraeus Electronics provides an innovative with a robust manufacturing environment to but also enters the mass production services product portfolio and trusted expertise in meet the current and emerging needs of the engineering. With applications centers all over the most demanding markets, including defense and Booth 511 world Heraeus aims to provide next generation aerospace, communications and computing, Interconnect Systems, Inc. solutions for the electronic industry focusing advanced test equipment, and medical. 741 Flynn Rd. on reliability, thermal management, and cost Camarillo, CA 93012 control while operating at peak performance. Booth 210 Phone: +1-805-482-2870 Heraeus serves several markets including IBM Canada Ltd. Fax: +1-805-482-8470 semiconductor, automotive, power electronics, 23 Airport Blvd www.isipkg.com LED and consumer electronics with advanced Bromont, Quebec, Canada J2L 1A3 Contact: Tom Casey products like solder paste, sinter paste, thick film Phone: +1-450-534-6496 Email: [email protected] inks, metal substrates and direct copper bonded Cell: +1-450-531-2474 Interconnect Systems International, LLC substrates. Our knowledge in electronic packaging www.ibm.com/assembly (“ISI”), specializes in high-density module will shorten your development cycles, lower Contact: Luc Comtois packaging, advanced interconnect and real development costs, and bring next generation Email: [email protected] time signal processing hardware. ISI offers products to market faster. At IBM Assembly and Test facility in Bromont, design, qualification, and testing, coupled with we have asserted our proposition in several key fully integrated in-house manufacturing. ISI’s Booth 212 areas providing solutions for high current and system design capabilities include hardware, Hitachi Chemical Co., Ltd. high thermal dissipation applications in computing firmware and software and high-density PCB 1-9-2, Marunouchi, Chiyoda-ku, electronics market and developing specialized design. ISI’s additional capabilities include custom Tokyo 100-6606 Japan areas with attractive know- how in RF, Antennas, manufacturing process development, fine pitch Phone: +81-3-5533-7000 SiP and advanced opto electronic packaging for SMT, flip chip, wire bond assembly, IC packaging, Fax: +81-3-5533-7077 communication and wireless markets. Beyond our custom molding, over molding, and automated www.hitachi-chem.co.jp technical orientation, our experienced engineering optical inspection. Contact: Tsuyoshi Ogawa team takes pride in using its design, assembly and Email: [email protected] test expertise to provide tailor-made solutions Hitachi Chemical is a leading company in for our client’s needs and bring forth designs, providing various materials used in advanced prototypes and fast manufacturing ramp ups that semiconductor assembly packages, such as are key to our client’s success. Several fruitful FO-WLP/PLP, 2.5 & 3D packages, SiP etc. In collaborations have been enacted in the past addition to those materials, Hitachi Chemical months and we already have received feedback provides “Open Laboratory” located in Japan that it provides high value to the customers where any customers can utilize advanced that have chosen us as their development and fabrication and analytical equipment to achieve manufacturing OSAT solution. Clients also
34 Booth 402 Booth 405 Booth 223 JCET LINTEC of AMERICA INC. Micross Advanced Interconnect Tech. 46429 Landing Parkway 15930 S. 48th Street Suite 110 3021 E. Cornwallis Rd. Fremont, CA 94538 Phoenix, AZ 85048 P.O. Box 110283 Phone: +1-510-979-8000 Phone: +1-480-966-0784 Research Triangle Park, NC 27709 Fax: +1-510-979-8001 www.lintec-usa.com Phone: +1-919-248-9216 www.statschippac.com LINTEC is a worldwide leader in adhesive Fax: +1-919-541-1142 Contact: Chris Stai technologies. For 30+ years, LINTEC has www.micross.com Email: [email protected] created equipment and materials to solve difficult Contact: Alan Huffman STATS ChipPAC is a leading outsourcing provider semiconductor process issues. With a catalog of Email: [email protected] of semiconductor design, wafer bump, packaging hundreds of tapes and equipment, and decades Micross is the leading one-source provider and test solutions for well-established market such of application experience LINTEC is positioned of bare die & wafers, advanced interconnect as communications, consumer and computing to help. Whether you are looking for tape, need technologies, custom packaging (complete as well as emerging markets in automotive equipment to mount, peel or UV cure - our staff hermetic packaging) and assembly, component electronics, Internet of Things (IoT) and wearable stands ready to assist you to provide the Adwill modification services (BGA Reballing, Lead devices. STATS ChipPAC is a member of the Advantage Attach, Robotic Solder Dip & Exchange), JCET group of companies. JCET is one of the electrical & environmental testing and hi-rel top semiconductor packaging and test providers Booth 105 products. In business for more than 40 years, our in the world and the largest OSAT provider in Malico Inc comprehensive array of hi-reliability capabilities China. Headquartered in Jiangyin, China, JCET 5, MingLung Road serve the global aerospace & defense, space, has an extensive global manufacturing base with Yang-Mei Taiwan 32663 medical and industrial markets. Micross Advanced operations in China, Singapore and South Korea. Phone: 886-3-4728155 Interconnect Technology (AIT), one of the The comprehensive packaging portfolio of JCET Fax: 886-3-4725979 premier wafer bumping & wafer level packaging and its subsidiaries include discrete, leaded, www.malico.com facilities in the U.S., develops and provides laminate, flip chip, Molded Interconnect System, Email: [email protected] leading edge interconnect and 3D integration wafer level packaging and System-in-Package Malico is the leading manufacturer for Thermal technologies to customers worldwide. Our technologies. For more information, visit www. Solutions. We offer both standard and ITAR-registered facility supports wafer sizes up statschippac.com or www.jcetglobal.com. customized heat sinks. Our product line includes to 200mm and the flexibility to tailor unique passive, active, heat pipe embedded, copper solutions for your most demanding requirements. Booth 519 embedded and liquid cooling solutions. We offer Micross possesses the sourcing, packaging, JFE Shoji design and simulation assistance. Our vertical assembly, test, and logistics expertise needed JFE Shoji Bldg., Oremachi 2-Chome integrated production line ensures our customer to support an application throughout its entire Chiyoda-ku, Tokyo receive the highest quality service at the shortest program cycle. For more information, please visit Japan 100-0004 lead time and in most cost-effective way. www.micross.com. Contact: Sosuke Kobayashi Email: [email protected] Booth 419 Booth 211 Mentor, A Siemens Business Mini-Systems, Inc. (MSI) Booth 208 8005 SW Boeckman Rd. 20 David Rd. JSR Micro, Inc. Wilsonville, OR 97070 North Attleboro, MA 02760 1280 N. Mathilda Ave. Phone: +1-503-547-3000 Phone: +1-508-695-0203 Sunnyvale, CA 94089 www.mentor.com/pcb Fax: +1-508-695-6076 Phone: +1-408-543-8800 Contact: Jennifer Chausse www.mini-systemsinc.com Fax: +1-408-543-8964 Email: [email protected] Contact: Craig Tourgee www.jsrmicro.com Mentor, A Siemens Business is the worldwide Email: [email protected] Email: [email protected] market leader in PCB systems design, advanced Mini-Systems, Inc. (MSI) is a world class leader JSR’s THB series of thick film photoresists, along with IC packaging solutions, and analysis technologies. in the manufacture of high-reliability passive WPR series of dielectric coatings and LP series of lift- Recently awarded the 3DInCites “EDA Supplier components and hermetic packages. For over off photoresists, offer advanced packaging technology of the Year” award, Mentor will showcase its 50 years MSI has been delivering superior portfolios to enable manufacturing of WL-CSP, Flip Xpedition(R) High Density Advanced Packaging quality products for Military, Aerospace, Chip, TSV, LED and MEMS devices with fine-pitched (HDAP) solutions for prototyping, design, and Communications, Medical and Industrial and cost effective micro-bump, Cu-pillar, RDL, and verification of heterogeneous multi-substrate applications. MSI manufactured products consist lift-off processes. designs such as FO-WLP, 2.5D, and system-in- of precision: Thin/Thick film Chip Resistors/ package. Visit booth #419 to learn more about Networks, QPL Resistors to MIL-PRF-55342, Booth 310 Mentor’s technologies and best practices for IC/ MOS Chip Capacitors, Chip Attenuators, Full Kyocera America Package/Board co-design. Line of RoHS Compliant Products, QPL Jumpers 1401 Route 52, Suite 203 to MIL-PRF-32159/Mounting Pads, Glass- Fishkill, NY 12524 to-metal seal packages, and Custom Design Phone: +1-845-896-0480 Packages. Resistors values from 0.1 Ohm to Contact: Tony Soldano 100GOhm and operating frequencies up to 40 Email: [email protected] GHz. Absolute tolerances starting at 0.005% and Kyocera International, Inc., Semiconductor TCRs as low as ±2ppm/°C. Sizes start at 0101. Components Group offers an extensive array of The hermetic packages meet or exceed package organic FC-CSP / FC-BGA / SHDBU packages, evaluation requirements per MI-PRF-38534, Table complex ceramic modules, embedded PWB, C-VI. Hermeticity of the packages is less than and high-density PCBs for numerous applications 10-10 atm cc/sec per MIL-STD-883, method including RF/MW, ASICs, MPUs, graphics 1014, condition A4. MSI is ISO 9001 certified. processors, data centers, power semiconductors, Compliance includes RoHS, REACH, and DFAR. phased array radar, telecom, avionics and space. Standard deliveries start in just 2 WEEKS! 35 Booth 108 Booth 205 Booth 218 Mitsui Chemicals America NAMICS Technologies, Inc. Neu Dynamics Corp. 61 Metro Drive 2055 Gateway Place, Suite 480 110 Steamwhistle Dr. San Jose, CA 95110 San Jose, CA 95110 Ivyland, PA 18974 Phone: +1-408-487-2888 Phone: +1-408-516-4611 Phone: +1-215-355-2460 www.mc-tohcello.co.jp/english/ Fax: +1-408-516-4617 Fax: +1-215-355-7365 Contact: Jeff Wishes www.namics.co.jp/e www.neudynamics.com Email: [email protected] Contact: Tony Ruscigno Contact: Don Johnson ICROS™ Tape” is a brand of tape designed for Email: [email protected] Email: [email protected] the semiconductor and electronic components NAMICS is a global technology leader for Neu Dynamics/NDC International, is a manufacturing process flow, such as backgrinding underfills, encapsulants, adhesives, and distributor of a wide range of back-end (BG), dicing, molding, debonding, sawing, reflow, insulating and conductive materials used by semiconductor assembly packaging equipment metal lift off, protection for etching, CMOS image producers of semiconductor devices, passive and materials for microelectronics including the sensor handling, protection for back-metalizing, components and solar cells with over 70 years following companies. Our portfolio includes and etc. ICROS™ Tape has been the world’s top of experience and expertise. Headquartered Hanmi Semiconductor, Boschman Advanced protective tape used in semiconductor wafer BG in Niigata, Japan with subsidiaries in the USA, Packaging Technology, ATI, Micro Point Pro, for decades. Today, we now offer tapes used for Europe, Taiwan, Singapore, Korea, Hong Kong, Pink, Kulicke & Soffa, Master Machinery Corp, many other processes in the semiconductor and and China, NAMICS serves its worldwide Haecker Automation, FA Systems Automation. electronic components manufacturing flow. customers with enabling products for leading We also supply automatic and semi-automatic ICROS™ Tape is continuously evolving to keep edge applications. We build more than products; trim and form dies and systems supplied with up with the latest and future technologies in the we build relationships setting the gold standard trim presses (both Servo and Hydraulic driven). semiconductor process, such as TSV wafer BG for customer service by offering customizing Neu Dynamics further offers contract transfer and dicing, fan-out WLP, PLP and many other products, world class customer support to molding services. Our fully equipped molding lab processes. We optimize the entire production provide a solution for your personal application. allows for mold tryouts, pilot runs and low to processes of our protective tapes from concept NAMICS CORPORATION is a leading source for medium volume production. Neu Dynamics is to raw material design to tape design to final underfills, encapsulants, adhesives, and insulating also capable of building high precision injection inspection to meet the strict requirements of and conductive materials used by producers of molds specializing in insert and over-molding semiconductor market. Everything takes place semiconductor devices, passive components applications. within state-of-the-art clean room production and solar cells. Headquartered in Niigata, Japan facility with strict quality controls in place every with subsidiaries in the USA, Europe, Taiwan, Booth 318 step of the way. The result is ICROS™ Tape, for Singapore, Korea and China, NAMICS serves its Nikon Metrology, Inc. many applications, ultraclean tape with superior worldwide customers with enabling products for 12701 Grand River Ave. TTV (total thickness variation). leading edge applications. Brighton, MI 48116 Phone: +1-810-220-4360 Booth 406 Booth: 111 Fax: +1-810-220-4300 Nagase America Corporation nepes Corporation www.nikonmetrology.com 2880 Lakeside Drive, Suite 320 9605 Scranton Road, Suite 402 Email: [email protected] Santa Clara, CA 95054 San Diego, CA 92121 Nikon Metrology, Inc. offers the most complete Phone: +1-408-567-9728 Phone: +1-858-429-6703 and innovative metrology product portfolio, with Fax: +1-408-567-9729 Cell: +1-669-264-6385 state-of -the-art vision measuring instruments www.nagasechemtex.co.jp/en/ www.nepes.us x-ray machines with CT options, and a complete Contact: Ippei Yamai Contact: Masayuki Oe line of 3D metrology options. These reliable and Email: [email protected] Email: [email protected] innovative solutions respond to the advanced Nagase ChemteX is a leading company for nepes is a leading-edge provider of Wafer Level inspection requirements of manufacturers active semiconductor encapsulant of epoxy resin, Packaging, Panel Level Packaging and turnkey in aerospace, electronics, automotive and other especially Liquid Molding Compound (LMC) assembly solutions including testing and DPS industries. To learn more about our innovative for FOWLP, 2.5D, 3D, SiP, Non-Conductive services. Since 2001, nepes has been providing products and to view all our product lines please Paste (NCP) for Fine pitch FC-PKG, Underfill OSAT services in partnership with Fabless and visit our website. for Pb-free. Engineered Materials Systems, Inc. IDM customers worldwide. With ISO/TS 16949, technology focus on electronic materials and ISO 14001, OHSAS 18001 and AEO certified Booth 414 negative photoresist for semiconductor, circuit facilities located in South Korea and China, Nitto Inc. assembly, photovoltaic, printer head, camera nepes provides an extensive range of packages: Bayside Business Park module, disk drive, printed electronics and bump, wafer level package (WLP), fan-out wafer 48500 Fremont Blvd. photonics assembly product lines. These Nagase level package (FO-WLP), fan-out wafer level Fremont, CA 94538 Group companies create continual improvements System in Package (FOWL-SiP) as well as 2 and Phone: +1-510-445-5400 guiding its customers into the future. 3D modules. Its PLP (Panel Level Package) has Fax: +1-510-445-5480 revolutionized the mass production of advanced www.nitto.com semiconductor packages while providing price Contact: Yasuko Ferris competitiveness by utilizing an innovative process Email: [email protected] and structure based on extensive touch screen Nitto is a global supplier of materials and panel (TSP) and LCD production experience. equipment for semiconductor manufacturing, nepes is well positioned to support leading represented by the following products: ELEP semiconductor companies, foundries and holder tapes for back-grinding and dicing; electronics IDMs with their advanced packaging high temperature resistant masking tape; NEL requirements. machines (Taper/Detaper/ Wafer Mounter with or without peeling function/ UV machine) for thin wafer application; ELEPMOUNT (2-in-1:
36 DAF+Dicing Tape conductive/non-conductive) Booth 417 Booth 404 for thin stacked chip package; REVALPHA NTK Technologies, Inc PAC TECH USA thermal-release tape for various applications, such 3979 Freedom Circle Drive, Suite 320 328 Martin Ave. as dicing, grinding and MLCC production process; Santa Clara, CA 95054 Santa Clara, CA 95050 clear molding compound and sheet encapsulating Phone: +1-408-727-5180 Phone: +1-408-588-1925 x246 resin. www.ntktech.com Fax: +1-408-588-1927 Contact: Mariel Stoops www.pactech.com Booth 507 Email: [email protected] Contact: Berndt Otto Nordson DAGE NTK Technologies is a leader in IC Ceramic Email: [email protected] 2747 Loker Avenue Packaging. For nearly half a century, NTK has Pac Tech - Packaging Technologies GmbH West Carlsbad, CA 92010 developed specialized technologies to provide (group member of NAGASE & CO. Ltd.) is Phone: +1-925-246-1662 advanced ceramic IC packaging solutions for large headquartered in Germany with wholly owned www.nordsondage.com and start-up semiconductor companies. NTK’s subsidiaries: PacTech USA Inc. in Silicon Valley, Contact: Aram Kardjian technical centers support design optimization and USA, and PacTech ASIA Sdn. Bhd. in Penang, Email: [email protected] simulation services through all development and Malaysia. PacTech is comprised of three business Nordson DAGE manufacturers wire pull, ball production stages -- prototype, small volume, units: EQUIPMENT MANUFACTURING: Manual and die shear test systems along with X-Ray and volume manufacturing. With global service & Automatic ENIG & ENEPIG plating tools, Laser inspection systems that are recognized as the centers, NTK offers a wide range of packaging solder jetting equipment, Wafer-level solder ball industry standard. The 4800 bondtester brings the materials and design services for MEMS Sensors, transfer systems, Laser assisted flip-chip bonders. latest developments in automated wafer testing CMOS/CCD Image Sensors, Opto, FPGA, SUBCONTRACT SERVICES: Flip Chip and technology to users testing wafers from 200mm CPU, MPU, MCM, RF, LED Substrates, Hi-Rel, Wafer Level Package Bumping Services including upwards. When combined with an integrated Satellite, Automotive and Medical applications. ENIG or ENEPIG for UBM (solder bumping) wafer handling device the 4800-INTEGRA™ can Wafer Probe Substrates utilizing multilayer or OPM (wirebond). Other services include test multiple wafers consecutively. Automation co-fired ceramic and multilayer thin film available. Electroplating, Laser Solder Jetting, Wafer Level on non-wafer samples can also be conducted on Optimum package designs for 10G to 400G. Solder Balling, Re-passivation, RDL, Backmetal, the 4000Plus which performs shear tests up to As one of the industries’ largest packaging Wafer Thinning, Wafer Dicing, Tape & Reel, AOI, 200kg, pull tests up to 100kg and push tests up manufacturers, NTK’s products and services have X-Ray, SEM, FIB. CHEMISTRY: Pre-Treatment to 50kg. The 4000HS high speed bond tester is evolved to match the roadmaps of mainstream and process chemistry for electroless plating. used for pull and shear testing of solder spheres and advanced IC packaging applications. to identify brittle fractures at speeds up to 4m/ Booth 408 sec in shear and 1.3m/sec pull. Technologies such Booth 529 Palomar Technologies Inc. as TSV, PoP, 2.5D and 3D integration demand a Ntrium Inc. 2728 Loker Avenue West new level of metrology. The XM8000 intelligent Lvl 2, 54-42 Dongtanhan Carlsbad, CA 92010 X-ray metrology system delivers fully automated, 1-gil, Hwaseong-si, Gyeonggi-do, Phone: +1-760-931-3600 non-destructive, radiation safe defect detection of 18423 Fax: +1-760-931-5191 all complex devices. Republic of Korea www.palomartechnologies.com Phone: +82-31-6131147 Email: [email protected] Booth 509 Fax: +82-31-6131449 Palomar Technologies makes the connected Nordson SONOSCAN www.ntrium.com world possible by delivering a Total Process 2149 East Pratt Blvd. Contact: Paul Kang Solution™ for advanced photonic and Elk Grove Village, IL 60007 Email: [email protected] microelectronic device assembly processes Phone: +1-847-437-6400 We are Nano Alchemists! and EMI/EMC total utilized in today’s smart, connected devices. Fax: +1-847-437-1550 solution provider. Ntrium is presented with With a focus on flexibility, speed and accuracy, www.nordsonsonoscan.com the opportunity to converge Nano-material Palomar’s Total Process Solution includes Contact: Jim Ries technology and the Microelectronics packaging Palomar die bonders, Palomar wire and wedge Email: [email protected] technology of Automotive/Semiconductor/ bonders, SST vacuum reflow systems, along with Nordson SONSOCAN is a worldwide leader Mobile/IT products, to ignite bright minds that Innovation Centers for outsourced manufacturing and innovator in Acoustic Micro Imaging (AMI) solve technical problems customers face, to and assembly, and Customer Support services, technology. We manufacture acoustic microscope provide collaborate and innovative solutions. Our that together deliver improved production quality instruments and automated inspection equipment product list is as follows. and yield, reduced assembly times, and rapid to nondestructively inspect and analyze products. EMI shielding paste for spraying method / EMI ROI. With its deep industry expertise, Palomar Our C-SAM® scanning acoustic microscope shielding Film / EMI absorber / Conductive equips customers to become leaders in the provides unmatched accuracy and robustness Bonding Film for camera module / Thermal development of complex, digital technologies that setting the standard in AMI for the inspection Interface Material(TIM) / Conductive Particles for are the foundation of the connected world and of products for hidden internal defects such as Elastomer Test Socket / Conductive Beads for the transmission of data generated by billions of poor bonding, delaminations between layers, Anisotropic Conductive Film(ACF) .Do you have connected devices. Palomar solutions are utilized cracks and voids. In addition, we offer analytical the interested with our products or technology? by the world’s leading companies providing services through regional testing laboratories Please visit our booth or contact us. solutions for datacom, 5G, electric vehicle power in Asia, Europe and the U.S. and educational modules, autonomous vehicles/LiDAR, enhanced workshops for beginners to advance users on mobile broadband, Internet of Things, SMART AMI technology. technology, and mission critical services.
37 Booth: 214 Booth: 514 Booth 113 Panasonic Promex Industries Inc. QualiTau 1701 Golf Road, Ste 3-1200 3075 Oakmead Village Drive 830 Maude Ave. Rolling Meadows, IL 60008 Santa Clara, CA 95051 Mountain View CA, 94043 Phone: +1-847-637-9600 Phone: +1-408-496-0222 Phone: +1-650-282-6226 Fax: +1-847-637-9601 www.promex-ind.com Fax: +1-650-230-9192 www.panasonicfa.com Contact: Rosie Medina www.qualitau.com Contact: Tae Yi Email: [email protected] Email: [email protected] Email: [email protected] Promex delivers innovative IC packaging and QualiTau offers a variety of reliability test Panasonic System Solutions Company of heterogeneous assembly solutions for medical, equipment for characterization and development North America – Process Automation biotech and sensor-based microelectronic devices of new materials used in the manufacturing of (PSSNA-PA) develops and supports innovative from its 30,000-sq.ft. Santa Clara, CA facility Integrated Circuits, as well as process monitoring manufacturing processes around the core of which includes Class 100/1000 cleanrooms. and process qualification. The MIRA, Infinity, ACE, circuit manufacturing technologies and computer- It features a highly skilled engineering team, and Multi-Probe reliability test systems perform integrated manufacturing software—thereby, broad technical capabilities, advanced packaging, tests for Hot Carrier Injection (HC), Dielectric contributing to the growth and prosperity of our microelectronics assembly expertise, scalable Breakdown (TDDB), and electromigration(EM) customers’ businesses regardless of their mix or manufacturing capacity and is CA-FDB licensed of interconnects, TSV, Solder Bump (8 amperes volume. to manufacture Class 1 & Class 2 medical max) at test temperatures of up to 450°C. devices. Onsite services include RoHS-optimized QualiTau’s Test Lab service is ideal for both Booth 216 SMT, wafer thinning, dicing, wirebond, flip chip fabless companies and foundries seeking: Panasonic Industrial Devices Sales and overmolding. Its Quik-Pak Division (San Reliable, independent evaluation and analysis. Company of America Diego, CA) offers prototype and preproduction “Virtual” capacity during times of under-capacity. Division of Panasonic Corporation of assembly services in as fast as one day; standard Cost-effective means of performing tests on an North America cycle times 3-5 days after design validation. 35 irregular or infrequent basis. A productive and 205 Ravendale Drive QFN design options, 2x2mm to 12x12mm body beneficial way to “test drive” the equipment Mountain View, CA 94043 sizes. Packages include OmPP (Air Cavity/Open- before committing to a purchase. Phone: 408-861-3946 molded Plastic Packages) QFN/SOIC, OcPP www.industrial.panasonic.com/ww/ (Open Cavity Plastic Packages), custom air cavity Booth 107 products/electronic-materials and plastic overmolded. Services include wafer Royce Instruments Since the founding of our company in 1918, we processing, wire bonding and flip chip for IC 480 Technology Way at Panasonic have been providing better living for packaging/COB applications. Promex/Quik-Pak Napa, CA 94558 our customers, always making ‘people’ central facilities are ISO 13485:2016, ISO 9001:2015 and Phone: +1-707-255-9078 to our activities, and thus focusing on ‘people’s ITAR registered. Fax: +1-707-255-9079 lives’. Going forward from this, and based on www.royceinstruments.com our innovative electronics technology, we will Booth 307 Contact: Bill Coney continue to provide a wide variety of products, Pure Technologies Email: bconey©royceinstruments.com systems and services. 177 US Hwy # 1, No. 306 Royce Instruments, your preeminent supplier for Tequesta, FL 33469 USA Bond Testing and Die Sorting equipment. Our Booth: 522 Phone: +1-404-964-3791 high-precision equipment covers the spectrum Plasma-Therm, LLC Fax: +1-877-738-8263 of bond test and die sorting requirements. Since 10050 16th St. N. Int’l Fax: +1-973-273-2132 bond testing and die sorting are our sole focus, St. Petersburg, FL 33716 www.puretechnologies.com we are dedicated to developing and supplying Phone: +1-727-577-4999 Contact: Jerry Cohn dynamic solutions for our customers. The Royce Fax: +1-727-577-7035 Email: [email protected] 600 Series Bond Testers bring unparalleled www.plasmatherm.com Pure Technologies manufactures low (0.02, 0.01 networking capability and scalability to the Email: [email protected] cph/cm2), ultra-low (0.005, 0.002 cph/2) and market. With three bond testers, Royce offers an Plasma-Therm is a U.S. manufacturer of advanced super ultra-low (<0.001 cph/cm2) alpha emitting instrument solution to meet the evolving needs plasma-processing equipment, providing etch, Tin (Sn), Lead-Free (including all SAC) alloys, of institutions worldwide. Royce Die Sorters deposition, and plasma dicing technologies used Pb, Pb/Sn , Bi and virtually all alloys for over 23 (DE35-ST, MP300, and AP+) offer semi- and in semiconductor packaging, solid-state lighting, years. These ALPHALO® products are available fully automatic die sorting solutions for die as power, data storage, renewable energy, MEMS, in various shapes and sizes – ingots, anodes, slugs, small as 200um square or 50um thick. Our new nanotechnology, photonics, and wireless commu- pellets, foil, rods, bricks, PbO and SnO powder, automated sorter, the AP+, has the capability to nication markets. Plasma-Therm’s VERSALINE® etc. for wafer-level packaging, interconnects, handle diverse input and output mediums (carrier platform is the workhorse for a variety of applica- electroplating and sphere and powder/paste tape, waffle pack, Gel-Pak, Jedec, film frame tions in specialty semiconductor markets. The plat- manufacturing. ALPHA-LO® reduces/eliminates and more) while maintaining input to output form’s modular design allows flexible configuration soft errors from alpha particle emissions from traceability at the die level. Visit us at booth #108 of substrate handling and technologies that address solders, enhances performance reliability to learn more! the wide range of customer requirements. Plasma- and reduces corporate liability. All materials Therm’s Singulator® systems bring the precision are guaranteed and certified to be at secular and speed of plasma dicing to chip-packaging equilibrium and are tested and retested over time applications. Manufacturers, academic and gov- before shipping insuring that the alpha emission ernmental institutions depend on Plasma-Therm rate is stable and will not increase over time. equipment, designed with “lab-to-fab” flexibility to meet the requirements of both R&D and volume production. Plasma-Therm’s products have been adopted globally and have earned their reputation for value, reliability, and world-class support.
38 Booth 502 attach materials, and mold sheets are also in our 263® eco, a high CTE and high transmission glass; Rudolph Technologies main product lines. Not only these materials SCHOTT AS 87 eco, a ultra-thin and toughenable 16 Jonspin Road but also VPES (vacuum printing equipment) and glass; B 270®, a crown glass with extremely Wilmington, MA 01887 pressure oven are in our product lines to offer high CTE; and MEMpax®, an anodic bondable Phone: +1-978-253-6200 comprehensive solutions to the customers, which glass with a CTE corresponding to silicon. The Fax: +1-978-658-6349 distinguishes us from our competitors. SANYU portfolio is supplemented by FLEXINITYTM, www.rudolphtech.com REC is continuing our effort in development of SCHOTT’s glass structuring revolution. Email: [email protected] unique and new technologies. Rudolph Technologies is a leader in the design, Booth 508 development, manufacture and support of defect Booth 413 Senju Comtek inspection, advanced packaging lithography, SavansSys 2989 San Ysidro Way process control metrology, and data analysis 10409 Peonia Court Santa Clara, CA 95051 systems and software used by semiconductor Austin, TX 78733 Phone: +1-408-234-4792 device manufacturers worldwide. Rudolph’s Phone: +1-512-402-9943 www.senju-m.co.jp/en product suite offers hardware and software www.savansys.com Contact: Ayano Kawa solutions for the demanding requirements of the Contact: Amy Palesko Email: [email protected] advanced packaging market, including 2D/3D Email: [email protected] Senju Comtek Corp. is an American Subsidiary bump inspection, RDL and overlay metrology, SavanSys is the industry standard choice for of Senju Metal Industry Co. (SMIC) of Tokyo, and a lithography stepper specifically designed for electronics manufacturing cost modeling. The Japan. Senju is a global leader in solder materials the back-end. Turn data into useful information company began in the mid-nineties with a focus and related processing equipment with over with Rudolph’s proprietary software solutions on multi-chip module and PCB fabrication and two dozen manufacturing, technical, and sales including run-to-run control, fault detection and assembly before expanding into electronics support facilities located around the world. Our classification and yield management systems. packaging. SavanSys provides both cost modeling wide array of solder products includes Cu-core services and software products and maintains an balls/columns, micro-spheres, flux for ball-attach Booths 312, 314 extensive library of manufacturing activity costs. and chip-attach, preforms for power electronics, Samtec, Inc. Projects range from multi-year ventures focused low-temp solders, and high reliability alloys. Senju 520 Park East Blvd. on detailed supply chain modeling to one-time offers customized solutions for IC technology New Albany, IN 47150 projects comparing a new technology to the challenges. Phone: +1-812-944-6733 current industry standard. All SavanSys projects Fax: +1-812-948-5047 and products use activity based cost modeling, Booth 423 www.samtec.com a bottom-up approach to cost that aggregates SET North America Contact: Glenn Dixon individual cost contributors (labor, material, 343 Meadow Fox Ln. Email: [email protected] throughput, equipment cost, etc.) for every step Chester, NH 03036 Known as the worldwide service leader for in a process flow. Phone: +1-603-548-7870 electronic connectors and cables, Samtec has Fax: +1-603-887-2000 focused on leading edge high speed products and services for the last two decades. The Booth 510 www.set-na.com tremendous success in these areas has driven SCHOTT North America, Inc. Contact: Matt Phillips Samtec to further move into faster and smaller 400 York Avenue Email: [email protected] arenas. We now provide full turnkey solutions Duryea, PA 18642, USA SETNA is a Manufacturing and Marketing, Sales and for your entire signal chain from chips, through Contact: Dave Vanderpool Service Organization centered on our experience substrates, packages, connectors and cables. Phone: +1-407-288-7695 and know-how in high-accuracy bonding and the Samtec can help you design, model, layout, Fax: +1-407-321-8847 equipment, materials, competencies surrounding and assemble your products. Samtec continues www.us.schott.com it including Surface Preparation with Atmospheric to focus on our industry-leading FireFly™ Email: [email protected] mid-board optical/photonic engine design and Plasma. manufacturing. In addition, Samtec has new SCHOTT Advanced Optics is a valuable partner SET Bonders have been the world-standard capabilities in glass interposers and substrates with for its customers in developing products and for applications in which micron precision post low loss electrical characteristics for biomedical, customized solutions for applications in optics, bond accuracy is required. For more than twenty military/aerospace, sensors, connectivity, and lithography, astronomy, opto-electronics, life years the FC150 Series has been the tool of industrial applications sciences, and research. With a product portfolio choice. The FC300 series bonders provide the of more than 120 optical glasses, special materials highest force and bonding accuracy available in Booth 421 and components, we master the value chain: the industry, as well as handling substrates up to Sanyu Rec Company Ltd. from customized glass development to high- 300 mm. The Accµra series provide accurate 3-5-1 Doucho, Takatsuki precision optical product finishing and metrology. and versatile die bonders for education and Osaka 569-8558, Japan SCHOTT is one of the world’s leading suppliers R&D. The Ontos7 is the atmospheric plasma Phone: +81-8-0618-73654 of thin and ultra-thin glass wafers and substrates system, designed by our sister company OES www.sanyu-rec.jp made of different materials in sizes of between Contact: Yuki Ishikawa (Ontos Equipment systems), for and dedicated 4” and 12”, with various surface qualities and Email: [email protected] exclusively to the semiconductor manufacturing customized features. The use of proprietary Sanyu Rec Company Ltd. is a Japanese electronics and packaging industry. Our patented (and patent production processes, a wide selection of material supplier to the semiconductor market pending) equipment and processes provide a different materials, and continuous expansion place including LED market. With creative unique advantage to our customers to enable of state-of-the-art processing capabilities make development and numerous proprietary low-cost, high yield, high-speed, chip-to-chip SCHOTT’s wafer offerings unique in the industry. technologies, SANYU REC contributes to these interconnect bonds at room temperature with Process Capabilities include polishing, structuring, growth fields which are driven by environmental minimal force. Ontos Atmospheric Plasma also edge treatment, ultrasonic washing, and clean considerations and mobile applications. SANYU improves surface activation for direct bonding, room packaging. SCHOTT’s portfolio of Thin and REC has provided a variety of products centering aqueous wetting, contamination removal, adhesive Ultra-Thin glasses includes: AF 32® eco, an alkali- on encapsulation materials like liquid MUF bonding, and more. free flat glass with a CTE matched to silicon; D materials to the market. CUF materials, die
39 Booth 500 packaging technology, Shinkawa provides Booth 119 SHENMAO AMERICA, Inc. innovative solutions with high-accuracy and ultra- SUSS MicroTec Inc. 2156 Ringwood Ave. high throughput flip chip bonders for TCB and A SÜSS MicroTec AG Company San Jose, CA 95131 C2/C4 processes. For die and wire bonding, 220 Klug Circle Phone: +1-408-943-1755 Shinkawa provides technologies for ultra-thin Corona, CA 92880-5409 Cell: +1-408-529-6626 die pick up for the latest power and memory Phone: +1-951-817-3700 www.shenmao.com devices, and unique wire shapes for RF, memory, Fax: +1-951-817-0640 Contact: Hans Schiesser and many other devices. Our ultimate bonding www.suss.com Email: [email protected] solutions can automate process selection plus Contact: [email protected] SHENMAO America, Inc. is the American inspection by our 3D technology. Founded in SUSS MicroTec is a leading supplier of equipment Subsidiary of SHENMAO Technology, Inc. of 1959 in Tokyo and with a strong presence today and process solutions for microstructuring in the Tao Yuan City 328, Taiwan. Shenmao is a global in the semiconductor market, Shinkawa supports semiconductor industry and related markets. leader in manufacturing solder materials for over a diverse network of global customers. Our portfolio covers a comprehensive range of 46 years with ten manufacturing, technical, and products and solutions for backend lithography, sales support facilities located around the world. Booth 220 wafer bonding and photomask processing, SHENMAO America, Inc. blends solder paste in Shinko Electric America complemented by micro-optical components. In San Jose, CA, USA, also supporting a wide range 1280 East Arques Avenue MS 275 close cooperation with research institutes and of products for the Semiconductor Packaging and Sunnyvale, CA 94085 industry partners SUSS MicroTec contributes to PCB Assembly industries. SHENMAO produces Phone: +1-408-838-3336 the advancement of next-generation technologies SMT Solder Paste, Laser Soldering Paste, Fax: +1-408-955-0368 such as 3D Integration and Imprint Lithography as Wave Solder Bar, Solder Wire with/without www.shinko.com well as key processes for WLP, MEMS and LED Flux, Liquid and Paste Flux, Solder Preforms, Contact: Lorne Johnson manufacturing. With its global infrastructure for Semiconductor Packaging Solder Spheres, Wafer Email: [email protected] applications and service, SUSS MicroTec supports Bumping Solder Paste, Dipping Flux, LED Die- SHINKO Electric Industries Co., LTD., is a leading more than 8,000 installed systems worldwide. Bonding Solder Paste, Plating Anode, and Solar manufacturer of products used in the assembly PV Ribbon. 90 % of the largest EMS Companies of IC’s such as Organic Substrates, Etched Booth 501 are valued customers that are continuously using and Stamped Leadframes, TO Packages and TAIYO INK MFG. CO., LTD SHENMAO Technology, Inc. Solder Materials Integrated Heatspreaders. We manufacture a 2675 Antler Drive with great success. OSAT’s, EMS and OEM’s full line of Organic Substrate structures including Carson City, NV 89701 qualify/re-qualify our products for many years. coreless options offering enhanced electrical Phone: +1-619-208-0748 performance and package miniaturization. www.taiyo-hd.co.jp/en/ Booth 306 SHINKO also provides subcontract IC assembly Contact: Yuya Suzuki Shin-Etsu MicroSi, Inc. services with an emphasis on packaging solutions Email: [email protected] 10028 S. 51st St. such as PoP, SiP as well as advanced technologies TAIYO INK MFG. CO., LTD has more than Phoenix, AZ 85044 such as Molded Core Embedded Package 90% market share of solder resist products Phone: +1-480-893-8898 (MCeP®) and Module assembly and test. Our on IC-Packaging industry. TAIYO introduced Fax: +1-480-893-8637 headquarters and primary production plants are two new solder resist products to the market: www.microsi.com in the greater Nagano, Japan area. In addition AUS AZ3 and AUS SR3. AZ3 provides highly Email: [email protected] to our production facilities we also provide the robust TST crack resistance with high Tg, best Shin-Etsu MicroSi, Inc. is a wholly owned ultimate in service and solutions for customers, for large body FCBGA and high temperature subsidiary of Shin-Etsu Chemical Ltd. Shin-Etsu with Sales and Engineering support Worldwide. automotive BGA products. SR3 offers quite low MicroSi is a world class supplier of packaging See us to learn more about our latest product CTE (15-20ppm) with high modulus (>10GPa), materials for the semiconductor industry. With offerings for fine pitch interconnection, being ideal for coreless/thin core applications. a global support network- Sales Engineers, R&D, miniaturization and high density mounting for 3D TAIYO additionally offer a photo-imageable Manufacturing, Quality Assurance, and Logistics- assembly. dry film material with high resolution, PVI-3 we are able to quickly develop and provide new HR100S. PVI-3 HR100S can be applied as a high- technologies to benefit our customers. This Booth 206 density build-up material for BGA substrates/ allows our clients to meet their ever changing SPTS Technologies Ltd interposers, as an insulation material for technical, commercial and environmental needs Ringland Way, Newport, NP18 2TA embedded applications, and as an RDL dielectric by implementing Shin-Etsu MicroSi’s technology. Phone: +0044-1633-414-000 for WLP / PLP products. TAIYO also develops Shin-Etsu MicroSi is known for supplying high www.orbotech.com/spts magnetic ink materials for next generation performance Thermal Interface Materials, Contact: Wendy Davis packaging. For more details, please visit our Underfills, Molding Compounds, High Purity Email: [email protected] booth. Silicone Encapsulants, and Die Attach Materials. SPTS Technologies, an Orbotech company, designs, manufactures, sells, and supports Booth 517 Booth 420 advanced etch, PVD, CVD, and MVD® wafer TATSUTA USA Inc. Shinkawa USA, Inc. processing equipment and solutions for the global 101 Metro Drive, Suite 355 1177 S. Porter Court semiconductor and micro-device industries, San Jose, CA 95110 Gilbert, AZ 85296 with focus on the Advanced Packaging, MEMS, Phone: +1-408-642-1938 Phone: +1-480-831-7988 high speed RF device, power management and Fax: +1-408-982-3391 www.shinkawa.com/en/ LED markets. SPTS also offers Additive Printing www.tatsuta.com Contact: Doug Day solutions for 3D structural printing of dams and Contact: Mike Sakaguchi Email: [email protected] isolating layers for IC packaging and package Email: [email protected] Shinkawa is a leading supplier of flip chip, die, marking. SPTS has manufacturing facilities in TATSUTA is leading provider of EMI shielding and wire bonding equipment. The wide range of Newport, Wales and Allentown, Pennsylvania, conductive material for semiconductor industry. equipment supports various applications including and operates across 19 countries in Europe, TATSUTA provides innovative solutions for automotive, server, mobile, and communication North America and Asia-Pacific. conformal and compartment shielding. TATSUTA devices for the IoT society. For leading edge also provides AIP bonding & printed antenna
40 paste, wafer backside metallization paste, high six regions: Japan, North/central Americas, Encapsulation Equipment for void-free printing, reliability metallizing paste for FMV & TGV filling, south America, Europe, Asia, and China. Wafer Inspection Equipment with high speed, low temperature curable & solderable paste for Threebond offers unique products such as hot and substrate manufacturing equipment such as circuitry printing, low temperature curable 3D water removable temporary bonding adhesive, coating system are lined-up SMT paste, For more details, please visit our UV-curing black adhesive, 60°C x 1 minute curing booth 517. We will provide solutions for your elastic adhesive, moisture blocking adhesive, Booth 505 applications. UV-activated dual curing epoxy, ultra low Towa USA Corporation viscosity (2cP) UV-curing adhesive, high thermally 1430 Tulley Rd. Ste. 416 Booth 304 conductive epoxy, etc. Over 1,600 products will San Jose, CA 95122 TechSearch International Inc. provide solutions to the problems you are facing. Phone: +1-408-779-4440 4801 Spicewood Springs Rd., Ste 150 Ask Threebond if you need any specific adhesives Fax: +1-408-779-4413 Austin, TX 78759 or sealants. www.towajapan.co.jp/en/ Phone: +1-512-372-8887 Contact: Naoki Hamada Fax: +1-512-372-8889 Booth 207 Email: [email protected] www.techsearchinc.com TOK America Towa Corporation is the market leader in Contact: Jan Vardaman, Andrea Myers 190 Topaz St. providing leading edge molding solutions to Email: [email protected] Milpitas, CA 95035 the semiconductor industry. Towa proudly TechSearch International, Inc. has a 30-year Phone: +1-408-934-8904 offers the latest compression mold solutions history of market and technology trend analysis www.tok.co.jp for advanced applications such as wafer level focused on semiconductor packaging, materials, Contact: Yoshi Arai molding, large panel molding, stacked die, TSV, and assembly. Research topics include WLP, Email: [email protected] Molded Underfill and LED’s. Towa’s compression FO-WLP, Flip chip, CSPs including stacked die, TOK’s unique packaging / MEMS manufacturing mold systems have proven to be the most cost BGAs, 3D ICs with TSVs, 2.5D interposers, and technologies, in terms of both materials and effective, technologically advanced solutions System-in-Package (SiP), embedded components, equipment. We have developed and for today’s demanding applications. Towa also ADAS and automotive electronics, and panel- commercialized optimal photoresists and continues to be the leader in transfer mold based processing. In conjunction with SavanSys processing equipment for a range of packaging systems for MCM, BGA, automotive, and Solutions, wire bond, flip chip, WLP, and 3D IC processes. Photoresists for packaging are medical packaging applications. Towa has over 30 cost models are offered. TechSearch International available for a wide range of production years of transformative technological leadership professionals have an extensive network of technologies including wafer-level CSP, SiP, RDL, to support all your packaging needs. more than 18,000 contacts in North America, TAB and COF. We have commercialized thick- Asia, and Europe and travel extensively, visiting film permanent photoresists for MEMS, and Booth 415 major electronics manufacturing operations and developed a non-spin coater that can form thick TRESKY GmbH research facilities worldwide. films capable of highly uniform photoresist coating Neuendorfstrasse 19 B at a 100 μm level with a single application and 16761 Hennigsdorf, Germany Booth 523 a developing machine for thick films. We offer Phone: +49 (0) 3302 866 92-0 Teikoku Taping Systems high quality, most advanced and most effective www.tresky.de/en/ 5090 N 40th St. Ste. 140 processing technologies in the MEMS field as well, Contact: Daniel Schultz Phoenix, AZ 85018 thus widely supporting the miniaturization of Email: [email protected] Phone: +1-602-367-9916 electronic components in terms of both materials TRESKY GmbH in Germany offers state of www.teikoku-taping.com and equipment. the art automated die bonders. The flexible Contact: Robert Garrett platform and open architecture allows every Email: [email protected] Booth 410, 412 possible form of die bonding technology and pick Teikoku Taping System specializes in the design, Toray International America and place process. Including epoxy dispensing, development and manufacture of semiconductor 411 Borel Ave., Suite 520 epoxy stamping, flip chip, thermos-sonic, surface equipment used for taping (“Haru”), de-taping San Mateo, CA 94402 mount and eutectic applications. Magazine to (“Hagasu”) and handling (“Hakobu”) of wafers Phone: +1-650-341-7152 magazine automation is available while special and panels. TTS is the leader in Dry Film Resist Fax: +1-650-341-0845 R&D software also allows you to assembly lamination, as well as the handling of thin wafers www.toray.US/products prototype pieces with very little programming. for back grind tape lamination, UV irradiation, Contact: Hiroyuki Niwa Our flexibility and pricing advantages have removal and mounting to dicing tape on film Email: [email protected] penetrated all markets including Opto-Electronics, frame. Customer support for demos, process Toray Industries is a leading provider for Non- Medical Applications, RF-Wireless, Microwave development, field service are all based in our Conductive Film (NCF) for flip chip packages, and Automotive industries. Manufactured in offices in Phoenix, AZ. and photo-definable adhesive film for build-up Germany to the highest standards and supported substrates and packages with cavity structure. in America by the West Coast and East Coast Booth 115 Toray’s unique polyimide and film processing sales, demo and service offices. We welcome you ThreeBond International, Inc. technologies provide excellent reliability and to our ECTC booth. 6184 Schumacher Park Dr. performance which are already proven in the West Chester, OH 45069 market. “Photoneece” is Toray’s photo-definable Phone: +1-408-638-7091 polyimide coatings for front-end buffer layer Fax: +1-513-779-7375 and back-end re-distribution layer for WLP www.threebond.com and TSV. We also offer a newly developed Contact: Kensuke Kitamura “Photoneece” LT-series, which enables low Email: [email protected] temperature cure with low residual stress for Since founded in 1955 in Japan, Threebond has minimum wafer warpage. Toray Engineering Co., been offering the adhesive/sealant products Ltd. provides state-of-the-art Flip Chip Bonding globally with its cutting-edge technologies. Equipment for semiconductor packaging with Threebond has developed networks across alignment accuracy from +/-0.5um. And Vacuum
41 Booth: 522 world, including smartphones, tablets, laptops, Booth 313 Trymax Semiconductor Equipment PCs and data center servers. Invensas tech- Yole Développement BV nologies include ZiBond®, a low temperature Le Quartz – 75 cours Emile Zola Roggeweg 26B wafer-to-wafer or die-to-wafer bonding, Direct 69100 Lyon-Villeurbanne, France 6534AJ Nijmegen, The Netherlands Bond Interconnect (DBI®) wafer-to wafer or Phone: +33-472-83-01-80 Phone: +31 24 350 0809 die-to-wafer or die-to-die bonding with electrical Fax: +33-472-83-01-83 www.trymax-semiconductor.com interconnect, and other chip-scale and multi- www.yole.fr Email: [email protected] chip packaging technologies. Contact Fanny Vit Trymax’s core business is to support Email: [email protected] semiconductor manufacturers through the world Booth 209 Founded in 1998, Yole Développement has with innovative plasma-based solutions for XYZTEC grown to become a group of companies photo resist removal, surface cleaning, as well 55 Sterling Street providing marketing, technology and strategy as isotropic etch, that are used in the fabrication Clinton, MA 01510 consulting, media and corporate finance services. of integrated circuits and other semiconductor Phone: +1-978-880-2598 With a strong focus on emerging applications devices. Trymax is a privately held company www.xyztec.com using silicon and/or micro manufacturing, headquartered in Nijmegen, The Netherlands. Contact: Tom Haley Yole Group has expanded to include more Trymax operates regional offices in China Email: [email protected] than 80 collaborators worldwide covering (Suzhou) and Italy (Milan). Learn more at www. XYZTEC, Inc. is the technology leader in Semiconductor & Software, Power & Wireless, trymax-semiconductor.com. bond testing. We are constantly innovating a Photonics, Sensing & Display, Life Sciences & technology that has been basically unchanged Healthcare. Yole and its partners System Plus Booth 104 for many years. Our award winning Condor Consulting, KnowMade, Blumorpho and Piséo Unisem Sigma includes a Rotating Measurement unit that support industrial companies, investors and R&D 2241 Calle de Luna allows operators to change between 6 different organizations worldwide to help them understand Santa Clara, CA 95054 tests with a simple mouse click. Our automation markets and follow technology trends to develop Phone: +1-408-734-3222 software now includes a wire detection function their business. CONSULTING: Market data & Fax: +1-408-562-9971 that allows complete hands off wire pull testing research, marketing analysis; Technology analysis; www.unisemgroup.com and our auto grading capability makes shear- Reverse engineering & costing services; Strategy Contact: Gil Chiu testing extremely fast and reliable. consulting; Patent analysis; Financial services. Email: [email protected] REPORTS: Collection of technology & market Unisem is a global provider of semiconductor Booth 219 reports; Manufacturing cost simulation tools; assembly and test services for many of the Yield Engineering Systems Component reverse engineering & costing world’s most successful electronics companies. 203A Lawrence Drive analysis; Patent investigation; Cost simulation Unisem offers an integrated suite of packaging Livermore, CA 94551 tool. MEDIA: i-Micronews.com; @Micronews, and test services such as wafer bumping, Phone: +1-925-373-8353 weekly e-newsletter; Communication & webcasts wafer probing, wafer grinding, a wide range of www.yieldengineering.com services; Events: Yole Seminars, Market Briefing. leadframe and substrate IC packaging, wafer level Contact: Joe Simas CSP and RF, analog, digital and mixed-signal test Email: [email protected] Booth 101 services. Our turnkey services include design, Yield Engineering Systems (YES) supplies the ZEISS assembly, test, failure analysis, and electrical and emerging and high-growth market segments 4385 Hopyard Road thermal characterization. With approximately beyond FE semi with the high technology they Pleasanton, CA 94588 7,000 employees worldwide, Unisem has factory require, though at a quantum reduction in Phone: +1-925-701-3600 locations in Ipoh, Malaysia; Chengdu, People’s price and cost of ownership: a unique value www.zeiss.com/pcs Republic of China and Batam, Indonesia. The proposition! Our seamless lab-to-fab “clean, Contact: Victoria Doll company is headquartered in Kuala Lumpur, coat and cure” solutions are empowering our Email: [email protected] Malaysia. customers to create breakthrough technology ZEISS has the most comprehensive portfolio of in a wide range of markets, including Advanced light, X-ray, electron beam and ion beam imaging Booth 504 Packaging, Life Sciences, MEMS, Artificial technologies in the industry and is a leading Xperi - Invensas Intelligence, and AR/VR. From cutting-edge solution provider to the global semiconductor 3025 Orchard Parkway research labs to high-volume manufacturers, our community. Solutions span semiconductor San Jose, CA 95134 Life Sciences users find YES coating systems, manufacturing from wafer fab through packaging Phone: +1-408-321-6000 with their ability to apply uniform monolayers, and assembly. For mask making and lithography, Fax: +1-408-321-8257 valuable in genome sequencing and gene editing ZEISS provides unique solutions in the areas of www.xperi.com applications. Our vacuum cure products, zero defect, in-die metrology, critical dimension/ Contact: Andrew Kim including the YES-VertaCure, continue to support registration and overlay control. ZEISS innovative Email: [email protected] innovation worldwide. And our innovative process control and failure analysis solutions Invensas, a wholly owned subsidiary of Xperi ÉcoClean plasma cleaning system offers high deliver actionable information to both wafer fab Corporation (Nasdaq: XPER), is the world’s reliability, a very low cost of ownership, and a and packaging/assembly processes to meet the leading provider of advanced semiconductor frugal footprint. When the future asks for surface semiconductor industry’s challenges for next- packaging and 3D interconnect technologies modification…YES is the answer! generation devices. that enable the next generation of electronics products to be smaller, faster, lower power and contain more functionality. Invensas solutions can be found in DRAM memories, image sensors, RF devices, MEMS sensors, processors and mixed signal devices currently in high volume production at leading OEMs, ODMs, and IDMs and integrated into in billions of electronic products around the
42 Booth 525 extensive experience, technological expertise and Booth 322 Zuken, Inc. agility, combine to create world-class software Zymet, Inc. 2590 N. First Street solutions. Zuken’s transparent working practices 7 Great Meadow Lane Suite 340 and integrity in all aspects of business produce E. Hanover, NJ 07936 San Jose, CA 95131 long-lasting and successful customer partnerships Phone: +1-973-428-5245 www.zukenusa.com that make Zuken a reliable long-term business Fax: +1-973-428-5244 Contact: Humair Mandavia partner. Zuken is focused on being a long-term www.zymet.com Email: [email protected] innovation and growth partner. The security Contacts: Kelly Nostrame and Karl Loh Zuken is a global provider of leading-edge of choosing Zuken is further reinforced by the Email: [email protected] software and consulting services for system- company’s people— the foundation of Zuken’s Adhesives and encapsulants for electronics and level electrical and electronic design and success. Coming from a wide range of industry optoelectronics assembly. Products include manufacturing. Founded in 1976, Zuken has sectors, specializing in many different disciplines reworkable and non-reworkable underfill the longest track record of technological and advanced technologies, Zuken’s people encapsulants, edgefill adhesives, and edgebond innovation and financial stability in the electronic relate to and understand each company’s unique adhesives for high reliability board level assembly. design automation (EDA) software industry for requirements. Products also include electrically conductive and advanced packaging, printed circuit board design, thermally conductive adhesives, ultralow stress and multi-domain co-design. The company’s adhesives, ACP’s and NCP’s, and UV curable encapsulants.
ECTC SPONSORS With 68 years of history and experience behind us, ECTC is recognized as the premier semiconductor packaging conference and offers an unparalleled opportunity to build relationships with more than 1,500 individuals and organizations committed to driving innovation in semiconductor packaging. We have a limited number of sponsorship opportunities in a variety of packages to help get your message out to attendees. These include Platinum, Gold, Silver, Program, and several other sponsorship options that can be customized to your company’s interest. If you would like to enhance your presence at ECTC and increase your impact with a sponsorship, please take a look at our sponsorship brochure on the website www.ectc.net under “Sponsors.” To sign-up for sponsorship or to get more details, please contact Wolfgang Sauter at [email protected] or +1-802-922-3083.
43 2019 Executive Committee 2019 Program Committee Wei Koh Pacrim Technology General Chair Applied Reliability Mark Poliks Chair Ming Li Binghamton University Deepak Goyal ASM Pacific Technology [email protected] Intel Corporation Debendra Mallik [email protected] Intel Corporation Vice-General Chair Assistant Chair Christopher Bower Jae-Woong Nah Darvin R. Edwards IBM Corporation X-Celeprint Inc. Edwards Enterprise Consulting, LLC [email protected] [email protected] Valerie Oberson IBM Canada Ltd Program Chair Tim Chaudhry Amkor Technology, Inc. Chandradip Patel Nancy Stoffel Schlumberger Technology Corporation GE Research Tz-Cheng Chiu [email protected] National Cheng Kung University Shichun Qu Intersil, a Renesas Company Assistant Program Chair Vikas Gupta Texas Instruments, Inc. Paul Tiner Rozalia Beica Texas Instruments DuPont Sandy Klengel Andy Tseng [email protected] Fraunhofer Institute for Microstructure of Materials and Systems JSR Micro Web Administrator Pilin Liu Jan Vardaman Ibrahim Guven Intel Corporation Techsearch International Virginia Commonwealth University CHS-263 Yu Wang [email protected] Varughese Mathew Sensata Technologies Jr. Past General Chair NXP Semiconductors Shaw Fong Wong Sam Karikalan Toni Mattila Intel Corporation Broadcom Inc. Aalto University Wei Xu [email protected] Keith Newman Huawei Sr. Past General Chair AMD Tonglong Zhang Henning Braunisch Donna M. Noctor Nantong Fujitsu Microelectronics Ltd. Intel Corporation Nokia Emerging Technologies [email protected] S. B. Park Chair Binghamton University Florian Herrault Sponsorship Chair HRL Laboratories, LLC Wolfgang Sauter Lakshmi N. Ramanathan [email protected] Microsoft Corporation GLOBALFOUNDRIES Assistant Chair [email protected] René Rongen Benson Chan NXP Semiconductors Binghamton University Finance Chair Scott Savage [email protected] Patrick Thompson Medtronic Microelectronics Center Isaac Robin Abothu Texas Instruments, Inc. Siemens Healthineers [email protected] Jeffrey Suhling Auburn University Meriem Akin Publications Chair Pei-Haw Tsao Robert Bosch GmBH Steve Bezuk Taiwan Semiconductor Manufacturing Company, Vasudeva P. Atluri [email protected] Ltd. Renavitas Technologies Publicity Chair Dongji Xie Karlheinz Bock Eric Perfecto NVIDIA Corporation Technische Universitat Dresden [email protected] Assembly & Manufacturing Technology Vaidyanathan Chelakara Chair Acacia Communications Treasurer Mark Gerber Tom Reynolds Advanced Semiconductor Engineering Inc. Rabindra N. Das T3 Group LLC [email protected] MIT Lincoln Labs [email protected] Assistant Chair Dongming He Qualcomm Technologies, Inc. Exhibits Chair Jin Yang Joe Gisler Intel Corporation TengFei Jiang [email protected] University of Central Florida Vector Associates [email protected] Sai Ankireddi Jong-Hoon Kim Soraa, Inc Washington State University Vancouver Exhibits Co-Chair Christo Bojkov Ahyeon Koh Alan Huffman Qorvo Binghamton University Micross Advanced Interconnect Technology Garry Cunningham Ramakrishna Kotlanka [email protected] JHU/APL Analog Devices Arrangements Chair Habib Hichri Santosh Kudtarkar Lisa Renzi Ragar Suss Microtech Photonic Systems Inc. Analog Devices Renzi & Company, Inc. Paul Houston Kevin J. Lee [email protected] Engent Qorvo Corporation EPS Representative Li Jiang Zhuo Li C. P. Wong Texas Instruments Fudan University Georgia Institute of Technology Chunho Kim Chukwudi Okoro 44 [email protected] Medtronic Corporation Corning Bharat Penmecha Li-Cheng Shen Materials & Processing Intel Corporation Wistron NeWeb Corporation Chair Mikel Miller C. S. Premachandran Jaemin Shin EMD Performance Materials GLOBALFOUNDRIES Qualcomm Corporation [email protected] Jintang Shang Manos M. Tentzeris Assistant Chair Southeast University Georgia Institute of Technology Tanja Braun Rohit Sharma Maciej Wojnowski Fraunhofer IZM IIT Ropar Infineon Technologies AG [email protected] Nancy Stoffel Yong-Kyu Yoon Yu-Hua Chen GE Research University of Florida Unimicron Interconnections Qianwen Chen Liu Yang IBM Research IBM Chair Wei-Chung Lo Bing Dang Jimin Yao ITRI IBM Research Intel Corporation [email protected] Yung-Yu Hsu W. Hong Yeo Assistant Chair Apple Inc. Georgia Institute of Technology Dingyou Zhang Broadcom Inc. Lewis Huang Hongqing Zhang [email protected] Senju Electronic IBM Corporation Thibault Buisson C. Robert Kao High-Speed, Wireless & Components Yole Développement National Taiwan University Chair Jian Cai Chin C. Lee Wendem Beyene University of California, Irvine Intel Corporation Tsinghua University [email protected] William Chen Alvin Lee Brewer Science Assistant Chair Advanced Semiconductor Engineering, Inc. Lianjun Liu Yi (Grace) Li David Danovitch Intel Corporation NXP Semiconductor, Inc. University of Sherbrooke [email protected] Ziyin Lin Rajen Dias Intel Corporation Amit P. Agrawal Amkor Technology, Inc. Microsemi Corporation Yan Liu Bernd Ebersberger Medtronic Inc. USA Kemal Aygun Infineon Technologies Intel Corporation Daniel D. Lu Takafumi Fukushima Henkel Corporation Eric Beyne Tohoku University IMEC Joon-Seok Oh Tom Gregorich Samsung Electro-Mechanics Prem Chahal Zeiss Semiconductor Manufacturing Technology Michigan State University Praveen Pandojirao-S Kangwook Lee Johnson & Johnson Zhaoqing Chen Amkor Technology Korea Mark Poliks IBM Corporation Steward Lee Binghamton University Charles Nan-Cheng Chen Li Li Dwayne Shirley HiSilicon Technologies Cisco Systems, Inc. Inphi Craig Gaw Changqing Liu Ivan Shubin NXP Semiconductor Loughborough University Oracle Abhilash Goyal Nathan Lower Bo Song Velodyne LIDAR, Inc. Rockwell Collins, Inc. HP Inc. Xiaoxiong (Kevin) Gu James Lu Yoichi Taira IBM Corporation Rensselaer Polytechnic Institute Keio University Rockwell Hsu Voya Markovich Lejun Wang Cisco Systems, Inc. Microelectronic Advanced Hardware Consulting, Qualcomm Technologies, Inc. LLC Lih-Tyng Hwang Frank Wei National Sun Yat-Sen University Lou Nicholls Disco Japan Amkor Technology, Inc. Bruce Kim Kimberly Yess City University of New York Peter Ramm Brewer Science Fraunhofer EMFT Timothy G. Lenihan Myung Jin Yim TechSearch International Katsuyuki Sakuma Apple IBM Corporation Hongbin Yu Rajen M Murugan Arizona State University Texas Instruments Lei Shan IBM Corporation Packaging Technologies Nanju Na Chair Xilinx Ho-Young Son SK Hynix Dean Malta Dan Oh Micross Advanced Interconnect Technology Jean-Charles Souriau [email protected] Samsung CEA Leti Assistant Chair P. Markondeya Raj Chuan Seng Tan Florida International University Luke England Nanyang Technological University GLOBALFOUNDRIES Hideki Sasaki Matthew Yao [email protected] Renesas Electronics Corporation GE Energy Management Daniel Baldwin H.B. Fuller Company 45 Bora Baloglu Takaaki Ishigure Erkan Oterkus Amkor Technology Keio University University of Strathclyde Jie Fu Ajey Jacob Sandeep Sane Apple GLOBALFOUNDRIES Intel Corporation Mike Gallagher Soon Jang Suresh K. Sitaraman DuPont ficonTEC USA Georgia Institute of Technology Ning Ge Harry G. Kellzi Consultant Teledyne Microelectronic Technologies Wei Wang Qualcomm Technologies, Inc. Allyson Hartzell Richard Pitwon Veryst Engineering Resolute Photonics Ltd G. Q. (Kouchi) Zhang Kuldip Johal Alex Rosiewicz Delft University of Technology (TUD) Atotech A2E Partners Tieyu Zheng Beth Keser Henning Schroeder Microsoft Corporation Intel Corporation Fraunhofer IZM Jiantao Zheng Young-Gon Kim Andrew Shapiro Hisilicon Integrated Device Technology, Inc. JPL Andrew Kim Interactive Presentations Masato Shishikura Chair Intel Corporation Oclaro Japan Michael Mayer John Knickerbocker Masao Tokunari IBM Corporation University of Waterloo IBM Corporation [email protected] Albert Lan Shogo Ura Applied Materials Assistant Chair Kyoto Institute of Technology John H. Lau Pavel Roy Paladhi Stefan Weiss ASM Pacific Technology IBM Corporation II-VI Laser Enterprise GmbH [email protected] Jaesik Lee Feng Yu Nvidia Swapan Bhattacharya Huawei Technologies Japan Markus Leitgeb Engent Inc. AT&S Thomas Zahner OSRAM Opto Semiconductors GmbH Rao Bonda Luu Nguyen Amkor Technology Texas Instruments Inc. Thermal/Mechanical Simulation & Characterization Mark Eblen Deborah S. Patterson Chair Kyocera International SC Harbor Electronics, Inc. Przemyslaw Gromala Raj Pendse Robert Bosch GmbH Ibrahim Guven Facebook FRL (Facebook Reality Labs) [email protected] Virginia Commonwealth University Subhash L. Shinde Assistant Chair Alan Huffman Notre Dame University Ning Ye Micross Advanced Interconnect Technology Western Digital Joseph W. Soucy [email protected] Jeffrey Lee Draper Laboratory iST-Integrated Service Technology Inc. Peng Su Christopher J. Bailey Nam Pham Juniper Networks University of Greenwich IBM Corporation Kuo-Chung Yee Kuo-Ning Chiang Taiwan Semiconductor Manufacturing National Tsinghua University Mark Poliks Corporation, Inc. Xuejun Fan Binghamton University Christophe Zincke Lamar University Patrick Thompson Advanced Semiconductor Engineering, Inc. Nancy Iwamoto Texas Instruments, Inc. Honeywell Performance Materials and Photonics Kristina Young-Fisher Chair Technologies GLOBALFOUNDRIES Ping Zhou Pradeep Lall LDX Optronics, Inc. Auburn University Professional Development Courses [email protected] Chair Chang-Chun Lee Assistant Chair National Tsing hua University (NTHU) Kitty Pearsall Z. Rena Huang Boss Precision, Inc. Yong Liu Rensselaer Polytechnic Institute [email protected] [email protected] ON Semiconductor Assistant Chair Mark Beranek Sheng Liu Jeffrey Suhling Naval Air Systems Command Wuhan University Auburn University Erdogan Madenci Stephane Bernabe [email protected] CEA Leti University of Arizona Fuad Doany Tony Mak Deepak Goyal IBM Research Wentworth Institute of Technology Intel Corporation Gordon Elger Karsten Meier Lakshmi N. Ramanathan 46 Technische Hochschule Ingolstadt Technische Universität Dresden Microsoft Corporation First Call for Papers
IEEE 70th Electronic Components and Technology Conference www.ectc.net To be held May 26 - May 29, 2020 at The Swan and Dolphin of Orlando, Florida, USA The Electronic Components and Technology Conference (ECTC) is the premier international electronics symposium that brings together the best in packaging, components and microelectronic systems science, technology and education in an environment of cooperation and technical exchange. ECTC is sponsored by the Electronics Packaging Society (EPS) of the IEEE. You are invited to submit abstracts that provide non commercial information on new developments, technology and knowledge in the areas including, but not limited to as given below under each technical program subcommittee name. Authors are encouraged to review the sessions of the previous ECTC programs to determine the committee selection for their abstracts.
Applied Reliability Materials & Processing Reliability of TSV, 2.5D, 3D, fan-out, WLCSP, WLFO, PLFO, SiP Wafer & panel level packaging materials; Materials for harsh & MCM; Interconnect reliability in flip chip, BGA and wire bond environments; Packaging substrates; Flexible, stretchable, & wearable packages; Emerging product reliability including LED, IoT and electronics; Wafer bond/debond materials; TSV; Emerging electronic autonomous vehicles, medical/wearable electronics; Novel reliability materials & processes; Novel solder metallurgies; Dielectrics and test methods, life models, FA techniques & materials characterization; under-fills; Molding compounds; Thermal interface materials; Advanced Drop/dynamic mechanical reliability; Reliability of boards, systems, wirebonding, conductive adhesives automotive & harsh environments Packaging Technologies (formerly Advanced Packaging) Assembly and Manufacturing Technology Architectures, methods, and applications for Fan-out, wafer & panel Advanced solutions in Packaging & Assembly Technology for level packaging; 2.5 & 3D, TSV & interposer; Heterogeneous and mainstream products (Advanced Substrate Enabling Solutions, microsystem integration; Embedded & advanced substrates; Advanced WLP, FOWLP, Fine Pitch (TSV), Cu pillar, Embedded Devices) flip-chip SiP, CSP, PoP, MEMS, sensors & loT; Automotive & power like Laser Assisted Bonding, warpage control solutions, etc.; electronics; Bio, medical, & wearable packaging. 2.5D/3D integration/high density pkg assembly technology; Packaging and Assembly methods/advancement in new and unique Photonics markets/applications like Wearables electronic, Medical & Health Integrated photonic circuits, chips, wafer & panel level; Semiconductor pkg.; Manufacturing Automation and Process Improvement for lasers & Novel LEDs; Silicon & III-V photonics; Optical sensors and semiconductor pkg/assembly; Trends in Predictive Assembly quantum sensing; Photonic SiP; Optical interconnects, interposers, Modeling: Approach & Validation waveguide and circuit boards technologies; Micro-optical systems; 3D photonics; Free space optical communications; Automotive photonics, Emerging Technologies LiDAR, 3D-Sensing; Optoelectronic assembly, materials and reliability. Focus on nascent technologies, approaches and applications for: photovoltaics and heterogeneous integration; Security, anti- Thermal/Mechanical Simulation & Characterization tampering, smart electronics; Packaging for Quantum, neuromorphic, Component, board & system level modeling for microelectronics; Superconducting Electronics or Artificial intelligence; Nano-Packaging; 3D/2.5D; TSV; Interposer; SiP; WLP; BGA; Embedded actives/ Additive Manufacturing, Lab-on-Chip; Wearable and implantable passives; Power modules; LEDs; MEMS; Thin wafer/die handling; medical electronics; Flexible, stretchable, disposable, dissolvable, self- Wire bonding & assembly processes; Modeling of fracture mechanics, healing packaging; Emerging MEMS & NEMS fatigue, electro-migration, warpage, delamination, drop test & material attributes; Novel modeling including multi-scale and multi-physics; Novel High-Speed, Wireless & Components characterization methodologies. Electrical modeling, multi-physics simulation and characterization of Interconnects, components, modules, heterogeneous systems; High- Interactive Presentations speed and wireless electronics from digital to analog to RF/microwave, Highly encouraged at ECTC, presenter and attendee often millimeter wave to THz; IoT, 5G; Energy efficient computing cloud, communicate more efficiently here than in oral presentations. Abstracts data center, autonomous vehicles, AI, and machine learning; Antenna in can relate to any electronics packaging topic. Interactive presentation package, wireless interconnects, wireless power transfer. session papers are published and archived in equal merit with the other Interconnections ECTC papers. Interconnections for fan-out & fan-in wafers & panels; Interconnects and TSV for 2.5D/3D, SiP, Si/glass/organic interposers, PoP & WLP; Flip chip, solder bumping, Cu pillar & thermocompression bonding technology; IMC interfaces, wirebonds & conductive adhesives; Interconnects for bio-medical, automotive, datacenters, cloud, network and harsh environments.
You are invited to submit an abstract of no more than 750 words that describes the Professional Development Courses scope, content, and key points of your proposed paper via the website at www. In addition to abstracts for papers, proposals are solicited from individuals interested ectc.net. in teaching educational professional development courses (4 hours) on topics described in the Call for Papers. Using the format “Course Objectives/Course If you have any questions, contact: Outline/Who Should Attend,” 200-word proposals must be submitted via the Rozalia Beica, 70th ECTC Program Chair website at www.ectc.net by October 16, 2019. DuPont Corporation If you have any questions, contact: [email protected] Kitty Pearsall 70th ECTC Professional Development Courses Chair Abstracts must be received by October 6, 2019. All abstracts must be submitted Boss Precision, Inc. electronically at www.ectc.net. You must include the mailing address, business 1806 W. Howard Lane, Austin, TX 78728, USA telephone number, and email address of presenting author(s) and affiliations of all Phone: +1-512-845-3287 authors with your submission. E-mail: [email protected]
47 CONFERENCE SPONSORS PLATINUM
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50 70TH ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE
Walt Disney World Swan & Dolphin Resort Lake Buena Vista, Florida • May 26-29, 2020
The fun and splendor of Walt Disney World and the Marketplace. Downtown Disney’s West Side showcases greater Orlando area awaits you in 2020. In the heart top-notch restaurants, a 24-screen AMC Pleasure Island of the Walt Disney World® Resort, the award-winning movie theater, and other uncommon shops. Here Walt Disney World Swan and Dolphin Resort is your you’ll also find the exquisite Cirque du Soleil La Nouba gateway to Central Florida’s greatest theme parks and live entertainment show and the DisneyQuest Indoor attractions. The resort is located in between Epcot® Interactive theme park. and Disney’s Hollywood StudiosTM, and nearby Disney’s Animal Kingdom® Theme Park and Magic Kingdom® Downtown Disney Marketplace provides an appealing Park. Come discover our 17 world-class restaurants and place to take a break from Disney Theme Parks and lounges, sophisticated guest rooms with Westin Heavenly Water Parks. Check out the largest Disney character Beds® and the luxurious Mandara Spa. Enjoy five pools, store in the world. Or, for more of a respite, relax and two health clubs, tennis, nearby golf, and many special dine at a lakeside restaurant. Disney benefits, including complimentary transportation Should you decide to explore outside the Greater to Walt Disney World Theme Parks and Attractions, and Lake Buena Vista area, Orlando boasts other parks the Extra Magic Hours benefit. and recreation areas tailor made for whatever your Just minutes from the Walt Disney World Swan and pleasure. Favorites include Universal Orlando, SeaWorld, Dolphin Resort is Downtown Disney’s West Side and Gatorland, and Winter Park.
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