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ON Semiconductor Is ON Semiconductor Is Now To learn more about onsemi™, please visit our website at www.onsemi.com onsemi and and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of onsemi product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. onsemi reserves the right to make changes at any time to any products or information herein, without notice. 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AND9129/D Understanding a Digital Transistor Datasheet http://onsemi.com APPLICATION NOTE Introduction Maximum Ratings This application note will describe the common Below is the maximum ratings table that can be found in specifications of a Digital Transistor. It will also show how every Digital Transistor datasheet. to use these specifications to successfully design with a Table 1. MAXIMUM RATINGS Digital Transistor. Parameters from the DTC114E/D datasheet will be used to help with explanations. This Rating Symbol Max Unit datasheet describes a Digital Transistor that has an input Collector−Base Voltage VCBO 50 Vdc resistor, R1, equal to 10 kW and a base−emitter resistor, R2, Collector−Emitter Voltage V 50 Vdc equal to 10 kW. Figure 1 gives a labeled schematic of a CEO Digital Transistor. These labels will be used throughout this Collector Current – Continuous IC 100 mAdc application note. Input Forward Voltage VIN(fwd) 40 Vdc Input Reverse Voltage VIN(rev) 10 Vdc Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. The first spec, VCBO, states that the maximum voltage that can be applied from the collector to the base is 50 V. The Collector−Emitter Voltage, VCEO, spec states the maximum voltage that can be applied from the collector to emitter is Figure 1. Labeled Schematic 50 V. In addition, the table specifies that the maximum DC For Digital Transistors it is important to realize that the collector current (IC) that the device can conduct is 100 mA. transistor and resistor network is considered as one unit. An There are two maximum ratings for the input voltage, example of this is the ICBO parameter. Looking at this forward and reverse. The input voltage is defined as the parameter one would think that it is not possible. How could voltage applied from the base and the emitter. The maximum the emitter be open when R2 connects the emitter and base input forward voltage is determined from the power of the transistor? Shouldn’t it be ICER? The answer is yes R2 capabilities of the input resistor, R1. Figure 3 and Equations connects the emitter and base of the transistor, but this 1 and 2 describe how the maximum input forward voltage is connection is built into the device. What is considered the calculated when the maximum power capability of R1 is emitter and base of the Digital Transistor is left open. In the 220 mW. It is important to use the minimum value of R1 case of a Digital Transistor ICER would mean that there is an because it will cause the greatest power to be dissipated on the additional resistor placed between the emitter and base of the die. The minimum value of R1 can be found in the Electrical digital transistor. Figure 2 shows the difference between Characteristics Table of every Digital Transistor datasheet. In ICBO and ICER when referring to Digital Transistors. this case R1(min) = 7 kW. The resulting maximum input forward voltage is 40 V. For this particular device a voltage greater than this would result in the resistor failing. Figure 2. ICBO vs. ICER © Semiconductor Components Industries, LLC, 2013 1 Publication Order Number: December, 2013 − Rev. 1 AND9129/D AND9129/D For ICBO and ICEO, one can expect the leakage current to be below the value that is stated on the datasheet when a reverse voltage is applied between the respective junctions. However, IEBO is dependent on both the input resistor and the base−emitter resistor. The resistor network path is significantly less resistive then the path through the reversed biased base−emitter junction. Ohm’s Law is used to determine the IEBO value. An example for a Digital Transistor with R1(min) = 7 kW, R2(min) = 7 kW, and a VEB = Figure 3. Input Forward Voltage 6 V is shown below. It is important to note that the minimum 2 ǒV Ǔ value of 7 kW was used instead of 10 kW. This is done + R1 ³ + Ǹ PR1 VR1 PR1 R1 because it will estimate the largest possible leakage. R1 Ǹ 6V + + (eq. 1) I + + 0.43 mA (eq. 5) 0.220 7000 39.3 V EBO 7kW ) 7kW + ) + ) + VIN(max) VR1 VBE 39.3 0.7 40 V (eq. 2) Digital Transistors only specify the collector−base, The maximum input reverse voltage is determined by the V(BR)CBO, and collector−emitter, V(BR)CEO, breakdown breakdown voltage of the base−emitter junction and the voltages. These ensure that the device will have a resistor network. The equivalent circuit in Figure 4 can be breakdown voltage above the specified value. drawn when analyzing the maximum input reverse voltage The second section of the Electrical Characteristics Table and is justified by Equation 3. Looking at Figure 4 one sees describes specs for when the digital transistor is ON. Table that it is just a simple voltage divider. The voltage divider 2 will be used as an example to help explain the following equation is shown in Equation 4. In applications where a parameters. First, the DC Current Gain, hFE, is a large reverse voltage will be applied to the base−emitter specification of how much the base current will be amplified junction it is recommended to use a Digital Transistor with in resulting collector current. The hFE spec states that with an I = 5.0 mA and a V = 10 V one can expect the gain to a small R2 and large R1. This will cause the majority of the C CE be around 60, but is ensured that it will be above 35. This voltage to be dropped across R1, thus a smaller voltage will means that the base current, I , will need to be 83 mA if the be dropped across R2 and consequently the base−emitter B typical gain of 60 is used. junction. The worst case for this spec is when R1 is at its minimum value and R is at its maximum value. I 5mA 2 + C + + m IB 83 A (eq. 6) hFE 60 The next parameter is the Collector−Emitter Saturation Voltage, VCE(sat). This parameter tells the designer the maximum voltage drop that will occur when the device is ON. In this instance a maximum of 250 mV will be dropped across the transistor when the IC = 10 mA and the base is driven with 0.3 mA (hFE = 33). The hFE spec can be seen as a threshold current ratio of base drive to collector current. If the base current is greater than the collector current divided Figure 4. Input Reverse Voltage Equivalent Circuit by the hFE spec then the transistor begins to saturate and the *1 collector−emitter voltage drops to the saturation voltage. + ńń + ǒ 1 ) 1 Ǔ In most cases a Digital Transistor will be used as a switch. REquivalent RBE R2 RBE R2 There are four parameters that characterize this operation: Input Voltage (off), Input Voltage (on), Output Voltage (on), 1 1 1 When R ơ R , ) + (eq.
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