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Real-Time Baseband Processing Architectures for Wireless MIMO Communication Systems

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Real-Time Baseband Processing Architectures for Wireless MIMO Communication Systems Real-Time BaseBand Processing Architectures for Wireless MIMO Communication Systems Thanasis Karachalios Department of Physics National and Kapodistrian University of Athens This dissertation is submitted for the degree of Doctor of Philosophy National and Kapodistrian University of Athens 2017 Copyright ©2017 Thanasis Karachalios All rights reserved. PhD Dissertation Real-Time BaseBand Processing Architectures for Wireless MIMO Communication Systems Thanasis Karachalios (R.N.: 2008-525) Three-Member Advisory Committee: Manolis Tsilis (Assist. Prof. NKUA) [Supervisor] Dionysis Reisis (Assoc. Prof. NKUA) Aggelos Katsaggelos (Prof. NKUA) Seven-Member Examination Committee: Manolis Tsilis, Elias Manolakos, Assist. Prof. NKUA Prof. NKUA Dionysis Reisis, Dimitrios Soudris, Assoc. Prof. NKUA Assoc. Prof. NTUA Aggelos Katsaggelos, Konstantinos Nikitopoulos, Prof. NKUA Assist. Prof. Surrey Univ. (UK) Andreas Polydoros, Prof. NKUA Examination Date: September 4, 2017 Didaktορική Διατριβή Arqitektonikèc H/U Πραγματικού Χρόnou gia EpexergasÐa Dedomènwn Βασικής Z¸nhc se Ασύρματa Thlepikoiνωνιακά Συστήματa Pollapl¸n Kerai¸n Αθανάσιoc Καραχάλιoc (A.M.: 2008-525) Τριμελής Συμβουλευτική Epiτροπή: TsÐlhc Man¸lhc (Epik. Kaj. EKPA) [Epiblèpwn] Ρεΐshc Dioνύσης (An. Kaj. EKPA) Κατσάγγελος 'Aggeloc (Kaj. EKPA) Eptαμελής Exetαστική Epiτροπή: TsÐlhc Man¸lhc, Μανωλάκος HlÐac, Epik. Kaj. EKPA Kaj. EKPA Ρεΐshc Dioνύσης, Σούντρης Δημήτριoc, An. Kaj. EKPA An. Kaj. EMP Κατσάγγελος 'Aggeloc, Nikitόποuloc KwnstantÐnoc, Kaj. EKPA Epik. Kaj. Pan. Surrey (UK) Andrèac Poλύδωρος, Kaj. EKPA HmeromhnÐa Exètashc: 4 SeptembrÐou, 2017 To my parents and my teachers ... EuqaristÐec Ja ήθελα na euqariστήσω ton k. Ρεΐsh gia th poλύχροnh kai poλύτιμη καθοδήγησή, βοήθεια kai gn¸sh kaj¸c epÐshc kai thn amèristh υποστήριξή tou από ta pr¸ta mou χρόnia sto τμήμα Φυσικής. Epiplèon, ton k. TsÐlh kai ton k. Κατσάγγελο kaj¸c kai ta υπόloipa mèlh thc exetαστικής epiτροπής gia tic poλύτιμες kai epoikodomhtikèc epiσημάνσειc touc. Touc sunadèlfouc mou sto erg. “Melèthc kai Ανάπτυξης Yhfiak¸n Συστημάτwn” tou tm. Φυσικής gia thn poλυετή epituqhmènh sunergasÐa mac kai tic poλύωρες συζητήσειc mac... Tèloc ja ήθελα na euqarisτήsw thn oikoγένειά mou kai th Μαριάννα gia thn υποστήριξη kai thn upomonή tόσων χρόnwn... Abstract Multiple-Input Multiple-Output (MIMO) communication is a rapidly developing wireless technology which promises increased data-rates and link reliability with mobility and high quality-of-service (QoS) for multiple users. Several antennas at both transmitter and re- ceiver increase the channel capacity with efficient bandwidth utilization, due to multiple data transmission over the same frequency bands. MIMO technologies, in combination with the Orthogonal Frequency Division Multiplexing (OFDM) modulation, have been adopted by many wireless standards such as WiFi (IEEE-802.11n/ac), Long Term Evolution (3GPP- LTE) and WiMAX (IEEE-802.16e) and they expected to play a key role in the upcoming WiFi (IEEE-802.11ax) standard and in the fifth generation (5G) mobile phone systems. Nevertheless, the advantages provided by MIMO technologies come at the expense of a substantial increase in the complexity mainly of the receiver, but in some cases also in the transmitter side, which has a major impact on the implementation cost and power consump- tion of MIMO-OFDM systems. The modern integrated circuits has increased transistor capacity due to the advanced sub- micron technology, which provide the flexibility to design a single chip to support multiple protocols, with a Software Defined Radio (SDR) architecture. In a SDR system the com- putational intensive and time-critical processes are mapped to hardware accelerator units, which should have various operational modes and run-time reconfigurations to support the system requirements of multiple protocols. Furthermore, these hardware units should have increased scalability, low complexity and implementation cost and reduced power consump- tion to support SDR systems running on battery. Therefore, the design of low-complexity and power optimal SDR and MIMO architectures is an important issue, which is tackled throughout this thesis. The first part of this dissertation presents the state of the art FFT architectures forOFDM x systems with multiple data streams (MIMO-OFDM). A detailed analysis in terms of com- plexity, scalability, implementation cost and power consumption is presented and the possi- bility of SDR support is investigated, for these architectures. A novel memory-based FFT architecture is proposed with increased scalability and support for operation on advanced SDR systems. The efficient conflict-free addressing scheme reduces the complexity ofthe interconnection network and the memory requirements of the FFT processor, resulting in a low implementation cost and power consumption, even in the case of continuous-flow operation. The reconfigurable architecture can be tailored to match any SDR systemre- quirements, while a scheduling mechanism can be used to optimize the processing latency of the FFT processor, based on run-time parameters. In the second part of this thesis MIMO detection architectures are investigated, in terms of complexity and error-rate performance. The computationally intensive task of tree node enumeration on sphere decoders is analyzed and the state of the art algorithms are presented, for the cases of hard decision detection and detection with the use of soft information. An advanced enumeration technique is proposed, for hard or soft sphere decoders, which can guarantee the optimal detection for all scenarios and channel conditions. The proposed method is based on a predefined visiting order, a single distance calculation unit and atuned pruning metric, which increases the number of visiting nodes but with low computational requirements per node and reduced total complexity, for the detection process. The archi- tecture of the proposed method is presented and the ASIC and FPGA implementation is compared with implementations of the state of the art optimal enumeration algorithms. The efficient architecture of the proposed technique leads to reduced implementation costand power consumption, resulting in its potential use in more complex MIMO-OFDM systems. SUBJECT AREA: Real-Time and Parallel Baseband Architectures, MIMO-OFDM Base- band Processing KEYWORDS: Real-Time MIMO Baseband Architectures, FFT processor, Parallel FFT Architectures, MIMO Detection, Sphere Decoder PerÐlhyh H χρήση pollapl¸n kerai¸n se ασύρματa thlepikoiνωνιακά susτήματa eÐnai mia άκρως αναπτυσσόμενη teqnologÐa h opoÐa υπόσχετai auxhmènh tαχύτητa metαφοράς dedomènwn kai αξιόπιsth διασύνδεση, gia μεγαλύτερο ariθμό qrhst¸n me beltiwmènh ποιόthta uphresi¸n. H pio apodoτική χρήση tou εύροuc z¸nhc odhgeÐ se auxhmènh χωρητικόthta kanaliού, me dedomènh th poλλαπλή χρήση twn Ðdiwn suqnoτήτwn, gia th metάδοση de- domènwn. H teqnologÐa pollapl¸n kerai¸n metάδοshc kai λήψης (MIMO), se sund- υασμό me th διαμόρφωση orjog¸niac poluplexÐac συχνόthtac (OFDM) èqei uiojeth- jeÐ από poλλά σύγχροna prwtόκοlla ασύρματwn epikoinwni¸n, όπως to WiFi (IEEE- 802.11n/ac), to LTE (3GPP-LTE) kai to WiMAX (IEEE-802.16e) kai anamènetai na di- adramatÐsei kajorisτικό ρόlo sta susτήματa kinht¸n epikoinwni¸n pèmpthc γενιάς (5G), kaj¸c kai sto epόμενο prwtόκοllo WiFi (IEEE-802.11ax). Παρά ta pleoνεκτήμαta thc χρήσης pollapl¸n kerai¸n ekpompής kai λήyhc, h sugkekrimènh teqnologÐa αυξάνει σημαντικά th poλυπλοκόthta tou dèkth kai se arketèc peript¸seic kai tou πομπού, me apotèlesma thn αύξηση tou κόσtouc efarmoγής kai thc katανάλωσης enèrgeiac sta susτήματa MIMO-OFDM. H auxhmènh puknόthta se tranzÐstor, twn σύγχροnwn oloklhrwmènwn κυκλωμάτwn, λόgw thc teqnologÐac lijografÐac me diastάσειc mikρόterec tou μικρόμετρου, parèqei th dunatόthta uposτήριξης pollapl¸n prwtokόllwn ασύρματης epikoinwnÐac se èna μόno oloklhrwmèno κύκλωμa, me th χρήση arqitektonik¸n kajorismènwn se logiσμικό (Software Defined Ratio - .SDR) Se tètoiec arqitektonikèc, oi upomoνάδες me μεγάλη poluplokόthta ή me krÐsimh kajustèrhsh gia to σύστημα ulopoiούντai se υλικό me th moρφή moνάδων epitάχυνσης. Tètoiec moνάδες ja prèpei na diajètoun poλλαπλούς τρόπους leitourgÐac kai na eÐnai se jèsh na αναδιαμορφωθούν se pragmatikό χρόno, gia na μπορούν na uposthrÐxoun tic apaiτήσειc pollapl¸n prwtokόllwn epikoinwnÐac. xii Epiplèon, oi moνάδες autèc ja prèpei na èqoun auxhmènh epektασιμόthta, meiwmènh polu- πλοκόthta kai κόσtoc efarmoγής kai meiwmènh katανάλωση enèrgeiac gia na μπορούν na uposthrÐxoun susτήματa SDR me χρήση mpatarÐac. Epomènwc, h sqedÐash moνάδων χαμηλής poλυπλοκόthtac me beltistopoihmènh katανάλωση enèrgeiac gia susτήματa pollapl¸n kerai¸n metάδοσης kai λήψης (MIMO) kai susτήματa SDR eÐnai σημαντική kai ja antimetwpisteÐ sth παρούσα διατριβή. Sto pr¸to τμήμα thc ergasÐac παρουσιάζοntai σύγχροnec arqitektonikèc epexer- gasτή taqu-metasqhmatiσμού Fourier (FFT), gia susτήματa orjog¸niac poluplexÐac συχνόthtac (OFDM) me pollaplèc roèc dedomènwn (uposτήριξη susτημάτwn MIMO- OFDM). H leptομερής ανάλυση twn sugkekrimènwn arqitektonik¸n αφορά thn polu- πλοκόthta, thn epektασιμόthta, to κόσtoc efarmoγής kai th katανάλωση enèrgeiac, kaj¸c epÐshc ερευνάτai kai h piθανόthta χρήσης twn sugkekrimènwn arqitektonik¸n se susτήματa SDR. ProteÐnetai mia prwtοποριακή arqitektoνική epexergasτή FFT, basis- mènh se μνήμη, me auxhmènh epektασιμόthta kai dunatόthta uposτήριξης poλύπλοκων susτημάτwn MIMO-OFDM kai SDR. Qrhsimopoi¸ntac èna apodoτικό σύστημα dieu- junsiοδόthshc thc μνήμης, me αποφυγή συγκρούσεων, eÐnai
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