AMD EPYC™ 7003 Cpus “ZEN 3” Cores 3Rd Generation EPYC
Total Page:16
File Type:pdf, Size:1020Kb
❑ Introduction. Pitch on “Why AMD for CPU” ❑ SKU orientation ❑ Architecture ❑ Software Development Environment ❑ SPACK HPC Package Management ❑ Applications and their Characterisation ❑ References © Advanced Micro Devices Inc | All Rights Reserved 3 NASA | JULY 2021 Source: https://openai.com/blog/ai-and-compute/ (Machine Intelligence) and https://www.top500.org/ (High Performance Computing) “DISCOVER” “RED STORM” “FRANKLIN” “RANGER” “HOPPER” “CIELO” US DEPT. OF ENERGY “CORONA” “PERLMUTTER” EUROHPC JU SANDIA NERSC TACC NERSC LLNL EXASCALE PROGRAM FUNDING LLNL NERSC “CSD3” “ ” 2012-PRESENT CAMBRIDGE UNIIVERSITY EL CAPITAN ORNL “JACQUARD” “ROADRUNNER” “ COSMA8” NERSC LLNL DURHAM UNIVERSITY “TITAN” “ LUMI” ORNL UK Met Office “JAGUAR” “KRAKEN” EUROHPC JU ORNL U OF TENNESSE/NISC “ FRONTIER” ORNL 2005 2006 2007 2008 2009 2010 2011 2012 2019 2020 2021 2022 2023 4 NASA | JULY 2021 5 © Advanced Micro Devices Inc | All Rights Reserved 6 NASA | JULY 2021 5nm 7nm In Design Shipping Now 7nm 14nm / 12nm “ZEN 4” “ZEN 3” “ZEN 2” “ZEN” “ZEN+” 2017 2022 7 NASA | JULY 2021 ROADMAPS SUBJECT TO CHANGE AMD CPU GPU Profilers, Tracers, and Debuggers for Developers System management for IT ✓ ✓ Industry leading HPC & ML frameworks for portability ✓ ✓ Standard Math and Communication Libraries ✓ ✓ C/C++, Python, Fortran ✓ ✓ 8 NASA | JULY 2021 Up to cores per socket Memory channels Up to L3 cache See MLN-001 and MLN-016 © Advanced Micro Devices Inc | All Rights Reserved EPYC 7002 & 7003 DIE MCM (8 CCD + 1 IO) 7002 (“Rome”) Z2 L2 L2 Z2 16MB L3 Z2 L2 L2 Z2 Z2 L2 L2 Z2 16MB L3 Z2 L2 L2 Z2 7003 (“Milan”) Z3 L2 L2 Z3 Z3 L2 32 MB L2 Z3 Z3 L2 L3 L2 Z3 Z3 L2 L2 Z3 11 © Advanced Micro Devices Inc | All Rights Reserved The information contained herein is subject to change without notice. (Not Compatible With Naples MB) © Advanced Micro Devices Inc | All Rights Reserved © Advanced Micro Devices Inc | All Rights Reserved © Advanced Micro Devices Inc | All Rights Reserved © Advanced Micro Devices Inc | All Rights Reserved ▪ ▪ ▪ ▪ ▪ ▪ ▪ ▪ “F” PERFORMANCE PER CORE OPTIMIZED *Max boost for AMD EPYC processors is the maximum frequency achievable by any single core on the processor under normal operating conditions for server systems. © Advanced Micro Devices Inc | All Rights Reserved COMMENTS: ▪ More CCDs provide increased memory BW ▪ PCIe and Infinity fabric assigned per NUMA. Check CTX-6 affinity ▪ NPS4 shown; NPS2 and NPS1 also possible ▪ NPS4 provides highest memory bandwidth compared to NPS2 or NPS1 ▪ Data Fabric (DF) Speed has been increased from 1467MHz (Rome) to 1600MHz (Milan) ▪ 1600MHz is ‘coupled’ to 3200MHz, i.e. it is exactly 2 cycles in 3200. Extra memory bw increase derives from both increased DF speed and coupled mode. © Advanced Micro Devices Inc | All Rights Reserved [jason@milan003 ~]$ hwloc-ls | less // Shows a snip from hwloc-ls // Group0 L#2 NUMANode L#2 (P#2 63GB) L3 L#4 (32MB) - L2 L#32 (512KB) + L1d L#32 (32KB) + L1i L#32 (32KB) + Core L#32 + PU L#32 (P#32) L2 L#33 (512KB) + L1d L#33 (32KB) + L1i L#33 (32KB) + Core L#33 + PU L#33 (P#33) - L2 L#34 (512KB) + L1d L#34 (32KB) + L1i L#34 (32KB) + Core L#34 + PU L#34 (P#34) L2 L#35 (512KB) + L1d L#35 (32KB) + L1i L#35 (32KB) + Core L#35 + PU L#35 (P#35) L2 L#36 (512KB) + L1d L#36 (32KB) + L1i L#36 (32KB) + Core L#36 + PU L#36 (P#36) L2 L#37 (512KB) + L1d L#37 (32KB) + L1i L#37 (32KB) + Core L#37 + PU L#37 (P#37) L2 L#38 (512KB) + L1d L#38 (32KB) + L1i L#38 (32KB) + Core L#38 + PU L#38 (P#38) L2 L#39 (512KB) + L1d L#39 (32KB) + L1i L#39 (32KB) + Core L#39 + PU L#39 (P#39) L3 L#5 (32MB) L2 L#40 (512KB) + L1d L#40 (32KB) + L1i L#40 (32KB) + Core L#40 + PU L#40 (P#40) L2 L#41 (512KB) + L1d L#41 (32KB) + L1i L#41 (32KB) + Core L#41 + PU L#41 (P#41) L2 L#42 (512KB) + L1d L#42 (32KB) + L1i L#42 (32KB) + Core L#42 + PU L#42 (P#42) L2 L#43 (512KB) + L1d L#43 (32KB) + L1i L#43 (32KB) + Core L#43 + PU L#43 (P#43) L2 L#44 (512KB) + L1d L#44 (32KB) + L1i L#44 (32KB) + Core L#44 + PU L#44 (P#44) L2 L#45 (512KB) + L1d L#45 (32KB) + L1i L#45 (32KB) + Core L#45 + PU L#45 (P#45) [jason@milanLogin ~]$ seq -s , 0 2 127 L2 L#46 (512KB) + L1d L#46 (32KB) + L1i L#46 (32KB) + Core L#46 + PU L#46 (P#46) 0,2,4,6,8,10,12,14,16,18,20,22,24,26,2 L2 L#47 (512KB) + L1d L#47 (32KB) + L1i L#47 (32KB) + Core L#47 + PU L#47 (P#47) 8,30,32,34,36,38,40,42,44,46,48,50,52, 54,56,58,60,62,64,66,68,70,72,74,76,78 HostBridge ,80,82,84,86,88,90,92,94,96,98,100,102 PCIBridge ,104,106,108,110,112,114,116,118,120,1 22,124,126 PCI 21:00.0 (InfiniBand) Net "ib0" © Advanced Micro DevicesOpenFabrics Inc | All Rights Reserved "mlx5_0" AMD EPYC SOFTWARE DEVELOPMENT ENVIRONMENT PLATFORM PERFORMANCE PERFORMANCE DEVELOPER JAVA COMPILERS COMPILERS LIBRARIES TOOLS AMD Optimizing AMD AOCL CPU Libraries µProf Performance & Optimizing Power Profiling AOCC CPU CPU Inference Tools Compilers ZenDNN Acceleration Package Manager integration (e.g. Spack) GDB GNU debugger Use AMD tools for best performance and code efficiency on EPYC CPUs Compilers → focus on delivering the best out-of-the-box code generation for C, C++, Fortran, Java Libraries → support common kernels for core math, solvers and FFT Profiling tools → enable developers to access the full capabilities of EPYC CPUs All tools available at developer.amd.com © Advanced Micro Devices Inc | All Rights Reserved ◢ [AMD Confidential - Distribution with NDA] AOCC – AMD’s performance compiler AMD Provides AMD Adds AMD Starts With 20 AMD CPU SOFTWARE DEVELOPMENT ENVIRONMENT | 2021 | AMD CONFIDENTIAL – NDA USE ONLY ◢ [AMD Confidential - Distribution with NDA] Introducing the AMD Optimizing CPU Libraries Library type Name Description ◢ AOCL are a set of numerical Basic Linear Optimized high-performance Basic Linear BLIS libraries tuned specifically for the Algebra Algebra Subprograms (BLAS) AMD EPYC™ processor family. libFlame & Optimized dense matrix computations as Linear Algebra ◢ Tuned implementations of ScaLAPACK found in Linear Algebra Package (LAPACK) industry-standard math libraries Fast Fourier Fast C routines for computing Discrete enable fast development of FFTW Transforms Fourier Transform high-performance computing applications. Subset of standard C99 math functions optimized for x86-64; Higher accuracy & Core Math & ◢ Simple interfaces to take LibM performance than compiler’s math functions. other functions AMD- originated advantage of the latest AMD Optimized memcpy, memmove from Glibc processor hardware innovations. for Zen architecture, up-streamed to Glibc. ◢ All libraries contributed to the AOCL-Sparse AMD-Sparse Sparse matrix operations and solvers. open-source communities, AMD- originated including AMD-originated LibM Secure Random Single and Double Precision Secure RNG and Sparse. Number Generator Random Number Generator library 21 AMD CPU SOFTWARE DEVELOPMENT ENVIRONMENT | 2021 | AMD CONFIDENTIAL – NDA USE ONLY SPACK: AOCC-OPTIMISED INSTALLATION - - - https://developer.amd.com/spack/ © Advanced Micro Devices Inc | All Rights Reserved SPACK: AOCC-OPTIMISED INSTALLATION [jason@MilanLogin ~]$ spack list amd ==> 8 packages. amdblis amdfftw amdlibflame amdlibm amdscalapack bamdst llvm-amdgpu namd [jason@MilanLogin ~]$ spack list aocc ==> 1 packages. aocc spack install stream %[email protected] +openmp cflags="-O3 -mcmodel=large -DSTREAM_TYPE=double \ -mavx2 -DSTREAM_ARRAY_SIZE=2500000000 -DNTIMES=10 -ffp-contract=fast -fnt-store" spack load stream © Advanced Micro Devices Inc | All Rights Reserved AMD EPYC™ CPUS: APPLICATIONS The following domains are where AMD typically performs well in HPC. VERY STRONG coverage across all real workloads (Life Sciences investigation starting 21Q2) Sector Problem Set Example Code Set (not exhaustive) Automotive ➢ Computational Fluid Dynamics (CFD) ➢ StarCCM+, OpenFOAM, … ➢ Structural Codes (‘Finite Element Analysis’ - FEA) ➢ LSDYNA, NASTRAN, ABAQUS, … Aerospace Same problem set as Automotive Same code set as Automotive Oil and Gas ➢ Reservoir Often rely on ISV codes. Some have ➢ Seismic their own inhouse solvers Weather Weather Forecast and Climate Modelling WRF, UFS, GFS, Unified Model, … HPC Centers, Wide range of codes: Molecular Dynamics, GROMACS, NAMD, CP2K, LAMMPS, including Academia Quantum Chemistry, weather, CFD, inhouse codes VASP, WRF, OpenFOAM, inhouse, …. Government Labs Security conscious (SME?); all problem sets above Any of the above + inhouse codes may apply © Advanced Micro Devices Inc | All Rights Reserved 26 HPC Centre of Excellence | nasa 2021 Higher is Better CHAR-SUT-01, CHAR-APP-01 water_1536 27 HPC Centre of Excellence | nasa 2021 Higher is Better CHAR-SUT-01, CHAR-APP-01 Compare 7742 v 7713 v 7763 Milan vs Rome 7713 7763 120% WRF 6% 7% 100% openFOAM 7% 7% VASP - 14% 80% CP2K 9% 14% 60% QE 9% 19% 40% NAMD 3% 16% LAMMPS 2% 12% 20% GROMACS 7% 22% 0% HPL -14% 4% HPCG 10% 10% 7742 7713 7763 Relative to 7742 Higher is Better, Rome 7742 = 100% 28 HPC Centre of Excellence | nasa 2021 CHAR-SUT-01, CHAR-APP-01 Compare relative performance between MPI+OpenMP Milan vs Rome nd rd 220% 2 Gen EPYC 7742 and 3 Gen EPYC 7763 with all cores active per CDD but 170% with differing MPI + OMP layout∆ : • 7742: 1 MPI /CCD x 8 OMP * 120% • 7742: 1 MPI / L3 x 4 OMP 70% • 7763: 1 MPI / CCD x 8 OMP • 7763: 2 MPI / CCD x 4 OMP 20% → Milan improves on Rome *Normalise to ‘1’ and compare -30% ∆ OpenFOAM and VASP are MPI only 7742; 1 MPI/CCD + 8 OMP 7742; 1 MPI/L3 + 4 OMP 7763; 1 MPI/CCD + 8 OMP 7763; 2 MPI/CCD + 4 OMP Z2 L2 16MB L2 Z2 Z3 L2 32 L2 Z3 Z2 L2 L3 L2 Z2 Z3 L2 L2 Z3 Z2 L2 16MB L2 Z2 Z3 L2 MB L2 Z3 Z2 L2 L3 L2 Z2 Z3 L2 L3 L2 Z3 29 HPC Centre of Excellence | nasa 2021 Higher is Better CHAR-SUT-01, CHAR-APP-01 2 competing system-level choke-points: LAMMPS, EMA ❑ Bandwidth to main memory ❑ ‘Compute Bound (‘frequency’) These are mutually exclusive to each other Perform roofline analysis to confirm where hot- routine lands (red circle) We have performed this analysis on a number of popular HPC codes across CFD, Weather, Quantum Chemistry, Molecular Dynamics: Codes are memory bound or borderline → HPL (compute bound) is *NOT* a good proxy for scoping job-throughput on realistic workloads.