Chapter 9 Metal-Semiconductor Contacts
Two kinds of metal-semiconductor contacts:
• metal on lightly doped silicon – • rectifying Schottky diodes • metal on heavily doped silicon – • low-resistance ohmic contacts
Semiconductor Devices for Integrated Circuits (C. Hu) Slide 9-1 9.1 Schottky Barriers Energy Band Diagram of Schottky Contact Depletion Metal Neutral region layer qφ Bn • Schottky barrier height, φB , Ec Ef is a function of the metal material.
Ev • φB is the single most Ec important parameter. The
sum of qφBn and qφBp is equal to E . Ef g
qφBp Ev
Semiconductor Devices for Integrated Circuits (C. Hu) Slide 9-2 Schottky barrier heights for electrons and holes
Metal Mg Ti Cr W Mo Pd Au Pt
φ Bn (V) 0.4 0.5 0.61 0.67 0.68 0.77 0.8 0.9 φ Bp (V) 0.61 0.5 0.42 0.3 Work Function 3.7 4.3 4.5 4.6 4.6 5.1 5.1 5.7
ψ m (V)
φBn + φBp ≈ 1.1 V
φBn increases with increasing metal work function
Semiconductor Devices for Integrated Circuits (C. Hu) Slide 9-3 φBn Increases with Increasing Metal Work Function
Vacuum level, E0
χSi = 4.05 eV Ideally, qψM qφBn=qψM – χSi
qφBn Ec
Ef
Ev
Semiconductor Devices for Integrated Circuits (C. Hu) Slide 9-4 φBn is typically 0.4 to 0.9 V
• A high density of energy states in the Vacuum level, E0 bandgap at the metal- χ = 4.05 eV Si semiconductor interface qψM pins Ef to a range of 0.4 eV to 0.9 eV below qφBn E c Ec + − Ef • Question: What is the
typical range of φBp?
Ev
Semiconductor Devices for Integrated Circuits (C. Hu) Slide 9-5 Schottky barrier heights of metal silicide on Si
Silicide ErSi 1.7 HfSi MoSi 2 ZrSi 2 TiSi 2 CoSi 2 WSi 2 NiSi 2 Pd2Si PtSi φ Bn (V) 0.28 0.45 0.55 0.55 0.61 0.65 0.67 0.67 0.75 0.87 φ Bp (V) 0.55 0.49 0.45 0.45 0.43 0.43 0.35 0.23
Silicide-Si interfaces are more stable than metal-silicon interfaces. After metal is deposited on Si, an annealing step is applied to form a silicide-Si contact. The term metal-silicon contact includes silicide-Si contacts.
Semiconductor Devices for Integrated Circuits (C. Hu) Slide 9-6 Using CV Data to Determine φB qφ = qφ − (E − E ) qφbi bi Bn c f qφBn Ec φ N c Ef = q Bn − kT ln N d ε2 ( + V ) Ev φs bi Wdep = qN d qφ Bn q(φbi + V) ε C = s A qV Wdep Ec
Ef Question: How should we plot the CV
data to extract φbi? Ev
Semiconductor Devices for Integrated Circuits (C. Hu) Slide 9-7 Using CV Data to Determine φB
1/C2
1 2(φbi +V ) 2 = 2 C qNdε s A
V −φ φ bi φ Once φbi is known, φΒ can be determined using
Nc q bi = q Bn − (Ec − E f ) = qφBn − kT ln Nd
Semiconductor Devices for Integrated Circuits (C. Hu) Slide 9-8 9.2 Thermionic Emission Theory v thx- q(φ B − V) Ec qφ N-type B E qV Efn V Metal Silicon fm φ
E v x 3/ 2 π 2 m kT φ n = N e−q( B −V )/ kT = 2 n e−q( B −V )/ kT c 2 h vth = 3kT / mn vthx = − 2kT / mn 1 4πqm k 2 φπ J = − qnv = n T 2e−q B / kT eqV / kT S→M 2 thx h3
qV / kT −qφB / kT 2 = J 0e , where J o ≈100e A/cm
Semiconductor Devices for Integrated Circuits (C. Hu) Slide 9-9 9.3 Schottky Diode I qV/kT I I I = −Ι SM→ = Ι e SM→ = −Ι SM→ = Ι MS→ 0 0 - 0 - 0 - - < qφB qφ qφ B E − Ef = qφB B qV Efn E f
(a) V = 0. ISM→ =I MS→ Ι =0 (b) Forward bias. Metal is positive wrt >> Si. ISM→ IMS→ =Ι 0
I = −Ι MS→ 0 IMS→ ≈ 0 - I qφB q > φB qV
EEfnfn V Reverse bias Forward bias
(c) Reverse bias. Metal is negative wrt Si. (d) Schottky diode IV.
ISM→ < Semiconductor Devices for Integrated Circuits (C. Hu) Slide 9-10 9.3 Schottky Diode I I qV/kT MS→ = −Ι0 SM→ = Ι0 e - - < qφB q φB qV Efn E f 2 −qφB / kT I0 = AKT e 4πqm k 2 K = n ≈100 A/(cm2 ⋅K2 ) h3 qV / kT qV / kT I = IS→M + IM →S = I0e − I0 = I0 (e −1) Semiconductor Devices for Integrated Circuits (C. Hu) Slide 9-11 9.4 Applications of Schottky Diodes I Schottky diode I qV / kT I = I0 (e −1) 2 −qφB / kT I0 = AKT e φφBB PNPN junctionjunction diode V 3 8 • I0 of a Schottky diode is 10 to 10 times larger than a PN junction diode, depending on φB . A larger I0 means a smaller forward drop V. • A Schottky diode is the preferred rectifier in low voltage, high current applications. Semiconductor Devices for Integrated Circuits (C. Hu) Slide 9-12 Switching Power Supply PN Junction Schottky rectifier Transformer rectifier 100kHz 110V/220V Hi-voltage Hi-voltage Lo-voltage 50A DC AC AC 1.8V DC AC MOSFET utility inverter power feedback to modulate the pulse width to keep Vout = 1.8 V Question: What sets the lower limit in a Schottky diode’s forward drop? Synchronous Rectifier: For an even lower forward drop, replace the diode with a wide-W MOSFET which is not qV/kT bound by the tradeoff between diode V and I0 : I = I0e Semiconductor Devices for Integrated Circuits (C. Hu) Slide 9-13 9.4 Applications of Schottky Diodes There is no minority carrier injection at the Schottky junction. Thus, the CMOS latch-up problem can be eliminated by replacing the source/drain of the NFET with Schottky junctions. In addition, the Schottky S/D MOSFET would have shallow junctions and low series resistance. So far, Schottky S/D MOSFETs have lower performance. silicide gate silicide source drain No excess carrier storage. What application may benefit P-body from that? Semiconductor Devices for Integrated Circuits (C. Hu) Slide 9-14 GaAs MESFET gate source drain metal + N-channel N N + GaAs Semi-insulating substrate The MESFET has similar IV characteristics as the MOSFET, but does not require a gate oxide. Question: What is the advantage of GaAs over Si? Semiconductor Devices for Integrated Circuits (C. Hu) Slide 9-15 9.5 Ohmic Contacts Semiconductor Devices for Integrated Circuits (C. Hu) Slide 9-16 SALICIDE (Self-Aligned Silicide) Source/Drain contact metal dielectric spacer G gate oxide R R channel SDs d N+ source or drain CoSi or TiSi 2 2 After the spacer is formed, a Ti or Mo film is deposited. Annealing causes the silicide to be formed over the source, drain, and gate. Unreacted metal (over the spacer) is removed by wet etching. Question: • What is the purpose of siliciding the source/drain/gate? • What is self-aligned to what? Semiconductor Devices for Integrated Circuits (C. Hu) Slide 9-17 9.5 Ohmic Contacts Silicide N+ Si 2ε φ φ –V s Bn φ Bn Wdep = Bn - - E , E qN - - V c f d Ec , Ef Efm Tunneling probability:π Ev Ev ε x x P = e−HφBn Nd 9 −3/2 −1 H = 4 smn / h = 5.4×10 mn / mo cm V 1 J ≈ qN v P = qN kT / 2πm e−H (φBn −V )/ Nd S→M 2 d thx d n Semiconductor Devices for Integrated Circuits (C. Hu) Slide 9-18 9.5 Ohmic Contacts φ −1 H Bn / Nd dJ S→M e HφBn / Nd 2 Rc ≡ = ∝ e Ω⋅cm dV qvthx H Nd Semiconductor Devices for Integrated Circuits (C. Hu) Slide 9-19