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THE EFFECTS OF INTERFACE AND SURFACE CHARGE ON TWO DIMENSIONAL

TRANSITORS FOR NEUROMORPHIC, RADIATION, AND DOPING APPLICATIONS

A Dissertation in

Electrical Engineering

Andrew J. Arnold

Submitted in Partial Fulfillment of the Requirements for the Degree of

Doctor of Philosophy

August 2020

The dissertation of Andrew J. Arnold was reviewed and approved by the following:

Thomas Jackson Professor of Electrical Engineering Co-Chair of Committee

Saptarshi Das Assistant Professor of Engineering Science and Mechanics Dissertation Advisor Co-Chair of Committee

Swaroop Ghosh Assistant Professor of Electrical Engineering

Rongming Chu Associate Professor of Electrical Engineering

Sukwon Choi Assistant Professor of Mechanical Engineering

Kultegin Aydin Professor of Electrical Engineering Head of the Department of Electrical Engineering

Abstract

The scaling of silicon field effect transistors (FETs) has progressed exponentially following

Moore’s law, and is nearing fundamental limitations related to the materials and physics of the devices.

Alternative materials are required to overcome these limitations leading to increasing interest in two dimensional (2D) materials, and transition metal dichalcogenides (TMDs) in particular, due to their atomically thin nature which provides an advantage in scalability. Numerous investigations within the literature have explored various applications of these materials and assessed their viability as a replacement for silicon FETs. This dissertation focuses on several applications of 2D FETs as well as an exploration into one of the most promising methods to improve their performance.

Neuromorphic computing is an alternative method to standard computing architectures that operates similarly to a biological nervous system. These systems are composed of neurons and operate based on pulses called action potentials. The neurons communicate with each other through connections called synapses which release neurotransmitters in response to incoming action potentials. By exploiting hysteresis effects in MoS2 transistors, it is found that applied gate pulses can be used to directly model several key behaviors governing biological neurotransmitter release. This enables the FET to function as a synaptic device which mimics the biological behavior more completely than in typical neuromorphic devices. In particular, the gate pulse polarity, the number of pulses, and the pulse magnitude are used to mimic the bipolar, quantal, and stochastic nature of neurotransmitter release. Additionally, it is found that the long trap state decay time can be used as an analog to long-term potentiation which is a process responsible for biological learning and memory.

Radiation resistance is an important factor for electronics used in certain space and nuclear applications. Numerous studies have investigated the effects of high energy radiation on 2D electronics.

However, these studies typically do not account for the electrical effects of radiation damage to the gate dielectric which also contributes to the total change in device characteristics. A novel experimental setup which uses four samples and takes advantage of the unique properties of 2D materials can eliminate this

iii factor which may obscure the radiation effects on the 2D material itself. The four samples are an unirradiated control sample, a sample where both the flakes and substrate are irradiated, a sample where only the substrate is irradiated, and a sample where only the flakes are irradiated. Using this experimental configuration, it is found that upon exposure to He+ ion radiation at a fluence of 1015 ions/cm2, damage to the electrical characteristics of MoS2 FETs with on a 50 nm Al2O3 gate dielectric is mostly induced by damage to the flakes themselves and that oxide damage has a minor but nonzero effect. Similar results of lesser magnitude are found for devices irradiated with protons at a fluence of 1.26 × 1016 ions/cm2.

However, in both cases the devices are able to maintain high ON currents and ON/OFF ratios.

The main limiting factor preventing the fabrication of high-quality contacts to 2D materials is

Schottky barrier formation due to Fermi level pinning. In conventional silicon FETs, heavily doped regions under the contacts are used to reduce the contact resistance. However, substitutional doping in 2D

FETs is impractical due to high-temperature requirements. A promising alternative is surface charge transfer doping (SCTD). A comprehensive experimental study supported with Sentaurus TCAD simulations is used to isolate the thickness dependence of surface doping performed through oxygen plasma exposure. It is found that the plasma produced damage for thin flakes, and that as the flake thickness is increased, the desired threshold voltage shift decreases and the minimum OFF state current increases. Sentaurus simulations show that this is caused by a failure of the doping charge to influence the

2D semiconductor near the back-gate due to the increased distance between them. It is also shown that leaving an undoped region in the channel produces the desired improved contact performance while preventing the excessive threshold voltage shifts produced by high levels of uniform doping.

Additionally, Sentaurus simulations are used to extract the thickness trends of this extension doping.

Finally, the combined experimental and simulation results are used to determine the material and doping charge requirements for effective use of SCTD for improved device performance.

TABLE OF CONTENTS

List of Figures ...... vii

List of Tables ...... xiv

Acknowledgements ...... xv

Chapter 1: Introduction ...... 1 Introduction ...... 1 2D Materials...... 1 2D Field Effect Transistors ...... 2 Fermi Level Pinning ...... 4 Electrical Characteristics of Schottky Barrier FETs ...... 9 Two Paths of Carrier Injection ...... 12 Improving the Contact Resistance of SB FETs Through Fermi Level Depinning ...... 16 Improving the Contact Resistance of 2D FETs Through Hybridization and Phase Engineering .... 20 Dissertation Organization ...... 23 References ...... 24

Chapter 2: MoS2 Synaptic Device ...... 29 Introduction ...... 29

MoS2 FET ...... 30 Neurons and Synapses ...... 33

MoS2 FET Pulse Response ...... 36

MoS2 FET Postsynaptic Current ...... 40 Long-Term Potentiation ...... 43 OFF State Biasing ...... 44 Conclusion ...... 46 References ...... 48

Chapter 3: Radiation Resistance of MoS2 ...... 51 Introduction ...... 51 Experimental Setup ...... 53 Dependence of Electrical Effects on He+ Fluence ...... 56 He+ Irradiation with a Fluence of 1015 ions/cm-2 ...... 58 Variation in the Substrate Irradiated Devices ...... 61 Proton Irradiation with a Fluence of 1.26 × 1016 ions/cm2 ...... 64

MoS2 Radiation Damage Mechanisms...... 67 Conclusion ...... 67 References ...... 69

Chapter 4: Physics and Thickness Trends of Surface Charge Transfer Doping of 2D Materials ..... 73

Surface Charge Transfer Doping ...... 73 Oxygen Plasma Doping ...... 76

MoS2 Doping Thickness Dependence ...... 78

WSe2 Doping Thickness Dependence ...... 80 Transition Metal Dichalcogenide Doping Thickness Dependence ...... 83 Extraction of Surface Charge Density ...... 86 Sentaurus Simulation Physics and Layout ...... 88 Uniform Doping Simulation Results ...... 90

Extension Region Doping of WSe2 FETs ...... 93 Extension Region Doping Sentaurus Simulation Results ...... 95 Contact Region Doping ...... 98 Effect of Subsequent Lithography on Surface Doping ...... 100 Requirements for Effective Extension Region Doping ...... 102 Conclusion ...... 104 References ...... 106

Chapter 5: Conclusion and Future Work ...... 112 Conclusion ...... 112 Future Work ...... 114 References ...... 118

Appendices ...... 119 Appendix A: Synopsys Sentaurus TCAD Simulation Code ...... 119 Appendix B: Fermi-Only Uniform Doping Sentaurus Simulations ...... 131

List of Figures

Figure 1-1: Crystal structure of transition metal dichalcogenides. TMDs such as MoS2 have a trigonal prismatic 2H hexagonal crystal structure with layers connected by van der Waals bonds.22 Reprinted by permission from Springer: Nature Nanotechnology, ref. 22 (2011). 2

Figure 1-2: Schematic of back-gated FET with 2D TMD channel. Typical experimental FETs use this structure with a global back-gate, 2D materials exfoliated or grown on the substrate, and contacts evaporated on top. Reproduced from Ref. 23 with permission from the Royal Society of Chemistry...... 3

Figure 1-3: Ideal transistor electrical characteristics. a) Output characteristics for negative drain and gate voltages. b) Transfer characteristics and energy band states as a function of gate voltage for a constant drain voltage. c) Output characteristics for positive gate and drain voltages. Reproduced from Ref. 23 with permission from the Royal Society of Chemistry. 4

Figure 1-4: Band alignments of transition metal dichalcogenides. Energy bands of common a) monolayer and b) multilayer TMDs with contact metal work functions. Reproduced from Ref. 23 with permission from the Royal Society of Chemistry...... 6

Figure 1-5: Fermi level pinning in 2D materials. a) Transfer characteristics of MoS2 FETs for 27 different contact metals. b) The extracted band alignments for the MoS2 FETs compared with the metal work functions.27 c) The extracted Schottky barrier heights for different 23 metals used to contact MoS2 FETs with an extracted pinning factor of 0.1. d) Transfer 27 characteristics of WSe2 FETs with Ni and Pd contacts. e) The band alignments of the Ni 27 23 and Pd contacted WSe2 FETs with their work functions. Reproduced from Ref. with permission from the Royal Society of Chemistry...... 8

Figure 1-6: Electrical characteristics of Schottky barrier FETs. a) Transfer characteristics of a SB FET where the colored circles correspond to the thermionic (red), flat band (blue), tunneling dominated OFF state (brown), and tunneling dominated ON state (purple). The band states in these regions are shown in b)-e) respectively. f) Increasing the SB height (ΦSB- n) reduces VFB and the ON current. g) Increasing the SB barrier width (λSB) reduces the slope of the tunneling region and the ON current. h) Increasing the temperature (T) increases the subthreshold slope and both the ON and OFF state currents. Reproduced from Ref. 23 with permission from the Royal Society of Chemistry...... 10

Figure 1-7: Two paths of carrier injection in 2D FETs. a) Conventional SB model which does not account for variations in potential near the contact interface.23 The SB height is determined by Fermi level pinning and λSB is determined by the geometric screening length. b) Path 1 allows the carriers to tunnel directly from the corner of the contact into the channel. This is similar to the traditional model in the sense that ΦSB-n and λSB are unchanged. A band diagram also shows the electrical difference between the two paths. c) Path 2 injects carriers deep into the 2D material vertically under the contact. This injection happens through thermally assisted tunneling as the potential under the contact is modulated by the gate. In this case, the barrier width is determined by tbody. d) Transfer characteristics of a simulated device including all three current components.45 In this case, path 2 injection dominates. Reproduced from Ref. 23 with permission from the Royal Society of Chemistry.14

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Figure 1-8: Current density under the source of MoS2 FETs as a function of thickness. Current density under the source at VGS = 0 V and VGS = 30 V for devices with thickness a)- b) 5.9 nm and c)-d) 1.4 nm.47 e) Relative contribution of path 2 current. f) Transfer characteristics showing the contribution of path 2 current compared to the total device current for the 5.9 nm thick device. Reproduced from Ref. 47 with permission from the Royal Society of Chemistry...... 15

Figure 1-9: Tunneling interlayer contacts. a) Schematic of a top contact to a 2D semiconductor with a thin interlayer between the metal and semiconductor.23 b) Band diagrams showing the effect of interlayer tunnel barrier thickness on the Fermi level pinning and current injection. With no interlayer, there is a large SB and therefore low current. As the barrier thickness is increased, the SB height is lowered owing to Fermi level depinning, resulting in better current injection despite the presence of interlayer tunnel barrier.49 As the barrier continues to increase, the interlayer tunneling resistance begins to dominate and counter any improvement in current injection due to reduction in SB height. Hence, there exists an optimum, intermediate interlayer thickness to maximize the current injection. c) Experimental data showing the specific contact resistivity as a function of Ta2O5 interlayer thickness. At low thicknesses, the SB height dominates the resistivity, while at higher thicknesses, the tunneling resistance dominates with an optimum value occurring at approximately 1.5 nm. Reproduced from Ref. 23 with permission from the Royal Society of Chemistry...... 17

Figure 1-10: Graphene contacts to 2D semiconductors. Band diagrams of graphene contacts to 2D semiconductors.23 The Fermi level in the graphene can be adjusted by the applied gate voltage which reduces the SB height and the contact resistance.55, 58, 60-61 Reproduced from Ref. 23 with permission from the Royal Society of Chemistry...... 19

Figure 1-11: Effective work function of interlayer-metal combinations. DFT calculations showing the modified work functions of various metal-interlayer combinations and their alignment with the bandgaps of common TMDs. Graphene and hBN interlayers lower the effective work function while NbS2 and MoO3 interlayers increase the same for various elemental metals.55 Reproduced with from Ref. 55 with permission from John Wiley and Sons, Inc...... 20

Figure 1-12: Interactions between contact metals and 2D semiconductors. a) Mo contacts 23, 64 form covalent bonds with the underlying MoS2 reducing the SB height. b) Ti contacts also form covalent bonds with MoS2, but perturb the underlying layers increasing the contact 66 resistance. c) Au contacts form van der Waals type interactions with MoS2 which do not perturb the carrier mobility under the contact.66 d) The annealing of Ag contacts at 250 or 300 °C results in the intercalation of Ag between the MoS2 layers which decreases the contact resistance.29 e) Treatment with n-butyl lithium in the patterned contact areas before metal deposition converts the monolayer MoS2 from the semiconducting 2H phase to the metallic 1T phase, greatly reducing the contact resistance.70-71 Reproduced from Ref. 23 with permission from the Royal Society of Chemistry...... 22

Figure 2-1: MoS2 neuromorphic FET. a) Cross sectional schematic, b) optical image, c) transfer characteristics, and d) output characteristics of the MoS2 FET used to mimic synaptic behavior. The channel length is 200 nm, the SiO2 thickness is 100 nm, and the 15 MoS2 flake is 2 nm thick as measured by atomic force microscopy. Reproduced from Ref. with permission from the American Chemical Society...... 31

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Figure 2-2: Hysteresis in MoS2 FETs. Dependence of VGS hysteresis on a) sweep voltage range and b) sweep time. Surface adsorbates such as water or oxygen cause hysteresis by c) trapping excess electrons from the channel when it is biased in the ON state and d) releasing excess electrons to the depleted channel in the OFF state. e) Trap states at the MoS2-SiO2 interface can also cause hysteresis. Their occupancy is governed by Fermi-Dirac statistics dependent on the position of the Fermi level as it is modulated by the gate. f) Defects in the MoS2 itself can also cause hysteresis in the absence of other sources. Reproduced from Ref. 15 with permission from the American Chemical Society...... 32

Figure 2-3: Biological neurons, synapses, and action potentials. a) Diagram of a biological neuron and a chemical synapse. b) Neurotransmitter vesicle release triggered by one or more action potentials and its effect on the postsynaptic potential. The number vesicles released has some functional dependence on the number of action potentials. Reproduced from Ref. 15 with permission from the American Chemical Society...... 34

Figure 2-4: MoS2 FET VGS pulse response. a) Positive and b) negative VGS pulse sequences applied to the MoS2 FET. The pulses are 10 ms long with 40 ms between them and vary in magnitude from 10 to 60 V. Each sequence has successive groups of 1, 5, 10, 15, 20, 25, and 50 pulses separated by 40 s. The IDS response to the c) positive and d) negative pulse sequences. Positive pulses decrease the current corresponding to inhibitor neurotransmitter release while negative pulses increase analogously to excitatory neurotransmitter release. Reproduced from Ref. 15 with permission from the American Chemical Society...... 37

Figure 2-5: Initial current dependence of pulse response. The same series of a) positive and b) negative pulses applied five consecutive times without resetting the trap state occupancy. The sequence consists of six single pulses ranging from 5 V to 30 V or -5 V to -30 V in steps of 5V. Each successive application of the sequence has a lesser effect as the trap state occupancy changes...... 39

Figure 2-6: MoS2 pulse response mimicking neurotransmitter release. a) Excitatory and b) inhibitory postsynaptic current as a function of the number of gate pulses which mimics the quantal release of neurotransmitters. The dashed lines are fit from a numerical model. c) Excitatory and d) inhibitory PSC as a function of the pulse voltage magnitude. The e) EPSC and f) IPSC data normalized into probabilities to mimic the stochastic release of neurotransmitters. Reproduced from Ref. 15 with permission from the American Chemical Society...... 42

Figure 2-7: MoS2 pulse decay mimicking long-term potentiation. a) Decay of a single -60 V with a duration of 50 ms. An exponential fit produces a decay time constant 휏D of 6000 s. b) The extracted long-term potentiation time as a function of the number of pulses and the pulse magnitude. The extracted times range from minutes to hours similar to biological LTP. Reproduced from Ref. 15 with permission from the American Chemical Society...... 44

Figure 2-8: Subthreshold operation of MoS2 neuromorphic FET. a) Transient response to pulse trains with a bias VB of -20 V. The adjusted pulse height is determined by the pulse height VP minus the bias potential i.e. -40 V pulses switch between -60 V and -20 V. Dependence of the EPSC on b) then number of pulses and c) the pulse amplitude. d) Extracted long-term potentiation time as a function of the number of pulses and the pulse magnitude. The extracted tLTP values are significantly larger than the ON state values due to the lower starting current value. Reproduced from Ref. 15 with permission from the American Chemical Society...... 46

Figure 3-1: Schematic of novel experimental method to isolate radiation effects on 2D materials. a) Standard approaches use irradiated full transistors making it difficult to isolate radiation effect on 2D materials from that on the oxide substrate and the metal contacts. The new method uses a control sample and three other samples consisting of b) irradiated substrate and flakes, c) irradiated flakes transferred to an unirradiated substrate, and d) exfoliated unirradiated flakes on an irradiated substrate. Furthermore, in the new method, contacts are fabricated after the irradiation to eliminate radiation effects on the contacts from observed electrical characteristics. e) Method for wet transfer of flakes by coating irradiated flakes with PMMA, removing the PMMA/flakes assembly from the substrate in a NaOH bath, rinsing the PMMA in DI water, picking up the floating PMMA with a new substrate, and removing the PMMA with acetone. This transfer process is unique to 2D materials owing to their van der Waals (vdW) epitaxy. Reproduced from Ref. 34 with permission from the American Society of Chemistry...... 55

Figure 3-2: Radiation damage due to He+ exposure. Representative transfer characteristics of MoS2 FETs from an unirradiated control sample (CS) with neither the flakes nor the substrate being irradiated, and post-radiation samples with both the flake and the substrate irradiated (BI), only the flake irradiated (FI), and only the substrate irradiated (SI). 390 keV He+ ions were used at a total fluence of a-d) 1014 He ions/cm2, e-h) 1015 He ions/cm2, and i-l) 1016 He ions/cm2. Reproduced from Ref. 34 with permission from the American Society of Chemistry...... 58

Figure 3-3: Statistical analysis of He+ irradiation at a fluence of 1015 ions/cm2. Overlaid transfer characteristics of all MoS2 FETs corresponding to a) control sample (CS), b) both flakes and substrate irradiated (BI), c) flakes irradiated (FI), and d) substrate irradiated (SI) with 1015 He+ ions/cm2. e) Mean and standard deviation of subthreshold slope, threshold voltage, and field effect electron mobility for all four sample configurations. Reproduced from Ref. 34 with permission from the American Society of Chemistry...... 60

Figure 3-4: Radiation dependence on flake thickness. a) Relationship between flake thickness and threshold voltage. The correlation is 0.335 indicating they are relatively independent. b) Relationship between flake thickness and peak transconductance (gm) voltage. The correlation between flake thickness and peak gm voltage is -0.800 indicating a strong inverse relationship. Reproduced from Ref. 34 with permission from the American Society of Chemistry...... 63

Figure 3-5: Statistical analysis of proton irradiation at a fluence of 1.26 × 1016 ions/cm2. Overlaid transfer characteristics of all MoS2 FETs corresponding to a) control sample (CS), b) both flakes and substrate irradiated (BI), c) flakes irradiated (FI), and d) substrate irradiated (SI) with 1.26 × 1016 protons/cm2. e) Mean and standard deviation of subthreshold slope, threshold voltage, and field effect electron mobility for all four sample configurations. Reproduced from Ref. 34 with permission from the American Society of Chemistry...... 66

Figure 4-1: Oxygen plasma doping of transition metal dichalcogenides. a) Device schematic of oxygen plasma doped MoS2 FET. b) Raman shift intensity as a function of plasma exposure time. Optical images and atomic force microscopy step heights c) before and d) after exposure to oxygen plasma at 50 W for 300 seconds. The flake shows a change in optical contrast in response to the plasma exposure...... 77

Figure 4-2: Thickness trends in oxygen plasma doped MoS2 FETs. Transfer characteristics as a function of doping time of for representative devices with thicknesses of a) 2.4 nm, b) 3.5

nm, c) 4.5 nm, d) 34 nm, and e) 44 nm. f) table showing magnitude of damage, threshold voltage shift, and minimum OFF state current as a function of thickness...... 79

Figure 4-3: Thickness trends in oxygen plasma doped WSe2 FETs. Transfer characteristics as a function of doping time of for representative devices with thicknesses of a) 2.3 nm, b) 4.3 nm, c) 16 nm, and d) 50 nm. e) table showing magnitude of damage, threshold voltage shift, and minimum OFF state current as a function of thickness...... 82

Figure 4-4: Comparison of oxygen plasma doping thickness trends in different TMDs. Representative thin and thick devices for FETs fabricated from a,b) MoS2, c,d) MoSe2, e,f) MoTe2, g,h) WS2, and i,j) WSe2. All materials experience larger VT shifts for thicker devices as well as an increase in IOFF-min with flake thickness...... 84

Figure 4-5: Oxygen plasma doping charge extraction from TMD FETs. The threshold voltage shift and absolute value of the doping charge are plotted as a function of flake thickness for a) MoS2, b) WSe2, c) MoSe2, and d) WS2 devices. QDope appears larger for thinner devices. 88

Figure 4-6: Synopsys Sentaurus TCAD simulation diagram. The source, drain, and gate are defined as line contacts. VacS, VacD, and VacCh are vacuum regions used to define interface charges at the top surface of the silicon channel to model the surface charge doping...... 89

Figure 4-7: Uniform doping TCAD simulation results. Transfer characteristics of FETs with semiconductor thicknesses of a) 3 nm, b) 15 nm, and c) 30 nm as a function of doping charge. The surface interface charge is negative. Cross sections plotting the absolute value of the total current density for FETs of different thicknesses and doping charge densities at back-gate voltages of 10 V, 0 V, and -10 V. The plots show devices with values of d) tSC =3 -2 -2 13 -2 nm and Qdope = 0 cm , e) tSC =15 nm and Qdope = 0 cm , f) tSC =3 nm and Qdope = -10 cm , 13 -2 g) tSC =15 nm and Qdope = -10 cm . The black lines in the top left and right of the cross sections are the source and drain line contacts, respectively...... 91

Figure 4-8: Electron, hole, and total current density in uniformly doped FETs. Absolute value of total, electron, and hole current densities for a 15 nm thick device at a back-gate voltage of 10 V with uniform negative doping charge densities of a) 0 cm-2 and b) -1013 cm-2. p-doping produces a second channel at the top surface of the semiconductor which conducts holes and depletes electrons...... 92

Figure 4-9: Extension region doping of WSe2 FETs. a) schematic of extension region doped WSe2 device. Comparison of intrinsic performance, uniform doping, and extension doping of b) thin and c) thick WSe2 devices...... 94

Figure 4-10: Output characteristics of extension doped WSe2 FETs. Output characteristics of the a) 2.7 nm and b) 7 nm WSe2 p-i-p devices shown in the previous figure. The maximum current values are -110 μA/μm for the 2.7 nm device and 164 μA/μm for the 7 nm device. This is a significant improvement over the p-branch characteristics of the undoped devices while maintaining a high ON/OFF ratio...... 94

the absolute value of the total current density at different back-gate voltages for d) tSC =3 nm -2 -2 13 -2 and Qdope = 0 cm , e) tSC =15 nm and Qdope = 0 cm , f) tSC =3 nm and Qdope = -10 cm , g) 13 -2 tSC =15 nm and Qdope = -10 cm . The middle gate potentials are chosen so that they correspond to the minimum OFF state point...... 96

Figure 4-12: Extension doping TCAD conduction band energy. Plots are from the same extension doped simulations shown in the previous figure. Interface charge is present in a 50 nm region adjacent to both the source and drain. Transfer characteristics of FETs with semiconductor thicknesses of a) 3 nm, b) 15 nm, and c) 30 nm as a function of doping charge. The surface interface charge is negative. Cross sections plotting the conduction band energy for FETs of different thicknesses and doping charge densities at back-gate voltages of -2 10 V, 0 V, and -10 V. The plots show devices with values of d) tSC =3 nm and Qdope = 0 cm , -2 13 -2 e) tSC =15 nm and Qdope = 0 cm , f) tSC =3 nm and Qdope = -10 cm , g) tSC =15 nm and Qdope = -1013 cm-2...... 98

Figure 4-13: Oxygen plasma doping of contact regions. a) Diagram of oxygen plasma doping under contacts. b) Electrical doping response for different plasma conditions. The doping of the contact regions has little effect on the electrical characteristics...... 100

Figure 4-14: Effect of subsequent lithography on doping response. Transfer characteristics are shown for the initial device, after plasma treatment, and after photoresist has been re-spun on the plasma treated sample, baked, then stripped with acetone. Reapplying the resist can a) completely or b) partially undo the plasma doping effect...... 102

Figure 4-15: Extension doped MoS2 devices. Transfer characteristics as a function of doping time MoS2 devices with uniform and p-i-p doping for a,b) thin and c,d) thick flakes. The black dashed curve plots the gate leakage current and is responsible for the apparent p- branch in all characteristics. While the uniform doping produces a VT shift, p-i-p doping does not improve the p-branch...... 104

Figure 5-1: Uniform and extension doping of 2D FETs. a) Cross section diagram of uniformly surface charge transfer doped back-gated TMD FET. b) Cross section diagram of extension doped TMD FET with both back and top-gates...... 115

Figure 5-2: Two paths of tunneling carrier injection in SB FETs. Path 1 has carriers tunnel diagonally directly into the channel from the corner of the contact. Path 2 operates through vertical thermally assisted tunneling deep into the 2D material under the contact where they then conduct laterally...... 117

Figure 5-3: Standard and contact transmission line measurement structures. a) Standard transmission line measurement structure where the channel length varies while the contact length is constant. b) Contact transmission line measurement structure where the contact length varies and the channel length is held constant...... 118

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Figure A-1: Uniform Fermi-Only Doping TCAD Simulation Results. These simulations only account for Fermi statistics and thermionic emission on devices with ohmic contacts. The doping is n-type and all other quantization and tunneling is neglected. Transfer characteristics of FETs with semiconductor thicknesses of a) 3 nm, b) 15 nm, and c) 30 nm as a function of doping charge. The surface interface charge is negative. Cross sections plotting the absolute value of the total current density for FETs of different thicknesses and doping charge densities at back-gate voltages of 10 V, 0 V, and -10 V. The plots show -2 -2 devices with values of d) tSC =3 nm and Qdope = 0 cm , e) tSC =15 nm and Qdope = 0 cm , f) 13 -2 13 -2 tSC =3 nm and Qdope = -10 cm , g) tSC =15 nm and Qdope = -10 cm . The black lines in the top left and right of the cross sections are the source and drain line contacts, respectively. 133

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List of Tables

Table 3-1: Proton and He+ Ion Stopping Power and Range. Values were obtained through stopping range of ions in matter (SRIM) and transport of ions in matter (TRIM) simulations performed by Tan Shi.43 Displacement threshold energies of 31.7 eV for Mo and 5.0 eV for S were based on molecular dynamics simulations.36 ...... 66

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Acknowledgements

First, I would like to thank my research advisor Prof. Saptarshi Das for sharing his expertise in this new and exciting field of 2D materials. His direction and support enabled me to work on and progress through several projects that I greatly enjoyed. I would also like to thank my EE committee chair Prof.

Thomas Jackson for his guidance, especially in the early days before I found a research advisor. The

Sentaurus simulation results that I obtained and used to discover the physics behind surface charge transfer were made possible through his expertise. I am also grateful to my collaborators on the MoS2 radiation project Prof. Igor Jovanovic and Tan Shi. Their knowledge was essential for the success of that project.

The other members of my research group also provided me with valuable experiences in both teaching and learning. The many discussions we have had about semiconductor physics and 2D devices are probably the most valuable learning experiences I have encountered for the subjects. I greatly enjoyed our time together and consider it to be one of the best parts of my time at Penn State. The exposure to so many projects and topics I might not have otherwise encountered was an incredibly rewarding experience. I would particularly like to thank my cubicle-mate Dan Schulman. The addition of his perspective has helped me solve many of the problems I have encountered on my projects.

During the course of my degree, the Penn State Materials Research Institute nanofabrication lab staff provided invaluable advice. Particularly, without the expertise of Mike Labella, Chad Eichfeld, Shane

Miller, and Bill Drawl, many of the problems I encountered would have been insurmountable. And since they provided advice on all of the fabrication procedures used in the Das group, much of our research would have had difficulty beginning at all without their assistance. I would also like to express gratitude towards

Tim Tighe whose advice greatly sped up the many long hours I spent taking height maps in the AFM lab.

I would also like to thank the source of the funding for my projects. This material is based upon work supported by the Air Force Office of Scientific Research (AFOSR) under Award No. FA9550-17-1-

0018, through the Young Investigator Program. Any opinions, findings, and conclusions or recommendations expressed in this publication are those of the author(s) and do not necessarily reflect the

xv views of the Air Force Office of Scientific Research. This work was carried out using the Penn State

Materials Research Institute Materials Characterization and Nanofabrication Laboratory facilities.

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Chapter 1: Introduction

Parts of this chapter are reproduced from: Schulman, D. S., Arnold, A. J., & Das, S. (2018). Contact engineering for 2D materials and devices. Chemical Society Reviews, 47, 3037-3058.

Introduction

Since the invention of the metal oxide semiconductor field effect transistor (MOSFET) by

Mohamed Atalla and Dawon Kahng in 1959, the transistor size and circuit complexity commercial chips has improved along the exponential path known as Moore’s law. Most commercial processors are fabricated from silicon and use complementary metal oxide semiconductor (CMOS) transistors to form the logic elements needed for the processor to function. Moore’s law has drastically increased the computing power of these processors as the fabrication technology has improved. However, in the past two decades, some aspects of scaling have slowed or stopped. For example, the voltage scaling of field effect transistors (FETs) has stagnated as it has encountered fundamental limitations due to the prevalence of Boltzmann statistics which prevent the scaling of the subthreshold slope and OFF current.1-2 Dimension scaling has also encountered challenges related to fundamental quantum mechanical limitations of the materials which will limit the scalability of these devices in the near future.3 In order to progress past these boundaries, new material systems must be considered. One promising set of semiconductors is two dimensional (2D) materials which possess an ultra-thin body nature that is advantageous for scaling while avoiding short- channel effects.4-5 These materials have a number of other interesting physical properties and have been investigated for applications including straintronics,6 valleytronics,7-8 spintronics,9 quantum tunneling,10-11 negative capacitance,12-14 and brain inspired electronics.15-16

2D Materials

Early investigations into 2D materials centered around the semi-metal graphene which has high carrier mobilities and shows numerous other interesting physical, electronic, and optical properties.17-20

More recently, transition metal dichalcogenides (TMDs) have received increasing attention. These

1 materials have the general chemical form of MX2 where M is a transition metal (Mo, W, Hf, Zr, Sn Re, etc.) and X is a chalcogen (S, Se, Te). Particularly, MoS2, MoSe2, MoTe2, WS2, and WSe2 have been investigated due to their stability and bandgaps (EG) which enable semiconducting behavior. These materials commonly have a trigonal prismatic 2H hexagonal crystal structure as seen in Figure 1-1 with individual layers connected through weak van der Waals bonds with each layer being 0.6 nm to 0.7 nm thick. These van der Waals bonds function as electronic tunneling barriers which provide resistance for carriers tunneling between layers.21 This leads to anisotropic conduction where in-plane conduction has lower resistance than out-of-plane transport.

2D Field Effect Transistors

The structure for 2D FETs most often used in academic experiments is shown in Figure 1-2. A conductive substrate, usually highly p-doped silicon is used as a global back-gate with an oxide on top. This oxide is usually thermally grown SiO2 or atomic layer deposition (ALD) deposited Al2O3 or HfO3 which functions as the gate dielectric. A 2D material is then grown, transferred, or exfoliated on the surface and source and drain contacts are patterned and evaporated on the surface. The FET can then be measured in a probe station by applying voltages to the back-gate, and patterned source/drain pads. The devices used in

++ this work are fabricated on p doped silicon wafers with SiO2 or Al2O3 oxides and flakes are mechanically

2 exfoliated on top. Contacts are pattered with a Vistec EBPG 5200 electron beam lithography tool and the metal stack is deposited using a Kurt Lesker Lab-18 electron beam evaporator. The contacts are either Ni or a Ni/Au stack with Ni on the bottom touching the 2D material.

In practice these transistors are measured by grounding the source terminal and applying biases to the gate and drain. An idealized set of electrical characteristics are shown in Figure 1-3, and band diagrams in Figure 1-3b show the effect of the gate. For a constant positive drain-source voltage (VDS), at a gate source voltage (VGS) of zero volts, the transistor is in the OFF state because the bandgap of the semiconductor forms a potential barrier which blocks conduction of both electrons and holes thereby preventing source-drain current (IDS) flow. When a positive VGS is applied, the gate moves the potential in the channel down by an amount determined by the surface potential, which enables electron conduction.

Because the electron and hole state occupancy is largely determined by Boltzmann statistics, the current switching from the OFF state to the ON state increases exponentially as VGS is modulated as can be seen in

Figure 1-3b. Once the VGS value reaches a specific point called the threshold voltage VT, the band movement nearly stops and the increase in current slows significantly. This rate of this exponential increase is called the subthreshold slope (SS). The same effect happens as VGS is decreased to negative values with the bands aligning for hole conduction. Figure 1-3a,c shows the output characteristics for negative and positive VDS values respectively. At low VDS values, IDS increases linearly and the device behaves like a resistor with a resistance value determined by VGS. As VDS increases, eventually IDS saturates at a value determined by

VGS. It should be noted that the characteristics pictured in Figure 1-3 are idealized. This device shows completely symmetric conduction for elections and holes. In reality, the relative values of these quantities will be determined by various parameters including the carrier mobilities, the density of states for electrons and holes, and the channel doping.

Fermi Level Pinning

Another factor that strongly influences the relative electron and hole currents is the alignment of the energy bands between the contacts and the semiconductor. The position of the metal band is determined by a quantity called the work function (ΦM). Additionally, the semiconductor has two relevant band positions, the conduction band energy (EC) which governs electron energy, and the lower valence band (EV) which determines hole energy. Between these two energies is a range of energy levels called the bandgap

(EG) which possesses no states for electrons or holes to occupy. Another relevant parameter is the electron affinity (χS) which is the difference between the vacuum energy (Evac) and EC. The alignment between these energy levels determines the preferred carrier type and has a strong impact on the contact resistance. For optimal conduction, it is desirable to have the source directly inject carriers into the channel without an energy barrier. If ΦM lies above EC, it will promote direct injection of electrons and if it is below EV it will enable hole injection. However, if ΦM lies somewhere within the bandgap, there will be energy barriers

4 present for both electron and hole conduction called Schottky barriers (SBs). The ideal height of these barriers is determined by the metal work function, the semiconductor electron affinity, and the bandgap as shown in Equation 1-1 and Equation 1-2. Here ΦSB-n is the SB height for electrons and ΦSB-p is the barrier height for holes. The relative height of ΦSB-n and ΦSB-p largely determines whether the FET favors electron or hole conduction at VGS values near 0 V. Ignoring other factors like doping or fixed charges, if ΦSB-n is much smaller than ΦSB-p, the device will conduct electrons at low VGS values. Conversely, if ΦSB-p is smaller, the FET will conduct holes at low VGS values. If ΦM falls near the middle of the bandgap, the electron and hole SB heights will be approximately equal and the device will be in the OFF state at low gate voltages as seen in Figure 1-2b. It should be noted that while the gate will still be able to modulate the surface potential of the semiconducting channel, the energy barriers at the contacts will hinder carrier injection. Electrons and holes must either pass over the barrier by thermionic emission or tunnel through it. Both of these processes will increase the contact resistance.

훷푆퐵−푛 = 훷푀 − 휒푆 Equation 1-1

훷푆퐵−푝 = 퐸퐺 + 휒푆 − 훷푀 Equation 1-2

Figure 1-4a shows the energy bands of common multilayer TMDs and their alignment with various contact metals which are calculated from density functional theory (DFT) simulations.24 The bandgaps of these multilayer materials are indirect and fall in the range of 1-2 eV. However, due to quantum confinement effects and orbital interactions, monolayers of these same materials typically have direct bandgaps that are larger than their multilayer equivalents as shown in Figure 1-4b.24-26 Changing the chalcogen atom from S to Se to Te tends to increase EC and decrease EG. Because of this, the band alignment of sulfides will favor electron conduction more and hole conduction less than selenides and tellurides for a given contact metal under ideal conditions.

Unfortunately, the relationships given by Equation 1-1 and Equation 1-2 are idealized and rarely hold up in practice due to a phenomenon known as Fermi level pinning. Fermi level pinning causes the metal Fermi level to pin at the semiconductor interface energy ΦIS, which lies somewhere in the middle of

6 the bandgap rather than it being strictly determined by the work function. Equation 1-3 shows the effect of

Fermi level pinning on ΦSB-n. The quantity S is called the pinning factor and ranges from 0 to 1. The value of S determines the degree of Fermi level pinning and is defined as the derivative of ΦSB-n with respect to

ΦM as shown in Equation 1-4. If S is near 1, the Fermi level is mostly governed by the metal work function so that ΦSB-n is close to the ideal value. Conversely, if S is close to 0, the Fermi level position will instead be controlled by ΦIS causing the Fermi level position to be relatively constant regardless of the metal used.

It should be noted that the pinning location ΦIS depends heavily on the particular semiconductor being considered.

훷푆퐵−푛 = (푆 ∗ 훷푀 − 휒푆) + (1 − 푆)훷퐼푆 Equation 1-3

푆 = 휕훷푆퐵−푛/휕훷푀 Equation 1-4

2D materials are particularly susceptible to Fermi level pinning which makes it difficult to produce the low-resistance contacts needed for high performance devices. Figure 1-5a shows transfer characteristics

27 of MoS2 transistors which show that MoS2 FETs favor n-type conduction regardless of the contact metal.

Arrhenius measurements were then used to extract the SB heights for the different metals, and as can be seen in Figure 1-5b, the Fermi level pins close to EC. Figure 1-5c plots ΦM vs the SB height and shows that

23, 28-33 a shift in ΦM of over 2 eV produces only about 0.2 eV change in the SB height. This corresponds well with the S value of 0.1 extracted from the fit line and shows that the Fermi level pinning in MoS2 is very strong. However, ΦM is not the only determining factor in Fermi level pinning. Figure 1-5d plots the transfer

27 characteristics of Ni and Pd contacted WSe2 FETs. WSe2 does still experience Fermi level pinning, but the pinning location is closer to the center of the bandgap. However, as seen in Figure 1-5e, the Fermi level position of the two metals are separated by 280 meV despite the fact that ΦM is 5.2 eV for both Ni and Pd.

This indicates that the phenomenon of Fermi level pinning is complicated and depends on more than just the semiconductor material and the metal work function.

Figure 1-5: Fermi level pinning in 2D materials. a) Transfer characteristics of MoS2 FETs for different contact 27 27 metals. b) The extracted band alignments for the MoS2 FETs compared with the metal work functions. c) The extracted Schottky barrier heights for different metals used to contact MoS2 FETs with an extracted pinning factor of 23 27 0.1. d) Transfer characteristics of WSe2 FETs with Ni and Pd contacts. e) The band alignments of the Ni and Pd 27 23 contacted WSe2 FETs with their work functions. Reproduced from Ref. with permission from the Royal Society of Chemistry.

Researchers have not yet come to a consensus on the origins of Fermi level pinning in 2D materials, but have proposed several mechanisms that may affect the band alignment. The metal interface can create states within the bandgap called metal induced gap states (MIGS) which cause the Fermi level to pin to the

34-35 charge neutrality level ECNL. ECNL for various 2D materials is shown in Figure 1-4. However, the positions of ECNL for MoS2 and WSe2 do not line up with the pinning locations found experimentally in

Figure 1-5 which indicates that the MIGS model does not completely explain Fermi level pinning. Defects, vacancies, and impurities have also been associated with Fermi level pinning.36-38 The formation of nanoscale metal grains at the contact interface can induce local strain which can alter the electrical

39-41 properties of the interface. Gong, C. et al., claimed that charge redistribution at the metal MoS2 interface can cause charge redistribution and the formation of dipoles at the interface.42 This can lead to a change in the effective work function of the metal which depends on the specific metal as well as the interface

43-44 configuration. Additionally, in the case of MoS2, it was proposed that interactions between the metal and the chalcogen S can weaken Mo-S bonding which causes states at the band edge to spread into the bandgap near the conduction band resulting in pinning of the Fermi level.42 While the origin of Fermi level pinning is uncertain, its presence makes it significantly more difficult to fabricate low resistance contacts to 2D materials.

Electrical Characteristics of Schottky Barrier FETs

The typical transfer characteristics of an n-FET with SB contacts is shown in Figure 1-6a.23 There are four distinct regions of operation which are determined by the relative importance of the two main components of the total device current. Namely the thermionic current IThermionic which is the current composed of electrons injected over the SB, and ITunnel which is the current resulting from electrons tunneling through the barrier. Both components are affected by the applied VGS as it modulates the surface potential qΨS of the semiconductor channel. It should be noted that the currents seen in Figure 1-6 assume that VDS is large enough to mitigate the effects of the SB at the drain. Figure 1-6b-e shows the band alignment at the contacts as VGS moves the energy bands. At low VGS values, the bands are positioned so that only thermionic emission can inject carriers in the channel. However, as VGS increases, the bands move down, move past the flat band condition, and eventually allow tunneling of electrons through the barrier.

Once VGS passes the threshold voltage VT, the device enters the ON state and the band movement nearly stops.

Figure 1-6: Electrical characteristics of Schottky barrier FETs. a) Transfer characteristics of a SB FET where the colored circles correspond to the thermionic (red), flat band (blue), tunneling dominated OFF state (brown), and tunneling dominated ON state (purple). The band states in these regions are shown in b)-e) respectively. f) Increasing the SB height (ΦSB-n) reduces VFB and the ON current. g) Increasing the SB barrier width (λSB) reduces the slope of the tunneling region and the ON current. h) Increasing the temperature (T) increases the subthreshold slope and both the ON and OFF state currents. Reproduced from Ref. 23 with permission from the Royal Society of Chemistry.

A mathematical description of the thermionic current is given by Equation 1-5 where A is the

Richardson constant, T is the temperature, q is the electron charge, ΦB is the effective thermal injection

23 barrier as a function ΨS, and kB is Boltzmann’s constant. The surface potential is governed by Equation

1-6 where VFB is the flat band voltage and γ is the inverse band movement factor which depends on the oxide capacitance COX, the semiconductor capacitance CS, and the interface trap capacitance CIT. For an ultra-thin body FET which is fully depleted, CS can be neglected in the OFF state operation. In the thermionic region shown in Figure 1-6b, IDS = IThermionic since no tunneling can occur which leads to the exponential dependence of IDS on VGS. A common metric for FET performance is the subthreshold slope given by Equation 1-7. The ideal value the SS is 60 mV/decade, but requires there to be no interface trap

10 capacitance (γ = 1) which is difficult to achieve in experimental devices. However, the influence of CIT can be reduced by increasing COX which can be accomplished by thinning the oxide or increasing its dielectric constant. Considerable effort has been expended by the semiconductor industry to improve the SS through improvement of the oxide capacitance due to its important influence on the device performance.

2 푞훷퐵 퐼푇ℎ푒푟푚𝑖표푛𝑖푐 ≈ 퐴푇 exp ( ) ; 훷퐵 = 훷푆퐵−푛 + 푞훹푆 Equation 1-5 푘퐵푇

푉퐺푆 − 푉퐹퐵 퐶푆 + 퐶퐼푇 푞Ψ푆 ≈ | | , 훾 ≈ 1 + Equation 1-6 훾 퐶푂푋

−1 −1 −1 푑 log(퐼퐷) 푑 log(퐼퐷) 푑훹푆 푑훹푆 푘퐵푇 60푚푉 푆푆 = [ ] = [ ] = [ ] ( 푙푛10) = 훾. Equation 1-7 푑푉퐺푆 푑Ψ푆 푑V퐺푆 푑V퐺푆 푞 푑푒푐푎푑푒

This exponential dependence on VGS continues until the device reaches flat band conditions seen in Figure 1-6c at which point IThermionic becomes nearly constant and independent of VGS. Past this point, the barrier is configured to allow thermally assisted tunneling as shown in Figure 1-6d and any increases in IDS beyond the now constant IThermionic are determined by ITunnel. ITunnel is governed by Equation 1-8 where h is

Planck’s constant, f(E) is the Fermi-Dirac distribution of the electrons in the contact metal, M2D is the number of 2D conducting modes in the channel, and TWKB is the SB transmission probability as determined by the Wentzel-Kramers-Brillouin (WKB) approximation for tunneling through a triangular barrier. M2D is

* given by Equation 1-9 where m is the electron effective mass, and TWKB can be calculated from Equation

1-10 where λSB is the width of the triangular SB. Equation 1-11 shows that the SB width is controlled by the dielectric constants and thicknesses of the semiconductor (휀푏표푑푦 and tbody) and oxide (휀표푥 and tox). This quantity is also known as the geometric screening length. Because both tunneling and thermionic emission are occurring simultaneously, ITotal = IThermionic + ITunnel. Since this excess current is not governed by Equation

1-5, the SS is also no longer represented by Equation 1-7 and has some larger value. This is the cause of the change in slope visible in Figure 1-6a. Once VGS has moved past VT and the device has entered the ON state as shown in Figure 1-6e, the band movement largely stops and the current is completely dominated by ITunnel. Figure 1-6f shows that increasing ΦSB-n decreases the maximum IThermionic because the energy required to inject carriers over the barrier is higher. And since thermionic emission is governed by an

11 exponential Boltzmann relationship, the maximum IThermionic value decreases exponentially. As seen in

Figure 1-6g, decreasing λSB has no effect on the IThermionic but instead improves the ON current by increasing the tunneling probability in Equation 1-8. And since it depends on the thickness and dielectric constant of the oxide, improving the oxide to produce a better thermionic SS will also improve device performance by reducing λSB. Additionally, the dependence on tSC indicates that since 2D materials are atomically thin, they will have an advantage in scaling this barrier thickness. Temperature has a strong effect on both the thermionic and tunneling regimes as can be seen in Figure 1-6g. The SS is degraded by an increase in temperature due to the T dependence of Equation 1-7. Additionally, the Fermi-Dirac distribution which governs carrier energy has a dependence on T which results in an increase in both IThermionic and ITunnel. This analysis of the characteristics of SB FETs shows that the most effective ways of improving the contact resistance is to reduce the barrier height or width.

2푞 훷푆퐵−푛 퐼 = ∫ 푓(퐸)푀 (퐸)푇 (퐸)푑퐸 Equation 1-8 푇푢푛푛푒푙 ℎ 2퐷 푊퐾퐵 푞훹푆

2√2푚∗(퐸 − 푞훹 ) 푀 (퐸) = 푆 Equation 1-9 2퐷 ℎ

8휋 휆 ∗ 3 푆퐵 푇푊퐾퐵(퐸) = exp (− √2푚 (훷푆퐵−푛 − 퐸) ) Equation 1-10 3ℎ 푞훹푆

휀푏표푑푦 휆푆퐵 = √ 푡푏표푑푦푡표푥 Equation 1-11 휀표푥

Two Paths of Carrier Injection

Recent studies have indicated that carrier injection in 2D FETs is more complicated than just the electrons facing a single SB with a constant height and width. The conventional model which can be seen in Figure 1-7a has carriers tunnel through a SB with ΦSB-n determined by Fermi level pinning and λSB determined by Equation 1-11. However, Prakash, A. et al. have proposed a model which proposed two separate carrier injection paths which have different SB conditions depending on the gating of the contact in common experimental FET configurations like the one in Figure 1-2.45 The first path which is shown in

Figure 1-7b has carriers injected directly into the channel from the corner of the contact. The associated

12 band diagram shows that ΦSB-n and λSB are unchanged for path 1. Path 2 has carriers injected vertically deep into the 2D material directly under the contact through thermally assisted tunneling. The tunnel barrier width is determined by tbody and the potential profile under the contact is given by Equation 1-12. Here, VBS is the body to source voltage drop, γC is the band movement factor under the contact, and CS is the semiconductor capacitance. The potential has this form because the oxide and semiconductor behave as two dielectrics in series leading to a voltage drop which depends on VGS. This effect slows the band movement in the contact, but in devices where the oxide is not scaled enough to reduce λSB below tbody, the barrier in this region will be thinner than the path 1 barrier resulting in increased current. Figure 1-7d shows

45 the relative contributions of the IThermionic, Ipath-1, and Ipath-2 for a simulated WSe2 device. In this case the device is dominated by path 2 current in the ON state and IThermionic in the subthreshold region. Prakash, A. et al. found that path 2 dominated current injection in their WSe2 devices, but their analysis of one of their previous black phosphorus (BP) devices found that it was dominated by path 1 current.45-46

Figure 1-7: Two paths of carrier injection in 2D FETs. a) Conventional SB model which does not account for 23 variations in potential near the contact interface. The SB height is determined by Fermi level pinning and λSB is determined by the geometric screening length. b) Path 1 allows the carriers to tunnel directly from the corner of the contact into the channel. This is similar to the traditional model in the sense that ΦSB-n and λSB are unchanged. A band diagram also shows the electrical difference between the two paths. c) Path 2 injects carriers deep into the 2D material vertically under the contact. This injection happens through thermally assisted tunneling as the potential under the contact is modulated by the gate. In this case, the barrier width is determined by tbody. d) Transfer characteristics of a simulated device including all three current components.45 In this case, path 2 injection dominates. Reproduced from Ref. 23 with permission from the Royal Society of Chemistry.

푉퐺푆 퐶푆 휀푏표푑푦 푉퐵푆 = ; 훾퐶 = (1 + ) ; 퐶푆 = Equation 1-12 훾퐶 퐶표푥 푡푏표푑푦

Synopsys Sentaurus TCAD simulations by Arutchelvan, G. et al. provide supporting evidence for

47 this two path model. They matched their simulations to experimental data for two MoS2 FETs with thicknesses of 1.4 nm and 5.9 nm. Cross sections of the current density under the source seen in Figure

1-8a-d shows that carriers are injected under the contact leading to current flow for the 5.9 nm thick device, but not for the 1.4 nm thick device. This is the path 2 current defined by Prakash, A. et al., and as can be seen in Figure 1-8e,f, there is a significant thickness dependence on the relative contribution of the path 2 current. As the semiconductor thickness (tSC) decreases, the contribution of the path 2 current decreases

14 until for the 1.4 nm thick flake, the current is completely dominated by path 1 injection. This is attributed to the SB thickness under the contact. If the total device thickness is comparable to the SB thickness, there are few if any states in the 2D material under the source available for occupation by the carriers injected from the contact. Thus, nearly all carriers are injected directly into the channel through path 1. The existence of this path 1 injection where carriers tunnel diagonally into the channel is further reinforced by the effectiveness of surface charge transfer doping which will be discussed in detail in Chapter 4. Most experiments on this type of doping of 2D materials typically dope the material after device fabrication which limits doping to only the channel region. This prevents the doping from altering path 2 carrier injection under the source since the doping is not present there. The fact that the doping is still able to strongly influence the device characteristics by locally moving the energy bands near the contacts indicates that some injection must occur into the doped region.

Figure 1-8: Current density under the source of MoS2 FETs as a function of thickness. Current density under the 47 source at VGS = 0 V and VGS = 30 V for devices with thickness a)-b) 5.9 nm and c)-d) 1.4 nm. e) Relative contribution of path 2 current. f) Transfer characteristics showing the contribution of path 2 current compared to the total device current for the 5.9 nm thick device. Reproduced from Ref. 47 with permission from the Royal Society of Chemistry.

Improving the Contact Resistance of SB FETs Through Fermi Level Depinning

One of the primary factors limiting the device performance and scalability of 2D-FETs is the large contact resistance resulting from the presence of Schottky barriers at the contacts. Numerous techniques have been investigated to lower the contact resistance in 2D-FETs with varying degrees of success. The simplest contact engineering strategy is to change the contact metal and thereby modulate the SB height.

For example, low work function metal contacts such as scandium have been shown to lower the SB height

21, to ~30 meV and significantly reduce the contact resistance in MoS2 SB-FETs to values of 0.65 kΩ-μm.

28 However, due to the phenomenon of strong Fermi level pinning, the range over which the barrier can be adjusted is relatively small and the technique is only effective if the pinning location is near one of the band edges. The influence of the metal work function can be improved by depinning the Fermi level. If the depinning is complete, i.e. if the Schottky limit is reached, ohmic contacts can be seamlessly realized for most of the 2D TMDs by selecting a metal from Figure 1-4 with the Fermi level lying above the conduction band or below the valence band for n-type or p type 2D-FETs, respectively.

While the origin of Fermi level pinning is still contested within the academic community as was mentioned earlier, DFT simulations show that Fermi level pinning is at least partially dependent on metal- semiconductor interactions which induce states within the bandgap near the interface in a manner consistent with MIGS theory.42, 48 Therefore, if the two materials are spatially separated, the density of the MIGS and hence the extent of the pinning will be reduced. This is most easily accomplished by inserting an ultra-thin insulating layer between the metal and the 2D TMD as shown schematically in Figure 1-9a. The insulating layer attenuates the metal electron wave function before it penetrates the 2D semiconductor, reducing the density of MIGS, and thereby preventing the intrinsic Fermi level from moving towards the charge neutrality level.49 Furthermore, dipole formation at the insulator–semiconductor interface can also reduce the effective SB height. However, an insulating interlayer also introduces an additional tunnel barrier for the carrier injection. Consequently, as the interlayer thickness is increased, there is a tradeoff between a reduction in SB height that improves the contact resistance and a decrease in the transmission probability

16 though the tunnel barrier which increases the contact resistance. This leads to an optimal intermediate value of the interlayer thickness as shown in Figure 1-9b.

The band alignment and the dielectric constant of the interlayer also play an equally important role in determining the desired interlayer thickness as they determine the exponential electron wavefunction decay in the interlayer and therefore the MIGS density, as well as the carrier tunneling probability. For example, Lee, S. et al. demonstrated that inserting a 1.5 nm thick Ta2O5 layer between the Ti contact and the CVD grown MoS2 channel resulted in 2–3 orders of magnitude reduction in the specific contact

50 resistivity (ρC) owing to a reduction in the SB height from ~95 meV to ~30 meV. However, as the Ta2O5 thickness is increased beyond 1.5 nm, ρC starts to increase monotonically as shown in Figure 1-9c. Dankert,

A. et al. demonstrated 2 orders of magnitude increase in ON current, 6 fold increase in field-effect mobility and improved spin injection efficiency in a MoS2 FET by introducing a TiO2 tunnel barrier between the

31 ferromagnetic Cobalt (Co) contact and the 10nm thick exfoliated MoS2. Their findings suggest a reduction in SB height from ~120 meV for Co/MoS2 contacts to ~27 meV for Co/TiO2/MoS2 contacts. Similarly,

Chen, J. et al. also reported an 84% reduction in the SB height for Co contacts to single layer MoS2 FETs

17 by inserting a 2 nm MgO tunnel barrier.51 Finally, Wang, J. et al. showed that 1-2 layers of a CVD grown hexagonal boron nitride (hBN) interlayer can reduce the SB height from ~158 meV to ~31 meV for Ni

52 contacts to MoS2. The above reports clearly point towards the successful depinning of the Fermi level using metal-insulator-semiconductor (MIS) contacts for MoS2, leading to SB heights that are comparable to room temperature thermal broadening of the Fermi function (2kBT/q ~ 50 meV). However, barrier free ohmic contacts at low carrier densities have only been achieved recently by Cui, X. et al. in Co/hBN/MoS2

MIS contacts enabling observation of intriguing quantum phenomena.53 Their XPS measurements showed a reduction in the work function of Co/hBN contacts to 3.3 eV compared to the 5.0 eV for pure Co. This is consistent with DFT calculations by Farmanbar, M. et al., suggesting that the insertion of monolayer hBN can eliminate the interaction between the metal and MoS2 and restore the unperturbed electronic structure

54 of MoS2. In addition, a hBN layer decreases the metal work function by ~ 2 eV for large work function metals, particularly for Co and Ni (111) owing to lattice matching with hBN.54

While many recent experimental and theoretical works have focused on making n-type ohmic or low-SB contacts to TMDs, the readers should note that a similar strategy can be used to fabricate low resistance p-type contacts. DFT calculations by Farmanbar, M. et al. claim that metal/hBN interlayer contacts can enable p-type transport in TMDs if the metal work function is sufficiently high, and/or the

55 TMD ionization potential is sufficiently low. For example Pt/hBN, and Au/hBN contacts to MoTe2 result in a negative SB height for hole injection. Alternatively, one can use a graphene interlayer which is qualitatively similar to that of a hBN monolayer. For example, Liu, Y. et al. fabricated n-type FETs with

Ni/Graphene contacts which produced ON currents as high as 830 μA/μm, contact resistances down to 540

Ω-μm, and SB heights as low as 7 meV.56 The reader should note that, because graphene is a Dirac semi- metal, there is a nonzero density of states above and below the equilibrium Fermi level position. This allows the Fermi level position to shift up and down with an applied gate voltage and can facilitate either electron or hole conduction depending on the gate bias as shown in Figure 1-10. This effect results in a dynamic reduction of the SB height for 2D transistors with graphene contacts if the device is configured so the graphene contact regions are also modulated by the gate. It has been experimentally demonstrated that

18 graphene electrodes can be used to fabricate both n-type and p-type FETs.57-60 Liao, X. et al. used selective hydrogen plasma etching of graphene grain boundaries to fabricate ultra-short channel monolayer MoS2 transistors with graphene contacts and channel lengths as short as 4 nm.59 They measured contact resistances as low as 4.8 kΩ-μm which is significantly higher than some of the other results discussed in this review.

The limited improvement is likely due to the finite gate tunability of the graphene fermi level. Chuang, H. et al. were able to improve the graphene tunability by reducing the EOT through the use of ionic liquid

60 gating in order to produce high quality n-type and p-type WSe2 FETs.

Farmanbar, M. et al. showed that a generic strategy for universally applicable p-type interlayer contacts would necessitate the use of an interlayer material that effectively increases the metal work

55 function such as NbS2, MoO3 etc. as shown in Figure 1-11. NbS2 has a similar structure to that of semiconducting MX2, but is metallic with a high work function close to 6 eV. Monolayer NbS2 interlayers result in negative SB heights for contacts to all MX2 materials irrespective of the work function of the metal, i.e. Au/NbS2 and Al/NbS2 are essentially the same contact. Similarly, MoO3 interlayer contacts enable p- type transport owing to its sufficiently high electron affinity. In spite of being an oxide, it allows transport through its conduction band and hence does not present a tunnel barrier to MX2. Because the interlayer material has such a large impact on the combined metal-interlayer effective work function, alternate interlayer materials can be used to make both n-type and p-type FETs for a given channel material without

19 changing the contact metal. For example, Sata, Y. et al. fabricated both n-type and p-type WSe2 FETs with

Ti/Au contacts by varying the interlayer material.62 A multilayer graphene interlayer produced n-type FETs with ΦSB-n ≈ 63 meV while multilayer NbSe2 resulted in p-type FETs with ΦSB-p ≈ 40 meV. Alternatively, a degenerately doped layer of the 2D channel material can be used as an interlayer to fabricate both n-type and p-type FETs for a given material. Chuang, H-J., et al. demonstrated high performance WSe2 devices

63 using substitutionally Nb doped WSe2 as the interlayer material. They measured contact resistances as low as 300 Ω-μm, drive currents as high as 320 μA/μm, and mobilities of up to 200 cm2/Vs. By adjusting the dopant, Nb for p-type and Re for n-type doping, they were able to fabricate both n-type and p-type FETs for WSe2 and MoS2 while maintaining low contact resistances and high mobilities.

Improving the Contact Resistance of 2D FETs Through Hybridization and Phase Engineering

An alternative improvement method involves the hybridization of the 2D semiconductor underneath the metal contacts. This can be accomplished by using a metal which strongly interacts with the semiconductor through covalent bonding as shown in schematically in Figure 1-12a. It should be noted that the bonding only occurs on the top layer of the 2D material so any benefits are lessened as the semiconductor thickness increases. Kang, J. et al. reported molybdenum contacts to monolayer MoS2 where strong covalent bonding between Mo and the MoS2 significantly reduced the SB height and improved the

20 contact resistance.64 However, covalent bonding between the semiconductor and the contact metal is not always beneficial as shown schematically in Figure 1-12b.65 This was experimentally demonstrated by

English, C. et al. These authors found that the covalent bonding between MoS2 and metals like Ti, Ni, etc. increases the sheet resistivity of MoS2 owing to carrier mobility degradation underneath the contact which ultimately results in higher contact resistance in spite of a lower SB height.66 This finding is contrary to theoretical studies which state that a strong interaction with Ti should metallize the interface and the underlying layer, and hence lower the contact resistance. 67-68 Experimentally, the interface interaction has been shown to be strongly affected by the vacuum pressure during deposition. Ti contacts only interact

-9 65 strongly with MoS2 if they are evaporated under ultra-high vacuum (UHV) conditions of ~10 torr. If they

-6 are evaporated at a higher pressure (~ 10 torr), they oxidize and largely form TiO2 which perturbs the

MoS2 less and results in lower contact resistance values. However, this is not a general trend for all strongly oxidizing, low work function metals as exemplified by the high performance UHV deposited Sc contacted

28 devices discussed previously. Metals like Au, on the contrary, exhibit vdW type interactions with MoS2 as shown schematically in Figure 1-12c, and therefore maintain an unperturbed carrier mobility underneath the contact which aids in achieving lower contact resistance values.66 Recently, Abraham, M. et al. reported annealed Ag contacts to few layer MoS2. They found that annealing at 250 or 300 °C reduced the contact resistance from 800 Ω-μm to 200 Ω-μm, without any detrimental effect on the FET characteristics. They attributed the reduced contact resistance to diffusion of Ag into the MoS2 and subsequent doping of the

29 contact area as shown schematically in Figure 1-12d. Wei, L. et al. found Ag contacts to multilayer WSe2 to have a contact resistance of 6.5 kΩ-μm, two orders of magnitude lower than for Ti contacts.69 Their calculations show that significant Ag-d orbital mixing dopes the WSe2 and therefore lead to lower contact resistances compared to other metals with less orbital mixing such as Al.

Figure 1-12: Interactions between contact metals and 2D semiconductors. a) Mo contacts form covalent bonds 23, 64 with the underlying MoS2 reducing the SB height. b) Ti contacts also form covalent bonds with MoS2, but perturb the underlying layers increasing the contact resistance.66 c) Au contacts form van der Waals type interactions with 66 MoS2 which do not perturb the carrier mobility under the contact. d) The annealing of Ag contacts at 250 or 300 °C 29 results in the intercalation of Ag between the MoS2 layers which decreases the contact resistance. e) Treatment with n-butyl lithium in the patterned contact areas before metal deposition converts the monolayer MoS2 from the semiconducting 2H phase to the metallic 1T phase, greatly reducing the contact resistance.70-71 Reproduced from Ref. 23 with permission from the Royal Society of Chemistry.

Finally, an elegant approach of transforming the 2D semiconductor underneath the contacts into a metal or metal like state is phase engineering as shown schematically in Figure 1-12e. Kappera, R. et al. demonstrated that immersing monolayer MoS2 in n-butyl lithium can convert ~60-70% of treated region from the semiconducting 2H phase to the metallic 1T phase.70-71 The n-butyl lithium donates charge to the

MoS2 converting it to the metastable 1T phase which remains even after removal of the n-butyl lithium.

The 1T MoS2 under the contacts has an atomically sharp phase boundary with the 2H channel and eliminates the Schottky barrier under the contacts, drastically improving the contact resistance to values as low as 200

Ω-μm.71 Cho, S., et al. demonstrated a similar process which used a 26 mW laser to locally induce a phase change under the contact regions in MoTe2 FETs from the 2H semiconducting phase to the distorted 1T’ metallic phase.72 They found that this process reduced the SB height from ~200 meV to ~10 meV and increased the mobility from ~ 1 cm2/Vs to ~50 cm2/Vs.

Dissertation Organization

The remainder of this dissertation focuses on topics related to applications of 2D FETs or the improvement of their performance. Because 2D materials have an advantage in scalability they may be suitable for a variety of applications. Chapter 2 focuses on the use of MoS2 FETs for neuromorphic computing applications. The back-gated 2D devices used in academic research typically have non-ideal hysteresis effects which cause the drain current to depend not only on the current VGS potential, but also the history of applied potentials. This phenomenon is used to mimic several behaviors of biological neurotransmitter release. Chapter 3 studies the resistance of the electrical characteristics of MoS2 transistors to high energy He+ and proton radiation. Studies in the literature have previously investigated these effects, but they do not account for effect of the oxide on the extracted radiation effects. The study described in this dissertation uses a novel experimental method to decouple the radiation effects on the MoS2 itself from the effects on the gate dielectric. Finally, Chapter 4 investigates the physics of surface charge transfer doping of 2D materials. Surface charge transfer doping alters the potential of a 2D semiconductor by placing fixed charge in a desired location. Many studies have investigated different methods for inducing this doping, but the work described here is the first to comprehensively explain the physics of how this doping works in 2D materials and describe the requirements for such doping to be effective in improving FET performance.

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Chapter 2: MoS2 Synaptic Device

Portions of this chapter are reproduced from: Arnold, A. J., Razavieh, A., Nasr, J. R., Schulman, D. S., Eichfeld, C. M., & Das, S. (2017). “Mimicking Neurotransmitter Release in Chemical Synapses via

Hysteresis Engineering in MoS2 Transistors.” ACS Nano, 11(3), 3110–3118.

Introduction

Neuromorphic computing is an alternative method of computation which is advantageous for addressing certain types of problems.1 Hardware-implemented neuromorphic networks are highly parallel with low power requirements and often have integrated memory and processing. The inherent parallelism of neuromorphic systems makes them advantageous for certain real time applications such as digital image reconstruction, vision systems, audio and image recognition, autonomous robot control, and real time control.1 These systems also have the potential for machine learning which improves their efficiency during computational tasks. Additionally, neuromorphic computing systems can be used for modeling of biological neural behavior when traditional supercomputers would encounter issues with speed, power, or scale.2

Numerous methods have been used in the literature to mimic the behavior of neurons and synapses. The most common method is the use of very large scale integrated (VLSI) analog silicon complementary metal oxide semiconductor (CMOS) circuits.3-4 These circuits have the advantage of being extremely scalable since they are fabricated using conventional silicon wafer processing techniques. However, each neuron or synapse requires an analog circuit which increases the complexity of the network. A promising alternative to CMOS circuits for synaptic devices is memristors which vary their resistance based on their history of current flow. Hybrid structures composed of memristor cross bar arrays combined with silicon CMOS circuitry have been used for neuromorphic computing applications.5-7 The use of memristors allows each synapse to be modeled by a single memristor which reduces the overall circuit complexity of the network.

8-10 11 2D materials have also been used for memristors. For example, MoS2, organic core-sheath nanowires, carbon nanotubes,12 black phosphorus,13 and graphene14 have been used to fabricate memristors for synaptic

29 applications. This chapter focuses on a more detailed mimicry of the behavior of chemical synapses than is typically present in neuromorphic computing hardware.

MoS2 FET

An MoS2 field effect transistor (FET) is used to mimic the critical behaviors of neurotransmitter release. A cross section diagram of the device is shown in Figure 2-1a and an optical image of the device is shown in Figure 2-1b. The device has a channel length of 200 nm, and a width of 6 μm. The MoS2 was deposited using standard mechanical exfoliation techniques and has a thickness of 2 nm as measured by

++ atomic force microscopy (AFM). The oxide is 100 nm of thermally grown SiO2 on a p silicon wafer and the contacts are 120 nm of nickel. Before device fabrication, the device was annealed in forming gas at

250°C for three hours. Figure 2-1c,d shows the transfer characteristics and output characteristics, respectively. These characteristics are typical for exfoliated MoS2 devices.

Figure 2-1: MoS2 neuromorphic FET. a) Cross sectional schematic, b) optical image, c) transfer characteristics, and d) output characteristics of the MoS2 FET used to mimic synaptic behavior. The channel length is 200 nm, the SiO2 thickness is 100 nm, and the MoS2 flake is 2 nm thick as measured by atomic force microscopy. Reproduced from Ref. 15 with permission from the American Chemical Society.

The mechanism used to mimic the behavior of the neurotransmitters with this MoS2 FET is the hysteresis in the transfer characteristics. Figure 2-2a shows that the device experiences hysteresis which increases in intensity as the gate voltage (VGS) sweep range increases. Additionally, as shown in Figure

2-2b, longer sweep times also increase the severity of the hysteresis. These sweeps begin at 60 V, move to

-60 V and then return to 60 V. When VGS is positive, the threshold voltage (VT) shifts more positive (to the right), which in an n-type FET decreases the current. Conversely, when VGS is negative, VT shifts more negative (to the left), which increases the current. This causes the difference between the forward and reverse sweeps seen in Figure 2-2a,b. As will be discussed more later, a neuron’s emission a signal is determined by the postsynaptic potential (PSP). This device uses the source-drain current (IDS) as an analog to the PSP which will be referred to as the postsynaptic current (PSC).

Studies in the literature have proposed three main sources for the hysteresis seen in MoS2 FETs. Li et al., proposed that adsorbed H2O and O2 molecules on the surface of the MoS2 can trap electrons from the

16 MoS2 channel depending on the applied VGS as shown in Figure 2-2c,d. At large positive VGS values, the channel has a high electron concentration which leads to the trapping of a portion of the electrons by the adsorbed molecules leading to a positive VT shift. Conversely, at large negative VGS when the channel is depleted of carriers, electrons are released from the adsorbed molecules which reduces the electron

32 depletion and shifts VT negative. The extent of the VT shift is determined by the magnitude of the applied

VGS bias. Increasing the stress duration has also been shown to increase the number of adsorbates which matches the trends seen in Figure 2-2b.17 The second proposed mechanism is that electron trapping and de-

18-19 trapping at the MoS2 oxide interface can induce hysteresis in MoS2 FETs. These trap states have a range of energy levels as shown in Figure 2-2e. Their occupation is governed by Fermi-Dirac statistics and changes as the applied gate potential alters the Fermi level (EF). Negative VGS values lower EF, reducing the occupation of trap states, which releases electrons into the channel and induces a negative VT shift.

Positive VGS potentials have the opposite effect. The third mechanism behind the hysteresis is the charging

20 and discharging of defect states within the MoS2 as shown in Figure 2-2f. Hysteresis has been observed in suspended MoS2 devices in high vacuum conditions indicating the presence of trap state charges not related to adsorbates or interface states. The trap states must then originate from the MoS2 itself. The hysteresis effects were also found to be more severe for thinner devices indicating that they were more strongly related to defects near the surface of the MoS2 flakes rather than the interior. Regardless of the source, the hysteresis is used to mimic neurotransmitter release by modifying the source-drain current (IDS) of the MoS2 FET based on applied VGS pulses. The key factor in the functioning of this that makes the mimicry possible is that the changes in current have some memory and do not immediately revert to their original values. It should also be noted that because the hysteresis is so fundamental to these synaptic devices, the choices of MoS2 or 2D materials in general as the channel material are not required for the device to function. In fact, any FET with similar hysteresis effects should be able to function analogously to the device presented here.

Neurons and Synapses

In order to understand the functioning of neuromorphic computing hardware, it is first necessary to understand the behavior of biological nervous systems. Biological nervous systems are composed of cells called neurons which are linked to each other through synapses.21 A diagram of a typical neuron and synapse can be seen in Figure 2-3a. Here, as is the case in most mammalian neurons, the synapse is located between the axon of the presynaptic neuron and a dendrite of the postsynaptic neuron. However, synapses may also

33 link between any combination of pre and post-synaptic axons, somas, and dendrites.22 Each neuron can possess many synaptic connections which allow the neurons to send signals and propagate information throughout the neural network. The human brain is massively parallelized with a total number of neurons in an average adult brain of about 86 billion and a total number of synapses of about 1.5*1014.23-24

Additionally, there are two main types of synapses. Electrical synapses communicate by transmitting an electrical signal between the pre and postsynaptic neurons. Chemical synapses convert the electrical signal into a chemical signal through the use of chemicals called neurotransmitters.

Neurons communicate using pulses called action potentials. When a neuron emits an action potential, it travels along the axon to the to the synapses. The action potential triggers the fusion of vesicles containing neurotransmitter molecules with the cell membrane which releases the neurotransmitters into the synaptic cleft as shown in Figure 2-3b. These molecules bind to receptor sites on the postsynaptic neuron which open channels allowing Ca+2 ions to diffuse into the postsynaptic neuron.21 The postsynaptic neuron has an ionic chemical potential called the postsynaptic potential (PSP) which is altered by the presence of the Ca2+ ions. The influence of multiple action potentials has a cumulative effect on the PSP as shown in

Figure 2-3b. When the PSP reaches a certain threshold value, the postsynaptic neuron releases its own action potential which propagates the signal to the next neuron. The effect of any given synapse on the PSP is therefore largely determined by the release of neurotransmitters by the presynaptic neuron in response to an action potential. This release has three main characteristics which determine the response of the PSP and will be addressed by the MoS2 device, namely quantal, stochastic, and bipolar release.

Quantal release refers to the fact that each vesicle contains approximately the same number of neurotransmitter molecules.25 The exocytosis of a single vesicle will release the minimum possible number of neurotransmitter molecules resulting in the smallest possible signal one neuron can send to another through a chemical synapse.25 The summation of these minimum signals forms the PSP or in the case of this MoS2 device, the PSC which will therefore be an integer multiple of the minimum value. Thus, the

PSC is also an integer multiple of the minimum value and is proportional to the number of released vesicles and the number of neurotransmitter molecules released into the synaptic cleft. The number of released vesicles depends on the strength of the action potential which is constant. Therefore, the strength of the response is determined by the frequency of action potentials firing. The PSC as a function of the number of neurotransmitters per vesicle (nT) and the number of action potentials (nAP) is given by Equation 2-1. The functional dependence of the number of vesicles released on the number of action potentials 푓(푛퐴푃) is unknown. However, 푓(푛퐴푃) will increase with increasing values of nAP and eventually saturate to some maximum value corresponding to the total number of vesicles present in the presynaptic terminal. As will be discussed later, this aspect of neurotransmitter behavior can be modeled through the application of VGS pulses to the hysteretic MoS2 FET.

푃푆퐶 ∝ 푛푇푓(푛퐴푃) Equation 2-1

Stochastic release of neurotransmitters refers to the fact that vesicle exocytosis is probabilistic in nature and there is some finite probability (pr) of neurotransmitter release with a presynaptic action potential.26 In biological synapses this probability varies significantly between different synapses and varies with time or other physiological conditions.27-28 Synapses can also adjust their neurotransmitter release

35 probability through feedback processes over short time scales and through long-term synaptic plasticity.29

The nature of these stochastic processes within biological synapses is still under investigation. However, this stochasticity strongly influences the functioning of biological synapses and must be accounted for in any system seeking to mimic the neurotransmitter behaviors of these synapses. In this MoS2 FET, the pulse amplitude can be used for this purpose and normalized into a probability. This leads to the modification of

Equation 2-1 into Equation 2-2 where pr is the vesicle release probability.

푃푆퐶 ∝ 푝푟푛푇푓(푛퐴푃) Equation 2-2

Bipolar release refers to the fact that neurotransmitters can be either excitatory or inhibitory.

Excitatory neurotransmitters such as glutamate, raise the PSP bringing the postsynaptic neuron closer to firing an action potential.30-32 Inhibitory neurotransmitters such as gamma-Aminobutyric acid (GABA), have the opposite effect, and lower the PSP. There are a wide variety of neurotransmitters, but their effects can typically be categorized as excitatory or inhibitory. An individual neuron may receive thousands of signals from the many adjacent neurons it connects to through synapses. These signals all combine to form the total PSP within the neuron that determines when it emits an action potential. In the case of the MoS2 device, bipolar nature of neurotransmitters can be captured through the polarity of the input gate pulses.

This is possible because positive and negative pulses produce opposite VT shifts.

MoS2 FET Pulse Response

Figure 2-4a,b shows the VGS pulses applied to the back-gate of the MoS2 FET to establish its excitatory and inhibitory neurotransmitter responses. The pulse train consists of seven groups of with pulse numbers ranging from 1 to 25. The pulse time (tp) is 10 ms and the pulses are 40 ms leading to a total time of 50 ms. All pulse measurements are done with VD = 0.5 V. Each pulse train has a constant amplitude which ranges from 10 to 60 V for both positive and negative pulses. These pulse magnitudes are large due to the 100 nm SiO2 gate oxide used which is significantly thicker than in typical commercial FETs. Figure

2-4c,d shows the IDS response to the applied pulse trains for the positive and negative pulses, respectively.

Negative pulses increased the drain current due to negative VT shifting while positive pulses decreased the

36 current by producing positive VT shifts. The large spikes in the current are because the current is measured during the pulse application. For the data points during the actual pulses, VGS is biased at the pulse voltage which changes IDS relative to all the other data points. In the case of positive pulses, this is a positive voltage which increases the current. During negative pulses, VGS will be negative, which lowers the current relative to the VGS = 0 V condition of the rest of the data points.

It should be noted that in between the application of the pulse sequences in Figure 2-4c,d, the FET was returned to the same original state through the application of a long constant VGS potential. For the positive pulse train in Figure 2-4a,c a long negative VGS potential was applied to produce a large negative

VT shift. Conversely, for the negative pulse train in Figure 2-4b,d, a long positive potential was applied to shift VT positive. This was done because IDS and the pulse responses strongly depend on the initial

37 occupancy of the trap states. Figure 2-5a,b shows the response to a pulse sequence applied five consecutive times without resetting the trap states to a constant value in between applications. It should be noted that this is a different sequence from that used in Figure 2-4, consisting of a single pulses with magnitudes from

5 V to 30 V in steps of 5 V, and that these measurements were done on a different device from that used for all other measurements in this chapter. Figure 2-5a shows the response to a positive sequence while

Figure 2-5b shows the influence of a negative sequence. In both cases, each successive application of the sequence has a smaller effect because an increasing number of trap states are already occupied due to the previous pulses. Eventually, the responses begin to saturate as the trap state occupancy approaches the maximum value. This shows the importance of returning the trap state occupancy to a constant value between pulse sequence applications as was done in Figure 2-4. However, it is nearly impossible to reliably set the occupancy to the unbiased equilibrium value without letting the states depopulate naturally which as will be discussed later, can take hours. Instead, applying large constant biases can nearly fully populate or depopulate the states in a repeatable way. This was done for the measurements in Figure 2-4c,d by applying -60 V for the positive pulse sequence measurements and 60 V for the negative pulse train measurements. It is important to use the opposite polarity of the pulses because otherwise the trap states that would be filled or emptied by the pulses will already have been set to that occupancy by the reset bias.

The transient response of the MoS2 FET seen in Figure 2-4c,d can be explained using a simple physics-based model which accounts charge trapping and de-trapping. In the linear region, when the drain- source voltage (VDS) is small, IDS is governed by Equation 2-3 where μn is the electron mobility, Cox is the oxide capacitance, W is the channel width, L is the channel length, VGS is the applied gate voltage, and VT is the threshold voltage. The influence of trap states on VT is described by Equation 2-4 where QIT is the dynamic trap charge that can be modulated VGS pulses, and VT0 is the steady-state threshold voltage when

QIT = 0. It should be noted that in this discussion, the dynamic trap charge QIT may not be the total trap charge. If some trap charges are not affected by the VGS pulses, they will be accounted for in the initial position of VT0. When the interface charge is affected by a VGS pulse, the trap state charge changes as a function of time (t) according to Equation 2-5 where τC is the trapping time constant and QM is the maximum trap charge that can be produced by a pulse of magnitude VP. QM is governed by standard Boltzmann statistics as seen in Equation 2-6 where VA is the pulse activation voltage, Q0 is a scaling factor that represents the occupancy when no pulse is applied, and the positive and negative sign account for the polarity of the voltage pulse. VA and τC will be used as fitting parameters for the experimental data.

푊 퐼 = 휇 퐶 (푉 − 푉 )푉 Equation 2-3 퐷푆 푛 푂푋 퐿 퐺푆 푇 퐷푆

푄퐼푇 푉푇 = 푉푇0 + Equation 2-4 퐶푂푋

푑푄퐼푇(푡) 푄푀 − 푄퐼푇(푡) 푡 = ; 푄퐼푇(푡) = 푄푀 [1 − exp (− )] Equation 2-5 푑푡 휏퐶 휏퐶

|푉푃| 푄푀 = ±푄0 exp ( ) Equation 2-6 푉퐴

For the MoS2 FET, the PSC will be defined as the difference in IDS (ΔIDS) from the initial reset value it is returned to between pulse sequences and is given by Equation 2-7. Here γ is a fitting parameter related to Q0. Additionally, tT is the total time the nonzero back-gate voltage was applied during the pulse train so 푡푇 = 푁푡푃 where N is the number of pulses and tP is the length of an individual pulse (10 ms).

Because the FET is operating in the linear region, ΔIDS is proportional to the change in threshold voltage

(ΔVT) which is itself proportional to QIT. The PSC as governed by Equation 2-7 appears as the large spikes in Figure 2-4c,d. As will be discussed more later, after the initial VT shift, the current returns to its original value as the trap state population decays towards its equilibrium value with a discharging time constant τD.

This decay time is much larger than the 40 ms separation between the pulses and the 250 s of the total measurement time, so the application of a string of separate pulses or even the entire pulse sequence can be considered equivalent to applying a single long pulse. Later this discharging will be used to mimic the biological phenomena of long-term potentiation (LTP) which is responsible for memory formation.

|푉푃| 푡푇 PSC = Δ퐼퐷푆 ∝ − Δ푉푇퐻 ∝ −푄퐼푇(푡푇) = ∓훾 exp ( ) [1 − exp (− )] Equation 2-7 푉퐴 휏퐶

MoS2 FET Postsynaptic Current

The excitatory postsynaptic current (EPSC) is defined as the change in IDS following the application of negative VGS pulses and inhibitory postsynaptic current (IPSC) is defined as the change in IDS caused by positive VGS pulses. For the purposes of mimicking neurotransmitter release, the number of pulses N is considered equivalent to the number of action potentials nAP. In other words, the application of multiple pulses can be considered analogous to the quantal release of neurotransmitters where the total effect of

40 multiple pulses has some functional dependence on the number of pulses. Figure 2-6a,b shows the EPSC and IPSC response of the MoS2 FET as a function of N and VP. This data is extracted from Figure 2-4c,d by evaluating ΔIDS immediately following each pulse group and plotting against the cumulative number of pulses applied. The dashed lines are fit to the data using Equation 2-7 with the fitting parameters γ, VA, and

τC. For the curves in Figure 2-6a,b, VA = 20 V, τC = 110 ms, and γ is varied to provide the best fit. Both the

EPSC and IPSC initially increase sharply when tP is not sufficient to charge all traps. However, they eventually saturate when the number of occupied states approaches the maximum value that can be filled when VGS = VP. It should be noted that the large deviation of the fit from the experimental data comes from the unphysical assumption in Equation 2-7 that the trap states have a single charging time constant. Since these trap states may originate from several different sources, they have a variety of different energies and time constants. The exact number of trap states and their energies and time constants is unknown which makes it impossible to get an exact fit of the data. However, since synaptic function depends only on the presence of hysteresis, an alternative material system with more controllable trap states could be used to fabricate a device which follows these trends more exactly.

Figure 2-6c,d plots the EPSC and IPSC as a function of the pulse magnitude for one and six pulses.

These are extracted from Figure 2-4c,d as the cumulative change in current resulting from the one and five pulse groups for all six pulse magnitudes. The dashed lines are curves fit exponentially from Equation 2-7 using the same fitting parameters from earlier, namely VA = 20 V, τC = 110 ms, and γ is varied to provide the best fit. The relationship shown here can be modified to mimic the stochastic release of neurotransmitters by normalizing the VP dependence of the EPSC and IPSC into probability of exocytosis

(pr) with respect to the maximum VGS pulse amplitude VM as seen in in Figure 2-6e,f. Here VM is chosen so that the maximum probability is reached at the edge of the plotting range. However, VP corresponding to a unity probability can be adjusted by modifying VM, which provides the synaptic device with a degree of customizability.

Equation 2-8 provides a combined model for the three elements of neurotransmitter release mimicked by the MoS2 FET. First, bipolar release is captured by the variable sign of the PSC. Second, the

42 stochastic release is modeled by the pr term which normalizes of the pulse amplitude dependency into a probability as discussed earlier. The remainder of the VP dependence is contained in the nT term. The use of a constant VP in the device results in the assumption of a constant number of neurotransmitters per vesicle

(nT) is assumed which is typically the case in biological synapses. Finally, the 푓(푛퐴푃) term represents quantal release and provides a functional dependence of the PSC on the number of applied action potentials

N. Thus, this model successfully captures the three main time-independent aspects of neurotransmitter release.

푃푆퐶 = Δ퐼퐷푆 = ±푛푇푝푟푓(푛퐴푃)

Equation 2-8 |푉푀| |푉푃| − |푉푀| 푁푡푃 푛푇 = [훾 exp ( )] ; 푝푟 = [exp ( )] ; 푓(푛퐴푃) = [1 − exp (− )] 푉퐴 푉퐴 휏퐶

Long-Term Potentiation

Synapses also have the ability to strengthen or weaken over time depending on their levels of activity. This phenomenon is known as synaptic plasticity and is important for learning and memory formation in biological systems.33 Repeated signals can trigger a long-lasting increase in the responsivity of excitatory synapses in a process known as long-term potentiation (LTP). A similar process also occurs within inhibitory synapses producing long-term depression (LTD). The MoS2 FET can mimic the LTP process by utilizing the long decay time of the trap charges. Figure 2-7a shows the IDS decay in response to a single -60 V VGS pulse with a duration of 50 ms. Equation 2-9 shows the time dependence of IDS after a pulse has ended. IF is the total device current after an excitatory pulse, I0 is the steady state current after the trap states have decayed to their equilibrium values, and EPSC is the excitatory postsynaptic current triggered by the applied VGS pulses. An exponential fit from this relationship is then used to extract a decay time constant (τD) of 6000 s. The initial deviation from the exponential behavior seen in Figure 2-7a is caused by the presence of multiple, faster, decay time constants resulting from the multiple sources of trap states. The long-term decay of the PSC can thus be considered analogous to LTP, and the LTP decay time

(tLTP) can then be defined as the time required to restore IDS to its original equilibrium value. This results in the quantitative relationship seen in Equation 2-10. This relationship, combined with the extracted value of

τD, can then be used to extract tLTP as a function of VP and nAP from the pulse responses in Figure 2-4d. The extracted values seen in Figure 2-7b range from minutes to hours which is similar to LTP in biological synapses. Additionally, as was mentioned earlier, the decay time is much longer than the time between pulses or groups of pulses within the pulse sequences applied in Figure 2-4a,b. This justifies the assumption that these sequences can be treated similarly to a single, longer pulse.

푑[퐼(푡)] 퐼(푡) 푡 = − ; 퐼(푡) = 퐼퐹exp (− ) ; 퐼퐹 = 퐼0 + 퐸푃푆퐶 Equation 2-9 푑푡 휏퐷 휏퐷

푡퐿푇푃 퐸푃푆퐶 퐼0 = (퐼0 + 퐸푃푆퐶)exp (− ) ; 푡퐿푇푃 = 휏퐷 ln (1 + ) Equation 2-10 휏퐷 퐼0

OFF State Biasing

Because tLTP is defined as the time required for the EPSC to decay to the equilibrium current value, biasing the FET to lower this value can significantly increase the decay time to values approaching one day.

Figure 2-8a shows the IDS response to pulse sequences with amplitudes (VP – VB) ranging from -10 V to -

40 V where VB = 20 V is the bias voltage between pulses. For example, in the case of the -40 V pulses, the

VGS would switch between -20 V and -60 V. The -20 V bias places the device in the OFF state which significantly lowers I0. Figure 2-8b,c plots the EPSC as a function of nAP and VP. The observed trends are

44 similar to those seen in the ON state pulse responses in Figure 2-6a,c. The main difference is the logarithmic y-axis which is necessary due to the exponential dependence of IDS on ΔVT for subthreshold operation given by Equation 2-11. Here kB is the Boltzmann constant, T is the temperature in Kelvin, q is the electron charge, m is the subthreshold slope ideality factor, and I0 is the current for the chosen gate bias when the trap state population is in equilibrium and VT = VT0. However, as can be seen by the current values in Figure

2-8a, while the device starts biased in the OFF state, the exponential increase in IDS with the shifting VT quickly moves the device into the ON state at the -20 V bias point. This also accounts for some of the fitting problems seen in Figure 2-8b,c. In both cases, because the device moves into the ON state, Equation 2-7 is used for the fitting as it was in Figure 2-6. The shift in VB required an adjustment in VA which was fit to a value of 8.3 V, but the value of τC = 110 ms is the same as was used in the ON state pulse responses. The issue with the multiple time constants discussed earlier is still present. However, now the device is governed

Equation 2-11 for low IDS values. This explains why the fit in Figure 2-8c is good for large pulses but breaks down for data points corresponding to low IDS values. Figure 2-8d shows the extracted tLTP values for the subthreshold bias pulse responses in Figure 2-8a using the same decay time constant τD of 6000 s extracted in Figure 2-7a. Because the EPSC is orders of magnitudes higher than the steady state current for subthreshold bias points, the extracted tLTP values are significantly larger than the corresponding linear region values in Figure 2-7b.

−푞∆푉푇 퐼퐷푆 = 퐼0 exp [ ] Equation 2-11 푚푘퐵푇

Conclusion

In conclusion, the hysteresis in an MoS2 FET was used directly mimic the behaviors of neurotransmitters. The IDS response to applied VGS pulse sequences was measured and the change in current was related to the effect excitatory or inhibitory neurotransmitters on the postsynaptic potential. Negative

VGS pulses were found to increase IDS and so were related to EPSC while positive VGS pulses reduced IDS and so were related to IPSC. The effect of the number of pulses on IDS was also extracted and was used as

46 an analog to the functional dependence of the PSP on the number of action potentials. The probabilistic nature of neurotransmitter release was also modeled by normalizing the exponential dependence of the PSC into a probability. Additionally, the long decay time of the trap states was used to show that the effects of pulses on the PSC has long-term effects similar to the biological process of long-term potentiation. This decay time can also be significantly increased by adjusting the bias point of the transistor into the subthreshold region. These experiments show that this device is capable of mimicking the bipolar, quantal, and stochastic release of neurotransmitters as well as long-term potentiation. Finally, it should be emphasized that the effects seen here are not limited to only MoS2 transistors, and will appear in any FET with trap state induced hysteresis. An alternate material system could be used to deliberately introduce these trap states allowing the neurotransmitter effects to be more precisely controlled.

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14. Darwish, M.; Calayir, V.; Pileggi, L.; Weldon, J. A., Ultracompact Graphene Multigate Variable Resistor for Neuromorphic Computing. IEEE Transactions on Nanotechnology 2016, 15 (2), 318-327.

16. Li, T.; Du, G.; Zhang, B.; Zeng, Z., Scaling Behavior of Hysteresis in Multilayer MoS2 Field Effect Transistors. Appl Phys Lett 2014, 105 (9), 093107.

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Chapter 3: Radiation Resistance of MoS2

This chapter is reproduced from: Arnold, A. J., Shi, T., Jovanovic, I., & Das, S. (2019).

Extraordinary Radiation Hardness of Atomically Thin MoS2. ACS Applied Materials & Interfaces, 11(8), 8391–8399. The irradiation and simulations were done by Tan Shi.

Introduction

This chapter focuses on the effects of high-energy radiation on the electronic properties of transition metal dichalcogenides (TMDs). Radiation damage is important to consider for electronics in space and certain nuclear applications. These effects have been investigated in several previous studies on TMD based field effect transistors (FETs). For example, the effects of helium ion bombardment on the optical and electrical properties of MoS2 and WSe2 have been characterized using Raman spectroscopy and electrical measurement.1-2 Another study has investigated the influence of a helium ion beam on spatially tunable

3 12 14 transport in WS2 and WSe2. Kim et al. measured the effects of 10 MeV with fluences between 10 to 10

2 4 ions/cm on the electrical characteristics of MoS2 FETs. They suggested that the degradation of the electrical characteristics was caused by the formation of trap states in the SiO2 combined with the effects of newly created trap states at the MoS2-SiO2 interface. This is similar to the process that occurs in traditional silicon FETs when they are exposed to radiation. Dhakras et al., investigated the influence of

11 14 2 proton radiation with fluences of 10 -10 ions/cm WSe2 FETs and found that oxide charges created by

5 the radiation severely degraded the subthreshold slope. Lu et al., found that MoS2 FETs irradiated by 30

6 keV electrons showed a threshold voltage (VT) shift which changed polarity with increasing dose. At low fluences, the devices experienced a negative VT shift which was attributed to the presence of oxide charges.

At higher doses, the shift became positive which was attributed to the dominance of interface trap states.

Investigations of the effects of 10 keV X-rays and heavy ion bombardment on TMD materials have also been investigated.7-8 Additionally, studies have also been conducted on the effects of ionizing radiation on

9 10-11 12 FETs fabricated from graphene, carbon nanotubes, and MoS2-graphene heterostructures.

These studies are similar to radiation hardness experiments conducted on existing silicon technologies. It has been shown that radiation from protons, α-particles, and heavy ions damages silicon primarily through coulomb scattering and subsequent cascading effects.13 However, at very high energies elastic and non-elastic strong nuclear force interactions can also occur.13-14 It should be noted that the ion energies required to achieve these strong force interactions are significantly higher than those used in the

2D radiation experiments discussed here. Investigations of radiation hardness of silicon complementary metal oxide semiconductor (CMOS) technologies place more emphasis on scaling than the 2D experiments discussed earlier since silicon devices have been aggressively scaled over the past half-century. This focus on scaling is necessary since the physical size and configuration of the device has a strong influence on its radiation hardness. For example, it has been shown that scaling the feature size in silicon integrated circuits

(ICs) from 600 nm to 130 nm increases the radiation hardness to total ionizing dose (TID) effects by over a factor of 10.15 Unfortunately, this radiation hardness can show strong variability between different foundries or lots and even within the same wafer.16-18 In modern silicon CMOS technologies, the radiation hardness is not limited by radiation-induced gate oxide leakage since the oxides have become so thin that any trapped charge can either be neutralized by thermal emission or tunnel out of the oxide.15, 19 Instead, the primary problem is charge trapping in the field isolation buried oxide which can induce sidewall leakage current.15, 20 The corresponding effect in silicon on insulator (SOI) CMOS ICs is back-channel leakage formed when radiation induced charge formed in the buried oxide creates an inversion path at the back silicon-oxide interface.15, 21 This radiation induced back channel is particularly damaging in fully depleted

SOI technologies since the gate controlled top channel and the radiation induced back channel are strongly coupled.22-24 Additionally, the radiation hardness of SOI devices is heavily dependent on the buried oxide material and thickness.25-28 Aside from the radiation-induced leakage current, the threshold voltage and subthreshold slope may be shifted. The impact of radiation induced charge in the back channel is also strongly affected by the device geometry. Multi-gate structures such as FinFETs possess additional lateral gate control from the sides of the fin which produce electric field distortions that reduce the total amount of trapped charge at the silicon-buried oxide interface and thereby diminish the influence of the radiation.25,

29-31 Because of this, narrow FinFETs are more resistant to TID effects than planar SOI devices. In addition, because of the vertical structure of FinFETs, the radiation damage is also dependent on the angle of incidence.25, 32 Between these studies of radiation damage in various configurations of silicon devices, it is clear that charge trapping and damage in the oxide plays a significant role in the overall effects on the electrical characteristics.

The studies on the effects of radiation on the electrical characteristics of 2D FETs typically involve the irradiation of fully fabricated FETs with electrical measurements done both before and after the irradiation. Additionally, the observed changes in the characteristics were usually attributed to oxide charges or interface trap states which produce opposite effects. Positive charges induced by the ion impacts can induce a positive VT shift while interface traps from an n-type channel can induce a negative VT shift.

These effects and their relative prominence can vary depending on both the dielectric thickness and material.33 Because these different studies measure FETs without consistency in the oxide thickness and material, it is difficult to compare them or isolate the radiation effects on the 2D channel material. In order to combat this problem, this chapter describes the use of a novel experimental setup which takes advantage of the unique properties of 2D materials to separate the effects of radiation on MoS2 from the effects on the oxide.

Experimental Setup

Figure 3-1 shows an experimental setup which isolates the radiation effects on the oxide from the

2D material. Most of the previous investigations involved irradiation of complete devices, as shown in

Figure 3-1a. In this configuration, the post-radiation device characteristics arise from the combined radiation damage to the 2D material, source/drain contacts, and dominantly the underlying oxide which is orders of magnitude thicker than the ultrathin 2D semiconducting channel. Conclusions drawn on the basis of such experiments will widely differ for FETs with different oxide thicknesses, dielectric materials, and contact metals. In order to eliminate as many of these extrinsic effects as possible, three different samples are used, each subjected to identical irradiation conditions. Figure 3-1b shows the first sample, where the

MoS2 flakes were exfoliated on a SiO2 substrate and both were subsequently irradiated. Figure 3-1c shows

53 the second sample, where the MoS2 flakes were irradiated and then transferred to an unirradiated SiO2 substrate using a wet transfer process. Finally, Figure 3-1d shows the third sample, where unirradiated MoS2 flakes are exfoliated on an irradiated SiO2 substrate. In all instances the FETs were fabricated after irradiation by lithographically defining the source/drain contacts. This new approach eliminates the radiation effects due to contacts and at the same time allows identification and differentiation of the radiation impact due to the 2D semiconducting channel and the SiO2 back-gate dielectric. Figure 3-1e shows the wet transfer process, where the substrate with the irradiated flakes was spun with PMMA A6 at 4000 rpm for 45 s. It was then allowed to dry at room temperature for 24 hours to avoid any film stresses that may result from baking. A razor was used to remove the PMMA around the edge of the sample to allow the solution to approach the edge of the PMMA at the SiO2 surface without any irregularities in the PMMA that may have been present at the edge of the sample after the spinning. The substrate with PMMA was then placed in a beaker of 1 molar NaOH solution and allowed to float at the top. The NaOH removed the

PMMA film through capillary action, which was then transferred to a series of three deionized water baths using a glass slide. Next, the film was lifted onto the target substrate and allowed to dry by heating on a hot plate at 50 ˚C for 10 minutes and then at 70 ˚C for 10 minutes. Finally, the dried PMMA film was removed in a bath of room temperature acetone leaving the flakes behind on the new substrate.

In order to fabricate the MoS2 FETs, the flakes were exfoliated using the standard tape method or placed through the previously described wet transfer procedure onto the target substrates from a natural bulk crystal purchased from SPI supplies. The samples were spun at 4000 rpm for 45 s with MMA EL6 photoresist and baked at 150 ˚C for 90 s. A second coat of PMMA A3 was spun with identical conditions and baked at 180 ˚C for 90 s. They were then patterned using a 100 kV Vistec EBPG 5200 electron beam lithography tool with a dose of 300 μC/cm2. The develop consisted of immersion for 60 s in 1:1 MIBK:IPA solution followed by 45 s in IPA. 40 nm Ni/30 nm Au contacts are deposited using a Kurt J. Lesker Lab-

18 electron beam evaporation tool. Liftoff was then performed in room temperature acetone with a rinse in isopropanol.

The irradiation was performed at the Michigan Ion Beam Laboratory, at the University of Michigan by Tan Shi from the research group of Igor Jovanovic. Protons and helium ions were chosen because they are major components of cosmic rays which cannot be effectively shielded in space applications. A 400 kV ion implanter was used to generate the 390 kV, singly-charged Helium ions and a 3 MV tandem Pelletron accelerator was used to produce the 2 MeV protons. While only a single ion energy was used, the total ion dose can be determined from the ion stopping power and fluence and scaled to estimate the damage in a more complex radiation environment. The samples were uniformly raster-scanned at a 7° angle from normal incidence to avoid channeling effects and the current was controlled to limit the surface temperature of the sample below 75 C. The control samples were prepared and went through the same transport procedure between Penn State and the University of Michigan in the same time frame.

Dependence of Electrical Effects on He+ Fluence

Figure 3-2a-d shows the representative transfer characteristics of MoS2 FETs from pre-radiation control samples (CS) with neither the flakes nor the substrate being irradiated, and post-radiation samples with both the flake and the substrate irradiated (BI), only the flake irradiated (FI), and only the substrate

+ 14 2 irradiated (SI) with 390-keV singly-charged He ions at a total fluence of 10 ions/cm . SiO2 substrates with heavily doped Si as the back-gate were used for all devices and the device channel lengths were kept

56 constant at 500 nm. There is some observable degradation in the SS of the MoS2 FETs corresponding to the BI sample, while minimal changes are observed for the MoS2 FETs corresponding to the FI and SI samples. This could indicate some radiation damage involving the flake/substrate interface, which results in an increase in the interface trap states, but the changes are too small to draw any convincing conclusions.

Figure 3-2e-h shows the results for He+ ion irradiation at a fluence of 1015 ions/cm2 for the four configurations described above, i.e. CS, BI, FI, and SI. The MoS2 FETs corresponding to the FI and BI samples demonstrate observable changes in their respective transfer characteristics, which is reflected through degradation of the SS, a large positive shift in the VT, and a significant reduction in the ON state current. Since both the BI and FI samples involve irradiated flakes, the majority of the changes in the device characteristics must originate from damage to the flakes rather than damage to the oxide substrate. The damage to flakes can lead to an increase of interface traps, which would degrade device performance. It should be noted that, the NaOH transfer process was found to have negligible effect on the electrical characteristics as will be discussed in more detail later. The MoS2 FETs on the SI samples show similar characteristics to the CS with a slight increase in the SS indicating minimal damage to the SiO2 substrate.

Figure 3-2i-l shows the results for He+ ion irradiation at a fluence of 1016 ions/cm2. Clearly, at this dose, radiation damage to the device is much more severe. The MoS2 FETs on the BI and FI samples show very low device currents over the entire gate voltage (VGS) sweep range. Examination of the raw data shows that this current is due to gate leakage rather than any gating of the MoS2 channel. This indicates that the MoS2 flakes have been damaged to the point where they no longer support any current conduction. The MoS2

FETs corresponding to the SI sample show a high current over the entire VGS range coupled with elevated gate leakage currents. However, the gate leakage current was found to be several orders of magnitude lower than the source to drain current. Since the flakes were unirradiated, the lack of gating implies that either the oxide has been damaged to a degree that VGS can no longer influence the surface potential of the MoS2, or there has been a massive buildup of positive charges in the oxide leading to a large negative VT shift so that the OFF state is shifted far off the negative side of the window and only the nearly-flat far ON state is visible within the sweep range. Furthermore, the increased gate leakage current points towards physical

57 radiation damage to the oxide. Nevertheless, it is apparent that at this dose, both the flake and the oxide substrate have suffered enough damage that makes the MoS2 FETs unusable.

+ Figure 3-2: Radiation damage due to He exposure. Representative transfer characteristics of MoS2 FETs from an unirradiated control sample (CS) with neither the flakes nor the substrate being irradiated, and post-radiation samples with both the flake and the substrate irradiated (BI), only the flake irradiated (FI), and only the substrate irradiated (SI). 390 keV He+ ions were used at a total fluence of a-d) 1014 He ions/cm2, e-h) 1015 He ions/cm2, and i-l) 1016 He ions/cm2. Reproduced from Ref. 34 with permission from the American Society of Chemistry.

He+ Irradiation with a Fluence of 1015 ions/cm-2

Transistors based on exfoliated 2D materials tend to have significant device-to-device variations in

SS, VT, and electron mobility (μn) due to differences in the flake thickness. This must be taken into account before deriving any meaningful conclusion regarding radiation hardness of the 2D materials. Therefore, at least 20 devices for each irradiation configuration discussed above were fabricated and measured. Figure

3-3a-d shows the overlaid transfer curves of all these devices for the four irradiation configurations at the

15 2 10 ions/cm dose. It is apparent that, while there are variations in SS, VT, and ON-state current between the different devices corresponding to any given configuration, the trends discussed earlier still hold true.

The only exception is in the SI sample shown in Figure 3-3d, where approximately half of the MoS2 FETs cannot be switched OFF within the VGS range tested, whereas the other half show device characteristics similar to the CS. Figure 3-3e shows the mean and standard deviation for the SS, VT, and electron mobility

(μFE) extracted from the peak transconductance i.e. the slope of the IDS vs VGS characteristics for all four samples. In order to elucidate the physical mechanism of the radiation damage, the change in VT and the

SS can be described by Equation 3-1 and Equation 3-2, respectively. Here, 퐶푂푋 is the oxide capacitance, Δ푄퐼푇 is the change in interface trap charge, Δ푄퐹 is the change in fixed oxide charge, 퐶퐷 is the depletion capacitance which can be neglected for an ultra-thin body fully depleted channel like the MoS2,

퐶퐼푇 is the interface trap capacitance, 푘퐵 is the Boltzmann constant, 푇 is the temperature, and 푞 is the electronic charge. It is apparent that any induced charges at the interface or in the oxide will directly shift the VT and modify the SS. Furthermore, since VT depends on both the interface and oxide charges while the SS is only influenced by interface charges, it is possible to determine whether the damage is dominated by the oxide or the interface. Following this argument, it can be inferred from the severe degradation of the mean SS in the MoS2 FETs from ~1.81 V/decade in CS to ~10.3 V/decade and ~8.9 V/decade in the BI and

FI samples, respectively, that a significant amount of interface trapped charge was produced. A simple calculation using Equation 3-2, suggests ~5X increase in 퐶퐼푇. Moreover, large positive threshold shifts from a mean value of ~-41 V in CS to ~12 V in BI and ~16 V in FI indicate that the trapped charges must be negative following Equation 3-1 and dominate over the oxide charges since positive oxide charges would lead to negative threshold shifts. In SI samples, a SS increase from ~1.81 V/decade to ~4.63 V/decade was also observed. The increase of the SS is due to the generation and migration of oxide charges to near- interfacial locations. These near-interfacial oxide charges can form defects known as border traps, which have similar electric behavior as interface traps and therefore lead to the SS increase.35 Based on the magnitude of SS increase in SI, FI, and BI samples, it can be seen that interface states caused by the

59 irradiation of the flake contribute more to the SS increase than the border traps induced by the irradiation of the substrate.

Δ푄퐼푇 Δ푄퐹 Δ푉푇 = − − Equation 3-1 퐶푂푋 퐶푂푋

푘퐵푇 퐶퐷 퐶퐼푇 푆푆 = 2.3 (1 + + ) Equation 3-2 푞 퐶푂푋 퐶푂푋

Several radiation damage mechanisms are possible in 2D materials. First, radiation-induced localized heating and electrostatic charging are temporary effects without any permanent physical damage and should not influence electrical measurements. In terms of the structural change, collisions between ions and MoS2 lattice atoms will lead to atomic displacement, creating vacancies, Frenkel pairs, or more

60 complicated structural disorder. S vacancies are the most probable defects according to simulations.36 If collisions happen at the top surface of the material, they can break bonds which can lead to the ejection of the atoms from the surface in a process known as sputtering. Furthermore, ionizing radiation may cause initial bonds to break and form new bonds between the lattice atoms and any contaminants that are present.37

While it is difficult to identify the dominant radiation damage mechanism, the drop of field effect electron

2 2 mobility (μFE) from a mean value of ~22 cm /Vs to ~2 cm /Vs, i.e. by almost an order of magnitude in both

BI and FI samples, suggests that one or more of these mechanisms are occurring. The decrease of mobility indicates the formation of additional scattering sites when atomically thin MoS2 flakes are exposed to 390 keV He+ ion irradiation with a total fluence of 1015 ions/cm2. For SI samples, it should be noted that the creation of oxide charges does not lead to a decrease in mobility. Interestingly, in spite of such a high radiation dose, the performance of MoS2 FETs is still reasonably good, with ON-state currents of several tens of μA/μm and ON/OFF ratios exceeding 106.

The radiation effects described above cannot happen in the MoS2 on the SI sample since it is not irradiated. For the BI and SI samples, the degradation of the transfer curve is also associated with the radiation effects in SiO2. Heavy charged particles can create collisional damage to the SiO2 lattice by elastic collisions with substrate nuclei. Additionally, ionization from heavy charged particles can also lead to the buildup of charges by creating electron-hole pairs. Holes will move toward the interface by hopping through localized charge states and a fraction of the holes are trapped to form oxide-trapped charges.38 In the studies of traditional MOSFETs, it has also been shown that hydrogen ions can be released from the SiO2 and act as holes to form interface traps,38 which originate from oxygen vacancies at the interface that have weak

Si-Si bonds.39 The response of oxide-trapped charges and interface-trapped charges is challenging to uncover in electrical measurement due to their dependence on bias conditions, time, oxide properties, and measurement frequency (low-frequency or high frequency measurement).40

Variation in the Substrate Irradiated Devices

The SI sample in Figure 3-3d shows significantly more device-to-device variation than the other samples, with approximately half of the devices having a large negative VT shift. As will be seen below,

61 the same effect is also present in the SI samples irradiated with protons. The cause of the large threshold voltage shifts when compared to the other samples is unknown. The VT statistics shown in Figure 3-3e were calculated using the iso-current threshold voltage method with a threshold current of 100 nA. For the devices which remain in the ON state over the entire measurement range, a value of -90 V is used for the purposes of calculating the VT statistics, since it is the lowest voltage in the sweep. The thickness of all the

SI irradiated devices has been measured with atomic force microscopy (AFM) and is plotted against the extracted VT values in Figure 3-4a. The correlation was found to be 0.335, indicating that they are relatively independent. However, another method of calculating the threshold voltage is the peak value of the transconductance, gm. A plot of the peak gm vs flake thickness in Figure 3-4 shows that they are inversely related, as supported by a strong correlation of -0.800. Upon initial inspection, this could indicate that the semiconducting region does reach the OFF state below the threshold voltage and that the current is shunted through hopping transport in the radiation-damaged oxide. However, this is unlikely, since all the devices on the BI sample where the oxide is subject to the same conditions show a pronounced OFF state. The gm dependence could also indicate that there actually is no threshold shifting, but instead a large degradation in the SS, so that the slope looks similar to the ON state slope. However, this effect would result in a large negative value for the extracted iso-current VT, which has been shown to be independent of thickness and therefore peak gm. Consequently, a large increase in SS instead of a large VT shift does not explain the observed variation.

It is also unlikely that the variation results from device heating during lithography process. The only steps in the lithography process where high temperatures are present are during the resist bake steps.

There are two bake steps at 150 ˚C and 180 ˚C, each for 90 seconds. These steps are also present on all the other samples, which show significantly less variation and are therefore probably unrelated to the variation in the SI devices. Because the flakes are not irradiated in the SI sample, the large apparent threshold shifts must result from radiation-induced interface and oxide charges or defects. The fact that this is a real effect and not just caused by an error in the sample preparation is supported by the similar results seen in the SI sample for the proton irradiation. However, the variation is unlikely to come from large-scale spatial variations in the beam or different effects in different regions of the sample, since the devices that show anomalously high variation are randomly distributed on the substrate. If there were some spatial variation in the beam intensity or radiation response of the oxide, similar effects should be observed in the other samples, especially the BI sample, where the oxide is subject to the same irradiation conditions. However, the threshold variation is significantly lower for the BI and FI devices. This, combined with the lack of thickness dependence of the iso-current threshold voltage, makes it difficult to explain the origins of this variation with the available experimental data.

It should also be mentioned that the wet transfer process had no observed effect on the results of these radiation experiments. Despite the fact that the FI samples require a wet transfer and the BI samples do not, the electrical characteristics in Figure 3-3 look similar and the statistics also show similar values for the SS, VT, and μn, which are significantly different than the SI sample. The mobility in particular indicates that damage and defects in the flakes which impede the gate response are being generated in the MoS2 by irradiation. Because the statistically averaged values of electrical device parameters are so similar, it seems unlikely that there is some effect present in the FI sample, but not in the BI sample, which is being compensated by the NaOH exposure during the transfer process. The major defect in MoS2 after proton and helium ion irradiation is sulfur vacancy. According to DFT simulation results, sulfur vacancies are easily passivated by oxygen molecules in air and the adsorbed oxygen is thermodynamically stable on sulfur- deficient surface41. However, a dedicated study would be needed to fully verify this.

Proton Irradiation with a Fluence of 1.26 × 1016 ions/cm2

In order to compare the effects of different radiation types, MoS2 flakes were also exposed to 2

MeV proton radiation at a fluence of 1.26 × 1016 ions/cm2. The proton fluence was selected to match the same dose level (total energy absorbed per mass) of helium ions at 1015 ions/cm2. To find the proton fluence required to meet this condition, Tan Shi performed SRIM (Stopping and Range of Ions in Matter) calculations which produced the stopping power and range values seen in Table 3-1. Here, dE/dx is the nuclear stopping power which is the average rate of energy loss as the particle passes through the medium.

The range is the average length of the path a particle travels in the medium before it is stopped. It was found that the ratio of total stopping power between 390 keV He ions and 2 MeV protons is about the same for

MoS2, SiO2, and Si which indicates that the energy deposited in each layer is approximately the same for the two irradiation conditions. The electrical effects of the proton irradiation were evaluated using the same four-sample experimental setup discussed previously where at least 20 devices with 500 nm channel lengths were fabricated for each configuration. The overlaid transfer characteristics of the MoS2 FETs corresponding to CS, BI, FI, and SI samples are, respectively, shown in Figure 3-5a-d. Additionally, the mean values and standard deviations of the SS, VT, and μFE are shown in Figure 3-5e. The effects are less

64 prominent than those seen in the 1015 He+ ions/cm2 samples. The BI and FI samples show an increase in the mean SS to ~6 V/decade and ~4.7 V/decade, respectively, compared to 1.8 V/decade in CS corresponding to the formation of interface trap charges. The lower increase of SS compared to 1015 He+ ions/cm2 could be due to the lower nuclear stopping power of 2 MeV protons, which leads to lower displacement damage and the generation of fewer interface traps. As with the devices exposed to 1015 He+ ions/cm2, a fraction of the devices on the SI sample show a large negative VT shift which is accompanied by a large SS increase.

This increases the average SS, even though many of the devices show similar SS values to the CS. As was the case with the He+ irradiated devices, the cause of these shifts is unclear. The BI and SI samples also show a slight negative VT shift to ~-51 V and ~-52 V, respectively, from ~-41 V in the CS, which does not appear in the FI sample. This indicates that the positive fixed oxide charges dominate over negative interface traps for BI samples, in accordance with Equation 3-1. The 2 MeV protons have a higher charge yield that the 390 keV He+ ions which is the portion of electron-hole pairs that escape the initial

42 recombination. This leads to a larger number of holes generated in the SiO2 layer. Thus, more holes and fewer interface trapped charges (revealed by the less SS increase) were created compared to irradiation with

15 2 10 He ions/cm , which leads to the negative VT shift observed in the BI and SI samples. Furthermore,

2 2 there were only minimal reductions to the mean values of μFE to 18.3 cm /Vs and 19.3 cm /Vs for the

2 irradiated MoS2 flakes corresponding to the BI and FI samples, respectively, compared to 22 cm /Vs in the

CS. The lower magnitude of the changes compared to the 1015 He+ ions/cm2 samples, despite the higher dose, can be explained by the differences in the ion masses and energies. Protons have a lower mass than

He+ ions which reduces their nuclear stopping power, which in turn decreases their collision damage and the amount of interface traps they generate. The nuclear stopping power is also associated with the sputtering yield which is a measure of the number of atoms sputtered per incident ion. By comparing the proton and He+ experiments which have the same ionizing dose but different nuclear stopping powers, it can be concluded that mobility decreases as the sputtering yield increases. Additionally, as was the case in the He+ devices, the proton SI samples also show that the generation of oxide charges has minimal effect

65 on the degradation of mobility. Therefore, this deterioration can be attributed to defect creation through atomic displacement and sputtering.

(dE/dx) in (dE/dx) in (dE/dx) in (dE/dx) in Range in elec. nuclear elec. nuclear MoS2 (eV/Å) MoS2 (eV/Å) SiO2 (eV/Å) SiO2 (eV/Å) Si (μm) 390 keV 50.4 2.39 × 10-2 39.1 0.109 1.66 helium ion 2 MeV 4.30 2.44 × 10-4 3.29 2.04 × 10-3 47.7 proton

MoS2 Radiation Damage Mechanisms

Based on the literature, it is expected that a He+ fluence of 1015 cm-2 and a proton fluence of 1.26 ×

16 -2 10 cm will create defects in the MoS2 primarily in the form of sulfur vacancies and small defect clusters.

Several studies in the literature have investigated these compositional changes in MoS2 and other TMD materials. While the proton and helium ion energies are different in these studies compared to the values used here, comparisons can be made by performing them at the same dose. Density functional theory (DFT)

+ and molecular dynamics simulations of monolayer MoS2 exposed to He irradiation suggest that single and double sulfur vacancies are the most probable form of defects because the displacement threshold of S is six times smaller than Mo.36 The same study also indicates that S adatoms and Frenkel pairs can also be created. Fox et al. measured the Raman peak broadening and performed energy-dispersive X-ray spectroscopy (EDX) to measure the stoichiometry change as a function of 30 keV He+ ion fluence.1 By scaling the results to the same dose for 390 keV He+ ions, a slight change in the Raman spectra and stoichiometry would be expected at a fluence of 1015 ions/cm-2. An X-ray photoelectron spectroscopy (XPS)

17 -2 study on 2 MeV proton irradiation of WSe2 at fluences of up to 10 cm found only a slight shifting of the

44 W and Se peaks which indicates charge transfer. The similarities between MoS2 and WSe2 make it reasonable to assume that similar effects should occur here. Stanford et al. used scanning transmission

+ electron microscopy (STEM) to image WSe2 after 25 keV He ion irradiation with fluences ranging between

1014 and 1017 ions/cm-2. As the fluence increased, defects shifted from primarily Se vacancies to large coalescent defects. By scaling the fluence to match the same nuclear stopping power and fluence of these experiments, isolated sulfur vacancies would be expected.

Conclusion

It has been demonstrated that at high fluences of 1015 He+ ions/cm2 or 1.26 × 1016 protons/cm2,

MoS2 devices are able to maintain high ON currents and ON/OFF ratios. As was seen in studies throughout the literature, radiation effects on the oxide and surrounding materials can have strong effects on the electrical characteristics of the device. This partially obscures the effects on the 2D materials themselves and make it difficult to compare between different studies with different oxide thicknesses or materials. By

67 utilizing the proposed four-sample experimental setup, it is possible to isolate the electrical effects on the

2D material itself. By using this approach, it was observed that He+ ions at a fluence of 1015 primarily influenced the electrical characteristics through the creation of negatively charged interface states.

Additionally, it was found that proton irradiation at a fluence of 1.26 × 1016 ions/cm2 primarily cased oxide charges. These results indicate that this experimental setup is useful for future studies of the effects of radiation on 2D materials.

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17. Shaneyfelt, M. R.; Winokur, P. S.; Meisenheimer, T. L.; Sexton, F. W.; Roeske, S. B.; Knoll, M. G., Hardness Variability in Commercial Technologies. IEEE Transactions on Nuclear Science 1994, 41 (6), 2536-2543.

18. Felix, J. A.; Dodd, P. E.; Shaneyfelt, M. R.; Schwank, J. R.; Hash, G. L., Radiation Response and Variability of Advanced Commercial Foundry Technologies. IEEE Transactions on Nuclear Science 2006, 53 (6), 3187-3194.

19. McWhorter, P. J.; Miller, S. L.; Miller, W. M., Modeling the Anneal of Radiation-Induced Trapped Holes in a Varying Thermal Environment. IEEE Transactions on Nuclear Science 1990, 37 (6), 1682-1689.

20. Shaneyfelt, M. R.; Dodd, P. E.; Draper, B. L.; Flores, R. S., Challenges in Hardening Technologies Using Shallow-Trench Isolation. IEEE Transactions on Nuclear Science 1998, 45 (6), 2584-2592.

21. Warren, W. L.; Schwank, J. R.; Shaneyfelt, M. R.; Fleetwood, D. M.; Winokur, P. S.; Maszara, W. P.; McKitterick, J. B., Radiation-Induced Defect Centers in Bonded and Etchback SOI Materials. Microelectronic Engineering 1993, 22 (1-4), 387-390.

22. Schwank, J. R.; Shaneyfeld, M. R.; Dodd, P. E.; Burns, J. A.; Keast, C. L.; Wyatt, P. W. New Insights into Fully-Depleted SOI Transistor Response After Total-Dose Irradiation. Fifth European Conference on Radiation and Its Effects on Components and Systems, Fontevraud, France, 1999.

23. Ferlet-Cavrois, V.; Quoizola, S.; Musseau, O.; Flament, O.; Leray, J. L.; Pelloie, J. L.; Raynaud, C.; Faynot, O., Total Dose Induced Latch in Short Channel NMOS/SOI Transistors. IEEE Transactions on Nuclear Science 1998, 45 (6), 2458-2466.

24. Brady, F. T.; Hughes, H. L.; McMarr, P. J.; Mrstik, B., Total Dose Hardening of SIMOX Buried Oxides for Fully Depleted Devices in Rad-Tolerant Applications. IEEE Transactions on Nuclear Science 1996, 43 (6), 2646-2650.

25. Simoen, E.; Gaillardin, M.; Paillet, P.; Reed, R. A.; Schrimpf, R. D.; Alles, M. L.; El-Mamouni, F.; Fleetwood, D. M.; Griffoni, A.; Claeys, C., Radiation Effects in Advanced Multiple Gate and Silicon- on-Insulator Transistors. IEEE Transactions on Nuclear Science 2013, 60 (3), 1970-1991.

26. Gaillardin, M.; Martinez, M.; Paillet, P.; Andrieu, F.; Girard, S.; Raine, M.; Marcandella, C.; Duhamel, O.; Richard, N.; Faynot, O., Impact of SOI Substrate on the Radiation Response of UltraThin Transistors Down to the 20 nm Node. IEEE Transactions on Nuclear Science 2013, 60 (4), 2583-2589.

27. Gouker, P.; Burns, J.; Wyatt, P.; Warner, K.; Austin, E.; Milanowski, R., Substrate Removal and BOX Thinning Effects on Total Dose Response of FDSOI NMOSFET. IEEE Transactions on Nuclear Science 2003, 50 (6), 1776-1783.

28. Paillet, P.; Autran, J. L.; Leray, J. L.; Aspar, B.; Auberton-Herve, A. J., Trapping-Detrapping Properties of Irradiated Ultra-Thin SIMOX Buried Oxides. IEEE Transactions on Nuclear Science 1995, 42 (6), 2108-2113.

29. El Mamouni, F.; Zhang, E. X.; Schrimpf, R. D.; Fleetwood, D. M.; Reed, R. A.; Cristoloveanu, S.; Xiong, W., Fin-Width Dependence of Ionizing Radiation-Induced Subthreshold-Swing Degradation in 100 nm Gate Length FinFETs. IEEE Transactions on Nuclear Science 2009, 56 (6), 3250-3255.

30. Colinge, J. P.; Orozco, A.; Rudee, J.; Xiong, W.; Cleavelin, C. R.; Schulz, T.; Schrufer, K.; Knoblinger, G.; Patruno, P., Radiation Dose Effects in Trigate SOI MOS Transistors. IEEE Transactions on Nuclear Science 2006, 53 (6), 3237-3241.

31. Gaillardin, M.; Paillet, P.; Ferlet-Cavrois, V.; Faynot, O.; Jahan, C.; Cristoloveanu, S., Total Ionizing Dose Effects on Triple-Gate FETs. IEEE Transactions on Nuclear Science 2006, 53 (6), 3158- 3165.

32. Griffoni, A.; Gerardin, S.; Meneghesso, G.; Paccagnella, A.; Simoen, E.; Claeys, C., Angular and Strain Dependence of Heavy-Ions Induced Degradation in SOI FinFETs. IEEE Transactions on Nuclear Science 2010, 57 (4), 1924-1932.

33. Hughes, H.; Benedetto, J., Radiation Effects and Hardening of MOS Technology: Devices and Circuits. IEEE Transactions on Nuclear Science 2003, 50 (3), 500-521.

34. Arnold, A. J.; Shi, T.; Jovanovic, I.; Das, S., Extraordinary Radiation Hardness of Atomically Thin MoS2. ACS Appl Mater Interfaces 2019, 11 (8), 8391-8399.

35. Fleetwood, D. M., Evolution of Total Ionizing Dose Effects in MOS Devices with Moore’s Law Scaling. IEEE Transactions on Nuclear Science 2017.

36. Ghorbani-Asl, M.; Kretschmer, S.; Spearot, D. E.; Krasheninnikov, A. V., Two-Dimensional MoS2 Under Ion Irradiation: From Controlled Defect Production to Electronic Structure Engineering. 2d Mater 2017, 4 (2).

37. Teweldebrhan, D.; Balandin, A. A., Modification of Graphene Properties Due to Electron-Beam Irradiation. Appl Phys Lett 2009, 94 (1), 013101.

38. Schwank, J. R.; Shaneyfelt, M. R.; Fleetwood, D. M.; Felix, J. A.; Dodd, P. E.; Paillet, P.; Ferlet- Cavrois, V., Radiation Effects in MOS Oxides. Ieee T Nucl Sci 2008, 55 (4), 1833-1853.

39. Oldham, T. R.; McLean, F., Total Ionizing Dose Effects in MOS Oxides and Devices. IEEE Transactions on Nuclear Science 2003, 50 (3), 483-499.

40. Fleetwood, D.; Winokur, P.; Reber Jr, R.; Meisenheimer, T.; Schwank, J.; Shaneyfelt, M.; Riewe, L., Effects of Oxide Traps, Interface Traps, and ‘‘Border Traps’’on Metal‐Oxide‐Semiconductor Devices. J Appl Phys 1993, 73 (10), 5058-5074.

41. KC, S.; Longo, R. C.; Wallace, R. M.; Cho, K., Surface Oxidation Energetics and Kinetics on MoS2 Monolayer. J Appl Phys 2015, 117 (13), 135301.

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Chapter 4: Physics and Thickness Trends of Surface Charge

Transfer Doping of 2D Materials

This chapter is reproduced from: Arnold, A. J., Schulman, D. S., & Das, S. (2019). Physics of Surface Charge Doping: Enabling Hole Conduction and Improving Contact Carrier Injection in 2D Materials. Peer Review in Progress.

Surface Charge Transfer Doping

Over the past decade, two-dimensional (2D) materials, and transition metal dichalcogenides (TMDs) in particular, have been investigated for use in electronic devices, particularly field effect transistors (FETs).

One of the primary limiting factors in the implementation of TMDs in FETs is high contact resistance resulting from Fermi level pinning at the TMD-metal interface, which creates Schottky barriers (SBs) at the contacts.1 Numerous methods to decrease the contact resistance by reducing or eliminating the SBs at the contacts have been investigated with varying degrees of effectiveness as described in Chapter 1.

However, an alternate method to mitigate SB effects and reduce the contact resistance is to dope the 2D channel material. This has the effect of thinning the SB width and increasing the tunneling current at the expense of shifting the threshold voltage (VT). Substitutional doping can be achieved during TMD growth by introducing additional dopant containing precursors.2-4 However, because this doping occurs during the growth stage, it is difficult spatially pattern the doping, i.e. degenerately dope some regions while leaving others intrinsic. This motivated the investigation of an alternative doping method called surface charge transfer doping (SCTD).

SCTD places a concentration of charges or dipoles at the surface of the 2D material which induces band bending and modulates the surface potential. The resultant change in surface potential shifts the transistor threshold voltage. The amount of charge induced near the surface directly determines the amount of VT shift (ΔVT) in the FET. Many SCTD procedures have been explored in the literature, which enable both n and p doping of 2D materials with varying effectiveness.5-6 Exposing the surface of the 2D material

73 to a chemical solution is common method. For example, Benzyl Viologen has been shown to induce n-type

7-10 9, 11-12 doping, and AuCl3 has produced p-type doping. Additionally, doping can be induced by depositing a sub-stoichiometric insulator such as aluminum oxide,13-14 amorphous titanium suboxide,15 molybdenum trioxide,16-20 or silicon nitride.21 Substitutional doping or defect formation at the 2D surface can be induced by exposure to plasmas such as carbon22 or phosphorus23 which cause p-type doping, or hydrogen24 or helium25 which induce n-type doping. Another surface doping mechanism involves oxidizing the top surface of a TMD flake and has achieved strong p-type doping in WSe2 by exposing the flake to an ozone atmosphere.26-27

28-33 Alternatively, O2 plasma can be used to induce oxidation and controllable doping. This method has the advantage of already being widely implemented in semiconductor manufacturing. X-ray photoelectron spectroscopy (XPS) analysis of WSe2 and MoS2 exposed to O2 plasma has shown that the

28, 30-31, 33- exposed surface is converted to an amorphous sub-stoichiometric WO3-x and MO3-x respectively.

39 In addition to surface oxidation, deeper layers can also be oxidized.34 With a gentle plasma, the process

30-31 can be self-limiting and converts a specific number of layers. It should also be noted that for WSe2, the oxidation undercuts laterally up to 12-30 nm underneath the metal contacts in WSe2 FETs. The oxidation process is highly anisotropic, favoring lateral oxidation within layers of WSe2 with minimal vertical propagation.30-31 These SCTD reports attribute the p-type doping of TMDs to one of two mechanisms, either

26, 30-31, 35, 40 to electron transfer from the MX2 to the MO3-x owing to the high work function of the MO3-x or

28 vacancies in the sub-stoichiometric MO3-x which form fixed charges acting as floating top-gate. While all these doping strategies impart surface charge using very different mechanisms, the electrical effect is common between them. Namely, the induced charge at the top surface of the 2D material. In this sense, they are interchangeable, and regardless of the doping polarity or magnitude, the effect of this charge can be used as a basis for an explanation of surface doping on FET conduction.

It should also be noted that most SCTD investigations in the literature dope the channel after the contacts have been fabricated, producing no charge under the contacts. However, the doping still improves the contact resistance by thinning the SB even though it cannot affect the metal-semiconductor interface

74 under the contacts.7, 17, 41-42 This apparent contradiction can be explained by the two path current injection model at the contacts discussed in Section 1.6 which is essential to understanding SCTD.41-43 One path injects carriers vertically from the metal to the semiconductor under the contact which is therefore largely unaffected by the channel doping. However, the second 1D path injects carriers directly from the corner of the contact into the top portion of the channel which is immediately adjacent to the doping charge. This 1D contact model has widely be used to explain contact phenomenon in 2D FETs.1 Depending on the semiconductor thickness and the SB, the relative current contributions from these two paths can vary significantly. This second path can comprise a significant or even dominant portion of the total carrier injection for thin semiconductor channels.41-42 It is this mechanism which produces the contact resistance and doping response seen in devices with no doping in the contact regions.

Traditional semiconductors such as Si and GaAs also experience the phenomenon of Fermi level pinning. The Fermi level pinning problem is circumvented in Si by forming degenerately doped extension regions which contact the metal.44 The SB width, which is inversely proportional to the doping, is thin enough that the tunneling resistance is minimal compared to the channel resistance. Several literature reports used patterned doping to form such a structure in 2D FETs. They have reported unipolar FETs with improved performance, but a comprehensive understanding of the underlying physics was lacking which is critical for high performance device design.7, 20, 45 Surface charge doping if engineered properly can offer a potentially breakthrough solution to alleviate the contact issues which have plagued 2D FETs.

This chapter contains an experimental study of oxygen plasma doping on several different TMDs, with emphasis on MoS2 and WSe2. These experimental results are used to determine the effect of the thickness of the TMD flake on the doping effects relative to the plasma exposure time more thoroughly than has previously been reported in the literature. Furthermore, Synopsys Sentaurus TCAD simulations are performed and used to confirm the trends seen in the experimental data. It is found that these thickness trends and explanations are valid for any SCTD strategy used on any semiconducting material in a similar back-gated device layout. Additionally, experiments are performed where an undoped region is left in the center of the channel with doping near the source and drain contacts similar to the extension region doping

75 used to improve the contacts in conventional silicon FETs. These results show that similar improvements can be made with SCTD on 2D semiconductors. More TCAD simulations provide insights into the 2D material thickness dependencies and the material, contact, and doping requirements necessary to make the

2D extension doping effective. These experiments and simulations provide generalized insights into the electrical mechanisms thickness dependencies of SCTD of 2D materials which are largely independent of the particular semiconducting material and doping strategy being considered.

Oxygen Plasma Doping

Most academic research into the electrical characteristics of 2D materials uses a back-gated structure where the entire substrate is used as the gate terminal. Typically, the substrate is a degenerately doped silicon wafer with a thin layer of SiO2, Al2O3, or HfO2 grown on its surface functioning as the gate dielectric. The 2D material is then exfoliated, grown, or transferred onto the oxide and contacts are deposited on top. The device structure considered for these experiments, including the effects of the oxygen

++ plasma doping, is shown in Figure 4-1a. The back-gate is 50 nm of Al2O3 deposited on a Pt/TiN/p Si substrate.22 The TMD flakes are mechanically exfoliated on top, contacts are patterned with a Vistec EBPG

5200 electron beam lithography tool, and the 30 nm Ni/40nm Au metal stack is deposited using a Kurt

Lesker Lab-18 electron beam evaporator. The plasma doping is then performed in a Tepla M4L plasma etching tool. Before the sample was placed in the tool, a condition step was done to prepare the chamber.

The pressure was set to 500 mTorr, the flow rates were 150 sccm for O2 and 50 sccm for He, and the power was set to 300 W for 3 minutes. During the sample doping, unless otherwise specified, the chamber pressure and gas flow rates are set the same values used in the condition with the power set to 50 W. The level of doping is then controlled by adjusting the plasma time. These conditions were chosen because they are the minimum power and gas flow conditions required to reliably establish a plasma within this particular tool.

The power is minimized because the plasma doping process will also slowly etch the flake and the etching will occur more rapidly if higher power settings are used. It should also be noted that the plasma conditions used here are specific to this particular plasma tool and that the optimal conditions for oxygen plasma doping will depend heavily on the specific tool being used.

The effects of O2 plasma on TMD flakes can be evaluated by observing the Raman spectra of a 4.5

1 nm thick MoS2 flake is exposed to increasing plasma exposure time. Figure 4-1b shows that the Raman 퐸2𝑔 and 퐴1𝑔 peak intensity decreases with exposure time and eventually largely disappears. This matches results seen in the literature corresponding to complete oxidation of the material.26, 36-37, 39 This is confirmed by the optical images in Figure 4-1c,d which show a representative MoS2 flake before and after 300 s of plasma exposure. Thinner areas undergo complete oxidation as evident from a strong decrease in the optical contrast while maintaining an approximately constant flake thickness as measured by the atomic force microscope (AFM). Therefore, the loss of contrast and Raman signal is not a result of physical sputtering away of MoS2. This indicates that the plasma conditions used here are able to oxidize at least 4.5 nm of

MoS2 flake. It should be noted that in the extension doping experiments discussed later, the transfer characteristics of 3 nm flakes show no sign of damage. These experiments were performed months apart from the experiments that show the 4.5 nm oxidation depth. This variation is likely due to adsorbates on the walls of the plasma chamber off-gassing and altering the plasma conditions. Because these adsorbates depend on the plasma conditions set by other users of the tool, they are difficult to control or account for.

However, the doping for each individual set of experiments here was performed over a few days which appears to have minimized the variation within any particular experiment.

MoS2 Doping Thickness Dependence

Figure 4-2 shows the effects of O2 plasma exposure on MoS2 FETs for several different flake thicknesses and plasma times ranging from 30 s to 300 s. The plasma exposure has three competing effects on the transfer characteristics which each have their own thickness dependences. These are summarized in

Figure 4-2f. The first is the positive VT shift resulting from the negative charge at the top channel surface.

If the channel material is thicker than the plasma penetration depth, the surface charge should be constant regardless of the semiconductor thickness. For ultrathin body devices, the semiconductor capacitance is usually neglected and VT should only depend the initial semiconductor doping level and the amount of surface charge imposed by the SCTD.46 One would assume the surface charge and the gate-induced directly compensate each other. Therefore, one would expect similar VT shifts irrespective of the flake thickness.

However, as will be discussed in more detail later, the experimental data shows the magnitude of ΔVT decreases with increasing flake thickness. Thin flakes show a large ∆VT even for plasma exposures as short as 30 s while very thick flakes show a minimal ∆VT for plasma exposure times as long as 300 s.

Figure 4-2: Thickness trends in oxygen plasma doped MoS2 FETs. Transfer characteristics as a function of doping time of for representative devices with thicknesses of a) 2.4 nm, b) 3.5 nm, c) 4.5 nm, d) 34 nm, and e) 44 nm. f) table showing magnitude of damage, threshold voltage shift, and minimum OFF state current as a function of thickness.

This unexpected result, which will be discussed and visualized with TCAD simulations later, can be explained by the incorrect assumption that the surface potential is constant throughout the channel thickness, i.e. there is no vertical band bending. The doping induced band banding results in positive charge accumulation at the top of the channel. Simultaneously, adjusting the applied back-gate voltage (VBG) produces a charge near the oxide-semiconductor interface which modulates the surface potential and creates a conductive channel near that interface. If the channel is sufficiently thin, the uniform surface potential assumption is valid and the charge induced by the SCTD and the back-gate voltage are additive. This creates the large ∆VT seen in the thinner MoS2 flakes. However, if the channel is thick, the back-gate is too electrostatically weak to modulate the surface potential at the top surface. Essentially, the top surface potential is pinned by the surface charge. Similarly, for a thick channel, the surface charge does not

79 modulate the surface potential at the gate oxide interface, i.e. the surface potential at the gate oxide interface is independent of the surface charge due to vertical band bending. Hence thicker flakes expectedly show minimal ∆VT after O2 plasma exposure as evident in Figure 4-2d,e.

This same effect is also responsible for the increase in IOFF-min with flake thickness. If a second conducting channel near the top surface of the semiconductor exits and cannot be influenced by the back- gate, whatever current flows there will be present regardless of the input gate voltage. This results in the higher OFF currents seen in the thicker flakes in Figure 4-2d,e. Conversely, if the gate can compensate the surface doping induced charge in the channel, IOFF-min will remain low as seen for thinner flakes in Figure

4-2a-c. Finally, the physical damage done to the flake during the plasma exposure is almost immediate for the thinnest flake, whereas, thicker ones show significant resilience. The transfer curves of the thin flakes in Figure 4-2a,b show OFF state widening and a decrease in both electron and hole conduction after limited plasma exposure. This is consistent with the observations made in Figure 4-1b which show a decrease in the Raman peak intensity and Figure 4-1c,d which show loss in optical contrast due to the oxidation and damage of the material beyond just the top layers. These damaging effects have a finite penetration depth which can be estimated by correlating the Raman measurements with the visible changes in the device transfer characteristics. This penetration depth is estimated to be about 3-4.5 nm for MoS2. For flakes that are significantly thinner than this penetration depth, the damage occurs faster as seen for the 2.4 nm thick flake in Figure 4-2a. The flake fully oxidizes between 75 and 120 s of exposure resulting in a complete loss in current thereafter. Flakes thicker than the penetration depth may show some damage effects but the conducting channel near the back-gate interface will be largely unaffected preventing the appearance of most damage effects on the electrical characteristics.

WSe2 Doping Thickness Dependence

Figure 4-3 shows the effects of O2 plasma on WSe2 flakes of different thicknesses for the same exposure times. The trends are similar to those seen in Figure 4-2. For example, the ΔVT trend is nearly identical to that seen in the MoS2 devices where ∆VT is large for thin flakes and decreases as the WSe2 flake thickness increases. Additionally, IOFF-min of the doped devices increases with flake thickness. Again, this is

80 expected since the effects are still caused by a charge at the top surface of the channel. However, post- plasma treated WSe2 flakes offer better hole conduction compared to MoS2. The origin of this difference can be traced back to the location of metal Fermi level pinning with respect to the conduction and valence band edges in these two materials. In MoS2, the metal Fermi level pins near the conduction band resulting in primarily n-type conduction while in WSe2 the pinning is closer to the center of the bandgap resulting in

47-48 ambipolar conduction. Because the height of the hole SB is lower for WSe2 than for MoS2, a smaller

Fermi level shift is required to induce high hole currents. Consequently, for a given doping charge, the top conductive channel of WSe2 FETs are more conductive than for a similar MoS2 FET. This increase in the conduction of the surface channel increases the value of the IOFF-min for WSe2 compared to the MoS2 devices.

This is why, unlike MoS2, this increase is visible even for thinner WSe2 devices as seen in Figure 4-3b.

Figure 4-3: Thickness trends in oxygen plasma doped WSe2 FETs. Transfer characteristics as a function of doping time of for representative devices with thicknesses of a) 2.3 nm, b) 4.3 nm, c) 16 nm, and d) 50 nm. e) Table showing the magnitude of the damage, threshold voltage shift, and minimum OFF state current as a function of thickness.

For very thick flakes like the one shown in Figure 4-3d, the hole current due to the surface channel can actually be larger than the back-gate induced hole current in the pristine device. This is because in a back-gated device geometry, current primarily flows close to the channel/oxide interface owing to the

Thomas-Fermi charge screening and hence necessitates that the charge carriers injected from the contact

49-50 pads placed at the top to travel vertically through the thick WSe2 layer. This adds a large interlayer resistance to current flow near the back interface. However, current through the top channel created by the doping charge avoids much of this resistance due to the lower vertical travel distance of the carriers. Finally, the physical damage to the flakes is more visible and obvious for WSe2 since the contribution of the surface channel conduction to the total current is significant in post-plasma treated WSe2 devices. The thinnest

WSe2 flake (2.3 nm) explored in this study starts to show damage beyond 120 s of plasma exposure and is

82 completely oxidized or damaged by the plasma in 300 s as evident from Figure 4-3a. Thicker flakes show limited damage as seen in Figure 4-3b-d. In these flakes, the hole current is highest at some intermediate plasma exposure time such as 75 or 120 s when the surface doping layer is present and the damage to the underlying layers is minimal, but decreases upon further plasma exposure.

Transition Metal Dichalcogenide Doping Thickness Dependence

The main thickness trends in the electrical response to SCTD are a decrease in VT shift with thickness and an increase in the minimum OFF state current IOFF-min with thickness. Figure 4-4 shows the transfer characteristics of representative thin and thick FETs made from MoS2, MoSe2, MoTe2, WS2, and

WSe2. These materials all experience p-doping in response to the oxygen plasma since it has been shown that the formation of MoO3-x and WO3-x cause p-doping in MoS2 and WSe2 respectively. Because these

TMDs are all based on Mo or W, oxygen plasma has a similar p-doping effect on all of them. For all the materials shown in Figure 4-4, both the decrease in VT shift and increase in IOFF-min with thickness are present. This supports the argument that these trends result from the electrostatics in the semiconductor and are therefore independent of the channel material. Given the observed trends and knowledge of the initial characteristics, these results allow the qualitative prediction of device characteristics for a given doping charge.

It should be noted that the initial characteristics of MoTe2 look different than the other materials, with a higher OFF state current and a more positive threshold voltage. As can be seen in Figure 4-4e,f, the undoped devices are ambipolar with high OFF state currents. In the literature, MoTe2 FETs show a variety of behaviors. In some cases it shows p-type characteristics,51-55 while in others it shows n or p dominant ambipolar behavior.9-10, 56-64 These characteristics are more inconsistent than for other TMDs even for the same contact metal. For example, different studies of MoTe2 FETs with Ti/Au contacts have shown p- type,51, 53 n-dominant ambipolar behavior,56-57, 64 and p-dominant ambipolar behavior.9, 58 One of the main ways MoTe2 differs from the other TMDs is it sensitivity to air. Studies have shown that oxygen atoms bind

10, 64-65 to defect sites in MoTe2 which creates charge transfer induced p-doping. This oxidation and doping

10, does not require elevated temperatures and p-doping can be seen over time in air-exposed MoTe2 devices.

52 However, the process can be accelerated by annealing in the presence of oxygen.10, 64, 66-68

The oxidation and accompanying p-doping of MoTe2 may be the source of some of the inconsistency in the electrical characteristics seen in the literature. It is similar to the oxygen plasma doping since it produces a charge at the surface. And since the observed surface charge doping trends result from the electrostatics and are independent of the material, they should appear in oxidized MoTe2. The variation in the contact metal, MoTe2 source, and fabrication processing steps make it somewhat difficult to extract thickness trends from the literature, but in some cases these variations can be seen. For example, Fathipour et al. fabricated MoTe2 devices with different flake thicknesses and found that thicker flakes show higher minimum OFF state currents (IOFF-min) similar to the trend seen in the experimental oxygen plasma doping

53 results. However, they do not see a large variation in VT as a function of thickness. Chang et al. were able

64 to reversibly add and remove doping from MoTe2 by exposing it to air, then annealing it in vacuum. Their flakes were 3-10nm thick, and as would be expected from the observed SCTD trends, the air exposure shifted VT more positive and increased IOFF-min. Qu et al. observed similar results upon exposing an 8-15

10 nm thick flake to ambient conditions for three months, noting a p-shift in VT and an increase in IOFF-min.

Ke et al. were able to controllably dope an 8.4 nm thick flake by annealing it at 100 °C in air for different

68 lengths of time. They observed both a gradual VT shift as well as a gradual increase in IOFF-min. Zhu et al.

85 also showed that VT shifted more negative as the MoTe2 thickness was decreased, and noticed an increase

69 in IOFF-min with increasing thickness. However, they attributed this to unintentional n-doping at the top of the channel which requires a more negative gate voltage to turn OFF thicker channels. Moreover, they give no explanation for the source of the n-doping. This, combined with the other studies present in the literature, the p-doping effect of atmospheric oxygen on MoTe2, and the thickness trends and explanations presented in this work, makes it seems more likely that their observed trends result from oxidation induced p-doping at the MoTe2 surface.

The interpretation of MoTe2 devices as being surface charge p-doped by air exposure is supported

70 by the work of Mleczko et al. They fabricated AlOx encapsulated MoTe2 devices in a glove box without any air exposure and associated p-doping. A contact metal study showed that the Fermi level pinned with a factor of 0.06 at 350-450 meV, forming n-dominant ambipolar devices. This conflicts with previous

9, 62 MoTe2 contact metal studies which showed strong pinning resulting in p-dominant ambipolar devices.

This discrepancy could be caused by the doping in the oxidized MoTe2 under the contact regions altering the underlying mechanisms causing the Fermi level pinning. Regardless, by preventing oxidation induced p-doping, using hexagonal boron nitride (hBN) interlayer contacts to partially de-pin the Fermi level, and encapsulating the channel in the surface charge n-dopant AlOx, Mleczko et al. were able to fabricate the

70 first high-performance unipolar n-type MoTe2 devices. These results indicate oxidation of MoTe2 through exposure to ambient conditions can be interpreted as a surface charge doping process and is subject to the same thickness based effects seen in the other uniform doping results.

Extraction of Surface Charge Density

A common metric for judging the effectiveness of a SCTD strategy is the charge density which can be extracted using Equation 4-1. Here Qdope is the doping charge, VT-Init is the undoped threshold voltage,

VT-Dope is the doped threshold voltage, Cox is the oxide capacitance, and q is the elementary charge.

Additionally, a negative charge corresponds to a positive VT shift as seen in the p-doping of the oxygen plasma doping. The value of the charge as a doping metric is due to its influence on VT. A larger charge will produce a larger VT shift and therefore a stronger doping effect. Figure 4-5a-d shows the extracted

86 charge and threshold voltage for MoS2, WSe2, MoSe2, and WS2 FETs respectively, as a function of plasma exposure time. VT is extracted using the constant current method with a threshold current of 100 nA/μm. In all cases the charge appears to decrease with increasing flake thickness (tSC). However, this charge is created by physically and chemically oxidizing the transition metal dichalcogenide (TMD) with a plasma. As long as the flake is thicker than the penetration depth of the plasma, the charge created by the oxidation should be constant. This indicates that the apparent decline in charge with thickness must be caused by a failure of the model used to extract the charge. The source of this failure is an inability of the doping charge to modify the Fermi level at the bottom of the thick flakes which intensifies as tSC increases. The actual charge created at the surface is closest to the values extracted in the thin devices where the surface charge can strongly affect the entire channel. However, if the semiconductor is too thin, damage effects will decrease the current and widen the OFF state which will cause errors in the VT extraction. Additionally, if the VT shift is too large or the flake thickness prevents the appearance of the OFF state, it may not be possible to extract any threshold voltage. This can most easily be seen in the thick WSe2 devices in Figure 4-5b. Many of the data points are missing from this plot because the device never falls below the 100 nA/μm threshold current used to extract a VT value. This occurs because VT has been pushed past the edge of the gate voltage sweep range, which prevents VT extraction and therefore a charge calculation. The origins of the dependence of

VT on the semiconductor thickness can be understood more completely using TCAD simulations.

퐶표푥(푉푇−퐷표푝푒 − 푉푇−퐼푛𝑖푡) 푄 = − Equation 4-1 퐷표푝푒 푞

Sentaurus Simulation Physics and Layout

Next, in order to further explore and explain the effects of SCTD, Synopsys Sentaurus TCAD simulations were performed using the device structure shown in Figure 4-6. In the literature, similar simulation approaches have been used to investigate the effects of 2D channel thickness on carrier injection at the contacts as well as the thickness dependence of SCTD effects.41, 71 Here, silicon with an adjustable thickness, tSC, is used as the channel material. The simulations show that the thickness trends of the SCTD are caused entirely by electrostatics. Therefore, complexities such as the an-isotropic transport in 2D materials are unnecessarily computational expensive and will not change the observed qualitative trends.

The contacts are defined as line contacts with a fixed SB height of 0.4 eV, chosen to enable ambipolar transport resembling the experimental WSe2 device characteristics. A SB height ~1/2 the band gap is

88 necessary to observe ambipolar transport. The back-gate dielectric is 50 nm of Al2O3 with a relative permittivity of 9.1 and no interface or trap state charges. Three vacuum regions are added to the top of the

Si channel. Surface dopant charges can be assigned to each region to simulate both uniform and patterned extension region doping. For example, when dopant charges in all three regions are set to the same value, the doping is uniform across the entire channel. Alternatively, the center region can be set to zero to produce the extension doping structure discussed later. Additionally, the doping charge is assigned to be negative in order to produce a positive VT shift. The simulations used limited physics which include Fermi statistics, thermionic injection over the Schottky barriers, a nonlocal tunneling model to provide realistic carrier injection, and a modified local-density approximation (MLDA) model of carrier quantization to prevent an unphysical concentration of carriers at the edges of the semiconductor (see Appendix A for the Sentaurus simulation code). Appendix B shows another set of TCAD simulations of the surface charge doping which include only Fermi statistics with ohmic contacts and omit all more complex physics models. Even these simulations with ohmic contacts still capture the VT and IOFF-min trends seen in the experimental devices. It should be noted that the damage to the 2D semiconductors caused by the plasma is not modeled by these simulations since it is caused by ion bombardment and chemical reaction induced defects which are not accounted for in the simulation model.

Uniform Doping Simulation Results

Figure 4-7a-c shows the simulated FET transfer characteristics for channel thicknesses of 3 nm, 15

-2 13 -2 nm, and 30 nm, respectively, for surface charge densities, -Qdope, ranging from 0 cm to 10 cm . The ∆VT is larger for small tSC and decreases as tSC increases. Additionally, IOFF-min is maintained for the 3 nm flake for all Qdope values as can be seen in Figure 4-7a. For larger tSC, IOFF-min strongly increases with Qdope as shown in Figure 4-7b,c. The simulations successfully capture both trends seen in the experimental results.

Figure 4-7d-g shows cross sections of the absolute total current density for FETs with thicknesses of 3 nm

13 -2 and 15 nm for Qdope values of 0 and 10 cm and VBG values of -10 V, 0 V, and 10 V. Here the source and drain line contacts are represented by black lines in the top left and right corners respectively. Figure 4-7a- c shows that the n and p-branch positions in the undoped FETs are largely unaffected by tSC. Moreover,

Figure 4-7e shows that the current conduction in the undoped 15 nm thick device occurs primarily in the bottom few nanometers near the gate oxide interface, irrespective of the carrier type i.e. electron conduction for VBG = 10 V and hole conduction for VBG = -10V. This is also true for the 3 nm device as seen in Figure

4-7d, where tSC is thin enough that the bottom region is essentially the entire body of the semiconductor.

Both the electron and hole currents are lower in the thicker devices as seen in Figure 4-7b,c due to the additional resistance as carriers must travel vertically from the contacts to the back conduction channel.50,

72-73 When surface charge is introduced, the Fermi level at the top of the channel moves closer to the valence band promoting easier injection of holes from the source into the channel by thinning the SB, thereby reducing the tunneling contact resistance and increasing the hole conduction as seen in Figure 4-7a-c.

Figure 4-7: Uniform doping TCAD simulation results. Transfer characteristics of FETs with semiconductor thicknesses of a) 3 nm, b) 15 nm, and c) 30 nm as a function of doping charge. The surface interface charge is negative. Cross sections plotting the absolute value of the total current density for FETs of different thicknesses and doping charge densities at back-gate voltages of 10 V, 0 V, and -10 V. The plots show devices with values of d) tSC =3 nm -2 -2 13 -2 and Qdope = 0 cm , e) tSC =15 nm and Qdope = 0 cm , f) tSC =3 nm and Qdope = -10 cm , and g) tSC =15 nm and Qdope = -1013 cm-2. The black lines in the top left and right of the cross sections are the source and drain line contacts, respectively.

Figure 4-8 shows the total, electron, and hole current densities for the same 15 nm device modeled

-2 13 -2 in Figure 4-7e,g with Qdope values of 0 cm and 10 cm at a back-gate voltage of 10 V. As can be seen in

Figure 4-8b, the presence of the doping charge creates a second conducting channel at the top of the silicon that is not strongly controlled by the back-gate. Additionally, this top channel preferentially conducts holes while electrons are depleted. This indicates that the negative charge at the top interface has pulled the bands up near the surface, resulting in the preferential conduction of holes and the depletion of electrons. Figure

4-7f,g shows this channel is present in the 15 nm but not 3 nm device. For thick devices, the back-gate cannot modulate the top channel regardless of the applied gate potential. Likewise, the surface charge does not affect the bottom surface potential at the gate oxide interface. This is the source of the lower ∆VT in the thicker FETs as seen in Figure 4-7b,c. However, if the material is thin enough to allow the doping charge to influence the back-gated region, a threshold shift will occur as seen in Figure 4-7a. This VBG independent parallel channel is also the source of the increase in IOFF-min with tSC. When tSC is small, the channel experiences volume inversion which allows the gate to modulate the vertically uniform channel potential and maintain a low IOFF-min as seen in Figure 4-7a. Thus, the simulation results capture the experimentally observed trends in the device transfer characteristics in the presence of SCTD and its thickness dependence, which is critical for fundamental understanding and intelligent design of high performance 2D FETs.

Extension Region Doping of WSe2 FETs

Next, the impact of SCTD on the effectiveness of carrier injection from the metal contacts will be explored and a device architecture that utilizes SCTD to obtain high-performance 2D FETs without the downsides of uniform doping will be demonstrated. SCTD can be used analogously to source/drain extension doping commonly used in silicon FETs as shown in Figure 4-9a. To fabricate this structure, the center WSe2 channel was protected with a layer of photoresist during the O2 plasma oxidation. The total channel length is 1 μm however only the 250 nm near the source and drain contacts was exposed to the plasma. This formed undoped region which had an effective channel length of 500 nm. The plasma power and time were increased from 50 W for the previous studies to 100 W and 300 s. FETs with p-doped extension regions and an intrinsic channel will hereafter be referred to as p-i-p devices. Figure 4-9b,c shows representative transfer characteristics of thin and thick undoped, uniformly doped, and p-i-p WSe2 devices.

Both the uniform and p-i-p devices show significant improvement in p-branch current producing p-branch currents up to 164 μA/μm as can be seen in Figure 4-10. However, the p-i-p devices do not show the extreme

VT shifts seen in the uniformly doped devices. Additionally, unlike the uniformly doped devices, both the thin and thick p-i-p FETs are able to maintain a low OFF state current, i.e. IOFF-min. This is because the hole conducting channel at the top surface produced by the doping does not extend all the way across the channel.

Even if the doped regions have a permanent hole conducting channel and remain in the ON state regardless of the applied back-gate voltage, the undoped center channel can still form a potential barrier to block hole conduction. The main difference between thin and thick p-i-p devices is that thick devices have an n-branch while thin devices do not. This is because the doping charge in thin devices is able to completely block electron current flow even at high positive gate potentials while hole conduction is simultaneously obstructed by the intrinsic region which is biased to prefer electron conduction. But, as can be seen in the uniformly doped curve in Figure 4-9c, in thicker FETs, carrier flow is present for the entire VBG range. It should also be noted that for both thicknesses, the p-i-p devices show a significantly improved subthreshold slope (SS) compared to the intrinsic devices. For example, in Figure 4-9b, the SS improves from 1071 mV/decade in the intrinsic device to 207 mV/decade in the p-i-p device. Similarly, in Figure 4-9c WSe2

93 flake the SS improves from 1691 mV/decade to 302 mV/decade. The improvement occurs because in SB

FETs, the SS is partially determined by the thinning of the barrier altering the tunneling resistance as VBG is modulated. However, in the p-i-p devices, carrier injection is not limited by SB tunneling in the subthreshold regime. Carriers are injected into the channel via thermal emission from the p-type extension region. The deviation of the SS from the ideal 60 mV/decade value can be attributed due to the presence of interface trap charges and finite interface trap capacitance.46

Figure 4-9: Extension region doping of WSe2 FETs. a) Schematic of extension region doped WSe2 devices. Comparison of intrinsic performance, uniform doping, and extension doping of b) thin and c) thick WSe2 devices.

Extension Region Doping Sentaurus Simulation Results

To validate this model of the p-i-p devices, TCAD simulations were done using the structure described in in Figure 4-6 with the center charge region set to zero. Figure 4-11a-c shows the simulated transfer characteristics for p-i-p doped FETs with channel thicknesses of 3 nm, 15 nm, and 30 nm for Qdope values ranging from 0 cm-2 to 1013 cm-2. All thicknesses show an improvement in p-branch current without an extreme VT shift and an improved p-branch SS as seen in the experimental results. However, the increase in IOFF-min with thickness is still present. It should be noted that the unphysically low OFF currents seen in

Figure 4-11a-c are caused by the extended quantity precision that was added to simulation parameters in order to achieve solution convergence. This reduces the minimum possible current in the device, but does not alter the values of calculated currents above ~10-13 A. Therefore, its use does not affect the qualitative trends observed from these simulations. Additionally, the n-branch is present for the thicker devices but absent in the thinner channel. Thus, the simulations capture all of the major characteristics and thickness trends present in the experimental results.

Figure 4-11d-g shows cross sections of the absolute value of the total current density for the 3 and

15 nm devices with the 0 cm-2 to 1013 cm-2 doping levels. The middle gate potentials are chosen so that they correspond to the minimum OFF state point leading to the 5 V and 2 V for the 1013 cm-2 doping with thicknesses of 3 nm and 15 nm respectively. Similarly, to the uniformly doped devices, the doped region near the source facilitates hole injection leading to increased current near the top surface in the -10 V cross sections in Figure 4-11f,g. A key difference for p-i-p vs uniformly doped devices is the vertical current distribution. In the doped region, the current is confined near the top surface while in the center region, it is confined near the back-gate oxide interface. As holes move laterally from the drain to the source, they also move vertically as seen in Figure 4-11g for VBG=-10V.

Figure 4-11: Extension doping TCAD simulation results. Transfer characteristics of FETs with semiconductor thicknesses of a) 3 nm, b) 15 nm, and c) 30 nm as a function of doping charge. The charge is negative to ensure p- type doping. These charges are present in a 50 nm region adjacent to both the source and drain contacts. Cross section of the device showing the absolute value of the total current density at different back-gate voltages for d) tSC =3 nm -2 -2 13 -2 and Qdope = 0 cm , e) tSC =15 nm and Qdope = 0 cm , f) tSC =3 nm and Qdope = -10 cm , and g) tSC =15 nm and Qdope = -1013 cm-2. The middle gate potentials are chosen so that they correspond to the minimum OFF state point.

Figure 4-12 plots the same simulations seen in Figure 4-11 with the cross sections representing conduction band energy instead of absolute total current density. The center cross section of Figure 4-12d- f shows the conduction band energy at a bias point corresponding to the OFF state. As can be seen in Figure

4-12d,e, in the case of the undoped devices, a large potential barrier forms in the center of the channel that prevents the conduction of both electrons and holes. However, Figure 4-12f,g shows that in the case of p-

96 i-p doping, the OFF state is shifted to more positive VBG values resulting in a lower potential in the undoped center of the channel compared to the undoped devices. Instead, the barrier is located in the doped region near the source. Here, the doping has pulled the bands up forming a potential barrier for the electron conduction that would otherwise be initiated by the back-gate. Additionally, the low potential in the center of the channel prevents hole conduction despite the bands being ideally positioned for hole injection from the source. This results in the low OFF state current at this bias point. However, as can be seen at the 10V bias point for the 15 nm device in Figure 4-12g, for the thicker channels the barrier is not able to extend throughout the entire channel for high positive VBG values. In these cases, the distance between the top surface charge and the back-gate is large enough that the back-gate can pull the Fermi level down enough to create an electron conducting channel through the doped region. Conversely, for thinner devices, the doping charge is able to maintain the barrier even at the back-gate interface preventing electron flow. This results in the n-branch seen in the thicker devices in Figure 4-12b-c and the lack of n-branch seen in Figure

4-12a. As tSC increases, this effect becomes more severe, reducing the bias required to produce this n- channel. This is the source of the increase in IOFF-min seen with increasing thickness in Figure 4-12a-c.

Figure 4-12: Extension doping TCAD conduction band energy. Plots are from the same extension doped simulations shown in the previous figure. Interface charge is present in a 50 nm region adjacent to both the source and drain. Transfer characteristics of FETs with semiconductor thicknesses of a) 3 nm, b) 15 nm, and c) 30 nm as a function of doping charge. The surface interface charge is negative. Cross sections plotting the conduction band energy for FETs of different thicknesses and doping charge densities at back-gate voltages of 10 V, 0 V, and -10 V. The plots -2 -2 show devices with values of d) tSC =3 nm and Qdope = 0 cm , e) tSC =15 nm and Qdope = 0 cm , f) tSC =3 nm and Qdope 13 -2 13 -2 = -10 cm , and g) tSC =15 nm and Qdope = -10 cm .

Contact Region Doping

As was mentioned earlier, conventional silicon FETs have heavily doped regions under the contacts to improve the contact resistance. This structure can be mimicked with surface charge doping of 2D materials more exactly than is done by the previously discussed extension doping strategy by using the

98 structure shown in Figure 4-13a. Here, the source and drain are patterned by electron beam lithography as normal, but before the metal is deposited, the uncovered regions are exposed to oxygen plasma. The conditions are similar to those used for the other experiments, namely flow rates of 50 sccm of He, 150 sccm of O2, and a pressure of 500 mTorr. Again, a condition is done at 300 W for 300s before the sample is added to the plasma chamber. Figure 4-13b shows the results of this exposure of MoS2 contacts for several plasma powers and durations. The plasma has little effect regardless of the conditions when compared with the channel exposures seen in the uniform and extension doping experiments. Considering that MoS2 forms n-FETs and the oxygen plasma induced MoO3-x is a p-dopant, the contact resistance for the n-branch should be increased. Additionally, the MoO3-x layer should act as an interlayer material, reducing the interactions between the metal and MoS2 which cause Fermi level pinning. Since the contact metal is nickel has a work function of 5.2, this depinning of the Fermi level should move the pinning location further from the MoS2 conduction band energy of 4.10, further increasing the n-branch contact resistance.48 However, minimal changes are observed regardless of the plasma exposure. One explanation for this is that this doping only affects the vertical path of carrier injection from the contact, and cannot alter the diagonal injection which is increasingly dominant as the channel becomes thinner.41 Additionally, as will be discussed in the following section, the doping effects of the oxygen plasma induced MoO3-x degrade upon further lithography, specifically the spinning, baking, and stripping of photoresist. It may be that the deposition of contacts has partially or completely negated the doping effects. However, two studies in the literature about doping under the contacts have shown that it can affect the device performance.

Bolshakov et al. have shown that oxygen plasma exposure under the contacts produces a small negative VT

35 shift corresponding to n-doping. They attribute this to MoO3-x formed at the surface by oxygen plasma reacts with their titanium contacts forming a thin TiOx interlayer which improves electron injection and therefore the n-branch conduction. Yue et al. have shown that an interlayer of the n-dopant benzyl viologen

(BV) induces a strong negative VT shift in MoS2 devices along with a corresponding reduction in contact resistance.8 The degree to which this shift is caused by the BV induced charge as opposed to the Fermi level

99 depinning effect from the interlayer is not clear. However, these studies show that despite the results shown in Figure 4-13, it is possible to improve the device performance by doping under the contacts.

Effect of Subsequent Lithography on Surface Doping

The doping effect of the oxygen plasma is dependent on subsequent lithography steps as shown by representative devices in Figure 4-14. Here, 10 MoS2 devices were fabricated and measured, then exposed to oxygen plasma in a Tepla M4L plasma etching tool at a power of 50 W for 30 s and measured again.

This process produces a small p-doping effect. Then, the devices are spin coated with the same bottom- layer photoresist used in the other lithography steps, namely methylmethacrylate (MMA) EL6. This is followed by a 90 second bake at 150 °C. Then, the resist is stripped in acetone and the devices are remeasured. Figure 4-14 shows that the doping effect can be completely or partially undone by these extra processing steps. It should be noted that the apparent p-branch in the initial and re-spin characteristics is composed of gate leakage and is not a real drain current. However, as was the case in the uniform MoS2 doping experiments discussed earlier, the p-branch of the doped characteristics is actual hole conduction between the source and drain. It should be noted that the plasma tool used in these doping experiments is typically used to remove photoresist residue. This leads to one possible explanation for this is that the resist

35 residue acts as an n-type dopant, as claimed by Bolshakov et al. If the resist actually is n-doping the MoS2,

100 removing it would produce a p-shift, and when the resist is spin coated on and stripped, a new layer of residue would again n-dope the device to the same degree it was doped initially. Any difference between the initial and final VT positions would then be attributed to oxygen plasma induced oxidation of the MoS2.

The variation in re-spin characteristics between devices may be related to the flake thickness, but it is difficult to tell since AFM measurements were not conducted for these devices. However, using the trends seen earlier, it can be estimated that the device in Figure 4-14a is thicker than the one in Figure 4-14b since it experiences a lower VT shift as a result of the doping. These devices are representative of the 10 devices measured, in the sense that the devices with larger VT shifts tended to have a re-spin VT position between the initial and doped values while the thicker devices tended to have the initial and re-spin curves nearly overlapping. A possible explanation for this trend is that the MMA produces some n-doping that negates a portion of the plasma induced doping charge. For thinner devices, the charge has a stronger effect allowing the device to show an intermediate VT value. However, for the thicker devices this intermediate curve would be very close to the initial VT position due to the smaller overall shifts. Because there exists some variation in the VT position depending on its measurement history as mentioned in Chapter 2, this hysteresis induced variation may obscure the small VT shift resulting from the doping and re-spin. The effect of this lithography dependence does not affect the trends observed in the other experiments. However, it may have strong effects on the fabrication of devices using SCTD techniques due to the undesired photoresist-induced doping that should be considered depending on the order of the lithography steps that should be considered when fabricating such devices.

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Requirements for Effective Extension Region Doping

There are three primary requirements for effective p-i-p doping. First, the doping should be able to thin the SB enough to significantly reduce the contact resistance, induce a large hole current, and provide the desired performance improvement. Second, VT of the undoped region should be positioned so that the region forms a potential barrier which blocks current flow for a desired VBG range thereby providing a low

OFF state value and preventing extreme VT shifting. However, the barrier formed by the center region must be low enough that it can be removed by the back-gate enabling hole current flow. In other words, if the p- regions of the devices are degenerately doped, VT of the p-i-p device is largely determined by VT in the center region. VT of this region can be adjusted with p or n SCTD to provide the desired performance

+ + + + forming a p -p-p or p -n-p device. Third, tSC must be thin enough that the surface charge prevents an inversion channel from forming at the back-gate oxide interface in the doped region. This prevents ambipolar conduction and reduces the minimum OFF current. It should be noted that all these requirements are equally applicable for n-doping for the purposes of improved nFET performance.

An example of the importance of these three characteristics can be seen in Figure 4-15 which shows the transfer characteristics of MoS2 FETs that are uniformly and p-i-p doped with tSC values of 5 nm and 7 nm. These devices are similar to those seen in Figure 4-9 with MoS2 as the channel material instead of

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WSe2. It should also be noted that the gate voltage range is higher than the devices in the other experiments, leading to the gate leakage current at the ends of the sweep range resulting from Fowler-Nordheim tunneling. The most important effect of this leakage is the p-branch in the undoped devices. This current is not caused by hole injection into the channel through normal FET operation, but instead results from the leakage current. This lack of hole conduction in the undoped devices leads to the lack of a p-branch in the p-i-p doped devices. As can be seen in Figure 4-15a,c the doping does allow hole injection and current flow in the uniformly doped devices. Consequently, the bands in the doped regions near the source and drain of the p-i-p devices are pulled up to allow hole injection from the contacts. However, because the intrinsic device does not allow hole conduction, the intrinsic region of the p-i-p doped devices forms a potential barrier that prevents hole conduction even if holes can be injected at the contacts. It should be noted however, that for a sufficiently negative gate voltage, this potential barrier will be removed leading to the presence of a p-branch with many of the same benefits seen in the WSe2 devices of Figure 4-9.

Unfortunately, the gate voltages required to achieve this are beyond the tolerance limits of the oxide.

Additionally, the n-branch of the p-i-p devices shifts right because the doped regions favor hole injection in a portion of the sweep range where the intrinsic region prefers electron conduction. The thinner uniformly doped device shows a larger VT shift which shifts the n-branch of the p-i-p device further right than for the thicker flake. These results show that hole conduction in the center region at the desired bias region is just as important for the formation of high-performance p-i-p doped devices as high hole conduction in the doped sections. This illustrates the value of the trends and physics investigated in this chapter as they allow the controllable and deliberate use of these SCTD techniques for maximum performance improvement for a variety of materials.

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Figure 4-15: Extension doped MoS2 devices. Transfer characteristics as a function of doping time MoS2 devices with uniform and p-i-p doping for a,b) thin and c,d) thick flakes. The black dashed curve plots the gate leakage current and is responsible for the apparent p-branch in all characteristics. While the uniform doping produces a VT shift, p-i- p doping does not improve the p-branch.

Conclusion

In conclusion, extensive experimental device characterization of TMDs doped through O2 plasma exposure has been combined with rigorous TCAD simulations. These results provide a comprehensive insight into the fundamentals of carrier transport in TMDs in the presence of surface charge dopants and the effects of channel thickness on the doping response. The main patterns observed were oxidation induced damage for thin devices, a decrease in threshold voltage shift with increasing semiconductor thickness, and an increase in the minimum OFF state current with increasing thickness. It was found that the ΔVT trends were caused by an inability of the doping charge to influence the Fermi level near the back-gate of thick devices and the IOFF-min trends were caused by a corresponding failure of the back-gate to control hole

104 conduction near the doping charge at the top of the channel. This work also investigates how surface charge doping can be effectively exploited through proper device design to mitigate some of the most critical challenges encountered by the 2D research community, namely overcoming the high contact resistance triggered by Fermi level pinning at the contacts and the associated SBs. Surface charge doping near the source and drain of WSe2 devices was shown to strongly increase the p-branch current while maintaining a low OFF state and preventing the extreme VT shifting seen in the uniformly doped devices. The presence of n-branch in thicker devices was caused by a failure of the doping charge to control the Fermi level near the back-gate interface allowing the formation of an electron conducting channel at large positive back-gate biases. Additionally, it was found that in order for the p-i-p doping to be effective, the doping must significantly increase the hole current, and the intrinsic material must also allow some hole conduction to prevent a potential barrier form forming in the undoped center of the channel. These results show that the gate electrostatics and material properties such as the presence of hole conduction and low OFF state conduction in intrinsic TMD channel, play an essential role in high performance 2D FET design. It should also be noted that the conclusions drawn here are not restricted to 2D materials. Any ultra-thin body channel material including nanotubes, nanowires, semiconducting oxides, organic semiconductors, and thin film silicon FETs can utilize similar design principle involving surface charge doping of any kind. Additionally, of these trends and results apply equally to p and n type surface charge doping strategies. Finally, optimally designed p-i-p or n-i-n type device architectures can effectively mitigate the widespread and long-standing contact resistance issues triggered by Fermi level pinning and thereby achieve high performance.

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36. Kang, N.; Paudel, H. P.; Leuenberger, M. N.; Tetard, L.; Khondaker, S. I., Photoluminescence Quenching in Single-Layer MoS2 via Oxygen Plasma Treatment. The Journal of Physical Chemistry C 2014, 118 (36), 21258-21263.

37. Ko, T. Y.; Jeong, A.; Kim, W.; Lee, J.; Kim, Y.; Lee, J. E.; Ryu, G. H.; Park, K.; Kim, D.; Lee, Z.; Lee, M. H.; Lee, C.; Ryu, S., On-Stack Two-Dimensional Conversion of MoS2 Into MoO3. 2d Mater 2016, 4 (1).

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39. Jadwiszczak, J.; O'Callaghan, C.; Zhou, Y.; Fox, D. S.; Weitz, E.; Keane, D.; Cullen, C. P.; O'Reilly, I.; Downing, C.; Shmeliov, A.; Maguire, P.; Gough, J. J.; McGuinness, C.; Ferreira, M. S.; Bradley, A. L.; Boland, J. J.; Duesberg, G. S.; Nicolosi, V.; Zhang, H., Oxide-Mediated Recovery of Field- Effect Mobility in Plasma-Treated MoS2. Sci Adv 2018, 4 (3), eaao5031.

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Chapter 5: Conclusion and Future Work

Conclusion

This dissertation has examined a variety of topics related to the application or improvement of 2D

TMD FETs. Chapter 2 discussed how the hysteresis in MoS2 transistor characteristics can be used in a synaptic device for neuromorphic computing applications. The hysteresis causes IDS to depend not only on the current VGS potential, but also the history of applied voltages. By applying sequences of VGS pulses consisting of various numbers of pulses of varying magnitude and polarity, the response to these pulses was characterized and simple mathematical models of the resulting behaviors were developed. In turn, these models were used to relate the pulse response to the three key aspects of neurotransmitter release.

Specifically, the pulse polarity was linked to bipolar release, the number of pulses was considered analogous to quantal release, and the pulse magnitude could be normalized into a probability which makes it function like stochastic release. Additionally, the slow decay of excess hysteresis-induced current functions analogously to a biological phenomenon known as long-term potentiation which is responsible for learning and memory. Finally, by adjusting the resting gate bias to the OFF state, the change in potential resulting from the gate pulses could be significantly increased due to the exponential change in current in the subthreshold region which significantly increased the long-term potentiation time.

Chapter 3 investigated the effect of high energy He+ and proton irradiation on the electrical characteristics of MoS2 FETs. Similar investigations of the radiation resistance of 2D materials in the literature fail to consider how radiation damage of the gate dielectric affects the electrical response. In this chapter, the radiation damage on the oxide was isolated using a novel experimental setup involving four samples that takes advantage of the unique properties of 2D materials. The four samples are an unirradiated control (CS), a sample where flakes are exfoliated on a substrate which is then irradiated (BI), a sample where the blank substrate is irradiated then new flakes are exfoliated on top (SI), and a sample where flakes are irradiated on a substrate and a wet transfer technique is used to move them onto an unirradiated substrate

+ 15 2 (FI). It was found that at a He fluence of 10 ions/cm , the BI and FI samples experienced large VT shifts, 112

SS degradations, and a strong drop in mobility compared to the CS while the SI sample showed smaller but nonzero changes. This indicates that for this oxide and radiation conditions, the flake itself did experience damage which dominated the characteristics of the fully irradiated device. Despite this, the FET characteristics were still fairly strong with relatively high ON currents and ON/OFF ratios. Similar effects of lesser magnitude were found for samples irradiated with 1.26 × 1016 protons/cm2.

Surface charge transfer doping (SCTD) is a promising technique to improve the performance of contacts in 2D FETs. Chapter 4 contains an experimental study backed with Synopsys Sentaurus TCAD simulations which, for the first time, provides a detailed explanation of the physics which determine the effectiveness of SCTD techniques. Oxygen plasma is used to induce p-doping in several TMDs with particular emphasis on MoS2 and WSe2. However, it should be noted that the physics and trends found in this study are independent of the semiconducting material and the particular SCTD mechanism. An examination of the transfer characteristics for MoS2 and WSe2 FETs as a function of plasma time and flake thickness (tSC) isolated three main effects of the oxygen plasma doping. The doping oxidizes the TMD which can severely damage the FET characteristics if the tSC is less than the penetration depth of the plasma.

Additionally, increasing tSC reduces the doping induced VT shift and increases the minimum OFF current

(IOFF-min). The Sentaurus simulations show that the VT and IOFF-min effects are caused by a failure of the back- gate to influence the device potential near the doping at the top of the channel due to the increased separation between the two points. Additionally, the inclusion of an undoped region in the center of the channel (p-i- p doping) allows the device to retain the improved contact performance while preventing the excessive threshold shift produced by the high doping charge. Sentaurus simulations of this device configuration reveal a similar dependence of IOFF-min on tSC. Additionally, they show that the n-branch of the characteristics will appear in thicker flakes due to a failure of the doping charge to completely prevent current flow at high positive VGS values due to the distance between the doping charge and the back-gate. Finally, experimental p-i-p doped MoS2 devices are used to show that three main factors are required for effective p-i-p doping.

First, the channel must be thin enough to prevent large increases in IOFF-min. Second, the Fermi level of the

113 channel material must be positioned to allow p-conduction in the presence of the desired quantity of doping charge. Finally, the undoped Fermi level of the channel material must not block carrier flow in the center region at VGS values where the p-i-p device is desired to be in the ON state. These investigations should allow researchers to effectively and controllably use surface charge transfer doping to improve the contact performance of 2D FETs.

Future Work

Previous studies in the literature have performed some investigations of the effect of SCTD on

1 contact resistance (RC). However, these examinations have used a uniform doping strategy like that seen in Figure 5-1a. While this does show that the doping has an effect on RC, this doping layout is impractical.

Uniform doping produces a threshold voltage (VT) shift and larger doping charge densities produce larger

VT shifts. To improve the contact resistance over the entire VGS range, it is desirable to degenerately dope near the contact regions. This requires a large VT shift which if done over the entire channel will prevent the device from reaching the OFF state in a reasonable VGS range. An alternate doping pattern shown in

Figure 5-1b dopes the devices near the contacts while leaving the channel intrinsic. This should improve

RC while leaving the channel VT largely unchanged. This extension region doping pattern has been

2 investigated in the literature, but the effect on RC was not examined. This doping pattern functions analogously to the highly doped regions under the contacts in conventional silicon FETs which are used to reduce the contact resistance.

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An additional benefit of the extension region doping is it enables the investigation of ungated contacts with potentially high-performance. Typically, investigations into 2D FET performance rely on a back-gated structure like that seen in Figure 5-1a where a highly doped silicon wafer is used to uniformly gate the entire device including underneath the contacts which modulates the Fermi level under the contacts and improves RC. However, in conventional FETs, no gating is present under the contacts because it creates large parasitic capacitances. Consequently, the RC values extracted in most experimental studies on 2D

FETs underestimate RC compared to an equivalent device with ungated contacts. SCTD of 2D materials may be able to alleviate this problem since the doping modulates the Fermi adjacent to the contacts level without gating similarly to the doped regions under the contacts in silicon FETs.

The effect of extension doping and contact gating on RC can be evaluated using an extension doping schematic like that seen in Figure 5-1b. This can be done by fabricating devices with this structure with varying channel lengths in a transmission line measurement (TLM) structure. The addition of the top-gates seen in Figure 5-1b will allow the effect of contact gating and gating of the extension regions on RC to be evaluated. The SCTD should be performed last, allowing RC extractions to be done both before and after the doping. Additionally, both before and after doping, the electrical measurements used for RC extraction should be performed twice. First using the back-gate which will produce results comparable to those seen

115 in the literature based on similar structures, and second using only the top-gate which will show the doping- induced improvement on RC without gating of the contacts or the doped regions.

The structure of 2D materials enables the fabrication of ultra-thin body FETs which have scalability advantages over traditional semiconducting materials.3 Most studies of the scalability of 2D materials typically involve scaling the channel length (LCh) to take advantage of the thin transistor channels these materials can provide. However, in order to fabricate a fully scaled device, it is also necessary to scale the contact length (LC) which has achieved much less attention in the literature. Scaling contacts is difficult due to the phenomenon of current crowding which results in a sharp increase in RC after LC passes a critical point known as the contact transfer length (LT). Equation 5-1 shows that RC depends on the contact resistivity (ρC), the sheet resistance under the contact (RSH-C), and the width of the contact (WCH). LT can thus be improved by reducing the contact resistivity by fabricating a higher quality contact or by decreasing the sheet resistance under the contact by doping the semiconductor.

퐿퐶 √휌퐶푅푆퐻−퐶 휌퐶 푅퐶 = 푅퐶0 푐표푡ℎ ( ) ; 푅퐶0 = ; 퐿푇 = √ Equation 5-1 퐿푇 푊퐶퐻 푅푆퐻−퐶

As discussed in Section 1.6, 2D FETs have two primary current injection paths as seen in Figure

5-2.4 Path 2 injects current vertically from the contact into the metal where it then moves horizontally through the channel. Path 1 injects current diagonally from the corner of the contact directly into the channel. This is what allows the SCTD to function since in most cases seen within the literature, doping is done after the device fabrication and therefore is not present under the contact. TCAD simulations by

Arutchelvan et al. have indicated the presence of a second consequence of the two path system that has yet to be investigated experimentally.5 Namely, since 2D materials typically have SB contacts and these barriers have a finite width, if the channel thickness is comparable to the barrier width, a potential barrier will deplete carriers under the contacts leading the diagonal injection to dominate. Since this path does not conduct under the contacts, conventional current crowding effects do not occur and LT becomes effectively zero. Additionally, since the current is dominated by injection into the channel, any doping in this area will

116 have a greater effect on RC than it would for a thicker device. The required length of the doping region in this area will be related to the band bending length in the region which is dependent on thickness of the channel material. However, typically the band bending length will be short enough that the required doping length will be limited by experimental fabrication capabilities. The TCAD simulations also showed that the length of the extension doping region can be scaled very small to at least 10 nm without losing effectiveness.5 However, since electron beam lithography can pattern features with sizes less than 10 nm, a study of the length limits of the extension doping region would provide valuable insights into the scalability of SCTD as a mechanism for the improvement of 2D FETs.

The typical structure used to extract the contact resistance of a 2D FET is the TLM structure shown in Figure 5-3a. In order to extract LT, this structure needs to be modified to the contact transmission line measurement (CTLM) structure shown in Figure 5-3b which has varying contact lengths for the same channel length. If the two path model of carrier injection and the associated thickness dependences are realistic, these CTLM structures with varying semiconductor thicknesses can be used to extract the trends.

SCTD can also be used in conjunction with this study to evaluate its effects on LT.

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References

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2. Kiriya, D.; Tosun, M.; Zhao, P.; Kang, J. S.; Javey, A., Air-Stable Surface Charge Transfer Doping of MoS2 by Benzyl Viologen. J Am Chem Soc 2014, 136 (22), 7853-6.

3. Schulman, D. S.; Arnold, A. J.; Das, S., Contact Engineering for 2D Materials and Devices. Chem Soc Rev 2018, 47 (9), 3037-3058.

4. Prakash, A.; Ilatikhameneh, H.; Wu, P.; Appenzeller, J., Understanding Contact Gating in Schottky Barrier Transistors from 2D Channels. Sci Rep 2017, 7 (1), 12596.

5. Arutchelvan, G.; Lockhart de la Rosa, C. J.; Matagne, P.; Sutar, S.; Radu, I.; Huyghebaert, C.; De Gendt, S.; Heyns, M., From the Metal to the Channel: A Study of Carrier Injection Through the Metal/2D MoS2 Interface. Nanoscale 2017, 9 (30), 10869-10879.

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Appendices

Appendix A: Synopsys Sentaurus TCAD Simulation Code

These simulations were run through Sentaurus Workbench which in turn executed Sentaurus

Structure Editor to specify the device structure and simulation mesh, Sentaurus Device to run the numerical simulations, and Sentaurus Visual to plot and visualize the data. Each program had its own set of code that was run to perform the associated simulations. The use of Sentaurus Workbench allowed the code to be run with variable inputs so that customizable arrays of simulations could be run automatically in sequence. The following code was run for the extension region doping simulations in Section 4.10. The only difference from the uniform simulations in Section 4.8 is a few lines in the math section of the

Sentaurus Device code which are marked by comments in all caps. All other code is identical between the two and the differences in device structure and doping are set using variables.

Sentaurus Structure Editor Code

; Variables ; @tsc@ thickness (varies) ; @Lg@ Gate Length (0.3 um) ; @Lc@ contact length (0.2 um) ; @LCOx@ Extension doping length (0.05 um) ; @np@ n or p type doping charge flag (set to p) ; @iRegion@ undoped region flag (Y extension;N uniform) ; @Qdope@ Doping concentration (varies)

;------(sde:set-process-up-direction 1) ;------; Setting parameters

; - lateral ;(define Lg 1.000) ; [um] Gate length ;(define Lc 0.300) ; [um] Contact length

(define Lg @Lg@) ; [um] Gate length (define Lc @Lc@) ; [um] Contact length

(define LCOx @LCOx@) ; [um] Doping Oxide Length on channel near contacts (define TChOx 0.005) ; [um] Doping Oxide thickness on channel

; - vertical (define Tox 0.05) ; [um] Gate oxide thickness (define Tsc @tsc@) ; [um] HighK oxide thickness ;(define Tsc 0.02) ; [um] HighK oxide thickness

(define OxRefT 0.005) ; [um] Oxide Ref Window Thickness (x) (define OxFineRefT 0.003) ; [um] Oxide Extra Fine Ref Window Thickness (x)

;------; Derived quantities

(define Ltot (+ Lg (* 2 Lc) ) ) ; [um] Lateral extend total (define Ttot (+ Tox Tsc) ) ; [um] Vertical extend total

(define Xgox (* Tox -1.0) ) ; [um] oxide top (define Xsc (- Xgox Tsc) ) ; [um] sc top (define Xtot Xsc) ; [um] Max X position

(define Ytot Ltot) ; [um] Max Y position (define YLcont Lc) ; [um] Left contact edge (define YRcont (- Ytot Lc) ) ; [um] Right contact edge

(define XDVactot (- Xtot TChOx) ) ; [um] Doping Oxide Top (define YDVacS (+ YLcont LCOx) ) ; [um] Doping Oxide Source Right Edge (define YDVacD (- YRcont LCOx) ) ; [um] Doping Oxide Drain Left Edge

(define OxRefX (* OxRefT -1) ) ; [um] Oxide Ref Window edge (x) (define OxFineRefX (* OxRefT -1) ) ; [um] Oxide Extra Fine Ref Window edge (x)

;------; Draw Device Regions

; Creating Oxide Region (sdegeo:create-rectangle (position 0.0 0.0 0.0 ) (position Xgox Ytot 0.0 ) "Al2O3" "R.Gateox")

; Creating Semiconductor Region (sdegeo:create-rectangle (position Xgox 0.0 0.0 ) (position Xtot Ytot 0.0 ) "Silicon" "R.Semiconductor")

;------; Draw Interface Doping Oxide Regions

; Creating Source Oxide Region (sdegeo:create-rectangle (position Xtot YLcont 0.0 ) (position XDVactot YDVacS 0.0 ) "VacS" "R.SVac")

; Creating Drain Oxide Region (sdegeo:create-rectangle (position Xtot YRcont 0.0 ) (position XDVactot YDVacD 0.0 ) "VacD" "R.DVac")

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; Creating Channel Oxide Region (sdegeo:create-rectangle (position Xtot YDVacS 0.0 ) (position XDVactot YDVacD 0.0 ) "VacCh" "R.ChVac")

;------; Draw Contact Vertices

; Creating Source Vertex (sdegeo:insert-vertex (position Xtot Lc 0.0 ) )

; Creating Drain Vertex (sdegeo:insert-vertex (position Xtot (- Ytot Lc) 0.0 ) )

(sdeio:save-tdr-bnd "all" "n@node@_S1_bnd.tdr")

;------; Contact settings

; Define Source (sdegeo:define-contact-set "source" 4.0 (color:rgb 0.0 0.0 0.8 ) "##") (sdegeo:set-current-contact-set "source") (sdegeo:set-contact-edges (find-edge-id (position Xsc (+ 0 0.001) 0 )) "source") ;(sdegeo:delete-region (find-edge-id (position Xsc (+ 0 0.001) 0 )))

; Define Drain (sdegeo:define-contact-set "drain" 4.0 (color:rgb 0.8 0.0 0.0 ) "##") (sdegeo:set-current-contact-set "drain") (sdegeo:set-contact-edges (find-edge-id (position Xsc (- Ytot 0.001) 0 )) "drain") ;(sdegeo:delete-region (find-body-id (position Xsc (- Ytot 0.001) 0 )))

; Define Gate (sdegeo:define-contact-set "gate" 4.0 (color:rgb 0.0 0.8 0.0 ) "##") (sdegeo:set-current-contact-set "gate") (sdegeo:set-contact-edges (find-edge-id (position 0 (+ 0 0.001) 0 )) "gate") ;(sdegeo:delete-region (find-edge-id (position 0 (+ 0 0.001) 0 )))

(sdeio:save-tdr-bnd "all" "n@node@_S2_bnd.tdr")

;Rebuild render to see changes ;(render:rebuild)

;------; Doping:

;(sdedr:define-constant-profile "PlaceCD.SC" "NDopantActiveConcentration" @Qdope@) ;(sdedr:define-constant-profile-material "Const.SC" "PlaceCD.SC" "Silicon")

;(sdedr:define-constant-profile "PlaceCD.SC" "NDopantActiveConcentration" 1e15) ;(sdedr:define-constant-profile-material "Const.SC" "PlaceCD.SC" "Silicon")

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;------; Meshing Strategy:

; Oxide ;Gateox Global Refinement (sdedr:define-refinement-placement "Ref.Gateox" "Ref.Global.Gateox" (list "region" "R.Gateox")) (sdedr:define-refinement-size "Ref.Global.Gateox" 0.01 0.02 0.0001 0.0001)

; Semiconductor ;Semiconductor Global Refinement (sdedr:define-refinement-placement "Ref.Semiconductor" "Ref.Global.Semiconductor" (list "region" "R.Semiconductor")) (sdedr:define-refinement-size "Ref.Global.Semiconductor" 0.001 0.02 0.0001 0.0001)

;Define Global Ref/Eval Window (sdedr:define-refeval-window "RWin.SC" "Rectangle" (position Xgox 0.0 0.0 ) (position Xtot Ytot 0.0 ) )

;Semiconductor Top (sdedr:define-refeval-window "RWin.SCTop" "Rectangle" (position (+ Xsc 0.005) 0.0 0.0 ) (position Xsc Ytot 0.0 ) ) (sdedr:define-refinement-size "Ref.Def.SCTop" 0.0005 0.02 0.0001 0.0001) (sdedr:define-refinement-placement "Ref.SCTop" "Ref.Def.SCTop" (list "window" "RWin.SCTop"))

;;Semiconductor Bottom (sdedr:define-refeval-window "RWin.SCBot" "Rectangle" (position Xgox 0.0 0.0 ) (position (- Xgox 0.005) Ytot 0.0 ) ) (sdedr:define-refinement-size "Ref.Def.SCBot" 0.0005 0.02 0.0001 0.0001) (sdedr:define-refinement-placement "Ref.SCBot" "Ref.Def.SCBot" (list "window" "RWin.SCBot"))

; Finer Refinements

;Source Fine (sdedr:define-refeval-window "RWin.Sourcefine" "Rectangle" (position Xgox (- YLcont 0.03) 0.0 ) (position Xsc (+ YLcont 0.03) 0.0 ) ) (sdedr:define-refinement-size "Ref.Def.Sourcefine" 0.001 0.001 0.0001 0.0001) (sdedr:define-refinement-placement "Ref.Sourcefine" "Ref.Def.Sourcefine" (list "window" "RWin.Sourcefine")) 122

;Drain Fine (sdedr:define-refeval-window "RWin.Drainfine" "Rectangle" (position Xgox (- YRcont 0.03) 0.0 ) (position Xsc (+ YRcont 0.03) 0.0 ) ) (sdedr:define-refinement-size "Ref.Def.Drainfine" 0.001 0.001 0.0001 0.0001) (sdedr:define-refinement-placement "Ref.Drainfine" "Ref.Def.Drainfine" (list "window" "RWin.Drainfine"))

;Source Coarse (sdedr:define-refeval-window "RWin.Sourcecoarse" "Rectangle" (position (- Xgox OxRefX) (- YLcont 0.1) 0.0 ) (position Xsc (+ YLcont 0.1) 0.0 ) ) (sdedr:define-refinement-size "Ref.Def.Sourcecoarse" 0.005 0.005 0.0001 0.0001) (sdedr:define-refinement-placement "Ref.Sourcecoarse" "Ref.Def.Sourcecoarse" (list "window" "RWin.Sourcecoarse"))

;Drain Coarse (sdedr:define-refeval-window "RWin.Draincoarse" "Rectangle" (position (- Xgox OxRefX) (- YRcont 0.1) 0.0 ) (position Xsc (+ YRcont 0.1) 0.0 ) ) (sdedr:define-refinement-size "Ref.Def.Draincoarse" 0.005 0.005 0.0001 0.0001) (sdedr:define-refinement-placement "Ref.Draincoarse" "Ref.Def.Draincoarse" (list "window" "RWin.Draincoarse"))

;Ultrathin Top/Bottom for interface charge and AbsTotalCurrent ;Ultrathin Semiconductor Top (sdedr:define-refeval-window "RWin.SCUTTop" "Rectangle" (position (+ Xsc 0.0001) 0.0 0.0 ) (position Xsc Ytot 0.0 ) ) (sdedr:define-refinement-size "Ref.Def.SCUTTop" 0.0001 0.02 0.0001 0.0001) (sdedr:define-refinement-placement "Ref.SCUTTop" "Ref.Def.SCUTTop" (list "window" "RWin.SCUTTop"))

;Ultrathin Semiconductor Bottom (sdedr:define-refeval-window "RWin.SCUTBot" "Rectangle" (position Xgox 0.0 0.0 ) (position (- Xgox 0.0001) Ytot 0.0 ) ) (sdedr:define-refinement-size "Ref.Def.SCUTBot" 0.0001 0.02 0.0001 0.0001) (sdedr:define-refinement-placement "Ref.SCUTBot" "Ref.Def.SCUTBot" (list "window" "RWin.SCUTBot"))

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;Ultrathin Oxide Top (sdedr:define-refeval-window "RWin.OxUTTop" "Rectangle" (position (+ Xgox 0.0001) 0.0 0.0 ) (position Xgox Ytot 0.0 ) ) (sdedr:define-refinement-size "Ref.Def.OxUTTop" 0.0001 0.02 0.0001 0.0001) (sdedr:define-refinement-placement "Ref.OxUTTop" "Ref.Def.OxUTTop" (list "window" "RWin.OxUTTop"))

;Ultrathin Doping Oxide Bottom (sdedr:define-refeval-window "RWin.DopeOxUTBot" "Rectangle" (position Xsc 0.0 0.0 ) (position (- Xsc 0.0001) Ytot 0.0 ) ) (sdedr:define-refinement-size "Ref.Def.DopeOxUTBot" 0.0001 0.02 0.0001 0.0001) (sdedr:define-refinement-placement "Ref.DopeOxUTBot" "Ref.Def.DopeOxUTBot" (list "window" "RWin.DopeOxUTBot"))

;Doping Oxide Regions

;SourceOx Global Refinement (sdedr:define-refinement-placement "Ref.SOx" "Ref.Global.SOx" (list "region" "R.SVac")) (sdedr:define-refinement-size "Ref.Global.SOx" 0.002 0.005 0.0001 0.0001)

;DrainOx Global Refinement (sdedr:define-refinement-placement "Ref.DOx" "Ref.Global.DOx" (list "region" "R.DVac")) (sdedr:define-refinement-size "Ref.Global.DOx" 0.002 0.005 0.0001 0.0001)

;ChannelOx Global Refinement (sdedr:define-refinement-placement "Ref.ChOx" "Ref.Global.ChOx" (list "region" "R.ChVac")) (sdedr:define-refinement-size "Ref.Global.ChOx" 0.002 0.005 0.0001 0.0001)

;Intrinsic Region Fine Refinements

;Source Intrinsic Fine (sdedr:define-refeval-window "RWin.SourceIntfine" "Rectangle" (position Xgox (- YDVacS 0.03) 0.0 ) (position Xsc (+ YDVacS 0.03) 0.0 ) ) (sdedr:define-refinement-size "Ref.Def.SourceIntfine" 0.001 0.001 0.0001 0.0001) (sdedr:define-refinement-placement "Ref.SourceIntfine" "Ref.Def.SourceIntfine" (list "window" "RWin.SourceIntfine"))

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;Drain Intrinsic Fine (sdedr:define-refeval-window "RWin.DrainIntfine" "Rectangle" (position Xgox (- YDVacD 0.03) 0.0 ) (position Xsc (+ YDVacD 0.03) 0.0 ) ) (sdedr:define-refinement-size "Ref.Def.DrainIntfine" 0.001 0.001 0.0001 0.0001) (sdedr:define-refinement-placement "Ref.DrainIntfine" "Ref.Def.DrainIntfine" (list "window" "RWin.DrainIntfine"))

;------; Build Mesh (sde:build-mesh "n@node@_msh")

Sentaurus Device Material Parameter File

#define ParFileDir .

Material="Silicon" { #includeext "ParFileDir/Silicon.par" BarrierTunneling "NLMS" { mt = 0.19 , 0.16 g = 2.1 , 0.66} BarrierTunneling "NLMD" { mt = 0.19 , 0.16 g = 2.1 , 0.66} } Material="Al2O3" { #includeext "ParFileDir/Al2O3.par" } Material="SiO2" { #includeext "ParFileDir/SiO2.par" } Material="VacS" { #includeext "ParFileDir/VacS.par" } Material="VacD" { #includeext "ParFileDir/VacD.par" } Material="VacCh" { #includeext "ParFileDir/VacCh.par" }

Sentaurus Device Code

Note that several changes to the math section were made to achieve convergence in the extension doping simulations. They are noted by comments written in all caps.

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* Variables * @Vd@ - Drain Voltage (set to 1V) * @Vgmax@ - Gate voltage sweep limit (set to 10V) * @Quant@ - Flag to test quantization physics (set to MLDA) * @TLength@ - Nonlocal tunneling mesh length in cm (5e-7 extension; 50e-7 uniform) * @SB@ - Schottky barrier height (set to 0.4 eV) * @Dig@ - Number of simulation digits (helps with convergence) (10 extension; 7 uniform) * @IdVg@ - Flag to skip simulation (0 to skip)

#if @IdVg@ == 0 #noexec #endif

#-- MLDA specification #if [string match @Quant@ "MLDA"] #define _Quant_ MLDA #define _MLDADistance_ #define _hQuant_ #define _eQuant_ #endif

#if [string match @Quant@ "MLDAC"] #-- MLDA Contact Specfication #define _Quant_ MLDA #define _MLDADistance_ MLDAMinDistanceToContact=0 #define _hQuant_ #define _eQuant_ #endif

#if [string match @Quant@ "MLDAL"] #-- MLDA Contact Specfication #define _Quant_ MLDA #define _MLDADistance_ MLDAMinDistanceToContact=5e-4 #define _hQuant_ #define _eQuant_ #endif

#if [string match @Quant@ "DensG"] #-- Density Gradient Specification #define _hQuant_ hQuantumPotential #define _eQuant_ eQuantumPotential #define _Quant_ #define _MLDADistance_ #endif

#if [string match @Quant@ "None"] #-- Density Gradient Specification #define _hQuant_ #define _eQuant_ #define _Quant_ #define _MLDADistance_ #endif

!( if { "@np@" == "n" } { set SIGN 1.0 } else { set SIGN -1.0 } )!

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!( if { "@iRegion@" == "Y" } { set ChDope 0 } else { set ChDope @Qdope@ } )!

File { * input files: Grid= "@tdr@" *Piezo= "@tdr@" *may need to turn this on or off Parameter= "@parameter@"

* output files: Plot= "@tdrdat@" Current="@plot@" Output= "@log@" }

Electrode{ { Name="source" Voltage=0.0 Schottky Barrier= @SB@ } { Name="drain" Voltage=0.0 Schottky Barrier= @SB@ } { Name="gate" Voltage=0.0 Workfunction=5.2 } *contact to insulator (Phi_ms barrier)}

Physics { Fermi *MLDA eBarrierTunneling "NLMS" hBarrierTunneling "NLMS" *source tunneling see options eBarrierTunneling "NLMD" hBarrierTunneling "NLMD" *drain tunneling see options

_Quant_ _eQuant_ _hQuant_ }

Physics(MaterialInterface="Silicon/VacS") { Traps(Conc=!(puts [expr $SIGN*@Qdope@])! FixedCharge) } Physics(MaterialInterface="Silicon/VacD") { Traps(Conc=!(puts [expr $SIGN*@Qdope@])! FixedCharge) } Physics(MaterialInterface="Silicon/VacCh") { Traps(Conc=!(puts [expr $SIGN*$ChDope])! FixedCharge) }

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Plot{ *-Carrier Densities: eDensity hDensity EffectiveIntrinsicDensity IntrinsicDensity eEquilibriumDensity hEquilibriumDensity

*-Currents and current components: Current/Vector eCurrent/Vector hCurrent/Vector eMobility hMobility eVelocity hVelocity

*-Fields, Potentials and Charge distributions ElectricField/Vector Potential eQuasiFermi hQuasiFermi SpaceCharge eMLDAQuantumPotential hMLDAQuantumPotential

*-Driving forces eGradQuasiFermi/Vector hGradQuasiFermi/Vector eEparallel hEparallel eENormal hENormal eEffectiveField hEffectiveField

*-Temperatures

*-Generation/Recombination

*-Doping Profiles Doping

*-Band structure BandGap ElectronAffinity ConductionBandEnergy ValenceBand

*-Traps eTrappedCharge hTrappedCharge

*-Tunneling BarrierTunneling eBarrierTunneling hBarrierTunneling eDirectTunnel hDirectTunnel }

Math { Extrapolate * (not needed for transient sweeps) *#Avalderivatives * (only if Avalanche models are active) RelErrControl CNormPrint * prints errors of different equations to see where convergence problems happen Digits=@Dig@ * (default) originally 5 Iterations=15 *CHANGED (SET TO 20 IN UNIFORM SIMULATIONS) *Notdamped=100 *DISABLED FOR CONVERGENCE (ON IN UNIFORM SIMULATIONS) ExtendedPrecision(128) *ADDED FOR CONVERGENCE (NOT IN UNIFORM SIMULATIONS) IncompleteNewton *ADDED FOR CONVERGENCE (NOT IN UNIFORM SIMULATIONS) ExitOnFailure * Please uncomment if you have 4 CPUs or more Number_of_Threads= maximum *threads equal to number of CPUs

128

Nonlocal "NLMS" ( *nonlocal tunneling mesh @TLength@ from source Electrode="source" Length=@TLength@ Digits=4 EnergyResolution=0.001 RefinedIntervals=1e-8 ) Nonlocal "NLMD" ( *nonlocal tunneling mesh @TLength@ from drain Electrode="drain" Length=@TLength@ Digits=4 EnergyResolution=0.001 RefinedIntervals=1e-8 ) *check nonlocal mesh options p 1413 and p 151

_MLDADistance_

}

Solve { *- Build-up of initial solution: NewCurrentPrefix="init_" Coupled(Iterations=100){ Poisson} Coupled{ Poisson Electron Hole _eQuant_ _hQuant_ }

Save ( FilePrefix = "n@node@_init" )

*- Bias drain to target bias NewCurrentPrefix="Vd_" Quasistationary( InitialStep=0.05 Increment=1.3 Decrement=1.5 MaxStep=0.1 MinStep=1e-5 Goal{ Name="drain" Voltage= @Vd@ } ) { Coupled { Poisson Electron Hole _eQuant_ _hQuant_ } CurrentPlot(Time=(Range=(0 1) Intervals=10))}

Plot( FilePrefix = "n@node@_Vd" )

*- Bias gate to beginning of sweep NewCurrentPrefix="plus_" Quasistationary( InitialStep=0.05 Increment=1.3 Decrement=1.5 MaxStep=0.1 MinStep=1e-6 Goal{ Name="gate" Voltage= @Vgmax@ } ) { Coupled { Poisson Electron Hole _eQuant_ _hQuant_ } CurrentPlot(Time=(Range=(0 1) Intervals=10)) Plot ( FilePrefix = "n@node@_plot" Time=(0; 0.1; 0.2; 0.3; 0.4; 0.5; 0.6; 0.7; 0.8; 0.9; 1) noOverwrite)}

Plot ( FilePrefix = "n@node@_plus" )

NewCurrentPrefix="IdVg_" *- Gate voltage sweep Quasistationary( InitialStep=0.05 Increment=1.3 Decrement=1.5 MaxStep=0.1 MinStep=1e-6 Goal{ Name="gate" Voltage= -@Vgmax@ } *check sign ) { Coupled { Poisson Electron Hole _eQuant_ _hQuant_ } CurrentPlot(Time=(Range=(0 1) Intervals=250)) } *end gate voltage sweep

Plot ( FilePrefix = "n@node@_IdVg" ) } 129

Sentaurus Visual Code

#if @IdVg@ == 0 #noexec #endif

#------# load_library extract lib::SetInfoDef 1 #------# set N @node@ set i @node:index@ set tsemi @tsc@ set Qd @Qdope@ set Vdd @Vd@ set Vg @Vgmax@ set SB @SB@ puts "" puts "Gate Length: um \n"

#- Automatic alternating color assignment tied to node index #------# set COLORS [list green blue red orange magenta violet brown] set NCOLORS [llength $COLORS] set color [lindex $COLORS [expr $i%$NCOLORS]]

#- Plotting IdVg #------# echo "#########################################" echo "Plotting Id-Vg (lin) curve" echo "#########################################" load_file IdVg_@plot@ -name PLT_Lin($N) if {[lsearch [list_plots] Plot_IdVg] == -1} { create_plot -1d -name Plot_IdVg set_plot_prop -title "I_d-V_gs Curve" -title_font_size 20 set_axis_prop -axis x -title {Gate Voltage [V]} \ -title_font_size 16 -scale_font_size 14 -type linear set_axis_prop -axis y -title {Drain Current [A/mm]} \ -title_font_size 16 -scale_font_size 14 -type log set_legend_prop -font_size 12 -location bottom_right -font_att bold } select_plots Plot_IdVg set Vgs [get_variable_data "gate OuterVoltage" -dataset PLT_Lin($N)] set Ids [get_variable_data "drain TotalCurrent" -dataset PLT_Lin($N)] ext::AbsList -out absIds -x $Ids ;# Compute absolute value of drain currents create_variable -name absId -dataset PLT_Lin($N) -values $absIds create_curve -name IdVgLin($N) -dataset PLT_Lin($N) \ -axisX "gate OuterVoltage" -axisY "absId" set_curve_prop IdVgLin($N) -label "tsc=$tsemi Qdope=$Qd SB=$SB" \ -color $color -line_style solid -line_width 3 export_variables {"gate OuterVoltage" "drain TotalCurrent"} -dataset PLT_Lin($N) \ -overwrite -filename IdVgData_$N.csv 130

Appendix B: Fermi-Only Uniform Doping Sentaurus Simulations

As was stated in Section 4.7, the primary Sentaurus simulations included Fermi statistics, 400 meV

Schottky barriers, a non-local tunneling model to account for tunneling through the barriers, and a modified local density approximation (MLDA) model for carrier quantization. No further attempt was made to precisely replicate the behaviors of the specific semiconductors involved such as mobility fitting, attempting to account for scattering, or modeling the anisotropic carrier conduction present in 2D materials.

Additionally, silicon was used as the channel material instead of modeling the MoS2 or WSe2. This was done because the goal of the simulations was only to find the physical origins of the qualitative thickness trends. These origins are based solely on the electrostatics of the device and as will be shown, are independent of the neglected physics or the particular semiconductor material and doping strategy.

To show the universality of the results, a set of simulations were done which were identical to the uniform doping simulations presented in Section 4.8 except with the most basic physics parameters possible. These simulations have a silicon channel with n-type ohmic contacts and the interface doping charge defined at the top of the channel as before. However, they only use thermionic emission and Fermi statistics. All other physics packages are disabled. It should be noted that the charge at the top surface was changed to be positive, which will produce a negative VT shift that corresponds to n-type doping. This was done because the thickness trends depend on the formation of a hole conducting channel at the top of the semiconductor. This channel is induced by the surface charge pulling the bands up, which thins the Schottky barrier enabling tunneling of holes from the contact into the channel. However, since these simulations have tunneling disabled, no carriers can be injected through the barrier into the top channel region.

Changing the polarity of the doping to n-type pulls the bands down, which leads to preferential electron conduction at the top of the channel. Aside from the carrier polarity, the only difference from the p-doping is that the carriers are injected into this channel thermionically, rather than through a tunneling process.

Figure A-1 mirrors Figure 4-7 in Section 4.8 with the simplified physics. Figure A-1a-c shows the transfer characteristics of simulated devices with semiconductor thicknesses of 3 nm, 15 nm, and 30 nm.

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As was the case in the experimental devices, and the simulations in the main text, the thinner devices show a larger VT shift in response to the doping, and the thicker devices show an increase in IOFF-min that increases with thickness. Thus, both of the main doping thickness trends in the transfer characteristics are captured by this model. Figure A-1d-g shows cross section views of the absolute total current density for tSC values

-2 13 -2 of 3 nm and 15 nm with doping charge (Qdope) values of 0 cm and 10 cm at back-gate voltage (VBG) values of 10 V, 0 V, and -10 V. Similar to Figure 4-7, Figure A-1g shows that a top conducting channel is present that is independent of gate voltage for highly doped thick flakes. This channel is caused by the surface charge pulling down the bands and forming a channel that preferentially conducts electrons. The channel conducts electrons instead of holes because the charge polarity is reversed compared to the simulations in the main text. The other primary difference from the previous simulations is that the peak current densities and carrier concentrations are located at the boundaries of the silicon instead of some distance inward. This is unphysical and is caused by the lack of carrier quantization performed by the modified local density approximation (MLDA) model in the primary simulations. The lack of carrier quantization also produces the two separate channels seen in the doped 3 nm device at 10 V and -10 V in

Figure A-1f. Because the peak carrier densities are at the semiconductor edges, two separate channels are formed for thin devices instead of the single channel in Figure 4-7f. These simulations show that not only are the thickness trends captured by a simulation with the simplest possible physics, the underlying mechanisms creating those dependencies are also modeled. Therefore, the simple model used in the main text is adequate to capture the desired qualitative relationships and underlying physical explanations behind these surface charge doping phenomena.

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Figure A-1: Uniform Fermi-Only Doping TCAD Simulation Results. These simulations only account for Fermi statistics and thermionic emission on devices with ohmic contacts. The doping is n-type and all other quantization and tunneling is neglected. Transfer characteristics of FETs with semiconductor thicknesses of a) 3 nm, b) 15 nm, and c) 30 nm as a function of doping charge. The surface interface charge is negative. Cross sections plotting the absolute value of the total current density for FETs of different thicknesses and doping charge densities at back-gate voltages -2 of 10 V, 0 V, and -10 V. The plots show devices with values of d) tSC =3 nm and Qdope = 0 cm , e) tSC =15 nm and -2 13 -2 13 -2 Qdope = 0 cm , f) tSC =3 nm and Qdope = -10 cm , and g) tSC =15 nm and Qdope = -10 cm . The black lines in the top left and right of the cross sections are the source and drain line contacts, respectively.

133

VITA

Andrew J. Arnold

Andrew Arnold was born and raised in Minnesota and attended the University of Minnesota Twin

Cities campus for his undergraduate and master’s studies. He graduated summa cum laude with bachelor’s degrees in electrical engineering and mathematics in 2013 and later received a master’s degree in electrical engineering in 2014. Following his M.S.E.E., he moved to Penn State University in University Park,

Pennsylvania. He joined the group of Saptarshi Das in January 2016. Andrew’s doctoral research focused on the applications of novel 2D materials as well as the use of doping to improve the performance of their contacts. During his time at Penn State he co-authored 8 peer-reviewed publications and upon graduation he will work for Intel in Hillsboro, OR as a Front-End Integration Engineer.