Development of Semiconductor Nanowire Materials for Electronic and Photonics Applications

Total Page:16

File Type:pdf, Size:1020Kb

Development of Semiconductor Nanowire Materials for Electronic and Photonics Applications MARCELO RIZZO PITON Development of Semiconductor Nanowire Materials for Electronic and Photonics Applications Tampere University Dissertations 189 Tampere University Dissertations 189 MARCELO RIZZO PITON Development of Semiconductor Nanowire Materials for Electronic and Photonics Applications ACADEMIC DISSERTATION To be presented, with the permission of the Faculty of Engineering and Natural Sciences of Tampere University, Finland and the Center of Exact Sciences and Technology of Federal University of São Carlos, Brazil for public discussion in the Swieca Room of the Physics Department Building, at Federal University of São Carlos, Rodovia Washington Luís, s/n, São Carlos-SP, Brazil on 5th of December 2019, at 10 o’clock. ACADEMIC DISSERTATION Tampere University, Faculty of Engineering and Natural Sciences, Finland Federal University of São Carlos, Center of Exact Sciences and Technology, Brazil Responsible Associate Professor Professor supervisors Yara Galvão Gobato Mircea Guina Federal University of São Carlos Tampere University Brazil Finland Supervisors Senior Research Fellow D.Sc. (Tech) Teemu Hakkarainen Soile Talmila Tampere University Modulight Finland Finland Professor Helder V. A. Galeti Federal University of São Carlos Brazil Pre-examiners Senior Technologist Professor Giorgio Biasiol Erkki Lähderanta Italian National Research Council LUT University Italy Finland Examination Professor Associate Professor committee Mohamed Henini Iouri Poussep University of Nottingham University of São Paulo United Kingdom Brazil Researcher Adjunct Professor Luís Barêa Fábio Aparecido Ferri Federal University of São Carlos Federal University of São Carlos Brazil Brazil Associate Professor Professor Yara Galvão Gobato Mircea Guina Federal University of São Carlos Tampere University Brazil Finland The originality of this thesis has been checked using the Turnitin OriginalityCheck service. Copyright ©2019 author Cover design: Roihu Inc. ISBN 978-952-03-1382-1 (print) ISBN 978-952-03-1383-8 (pdf) ISSN 2489-9860 (print) ISSN 2490-0028 (pdf) http://urn.fi/URN:ISBN:978-952-03-1383-8 PunaMusta Oy – Yliopistopaino Tampere 2019 To my family: Elza, Osvaldo and Gabriela iii iv ACKNOWLEDGEMENTS Firstly, I express my gratitude to Prof. Dra. Yara G. Gobato for taking me in as doctoral student that was looking for a new adventure in the vast and interesting world of semiconducting materials. All the opportunities, teachings and counseling were without any doubt crucial for reaching this point where I stand. Little I knew at the time that returning to my beloved UFSCar for doctoral studies would open so many doors for me. I am very grateful to Prof. Mircea Guina for accepting me initially as an exchange student at ORC research group in Tampere University and later as a doctoral student on a double-degree agreement between UFSCar and TUNI. To be involved in a high level research center was immeasurably valuable for my education and research skills acquired during my doctoral studies. My huge thanks to Dr. Teemu Hakkarainen to all the friendship, counseling and countless teachings during doctoral studies. Also part of our glorious nanowire team from ORC, I thank Eero Koivusalo for providing excellent nanowire samples, high-precision wafer cleaving and all the diverse tasks that we performed. I also thank Dr. Soile Talmila for all the early teachings and guidance during my learning process of nanowires processing. In general, I am very grateful for the complete work environment that was presented for me at ORC. I had a great and friendly working experience where I could discuss my current research issues with experts from different areas. I also show my thanks to my co-supervisor Prof. Dr. Helder V. A. Galeti for all the patience and instructions during measurements, for taking great care of great part of the TEM imaging and always keeping everything calm. I thank all members from G.O.M.A. in UFSCar for the friendship and help during the endless struggles with properly aligning the optical components of the photoluminesnce setup and creating crazy designs for new laboratory equipment to be made by the physics department staff. I greatly acknowledge and thank all the collaborations partners that were of great importance for the results and publications that were a result of this thesis work. My special thanks for Prof. Dr. Ariano D. G. Rodrigues from the Physics Department at UFSCar for all the discussions and teachings regarding Raman spectroscopy of semiconductor materials in general and also for nanowires. Also my thanks for Dr. Turkka Salminen for the Microscopy Center at TUNI for the training v and support for SEM and Raman microscope. My humble appreciation for the technical and cleanroom staff from TUNI for keeping everything running smoothly: Ilkka, Mervi, Mariia, Pena and Jarno. I acknowledge the research funding agencies from Brazil, CAPES and FAPESP, for the scholarship and exchange program funding during my doctoral studies. I also acknowledge the financial support from the Academy of Finland Project NESP and NanoLight for partially funding my research in Finland. Finally, I acknowledge the financial support from the Finnish Foundation for Technology Promotion (TES). Now for the reader that had the curiosity to read the next page of this acknowledgements section, it comes the time for me to thank all my colleagues and friends that were directly or indirectly involved during my life as doctoral student. My cheers to all my great friends in São Carlos and all the mid-week or weekend barbeques: Alessandro, Pedrão, Quake, Roma, Alex, Ursão, Jacaré and anyone else I might have forgotten. Also my greetings to all my longer date friends from the cities of Jaú and Itapuí. I really miss all of those people on a daily basis and hope that life will bring us closer again one day. In Finland I made very special and long-lasting friendships inside and outside university environment that are worth of a lot of thanks. At ORC I always felt friend of everyone that I somehow interacted or not, but my special thanks for Eero, Riku, Kostiantyn and Jarno for all the beers, memes, laughs and teachings of Finnish culture (although I definitely regret learning the existence of some sauna games but also happy of never taking part of them). My cheers to all my friends outside university that kept a broad range of topics and all the fun that we had either on amazing travels or simple board/electronic games nights: Deepak, Jobin, Biju, Philipp, Josh, Draupathy, Silvia and everyone else. Also for having the chance of being part of the greatest fully-foreign Pesapällo team: Perus-Ulkomaalaiset. At last but not least, I acknowledge Kultainen Apina, the best pub in Tampere, for being the stage of countless after-work Fridays beers (other mid-week days might have happened, it is classified) with funny and productive discussions covering all range of topics. Kippis! Cheers! Saúde! vi ABSTRACT The thesis is concerned with study of GaAs nanowires fabricated on Si substrate. The possibility of growing III-V semiconductor materials directly on silicon in the form of nanowires is an attractive route to the integration of microelectronic, photonic and optoelectronic technologies. To this end, development of functional heterostructure require effective and controllable doping but the dopant incorporation mechanisms involved in nanowire growth can be quite different from the well-established semiconductors thin film technology. The interplay of the different dopant incorporation mechanisms and the competition between axial and radial growth can result in dopant concentration gradients in the nanowires. As a key technology development enabling the study of transport properties in nanowires, a method for fabricating electrical contacts on single NWs using electron- beam lithography is reported. On the other hand, the reduced dimensions and the quasi one-dimensional nanowire geometry are challenging factors for the fabrication of electrical contacts in the correct geometry for Hall effect measurement, which is traditionally used in planar film to determine the dopant concentration and carriers mobility. Therefore, alternative techniques were employed to gain an understanding of the dopant incorporation mechanisms. To this end, Raman spectroscopy and current-voltage analysis on single-nanowire were used to estimate the spatial distribution of the Be and Te dopants along the axial direction of GaAs nanowires. The study reveals that the dopant incorporation mechanisms are strongly affected by the growth conditions for both p-type and n-type GaAs nanowires, resulting in gradients of dopant concentration along the nanowires. Besides the carrier transport properties, the waveguide properties of semiconductor nanowires were explored in the area of chiral sensing and emission of circularly polarized light. By fabricating asymmetric gold layers deposited on the nanowires sidewalls and under the adequate experimental conditions an extrinsic optical chirality configuration is achieved. The results show a strong chiral behavior in both absorption and emission of the partially Au-coated nanowires, and paves the way for applications such as chiral sensing and emitting devices. vii viii RESUMO Neste trabalho, realizamos um estudo sistemático das propriedades óticas, elétricas e estruturais de nanofios de GaAs dopados crescidos por epitaxia por feixes moleculares em substratos de Si. A possibilidade de crescer materiais semiconductores III-V na forma de nanofiosdiretamente sobre silício é uma
Recommended publications
  • Copyrighted Material - Taylor & Francis
    6 Low-Power Commercial, Automotive, and Appliance Connections AnthonyCopyrighted Lee and George Drew Material - Taylor & Francis They weighed me, dust by dust— They balanced film by film Emily Dickinson COntents 6.1 Introduction ........................................................................................................................ 376 6.2 Connectors ..........................................................................................................................377 6.2.1 Functional Requirements .....................................................................................377 6.2.2 Types of Connectors .............................................................................................. 378 6.2.3 Mechanical Considerations .................................................................................. 381 6.3 Contact Terminals ..............................................................................................................384 6.3.1 Contact Physics ......................................................................................................384 6.3.2 Terminal Types ......................................................................................................384 6.3.3 Other Electrical Contact Parameters ................................................................... 392 6.4 Degradation of Connector Contact ................................................................................. 393 6.4.1 Surface Films .........................................................................................................
    [Show full text]
  • The Pennsylvania State University the Graduate School THE
    The Pennsylvania State University The Graduate School THE EFFECTS OF INTERFACE AND SURFACE CHARGE ON TWO DIMENSIONAL TRANSITORS FOR NEUROMORPHIC, RADIATION, AND DOPING APPLICATIONS A Dissertation in Electrical Engineering by Andrew J. Arnold © 2020 Andrew J. Arnold Submitted in Partial Fulfillment of the Requirements for the Degree of Doctor of Philosophy August 2020 The dissertation of Andrew J. Arnold was reviewed and approved by the following: Thomas Jackson Professor of Electrical Engineering Co-Chair of Committee Saptarshi Das Assistant Professor of Engineering Science and Mechanics Dissertation Advisor Co-Chair of Committee Swaroop Ghosh Assistant Professor of Electrical Engineering Rongming Chu Associate Professor of Electrical Engineering Sukwon Choi Assistant Professor of Mechanical Engineering Kultegin Aydin Professor of Electrical Engineering Head of the Department of Electrical Engineering ii Abstract The scaling of silicon field effect transistors (FETs) has progressed exponentially following Moore’s law, and is nearing fundamental limitations related to the materials and physics of the devices. Alternative materials are required to overcome these limitations leading to increasing interest in two dimensional (2D) materials, and transition metal dichalcogenides (TMDs) in particular, due to their atomically thin nature which provides an advantage in scalability. Numerous investigations within the literature have explored various applications of these materials and assessed their viability as a replacement for silicon FETs. This dissertation focuses on several applications of 2D FETs as well as an exploration into one of the most promising methods to improve their performance. Neuromorphic computing is an alternative method to standard computing architectures that operates similarly to a biological nervous system. These systems are composed of neurons and operate based on pulses called action potentials.
    [Show full text]
  • High-Throughput Measurement of the Contact Resistance of Metal Electrode Materials and Uncertainty Estimation
    electronics Article High-Throughput Measurement of the Contact Resistance of Metal Electrode mAterials and Uncertainty Estimation Chao Zhang and Wanbin Ren * School of Electrical Engineering and Automation, Harbin Institute of Technology, Harbin 150001, China; [email protected] * Correspondence: [email protected] Received: 30 October 2020; Accepted: 4 December 2020; Published: 6 December 2020 Abstract: Low and stable contact resistance of metal electrode mAterials is mAinly demanded for reliable and long lifetime electrical engineering. A novel test rig is developed in order to realize the high-throughput measurement of the contact resistance with the adjustable mechanical load force and load current. The contact potential drop is extracted accurately based on the proposed periodical current chopping (PCC) method in addition to the sliding window average filtering algorithm. The instrument is calibrated by standard resistors of 1 mW, 10 mW, and 100 mW with the accuracy of 0.01% and the associated measurement uncertainty is evaluated systematically. Furthermore, the contact resistance between standard indenter and rivet specimen is measured by the commercial DMM-based instruments and our designed test rig for comparison. The variations in relative expanded uncertainty of the measured contact resistance as a function of various mechanical load force and load current are presented. Keywords: electrode mAterial; high-throughput characterization; contact resistance; measurement; uncertainty estimation 1. Introduction Metal electrode mAterials are widely used in the electrical and electronic engineering for conducting and/or switching current, such as connectors [1], electromechanical devices [2], thin-film devices [3], microelectromechanical system [4], and switchgear [5], etc. The roughness of the mAterial surfaces causes only small peaks or asperities within the apparent surface to be in contact.
    [Show full text]
  • Finder Relays, General Technical Information
    General technical information Reference standards and values Guidelines for automatic flow solder Unless expressly indicated otherwise, the products shown in this catalogue are designed and manufactured according to the requirements of the processes following European and International Standards: In general, an automatic flow solder process consists of the following - EN 61810-1, EN 61810-2, EN 61810-7 for electromechanical stages: elementary relays - EN 50205 for relays with forcibly guided contacts Relay mounting: Ensure that the relay terminals are straight and enter the - EN 61812-1 for timers PC board perpendicular to the PC board. For each relay, the catalogue - EN 60669-1 and EN 60669-2-2 for electromechanical step relays illustrates the necessary PC board hole pattern (copper side view). Because - EN 60669-1 and EN 60669-2-1 for light-dependent relays, of the weight of the relay, a plated through hole printed circuit board is electronic step relays, light dimmers, staircase switches, recommended to ensure a secure fixation. movement detectors and monitoring relays. Other important standards, often used as reference for specific Flux application: This is a particularly delicate process. If the relay is not applications, are: sealed, flux may penetrate the relay due to capillary forces, changing its - EN 60335-1 and EN 60730-1 for domestic appliances performance and functionality. - EN 50178 for industrial electronic equipments Whether using foam or spray fluxing methods, ensure that flux is applied sparingly and evenly and does not flood through to the component side According to EN 61810-1, all technical data is specified under standard of the PC board.
    [Show full text]
  • Electrical Properties of Silicon Nanowires Schottky Barriers Prepared by MACE at Different Etching Time
    Electrical Properties of Silicon Nanowires Schottky Barriers Prepared by MACE at Different Etching Time Ahlem Rouis ( [email protected] ) Universite de Monastir Faculte des Sciences de Monastir https://orcid.org/0000-0002-9480-061X Neila Hizem Universite de Monastir Faculte des Sciences de Monastir Mohamed Hassen Institut Supérieur des Sciences Appliquées et de Technologie de Sousse: Institut Superieur des Sciences Appliquees et de Technologie de Sousse Adel kalboussi Universite de Monastir Faculte des Sciences de Monastir Original Research Keywords: Electrical Properties of Silicon, Etching Time, symmetrical current-voltage, capacitance-voltage Posted Date: February 11th, 2021 DOI: https://doi.org/10.21203/rs.3.rs-185736/v1 License: This work is licensed under a Creative Commons Attribution 4.0 International License. Read Full License Electrical properties of silicon nanowires Schottky barriers prepared by MACE at different etching time Ahlem Rouis 1, *, Neila Hizem1, Mohamed Hassen2, and Adel kalboussi1. 1Laboratory of Microelectronics and Instrumentation (LR13ES12), Faculty of Science of Monastir, Avenue of Environment, University of Monastir, 5019 Monastir, Tunisia. 2Higher Institute of Applied Sciences and Technology of Sousse, Taffala City (Ibn Khaldoun), 4003 Sousse, Tunisia. * Address correspondence to E-mail: [email protected] ABSTRACT This article focused on the electrical characterization of silicon nanowires Schottky barriers following structural analysis of nanowires grown on p-type silicon by Metal (Ag) Assisted Chemical Etching (MACE) method distinguished by their different etching time (5min, 10min, 25min). The SiNWs are well aligned and distributed almost uniformly over the surface of a silicon wafer. In order to enable electrical measurement on the silicon nanowires device, Schottky barriers were performed by depositing Al on the vertically aligned SiNWs arrays.
    [Show full text]
  • (12) Patent Application Publication (10) Pub. No.: US 2017/0178825 A1 GLOSSER Et Al
    US 20170178825A1 (19) United States (12) Patent Application Publication (10) Pub. No.: US 2017/0178825 A1 GLOSSER et al. (43) Pub. Date: Jun. 22, 2017 (54) UNIVERSAL CONTACT INPUT Publication Classification SUPPORTNG PROGRAMMABLE WETTING (51) Int. Cl. CURRENT HIH IMO (2006.01) GOIR 31/327 (2006.01) (71) Applicant: GE Intelligent Platforms, Inc., H02. I3/00 (2006.01) Charlottesville, VA (US) HIH I/60 (2006.01) (52) U.S. Cl. (72) Inventors: Richard Joseph GLOSSER, Salem, CPC .......... H0IH I/0015 (2013.01); H0IH I/605 VA (US); Venkatesh J. Hyderabad (IN) (2013.01); G0IR 31/327 (2013.01); H02J 13/00 (2013.01) (21) Appl. No.: 15/327,189 (57) ABSTRACT A system and method according to various embodiments can (22) PCT Fed: Jul. 22, 2014 include a universal contact input status detection circuit. A Voltage source wets a contact with a wetting Voltage. A (86) PCT No.: PCT/US2O14/0476OO current mirror circuit is connected across an input of the contact to provide a constant wetting current over a wide S 371 (c)(1), input Voltage range. The input voltage can be varied over a (2) Date: Jan. 18, 2017 range wide enough to include both AC voltages and DC Voltages. The current mirror circuit maintains the constant wetting current during varying wetting Voltage inputs across Related U.S. Application Data the input of the contact. A wetting Voltage sensor senses the (63) Continuation-in-part of application No. PCT/ wetting voltage provided to the contact so that the status of US2014/047223, filed on Jul. 18, 2014. the contact can be determined.
    [Show full text]
  • Applying Precision Switches
    MICRO SWITCH General Technical Bulletin No. 14 APPLYING PRECISION SWITCHES General Technical Bulletin #14 - Applying Precision Switches TABLE OF CONTENTS INTRODUCTION......................................................................................................................................................................1 BRIEF HISTORY OF THE PRECISION SWITCH ..............................................................................................................1 I. THE MECHANICAL CHARACTERISTICS OF A PRECISION SWITCH...................................................................5 A. MECHANICAL ACTION AND TERMINOLOGY..........................................................................................................................5 B. THE RELATION BETWEEN PLUNGER FORCE AND PLUNGER POSITION....................................................................................6 C. THE RELATION BETWEEN CONTACT FORCE AND PLUNGER POSITION....................................................................................8 D. CONTACT BOUNCE AND TRANSIT TIME................................................................................................................................9 E. POLES, THROWS AND BREAKS............................................................................................................................................10 II. THE ELECTRICAL CHARACTERISTICS OF A PRECISION SWITCH................................................................11 A. THE RESISTANCE OF AN OPEN SWITCH...............................................................................................................................11
    [Show full text]
  • Electrical Contact Bounce and the Control Dynamics of Snap-Action Switch£S
    ELECTRICAL CONTACT BOUNCE AND THE CONTROL DYNAMICS OF SNAP-ACTION SWITCH£S By JOHN WILLIAM McBRIDE ~B.Sc). A thesis submitted to the C.N.A.A for the degree of Doctor of Philosophy, and in partial f~lfilment of the requirements for that degree. Sponsoring Establishment: Plymouth Polytechnic, Plymouth, Devon. Collaborating Establishment: Arrow-Hart lEurope) Ltd, Plymouth, Devon. May 1986. ( \ , I i ·J I 0 .; -: . I DECLARATION I declare that this thesis is the result of my investigations only, and is no[ submitted in candidature for the award of any other degree. During the research programme I was nut registered for the award of any oth~r C.N.A.A or University Degree. ADVANCED STUDIES During the researc~ programme I undertooK a ~ourse of advanced studies. These included the use of the scanning electron microscope, and surface analysis techniques. I also attended several one day seminars, and presented a paper at the 31st Holm conference on e~ectrical contacts. ELECTRICAL CONTACT BOUNCE AND THE CONTROL DYNAMICS OF SNAP-ACTION SWITCHES By, J.W. McBride ABSTRACT Experimental and theoretical studies are made of a typical snap-action rocker switch, to establish the wear mechanisms in the pivoting contact. The rocker switch, used extensive~ in consumer goods, operates in the medium duty current range, (1 - 30 Amps). Highspeed photographic studies have shown that the main cause of wear is arcing, occurri~ during separation and bounce at the pivot contacts. To reduce the bounce a computer-based mathematical model of the system dynamics is developed and opcimised; this results in recommended design changes.
    [Show full text]
  • A Vertical Silicon-Graphene-Germanium Transistor
    ARTICLE https://doi.org/10.1038/s41467-019-12814-1 OPEN A vertical silicon-graphene-germanium transistor Chi Liu1,3, Wei Ma 1,2,3, Maolin Chen1,2, Wencai Ren 1,2 & Dongming Sun 1,2* Graphene-base transistors have been proposed for high-frequency applications because of the negligible base transit time induced by the atomic thickness of graphene. However, generally used tunnel emitters suffer from high emitter potential-barrier-height which limits the tran- sistor performance towards terahertz operation. To overcome this issue, a graphene-base heterojunction transistor has been proposed theoretically where the graphene base is 1234567890():,; sandwiched by silicon layers. Here we demonstrate a vertical silicon-graphene-germanium transistor where a Schottky emitter constructed by single-crystal silicon and single-layer graphene is achieved. Such Schottky emitter shows a current of 692 A cm−2 and a capacitance of 41 nF cm−2, and thus the alpha cut-off frequency of the transistor is expected to increase from about 1 MHz by using the previous tunnel emitters to above 1 GHz by using the current Schottky emitter. With further engineering, the semiconductor-graphene- semiconductor transistor is expected to be one of the most promising devices for ultra-high frequency operation. 1 Shenyang National Laboratory for Materials Science, Institute of Metal Research, Chinese Academy of Sciences, 72 Wenhua Road, Shenyang 110016, China. 2 School of Materials Science and Engineering, University of Science and Technology of China, 72 Wenhua Road, Shenyang 110016, China. 3These authors contributed equally: Chi Liu, Wei Ma. *email: [email protected] NATURE COMMUNICATIONS | (2019) 10:4873 | https://doi.org/10.1038/s41467-019-12814-1 | www.nature.com/naturecommunications 1 ARTICLE NATURE COMMUNICATIONS | https://doi.org/10.1038/s41467-019-12814-1 n 1947, the first transistor, named a bipolar junction transistor electron microscope (SEM) image in Fig.
    [Show full text]
  • Schottky Barrier Height Dependence on the Metal Work Function for P-Type Si Schottky Diodes
    Schottky Barrier Height Dependence on the Metal Work Function for p-type Si Schottky Diodes G¨uven C¸ ankayaa and Nazım Uc¸arb a Gaziosmanpas¸a University, Faculty of Sciences and Arts, Physics Department, Tokat, Turkey b S¨uleyman Demirel University, Faculty of Sciences and Arts, Physics Department, Isparta, Turkey Reprint requests to Prof. N. U.; E-mail: [email protected] Z. Naturforsch. 59a, 795 – 798 (2004); received July 5, 2004 We investigated Schottky barrier diodes of 9 metals (Mn, Cd, Al, Bi, Pb, Sn, Sb, Fe, and Ni) hav- ing different metal work functions to p-type Si using current-voltage characteristics. Most Schottky contacts show good characteristics with an ideality factor range from 1.057 to 1.831. Based on our measurements for p-type Si, the barrier heights and metal work functions show a linear relationship of current-voltage characteristics at room temperature with a slope (S = φb/φm) of 0.162, even though the Fermi level is partially pinned. From this linear dependency, the density of interface states was determined to be about 4.5 · 1013 1/eV per cm2, and the average pinning position of the Fermi level as 0.661 eV below the conduction band. Key words: Schottky Diodes; Barrier Height; Series Resistance; Work Function; Miedema Electronegativity. 1. Introduction ear dependence should exist between the φb and the φm. Corresponding to this, SB heights of various el- The investigation of rectifying metal-semiconductor emental metals, including Au, Ti, Pt, Ni, Cr, have contacts (Schottky diodes) is of current interest for been reported [14 – 16].
    [Show full text]
  • Ni Silicide Schottky Barrier Tunnel FET for Low Power Device Applications
    Tokyo Institute of Technology Master’s Thesis – March 2011 Ni Silicide Schottky barrier tunnel FET for Low power device applications (低消費電力動作に向けたニッケルシリサイドバリアトンネルFET) Yan Wu Department of Electronics and Applied Physics Interdisciplinary Graduate School of Science and Engineering MASTER OF SCIENCE IN PHYSICAL ENGINEERING 09M53470 Supervisor: Professor Akira Nishiyama and Hiroshi Iwai Abstract To solve this problem that the supply voltage and the threshold voltage should be scaled but induction of the leakage would increase current at the zero gate voltage. The Subthreshold slope (SS) cannot be scaled down below 60mV/decade at Room temperature in principle and this fact hinders the applied voltage scaling. The tunnel FET is one of the promising candidates to decreases SS. Schottky barrier Tunneling FET (SBTT), which uses schottky tunnel junction, has many advantages to ordinary PN junction Tunnel FETs: low parasitic resistance, better short channel effect immunity and high controllability of output characteristics by the silicide material selection. The tunnel FET with NiSi/Si schottky barrier at the source/channel interface was fabricated and the characteristics were analyzed in terms of the drive current mechanism at low and high voltage. For that purpose, temperature dependence measurements of the transistor characteristics were mainly performed. Contents Abstract I Introduction I.1 Background of This Study I.2 Ultimate CMOS downsizing I.3 subthreshold leakage increasing I.4 tunneling FET I.5 Objective of this study II Metal-Semiconductor
    [Show full text]
  • Low-Resistance Electrical Contact to Carbon Nanotubes with Graphitic
    12 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 59, NO. 1, JANUARY 2012 Low-Resistance Electrical Contact to Carbon Nanotubes With Graphitic Interfacial Layer Yang Chai, Arash Hazeghi, Kuniharu Takei, Hong-Yu Chen, Student Member, IEEE, Philip C. H. Chan, Fellow, IEEE, Ali Javey, and H.-S. Philip Wong, Fellow, IEEE Abstract—Carbon nanotubes (CNTs) are promising candidates s-CNT and metal electrode [4]–[6]. However, experimental for transistors and interconnects for nanoelectronic circuits. Al- results have shown that the contact resistance is still large for though CNTs intrinsically have excellent electrical conductivity, the CNTs with metallic band structure [2], where the SB should the large contact resistance at the interface between CNT and metal hinders its practical application. Here, we show that electri- not exist at the interface between metallic CNT and metal. cal contact to the CNT is substantially improved using a graphitic This indicates that there is additional contact barrier or series interfacial layer catalyzed by a Ni layer. The p-type semiconduct- resistance for metallic CNT/metal. Recent experimental results ing CNT with graphitic contact exhibits high ON-state conduc- on both semiconducting and metallic CNT devices revealed that tance at room temperature and a steep subthreshold swing in a surface chemistry is very important for forming good electrical back-gate configuration. We also show contact improvement to the semiconducting CNTs with different capping metals. To study the contact between CNT and metal [7], [8]. The metal wetting role of the graphitic interfacial layer in the contact stack, the cap- to the tubular structure of the CNT is imperfect, where the ping metal and Ni catalyst were selectively removed and replaced metal atoms are not fully covered on the CNT surface.
    [Show full text]