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Application of Forth CPU for Control and Debugging of FPGA-Implemented Systems

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Application of Forth CPU for Control and Debugging of FPGA-Implemented Systems Introduction Forth introduction Forth in FPGA Practical applications Conclusions Application of Forth CPU for control and debugging of FPGA-implemented systems Wojciech M. Zabołotny1, Grzegorz H. Kasprowicz1, 1Institute of Electronic Systems, Warsaw University of Technology XLIV-th IEEE-SPIE Joint Symposium Wilga 2019 Forth CPU for FPGA However, sometimes more complex initialization procedure may be needed In simple cases it may provided by small state machines In more complicated cases initialization via control bus may be needed Similarly debugging and testing of the system usually requires access via control bus Those tasks may be done from external computer via control interface, e.g., IPbus However, in case if we need an autonomous initialization of our system, the local CPU may be needed Introduction Forth introduction Forth in FPGA Practical applications Conclusions Initialization and debugging of FPGA-based systems The HDL description of FPGA-based system allows to assign initial values to the internal signals Forth CPU for FPGA In simple cases it may provided by small state machines In more complicated cases initialization via control bus may be needed Similarly debugging and testing of the system usually requires access via control bus Those tasks may be done from external computer via control interface, e.g., IPbus However, in case if we need an autonomous initialization of our system, the local CPU may be needed Introduction Forth introduction Forth in FPGA Practical applications Conclusions Initialization and debugging of FPGA-based systems The HDL description of FPGA-based system allows to assign initial values to the internal signals However, sometimes more complex initialization procedure may be needed Forth CPU for FPGA In more complicated cases initialization via control bus may be needed Similarly debugging and testing of the system usually requires access via control bus Those tasks may be done from external computer via control interface, e.g., IPbus However, in case if we need an autonomous initialization of our system, the local CPU may be needed Introduction Forth introduction Forth in FPGA Practical applications Conclusions Initialization and debugging of FPGA-based systems The HDL description of FPGA-based system allows to assign initial values to the internal signals However, sometimes more complex initialization procedure may be needed In simple cases it may provided by small state machines Forth CPU for FPGA Similarly debugging and testing of the system usually requires access via control bus Those tasks may be done from external computer via control interface, e.g., IPbus However, in case if we need an autonomous initialization of our system, the local CPU may be needed Introduction Forth introduction Forth in FPGA Practical applications Conclusions Initialization and debugging of FPGA-based systems The HDL description of FPGA-based system allows to assign initial values to the internal signals However, sometimes more complex initialization procedure may be needed In simple cases it may provided by small state machines In more complicated cases initialization via control bus may be needed Forth CPU for FPGA Those tasks may be done from external computer via control interface, e.g., IPbus However, in case if we need an autonomous initialization of our system, the local CPU may be needed Introduction Forth introduction Forth in FPGA Practical applications Conclusions Initialization and debugging of FPGA-based systems The HDL description of FPGA-based system allows to assign initial values to the internal signals However, sometimes more complex initialization procedure may be needed In simple cases it may provided by small state machines In more complicated cases initialization via control bus may be needed Similarly debugging and testing of the system usually requires access via control bus Forth CPU for FPGA However, in case if we need an autonomous initialization of our system, the local CPU may be needed Introduction Forth introduction Forth in FPGA Practical applications Conclusions Initialization and debugging of FPGA-based systems The HDL description of FPGA-based system allows to assign initial values to the internal signals However, sometimes more complex initialization procedure may be needed In simple cases it may provided by small state machines In more complicated cases initialization via control bus may be needed Similarly debugging and testing of the system usually requires access via control bus Those tasks may be done from external computer via control interface, e.g., IPbus Forth CPU for FPGA Introduction Forth introduction Forth in FPGA Practical applications Conclusions Initialization and debugging of FPGA-based systems The HDL description of FPGA-based system allows to assign initial values to the internal signals However, sometimes more complex initialization procedure may be needed In simple cases it may provided by small state machines In more complicated cases initialization via control bus may be needed Similarly debugging and testing of the system usually requires access via control bus Those tasks may be done from external computer via control interface, e.g., IPbus However, in case if we need an autonomous initialization of our system, the local CPU may be needed Forth CPU for FPGA That must be done at the PCB design stage, and increases complexity of the board Another possibility is to use a soft CPU implemented in FPGA There are many soft CPUs that may be programmed in C - LatticeMico32, microblaze, RiscV and many more... Modification of the program is long (requires editing of source code and recompilation), and the dedicated C toolchain must be available Another possibility is to use Forth-capable CPU Introduction Forth introduction Forth in FPGA Practical applications Conclusions Local CPU The easiest method to solve that problem is to connect an external CPU (e.g., a simple and cheap ARM) External world UART? External CPU How many lines? FPGA-based system Forth CPU for FPGA Another possibility is to use a soft CPU implemented in FPGA There are many soft CPUs that may be programmed in C - LatticeMico32, microblaze, RiscV and many more... Modification of the program is long (requires editing of source code and recompilation), and the dedicated C toolchain must be available Another possibility is to use Forth-capable CPU Introduction Forth introduction Forth in FPGA Practical applications Conclusions Local CPU The easiest method to solve that problem is to connect an external CPU (e.g., a simple and cheap ARM) External world That must be done at the PCB design stage, and UART? increases complexity of the board External CPU How many lines? FPGA-based system Forth CPU for FPGA There are many soft CPUs that may be programmed in C - LatticeMico32, microblaze, RiscV and many more... Modification of the program is long (requires editing of source code and recompilation), and the dedicated C toolchain must be available Another possibility is to use Forth-capable CPU Introduction Forth introduction Forth in FPGA Practical applications Conclusions Local CPU The easiest method to solve that problem is to connect an external CPU (e.g., a simple and cheap ARM) External world That must be done at the PCB design stage, and UART? increases complexity of the board Another possibility is to use a soft CPU implemented in FPGA soft CPU Fully connected to internal logic FPGA-based system Forth CPU for FPGA Modification of the program is long (requires editing of source code and recompilation), and the dedicated C toolchain must be available Another possibility is to use Forth-capable CPU Introduction Forth introduction Forth in FPGA Practical applications Conclusions Local CPU The easiest method to solve that problem is to connect an external CPU (e.g., a simple and cheap ARM) External world That must be done at the PCB design stage, and UART? increases complexity of the board Another possibility is to use a soft CPU implemented in FPGA soft CPU There are many soft CPUs that may be programmed in C Fully connected - LatticeMico32, microblaze, RiscV and many more... to internal logic FPGA-based system Forth CPU for FPGA Another possibility is to use Forth-capable CPU Introduction Forth introduction Forth in FPGA Practical applications Conclusions Local CPU The easiest method to solve that problem is to connect an external CPU (e.g., a simple and cheap ARM) Code editing That must be done at the PCB design stage, and increases complexity of the board Another possibility is to use a soft CPU implemented in Compilation FPGA There are many soft CPUs that may be programmed in C Transfer of - LatticeMico32, microblaze, RiscV and many more... code Modification of the program is long (requires editing of source code and recompilation), and the dedicated C Testing toolchain must be available Forth CPU for FPGA Introduction Forth introduction Forth in FPGA Practical applications Conclusions Local CPU The easiest method to solve that problem is to connect an external CPU (e.g., a simple and cheap ARM) Code editing That must be done at the PCB design stage, and increases complexity of the board Another possibility is to use a soft CPU implemented in Compilation FPGA There are many soft CPUs that may be programmed in C Transfer of - LatticeMico32, microblaze, RiscV and many more... code Modification of the program is long (requires editing of source code and recompilation), and the dedicated C Testing toolchain must be available Another possibility is to use Forth-capable CPU Forth CPU for FPGA Very efficient
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