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Embedded Processor Selection/Performance Estimation Using FPGA-Based Profiling Virginia Commonwealth University VCU Scholars Compass Theses and Dissertations Graduate School 2010 Embedded Processor Selection/Performance Estimation using FPGA-based Profiling Fadi Obeidat Virginia Commonwealth University Follow this and additional works at: https://scholarscompass.vcu.edu/etd Part of the Engineering Commons © The Author Downloaded from https://scholarscompass.vcu.edu/etd/2232 This Dissertation is brought to you for free and open access by the Graduate School at VCU Scholars Compass. It has been accepted for inclusion in Theses and Dissertations by an authorized administrator of VCU Scholars Compass. For more information, please contact [email protected]. School of Engineering Virginia Commonwealth University This is to certify that the dissertation prepared by Fadi Obeidat entitled EMBEDDED PROCESSOR SELECTION/PERFORMANCE ESTIMATION USING FPGA-BASED PROFILING has been approved by his committee as satisfactory completion of the dissertation requirement for the degree of Doctor of Philosophy Robert Klenke, Ph.D., Committee Chair, Department of Electrical and Computer Engineering, School of Engineering Mike McCollum, Ph.D., Dept. Department of Electrical and Computer Engineering, School of Engineering Afroditi V Filippas, Ph.D., Department of Electrical and Computer Engineering, School of Engineering Kayvan Najarian, Ph.D., Department of Computer Science, School of Engineering Vojislav Kecman, Ph.D., Department of Computer Science, School of Engineering Date i EMBEDDED PROCESSOR SELECTION/PERFORMANCE ESTIMATION USING FPGA-BASED PROFILING A dissertation submitted in partial fulfillment of the requirements for the degree of Doctor of Philosophy at Virginia Commonwealth University. by Fadi Obeidat Director: Robert Klenke ASSOCIATE PROFESSOR, DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING Virginia Commonwealth University Richmond, Virginia July, 2010 ii Abstract In embedded systems, modeling the performance of the candidate processor architectures is very important to enable the designer to estimate the capability of each architecture against the target application. Considering the large number of available embedded processors, the need has increased for building an infrastructure by which it is possible to estimate the performance of a given application on a given processor with a minimum of time and resources. This dissertation presents a framework that employs the softcore MicroBlaze processor as a reference architecture where FPGA-based profiling is implemented to extract the functional statistics that characterize the target application. Linear regression analysis is implemented for mapping the functional statistics of the target application to the performance of the candidate processor architecture. Hence, this approach does not require running the target application on each candidate processor; instead, it is run only on the reference processor which allows testing many processor architectures in very short time. iii To my wife, my son, and the family iv Table of Contents CHAPTER 1 INTRODUCTION .................................................................................. 1 1.1. OVERVIEW ........................................................................................................ 2 1.2. MOTIVATION ..................................................................................................... 3 1.3. CHALLENGES ..................................................................................................... 4 1.4. PROBLEM STATEMENT ..................................................................................... 10 1.5. CONTRIBUTION ................................................................................................ 11 1.6. DISSERTATION ORGANIZATION ........................................................................ 14 CHAPTER 2 PERFORMANCE MODELING ......................................................... 15 2.1. PERFORMANCE EVALUATION FOR PROCESSOR DESIGN ..................................... 17 2.2. Performance Evaluation for Embedded Systems Design ................................. 22 2.3. EMBEDDED PROCESSOR SELECTION BASED ON PERFORMANCE ESTIMATION ...... 26 2.3.1. Traditional Techniques ............................................................................... 27 2.3.2. Analytical Techniques ................................................................................ 29 2.4. SUMMARY ....................................................................................................... 34 CHAPTER 3 PROBLEM ANALYSIS ....................................................................... 36 3.1. BACKGROUND ................................................................................................. 36 3.2. THEORETICAL ANALYSIS ................................................................................. 40 3.3. APPLICATION FUNCTIONAL STATISTICS ............................................................ 48 3.4. LINEAR REGRESSION ....................................................................................... 49 3.5. PREDICTION MODELS, RELATED WORK ............................................................ 52 3.6. SUMMARY ....................................................................................................... 54 CHAPTER 4 REFERENCE MODEL AND FPGA-BASED PROFILING .............. 55 4.1. REFERENCE MODEL SPECIFICATIONS................................................................ 55 4.2. PROFILING ....................................................................................................... 57 4.3. FPGA-BASED INSTRUCTION-LEVEL PROFILING ................................................. 60 4.4. SUMMARY ....................................................................................................... 66 CHAPTER 5 EXPERIMENTS AND RESULTS ....................................................... 67 5.1. EXPERIMENT SETUP ......................................................................................... 67 5.1.1. Target Platforms ......................................................................................... 67 5.1.2. Algorithms and Benchmarks ...................................................................... 71 5.1.3. Floating-Point Implementation ................................................................... 73 5.2. RESULTS ......................................................................................................... 73 v 5.2.1. Ordinary Least Squares vs. Robust Fit ....................................................... 73 5.2.2. Absolute Performance Estimation............................................................... 75 5.2.3. Relative Performance Estimation ................................................................ 85 5.2.4. Discussion .................................................................................................. 90 5.3. SUMMARY ....................................................................................................... 91 CHAPTER 6 CONCLUSIONS .................................................................................. 92 CHAPTER 7 FUTURE WORK ................................................................................. 93 7.1. DIFFERENT STATISTICAL ANALYSIS APPROACHES ............................................ 93 7.2. MULTI-CORE PROCESSORS............................................................................... 94 7.3. POWER ESTIMATION ........................................................................................ 94 7.4. HARDWARE/SOFTWARE CODESIGN .................................................................. 95 REFERENCES .......................................................................................................... 96 vi List of Figures Figure 1.1. The number of embedded processors sold between 1998 and 2002 compared to desktop and server processors .................................................................................... 2 Figure 2.1. Performance Modeling Tradeoffs ............................................................... 15 Figure 2.2. Processor Evaluation Cube ........................................................................ 20 Figure 2.3. Statistical Analysis Techniques (neural network or linear regression) ......... 34 Figure 3.1. A Layout for Analytical Performance Modeling ......................................... 43 Figure 3.2. Framework Outline .................................................................................... 50 Figure 4.1. MicroBlaze/FPGA Reference-Model/Profiler Outline ................................ 57 Figure 4.2. Application-Independent Profiling.............................................................. 62 vii List of Tables Table 4.1. Double-precision floating point div function -first 18 instructions ................ 63 Table 4.2. Numerical C programs used to test the application-independent FPGA-based profiling mechanism ..................................................................................................... 65 Table 5.1. Programs and Benchmarks used for Experimental Validation ...................... 72 Table 5.2. Error analysis summary using software implementation of floating point operations (SW FP) ....................................................................................................... 74 Table 5.3. Error analysis summary using hardware implementation of floating point operations (HW FP) .....................................................................................................
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