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Reference Manual MC9S08SF4 Reference Manual HCS08 Microcontrollers MC9S08SF4 Rev. 3 9/2011 freescale.com MC9S08SF4 Features • 8-Bit S08 Central Processor Unit (CPU) – PWT — Two 16-bit pulse width timers (PWT); – Up to 40 MHz CPU at 2.7 V to 5.5 V across temperature selectable driving clock, positive/negative/period range of –40 C to 125 C capture – HC08 instruction set with added BGND instruction – PRACMP — Two programmable reference analog – Support for up to 32 interrupt/reset sources comparators with eight optional inputs for both positive •On-Chip Memory and negative inputs; 32-level internal reference voltages – 4 KB flash read/program/erase over full operating scaled by selectable reference inputs voltage and temperature – IIC — Inter-integrated circuit bus module capable of – 128-byte random-access memory (RAM) operation up to 100 kbps with maximum bus loading; – Security circuitry to prevent unauthorized access to multi-master operation; programmable slave address; RAM and flash contents interrupt-driven byte-by-byte data transfer; broadcast • Power-Saving Modes mode; 10-bit addressing – Two low power stop modes; reduced power wait mode – KBI — 4-pin keyboard interrupt module with software – Allows clocks to remain enabled to specific peripherals selectable polarity on edge or edge/level modes in stop3 mode – FDS — Shut down output pin upon fault detection; the • Clock Source Options fault sources can be optional enabled separately; the – Internal Clock Source (ICS) — Internal clock source output pin can be configured as output 1,0 and high module containing a frequency-locked-loop (FLL) impedance when a fault occurs based on module controlled by internal or external reference; precision configuration trimming of internal reference allows 0.2% resolution • Input/Output and 1% deviation over 0–70 C and voltage, 2% – 18 GPIOs including one input-only pin and one deviation over –40–85 C and voltage, or 3% deviation output-only pin over –40–125 C and voltage; supporting bus – Hysteresis and configurable pullup device on all input frequencies up to 20 MHz pins; schmitt trigger on PWT input pins; configurable • System Protection slew rate and drive strength on all output pins. – Watchdog computer operating properly (COP) reset • Package Options with option to run from dedicated 1 kHz internal clock – 16-pin TSSOP source or bus clock – 20-pin TSSOP – Low-voltage detection with reset or interrupt; selectable trip points – Illegal opcode detection with reset – Illegal address detection with reset – Flash block protection • Development Support – Single-wire background debug interface – Breakpoint capability to allow single breakpoint setting during in-circuit debugging (plus two more breakpoints) – On-chip in-circuit emulator (ICE) debug module containing two comparators and nine trigger modes • Peripherals – IPC — Prioritize interrupt sources besides inherent CPU interrupt table; support up to 32 interrupt sources and up to 4-level preemptive interrupt nesting – ADC — 8-channel, 10-bit resolution; 2.5 s conversion time; automatic compare function; temperature sensor; internal bandgap reference channel; operation in stop; fully functional from 2.7 V to 5.5 V – TPM — One 40 MHz 6-channel and one 40 MHz 1-channel timer/pulse-width modulators (TPM) modules; selectable input capture, output compare, or buffered edge- or center-aligned PWM on each channel – MTIM16 — Two 16-bit modulo timers MC9S08SF4 Reference Manual MC9S08SF4 Rev. 3 9/2011 Freescale‚ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. Freescale Semiconductor, Inc., 2009-2011. All rights reserved. Revision History To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to: http://freescale.com The following revision history table summarizes changes contained in this document. Revision Revision Number Date Description of Changes 2 4/24/2009 Initial public release. Added a note and descriptions on V and V in the Section 11.1, 3 9/21/2011 DD50 DD25 “Introduction”. MC9S08SF4 Series MCU Reference Manual, Rev. 3 6 Freescale Semiconductor List of Chapters Chapter Number Title Page Chapter 1 Device Overview . .19 Chapter 2 Pins and Connections . .23 Chapter 3 Modes of Operation . .29 Chapter 4 Memory . .35 Chapter 5 Resets, Interrupts, and System Configuration . .59 Chapter 6 Parallel Input/Output . .75 Chapter 7 Keyboard Interrupt (S08KBIV2) . .87 Chapter 8 Central Processor Unit (S08CPUV2) . .95 Chapter 9 Internal Clock Source (S08ICSV3) . .115 Chapter 10 16-Bit Modulo Timer (S08MTIM16V1) . .129 Chapter 11 Programmable Reference Analog Comparator (S08PRACMPV1) . .141 Chapter 12 10-Bit Analog-to-Digital Converter (S08ADC10V1) . .153 Chapter 13 16-Bit Timer/PWM (S08TPMV3). .181 Chapter 14 Fault Detection and Shutdown(S08FDSV1). .205 Chapter 15 Pulse Width Timer(S08PWTV1) . .219 Chapter 16 Inter-Integrated Circuit (S08IICV2) . .235 Chapter 17 Interrupt Priority Controller (S08IPCV1) . .253 Chapter 18 Development Support . .265 MC9S08SF4 Series MCU Reference Manual, Rev. 3 Freescale Semiconductor 7 Contents Section Number Title Page Chapter 1 Device Overview 1.1 Introduction .....................................................................................................................................19 1.2 MCU Block Diagram ......................................................................................................................20 1.3 System Clock Distribution ..............................................................................................................21 Chapter 2 Pins and Connections 2.1 Introduction .....................................................................................................................................23 2.2 Device Pin Assignment ...................................................................................................................23 2.3 Recommended System Connections ...............................................................................................24 2.3.1 Power (VDD, VSS) .............................................................................................................24 2.3.2 RESET Pin ........................................................................................................................25 2.3.3 Background/Mode Select (BKGD/MS) ............................................................................25 2.3.4 External Interrupt Pin (IRQ) .............................................................................................26 2.3.5 General-Purpose I/O and Peripheral Ports ........................................................................26 Chapter 3 Modes of Operation 3.1 Introduction .....................................................................................................................................29 3.2 Features ...........................................................................................................................................29 3.3 Run Mode ........................................................................................................................................29 3.4 Active Background Mode ...............................................................................................................29 3.5 Wait Mode .......................................................................................................................................30 3.6 Stop Modes ......................................................................................................................................31 3.6.1 Stop3 Mode .......................................................................................................................31 3.6.2 Stop2 Mode .......................................................................................................................32 3.6.3 On-Chip Peripheral Modules in Stop Modes ....................................................................33 Chapter 4 Memory 4.1 MC9S08SF4 Series Memory Map ..................................................................................................35 4.1.1 Reset and Interrupt Vector Assignments ...........................................................................37 4.2 Register Addresses and Bit Assignments ........................................................................................38 4.3 RAM (System RAM) ......................................................................................................................44 4.4 Flash ................................................................................................................................................44 4.4.1 Features .............................................................................................................................45 4.4.2 Program and Erase Times .................................................................................................45 4.4.3 Program and Erase Command Execution .........................................................................46 MC9S08SF4 Series MCU Reference Manual, Rev. 3 Freescale Semiconductor 9 4.4.4 Burst Program Execution ..................................................................................................47 4.4.5 Access Errors ....................................................................................................................49 4.4.6 Flash
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