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Execution Unit ISA (Ivy Bridge) Intel® OpenSource HD Graphics Programmer’s Reference Manual (PRM) Volume 4 Part 3: Execution Unit ISA (Ivy Bridge) For the 2012 Intel® Core™ Processor Family May 2012 Revision 1.0 NOTICE: This document contains information on products in the design phase of development, and Intel reserves the right to add or remove product features at any time, with or without changes to this open source documentation. Doc Ref #: IHD-OS-V4 Pt 3 – 05 12 Creative Commons License You are free to Share — to copy, distribute, display, and perform the work Under the following conditions: Attribution. You must attribute the work in the manner specified by the author or licensor (but not in any way that suggests that they endorse you or your use of the work). No Derivative Works. You may not alter, transform, or build upon this work. INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. A "Mission Critical Application" is any application in which failure of the Intel Product could result, directly or indirectly, in personal injury or death. SHOULD YOU PURCHASE OR USE INTEL'S PRODUCTS FOR ANY SUCH MISSION CRITICAL APPLICATION, YOU SHALL INDEMNIFY AND HOLD INTEL AND ITS SUBSIDIARIES, SUBCONTRACTORS AND AFFILIATES, AND THE DIRECTORS, OFFICERS, AND EMPLOYEES OF EACH, HARMLESS AGAINST ALL CLAIMS COSTS, DAMAGES, AND EXPENSES AND REASONABLE ATTORNEYS' FEES ARISING OUT OF, DIRECTLY OR INDIRECTLY, ANY CLAIM OF PRODUCT LIABILITY, PERSONAL INJURY, OR DEATH ARISING IN ANY WAY OUT OF SUCH MISSION CRITICAL APPLICATION, WHETHER OR NOT INTEL OR ITS SUBCONTRACTOR WAS NEGLIGENT IN THE DESIGN, MANUFACTURE, OR WARNING OF THE INTEL PRODUCT OR ANY OF ITS PARTS. Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined". Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. The information here is subject to change without notice. Do not finalize a design with this information. The products described in this document may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request. Implementations of the I2C bus/protocol may require licenses from various entities, including Philips Electronics N.V. and North American Philips Corporation. Intel and the Intel logo are trademarks of Intel Corporation in the U.S. and other countries. *Other names and brands may be claimed as the property of others. Copyright © 2012, Intel Corporation. All rights reserved. 2 5/29/2012 Doc Ref #: IHD-OS-V4 Pt 3 – 05 12 Contents 1. Introduction............................................................................................................................................ 7 1.1 Introducing the Execution Unit ............................................................................................................. 7 1.2 EU Terms and Acronyms ..................................................................................................................... 9 1.3 EU Changes by Processor Generation .............................................................................................. 13 1.4 EU Notation ........................................................................................................................................ 13 2. EU Data Types ..................................................................................................................................... 15 2.1 Fundamental Data Types ................................................................................................................... 15 2.2 Numeric Data Types .......................................................................................................................... 15 2.2.1 Integer Numeric Data Types ......................................................................................................... 16 2.2.2 Floating-Point Numeric Data Types.............................................................................................. 17 2.2.3 Packed Signed Half-Byte Integer Vector ...................................................................................... 18 2.2.4 Packed UnSigned Half-Byte Integer Vector ................................................................................. 18 2.2.5 Packed Restricted Float Vector .................................................................................................... 19 2.3 Floating Point Modes ......................................................................................................................... 21 2.3.1 IEEE Floating Point Mode ............................................................................................................ 21 2.3.2 Alternative Floating Point Mode.................................................................................................... 25 2.4 Type Conversion ................................................................................................................................ 26 2.4.1 Float to Integer ............................................................................................................................. 26 2.4.2 Integer to Integer with Same or Higher Precision......................................................................... 27 2.4.3 Integer to Integer with Lower Precision ........................................................................................ 27 2.4.4 Integer to Float ............................................................................................................................. 27 2.4.5 Double Precision Float to Single Precision Float ......................................................................... 27 2.4.6 Single Precision Float to Double Precision Float ......................................................................... 28 3. Execution Environment ...................................................................................................................... 29 3.1 EU Overview ...................................................................................................................................... 29 3.2 Primary Usage Models ....................................................................................................................... 30 3.2.1 AOS and SOA Data Structures .................................................................................................... 30 3.2.2 SIMD4 Mode of Operation ............................................................................................................ 32 3.2.3 SIMD4x2 Mode of Operation ........................................................................................................ 33 3.2.4 SIMD16 Mode of Operation .......................................................................................................... 34 3.2.5 SIMD8 Mode of Operation ............................................................................................................ 36 3.3 Registers and Register Regions ........................................................................................................ 36 3.3.1 Register Files ................................................................................................................................ 36 3.3.2 GRF Registers .............................................................................................................................. 36 3.3.3 ARF Registers .............................................................................................................................. 37 3.3.4 Immediate ..................................................................................................................................... 57 3.3.5 Region Parameters ....................................................................................................................... 57 3.3.6 Region Addressing Modes ........................................................................................................... 62 3.3.7 Access Modes .............................................................................................................................. 67 3.3.8 Execution Data Type .................................................................................................................... 68 3.3.9 Register Region Restrictions ........................................................................................................ 68 3.3.10 Destination Operand Description................................................................................................ 72 3.4 SIMD Execution Control ..................................................................................................................... 73 3.4.1 Predication ...................................................................................................................................
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