DOCSLIB.ORG

The Quintessential PIC Microcontroller (S. Katzen, 2000).Pdf

Total Page：16

File Type：pdf, Size：1020Kb

Download full-text PDF Read full-text
The Quintessential PIC Microcontroller (S. Katzen, 2000).Pdf Sid Katzen The Quintessential PIC Microcontroller SPIN Springer’s internal project number, if known Engineering – Monograph (English) November 8, 2000 Springer-Verlag Berlin Heidelberg NewYork London Paris Tokyo Hong Kong Barcelona Budapest Contents List of Figures . ................................................ VI List of Tables . ................................................. XI List of Programs . .............................................. XIV Part I The Fundamentals 1. Digital Representation . .................................... 3 2. Logic Circuitry . ............................................ 17 3. Stored Program Processing . ................................ 41 Part II The Software 4. The PIC16F84 Microcontroller . .............................. 77 5. The Instruction Set . ........................................ 105 6. Subroutines and Modules . .................................. 137 7. Interrupt Handling . ........................................ 171 8. Assembly language ......................................... 197 9. High-Level Language . ...................................... 231 Part III The Outside World 10. The Real World . ........................................... 253 11. One Byte at a Time . ........................................ 271 VI Contents 12. One Bit at a Time . ......................................... 305 13. Time is of the Essence . ..................................... 361 14. Take the Rough with the Smooth . ........................... 391 15. To Have and to Hold . ...................................... 431 16. A Case Study . ............................................. 455 Appendices A. 14-bit Core Instruction Set . ................................. 475 B. Special Purpose Register Structure for the PIC16C74B . ........ 477 C. C Instruction Set . .......................................... 479 D. Acronyms and Abbreviations . .............................. 481 Index . ........................................................ 485 List of Figures 1.1 The NOT operation. ........................................ 12 1.2 The AND function. ......................................... 13 1.3 The inclusive-OR operation.................................. 13 1.4 The XOR operation. ........................................ 14 1.5 Detecting sign overflow. .................................... 15 2.1 The 74LS00 quad 2-I/P NAND package. ...................... 18 2.2 Output structures. ......................................... 19 2.3 Open-collector buffers driving a party line. .................. 20 2.4 Sharing a bus. .............................................. 20 2.5 The 74LS138 and ’139 MSI natural decoders. ................ 21 2.6 The 74LS688 octal equality detector. ........................ 23 2.7 Addition. .................................................. 24 2.8 Implementing a programmable adder/subtractor. ........... 25 2.9 The 74LS382 ALU. .......................................... 25 2.10 A ROM-implemented 1-bit adder. ........................... 26 2.11 The 2764 Erasable PROM. ................................... 27 2.12 Floating-gate MOSFET link .................................. 27 2.13 The R S latch................................................ 29 2.14 Using a R S latch to debounce a switch. ...................... 30 2.15 The D latch and flip flop. ................................... 31 2.16 The 74LS74 dual D flip flop. ................................ 32 2.17 The 74LS377 octal D flip flop array. ......................... 33 2.18 The 74LS373 octal D latch array. ............................ 34 2.19 An 8-bit ALU-accumulator processor. ....................... 35 2.20 The SISO shift register. ..................................... 36 2.21 The T flip flop. ............................................. 36 2.22 A modulo-16 ripple counter. ................................ 37 2.23 Generating timing waveforms. .............................. 38 2.24 The 6264 8196 × 8RAM.................................... 39 3.1 An elementary von Neumann computer. ..................... 42 3.2 An elementary Harvard architecture computer. .............. 44 3.3 Executing the 1st instruction whilst fetching down the 2nd. 45 3.4 Parallel fetch and execute streams. .......................... 50 VIII List of Figures 3.5 Programmer’s model. ....................................... 54 3.6 The indirect mechanism. ................................... 57 3.7 Circular shifts. ............................................. 61 3.8 The process. ............................................... 65 3.9 Visualization of the taskprocess. ........................... 65 3.10 Division by repetitive subtracting. .......................... 68 3.11 Double-precision shifting. .................................. 70 3.12 A 7-bit pseudo-random number generator. .................. 70 4.1 An example of a system based on a microcontroller. ......... 81 4.2 Architecture of the PIC16F84 microcontroller ............... 85 4.3 Showing how all of the PC are altered when writing to PCL.... 86 4.4 Internal clocksequencing waveforms. ....................... 87 4.5 The PIC16F84 Status register ............................... 89 4.6 Data store memory map. ................................... 92 5.1 General 14-bit core Status register. .......................... 109 5.2 The indirect mechanism. ................................... 109 5.3 The ith section of the compare-update sequence. ............ 112 5.4 Generating a 13-bit Program-store address. .................. 114 6.1 Modular hardware implementing a PC. ...................... 138 6.2 Subroutine calling. ......................................... 140 6.3 Using the hardware stackhold return addresses. ............ 141 6.4 Nested subroutines. ........................................ 142 6.5 System view of K × 100 ms delay subroutine. ................ 145 6.6 The 7-segment display. ..................................... 148 6.7 System diagram for the byte multiplication subroutine. ...... 150 6.8 The stackframe. ........................................... 154 6.9 Finding the square root of an integer. ....................... 162 7.1 Detecting and measuring an external event. ................. 172 7.2 Responding to an interrupt request.......................... 175 7.3 The flag:maskpair. ......................................... 176 7.4 The PIC 16F84’s interrupt logic. ............................. 178 7.5 Oven safety hardware. ...................................... 188 7.6 Echo sounding hardware. ................................... 195 8.1 Conversion from assembly-level source to machine code. .... 198 8.2 Absolute assembly-level code translation. ................... 202 8.3 Relocatable assembly-level code translation. ................. 211 8.4 Linking three source files. .................................. 213 8.5 Code building and testing tools. ............................ 219 8.6 MPLAB window. ............................................ 221 8.7 MPLAB screen shot. ........................................ 222 List of Figures IX 9.1 Conversion from high-level source code to machine code. .... 233 9.2 Onion skin view of the steps leading to executable code. ..... 234 9.3 Simulating our example program in MPLAB. ................. 242 9.4 The active-low die patterns. ................................. 250 10.1 Pinout for a variety of PIC family members. ................. 254 10.2 Typical supply current versus clocking frequency. ........... 256 10.3 Equivalent output circuit. ................................... 257 10.4 Typical oscillator configurations............................. 258 10.5 Configuration word for the PIC16F83/4. ..................... 261 10.6 Manually resetting the PIC. ................................. 263 10.7 The sequence of events leading to startup on power-up. ..... 264 10.8 Brown-out reset. ........................................... 267 10.9 An alternative brown-out circuit. ............................ 269 11.1 The mid-range PIC 16CXX series Parallel Ports A and B. ...... 272 11.2 A simplified typical I/O port line. ........................... 273 11.3 Reading and writing to a port bit set to input or output. ..... 275 11.4 Sinking and sourcing current. ............................... 276 11.5 Port A I/O pin driver structure. ............................. 278 11.6 Interfacing switches to a port line. .......................... 280 11.7 Port B’s weakpull-up option. ................................ 280 11.8 Interfacing to a keypad. .................................... 281 11.9 The Port B change feature. .................................. 285 11.10 A multi-zone intruder alarm. ............................... 287 11.11 Source current against voltage. ............................. 290 11.12 The stepper motor. ......................................... 294 11.13 Using port expansion to drive three 7-segment displays. ..... 298 11.14 Scanning a 3-digit 7-segment array. ......................... 299 11.15 Low-level output voltage against sinkcurrent. ............... 304 12.1 The smart card. ............................................ 305 12.2 Serial interface to a 3-digit 7-segment display. ............... 307 12.3 Logic functional diagram of the 74HCT595 octal shift register. 309 12.4 Serially interfacing to a DAC0800 digital to analog converter. 310 12.5 Serially interfacing to the multi-zone intruder alarm. ........ 311 12.6 The MAX549A SPI dual 8-bit DAC. .......................... 314 12.7 SPI waveforms for the MAX549A. ........................... 316 12.8 Multiple MAX549As on the one SPI circuit. .................
Load more

Recommended publications
  • When Is a Microprocessor Not a Microprocessor? the Industrial Construction of Semiconductor Innovation I
    Ross Bassett When is a Microprocessor not a Microprocessor? The Industrial Construction of Semiconductor Innovation I In the early 1990s an integrated circuit first made in 1969 and thus ante­ dating by two years the chip typically seen as the first microprocessor (Intel's 4004), became a microprocessor for the first time. The stimulus for this piece ofindustrial alchemy was a patent fight. A microprocessor patent had been issued to Texas Instruments, and companies faced with patent infringement lawsuits were looking for prior art with which to challenge it. 2 This old integrated circuit, but new microprocessor, was the ALl, designed by Lee Boysel and used in computers built by his start-up, Four-Phase Systems, established in 1968. In its 1990s reincarnation a demonstration system was built showing that the ALI could have oper­ ated according to the classic microprocessor model, with ROM (Read Only Memory), RAM (Random Access Memory), and I/O (Input/ Output) forming a basic computer. The operative words here are could have, for it was never used in that configuration during its normal life­ time. Instead it was used as one-third of a 24-bit CPU (Central Processing Unit) for a series ofcomputers built by Four-Phase.3 Examining the ALl through the lenses of the history of technology and business history puts Intel's microprocessor work into a different per­ spective. The differences between Four-Phase's and Intel's work were industrially constructed; they owed much to the different industries each saw itselfin.4 While putting a substantial part ofa central processing unit on a chip was not a discrete invention for Four-Phase or the computer industry, it was in the semiconductor industry.
    [Show full text]
  • The Birth, Evolution and Future of Microprocessor
    The Birth, Evolution and Future of Microprocessor Swetha Kogatam Computer Science Department San Jose State University San Jose, CA 95192 408-924-1000 [email protected] ABSTRACT timed sequence through the bus system to output devices such as The world's first microprocessor, the 4004, was co-developed by CRT Screens, networks, or printers. In some cases, the terms Busicom, a Japanese manufacturer of calculators, and Intel, a U.S. 'CPU' and 'microprocessor' are used interchangeably to denote the manufacturer of semiconductors. The basic architecture of 4004 same device. was developed in August 1969; a concrete plan for the 4004 The different ways in which microprocessors are categorized are: system was finalized in December 1969; and the first microprocessor was successfully developed in March 1971. a) CISC (Complex Instruction Set Computers) Microprocessors, which became the "technology to open up a new b) RISC (Reduced Instruction Set Computers) era," brought two outstanding impacts, "power of intelligence" and "power of computing". First, microprocessors opened up a new a) VLIW(Very Long Instruction Word Computers) "era of programming" through replacing with software, the b) Super scalar processors hardwired logic based on IC's of the former "era of logic". At the same time, microprocessors allowed young engineers access to "power of computing" for the creative development of personal 2. BIRTH OF THE MICROPROCESSOR computers and computer games, which in turn led to growth in the In 1970, Intel introduced the first dynamic RAM, which increased software industry, and paved the way to the development of high- IC memory by a factor of four.
    [Show full text]
  • Microprocessors in the 1970'S
    Part II 1970's -- The Altair/Apple Era. 3/1 3/2 Part II 1970’s -- The Altair/Apple era Figure 3.1: A graphical history of personal computers in the 1970’s, the MITS Altair and Apple Computer era. Microprocessors in the 1970’s 3/3 Figure 3.2: Andrew S. Grove, Robert N. Noyce and Gordon E. Moore. Figure 3.3: Marcian E. “Ted” Hoff. Photographs are courtesy of Intel Corporation. 3/4 Part II 1970’s -- The Altair/Apple era Figure 3.4: The Intel MCS-4 (Micro Computer System 4) basic system. Figure 3.5: A photomicrograph of the Intel 4004 microprocessor. Photographs are courtesy of Intel Corporation. Chapter 3 Microprocessors in the 1970's The creation of the transistor in 1947 and the development of the integrated circuit in 1958/59, is the technology that formed the basis for the microprocessor. Initially the technology only enabled a restricted number of components on a single chip. However this changed significantly in the following years. The technology evolved from Small Scale Integration (SSI) in the early 1960's to Medium Scale Integration (MSI) with a few hundred components in the mid 1960's. By the late 1960's LSI (Large Scale Integration) chips with thousands of components had occurred. This rapid increase in the number of components in an integrated circuit led to what became known as Moore’s Law. The concept of this law was described by Gordon Moore in an article entitled “Cramming More Components Onto Integrated Circuits” in the April 1965 issue of Electronics magazine [338].
    [Show full text]
  • Bit Bang Rays to the Future
    Bit Bang Rays to the Future Editors Yrjö Neuvo & Sami Ylönen Bit Bang Rays to the Future ISBN (pbk) 978-952-248-078-1 Layout: Mari Soini Printed by: Helsinki University Print, 2009 Table of Contents FOREWORD 1 BIT BANG 7 1.1 The Digital Evolution – From Impossible to Spectacular 8 1.2 Life Unwired – The Future of Telecommunications and Networks 42 1.3 Printed Electronics – Now and Future 63 1.4 Cut the Last Cord by Nanolution 103 2 RAYS TO THE FUTURE 141 2.1 Future of Media – Free or Fantastic? 142 2.2 Future of Living 174 2.3 Wide Wide World – Globalized Regions, Industries and Cities 205 2.4 Augmenting Man 236 APPENDICES 265 1 Course Participants 266 2 Guest Lecturers 268 3 Course Books 268 4 Schedule of the California Study Tour in February 2009 269 5 Study Tour Summary Reports 272 Foreword Bit Bang – Rays to the Future is a post-graduate cross-disciplinary course on the broad long-term impacts of information and communications technologies on life- styles, society and businesses. It includes 22 students selected from three units making the upcoming Aalto University: Helsinki University of Technology (TKK), Helsinki School of Economics (HSE) and University of Art and Design Helsinki (UIAH). Bit Bang is a part of the MIDE (Multidisciplinary Institute of Digitalisation and Energy) research program, which the Helsinki University of Technology has started as part of its 100 years celebration of university level education and research. Professor Yrjö Neuvo, MIDE program leader, Nokia’s former Chief Technology Officer, is the force behind this course.
    [Show full text]
  • A Self-Optimizing Embedded Microprocessor Using a Loop Table
    A Self-Optimizing Embedded Microprocessor using a Loop Table for Low Power Frank Vahid* and Ann Gordon-Ross Department of Computer Science and Engineering University of California, Riverside http://www.cs.ucr.edu/~vahid {vahid/ann}@cs.ucr.edu *Also with the Center for Embedded Computer Systems at UC Irvine. ABSTRACT additional transistor capacity is to reduce power in a mass- We describe an approach for a microprocessor to tune itself to its produced embedded microprocessor by, adding tunable fixed application to reduce power in an embedded system. We components to the architecture, and extra circuitry that tunes those define a basic architecture and methodology supporting a components to the particular fixed application. Essentially, the microprocessor self-optimizing mode. We also introduce a loop microprocessor is self-optimizing. A designer using such a part table as a tunable component, although self-optimization can be gets reduced power through some customization while still getting done for other tunable components too. We highlight the benefits of a mass-produced IC. experimental results illustrating good power reductions with no In this paper, we describe a basic architecture and methodology performance penalty. for a self-optimizing microprocessor that tunes itself to an application to reduce power. Such a microprocessor represents an Keywords instance of post-fabrication tuning [16], namely tuning done after System-on-a-chip, self-optimizing architecture, embedded an IC has been fabricated. We introduce self-profiling circuitry systems, parameterized architectures, cores, low-power, tuning, and a designer-controlled self-optimization mode, in which platforms. configurable architectural components would be tuned based on an application’s profile.
    [Show full text]
  • The ZEN of BDM
    The ZEN of BDM Craig A. Haller Macraigor Systems Inc. This document may be freely disseminated, electronically or in print, provided its total content is maintained, including the original copyright notice. Introduction You may wonder, why The ZEN of BDM? Easy, BDM (Background Debug Mode) is different from other types of debugging in both implementation and in approach. Once you have a full understanding of how this type of debugging works, the spirit behind it if you will, you can make the most of it. Before we go any further, a note on terminology. “BDM” is Motorola’s term for a method of debugging. It also refers to a hardware port on their microcontroller chips, the “BDM port”. Other chips and other manufacturers use a JTAG port (IBM), a OnCE port (Motorola), an MPSD port (Texas Instruments), etc. (more on these later). The type of debugging we will be discussing is sometimes known as “BDM debugging” even though it may use a JTAG port! For clarity, I will refer to it as “on-chip debugging” or OCD. This will include all the various methods of using resources on the chip that are put there to enable complete software debug and aid in hardware debug. This includes processors from IBM, TI, Analog Devices, Motorola, and others. This paper is an overview of OCD debugging, what it is, and how to use it most effectively. A certain familiarity with debugging is assumed, but novice through expert in microprocessor/microcontroller design and debug will gain much from its reading. Throughout this paper I will try to be as specific as possible when it relates to how different chips implement this type of debugging.
    [Show full text]
  • Oyo-Buturi International
    Oyo-Buturi International Interview few books on to the subject. One was Den- work? shi-Keisanki (obi: “Electronic Computer”) Dr Shima: I did it for about four months. Dr Masatoshi Shima was part of a talent- by Shigeru Takahashi, which outlined the The next development in my career oc- ed group of engineers who in 1971 de- system, architecture, instruction set and curred as a result of my being lucky or as we veloped the world’s first microprocessor, microprogramming of computers; almost say in Japanese unmei (obi: fate or destiny). the 4004. In this interview, Dr Shima everything concerning computers. Another OBI: What do you mean by that? sheds light on some of the critical events book I read was about logic. It was written Dr Shima: Well, although the transistor leading up to the development of the by Professor Udagawa. I read both of these was invented in 1947, it was not commer- technology that revolutionised the elec- books avidly and then began to design the cialised until 1951. The commercial use of tronics industry and society as a whole. circuit boards that go into a calculator. This the transistor then led to a new era, namely, process involves connecting ics with wires the “era of the circuit”. That is to say, if you OBI: You studied chemistry as an under- and designing complicated wiring patterns. could fabricate a circuit by putting together graduate but then joined a com- a transistor, a resistor and a di- pany working on calculating ma- ode, you could construct and de- chines.
    [Show full text]
  • Technology and Obsolescence in America Copyright © 2006 by Giles Slade All Rights Reserved Printed in the United States of America
    Made to Break GILES SLADE Harvard University Press Cambridge, Massachusetts I London, England Made To Break Technology and Obsolescence in America Copyright © 2006 by Giles Slade All rights reserved Printed in the United States of America First Harvard University Press paperback edition, 2007 Library of Congress Cataloging-in-Publication Data Slade, Giles. Made to break : technology and obsolescence in America I Giles Slade. p. cm. ISBN-13 978-0-674-02203-4 (cloth: alk. paper) ISBN-10 0-674-02203-3 (cloth: alk. paper) ISBN-13 978-0-674-02572-1 (pbk.) ISBN-10 0-674-02572-5 (pbk.) 1. Technological innovations-United States. I. Title. T173.8.S595 2006 609.73-dc22 2005036315 Introduction 1 1 Repetitive Consumption 9 2 The Annual Model Change 29 3 Hard Times 57 4 Radio, Radio 83 5 The War and Postwar Progress 115 6 The Fifties and Sixties 151 7 Chips 187 8 Weaponizing Planned Obsolescence 227 9 Cell Phones and E-Waste 261 Notes 283 Acknowledgments 313 Index 316 America, I do not call your name without hope -PABLO NERUDA To scrutinize the trivial can be to discover the monumental. Almost any object can serve to unveil the mysteries of engineering and its relation to art, business, and all other aspects of our culture. HENRY PETROSKI, THE PENCIL: A HISTORY (1989) For no better reason than that a century of advertising has condi­ tioned us to want more, better, and fa ster from any consumer good we purchase, in 2004 about 315 million working PCs were retired in North America. Of these, as many as 10 percent would be refurbished and reused, but most would go straight to the trash heap.
    [Show full text]
  • Embedded Systems
    EMBEDDED SOFTWARE & SYSTEMS DEVELOPMENT HCL ENGINEERING AND R&D SERVICES Innovation Simplified Embedded Software & Systems Development at HCL HCL is a leader in developing embedded software and systems for various industries and domains. We have expertise in safety-critical embedded systems with more than 2000 person years of cumulative experience in developing small footprint and safety-critical embedded systems for Medical Devices, Automotive Electronics and Aircraft Components. We use our DSP expertise and IPs to develop fast embedded middleware, rich applications and interactive GUI for consumer electronics, computer peripherals and telecom products. Our embedded systems group comprises of a large talent pool of engineers and equipped with competencies in a range of programming tools, microprocessors and real-time operating systems. HCL has executed turnkey development projects for new products as well as provided discrete services for existing products. Our embedded product lifecycle services provide • Feasibility study, modeling & design, development for new product development • Re-development & re-engineering, technology adaptation for new adaptations. • Lifecycle enhancements, defect tracking and fixing for product sustenance • Test plan design, test automation and scripting for testing and verification Using our unparalleled expertise across various domains, HCL tailors its embedded services to meet the unique challenges of different industries Innovation Partner to Global Fortune companies 2000+ Service person years of Offerings
    [Show full text]
  • MEMORY MAKER ROBERT DENNARD, Winner of THIS YEAR’S IEEE MEDAL of HONOR, FIGURED out How to DO DRAM RIGHT
    THE MAGAZINE OF TECHNOLOGY INSIDERS 05.09 MEMORY MAKER ROBERT DENNARD, WINNER OF THIS YEAR’S IEEE MEDAL OF HONOR, FIGURED OUT HOW TO DO DRAM RIGHT THE 25 MOST REMARKABLE CHIPS EVER TOUCH SCREENS GET TOUCHY-FEELY THE NETFLIX CHALLENGE: HELP US RECOMMEND MOVIES, WIN A MILLION DOLLARS volume 46 number 5 north american 05.09 UPDATE 11 BAIT TO TRACK DATA THIEVES A honeypot project in Germany finds viruses and tracks down the data they steal. By Michael Dumiak 12 CELLPHONE SECURITY THREAT 14 BRIGHT SPOTS IN THE GLOOM 14 ROBOTIC SEALS AID RESEARCH 15 TOUCH SCREENS WITH FEELING 16 THE RFID AS COMPUTER 24 18 ULTRAVIOLET RADIOS BEAM TO LIFE 20 THE BIG PICTURE Fabs get the white-glove treatment. OPINION 8 SPECTRAL LINES IEEE’s 125th-anniversary celebrations reveal the depth and breadth of its members’ contributions to technology. 10 FORUM Readers discuss the state of the U.S. nuclear arsenal and the demise of the business-method patent. 27 REFLECTIONS Bob Lucky’s head is in the clouds— 44 28 the computing clouds, that is. BETTER PICS: COVER STORY Medical DEPARTMENTS ultrasound 4 BACK STORY images will soon 48 THANKS FOR A man vanishes. Can Google find him? be much sharper [above]; a famed THE MEMORIES 6 CONTRIBUTORS 8-bit processor Robert Dennard’s 1968 invention of the one-transistor dynamic random- 22 HANDS ON powers a famed A high-definition CL D projector can cartoon robot access memory set the path of computing for the next half century. set you back US $2000—or you could [top right]; For this, he will receive the 2009 IEEE Medal of Honor.
    [Show full text]
  • An Introduction to Motorola's 68HC05 Family of 8-Bit Microcontrollers
    An Introduction to Motorola’s 68HC05 Family of 8-Bit Microcontrollers This presentation is a self paced tutorial of the 68HC05 family of 8-bit microcontrollers. Table of Contents Ç CPU Overview Ç Instruction Set Ç Addressing Modes Ç Sample HC05 Code Example Ç Smart Light Dimmer Application Example Ç Bicycling Computer Application Example Ç Other 68HC05 Family Peripherals 2 98/06/23 The Tutorial starts with an architectural overview of the 68HC05 central processor unit (CPU). It covers memory organization, the CPU programmer’s model, stack pointer operation, and the 68HC05 instruction set and its addressing modes. Once learned, this knowledge is applicable to all 68HC05 devices, because they all use the same CPU. In the second part of this tutorial, two sample applications illustrate the use of some common 68HC05 peripherals. One of these is a smart light dimmer in which the very low cost MC68HC705KJ1 provides features not available on conventional electro-mechanical dimmers. The other is a cycling computer that uses the MC68HC705P6A to monitor rider heart rate, temperature, humidity, speed, and distance traveled. Other common 68HC05 peripherals are covered in the third and final section of this tutorial. These provide some of the communication, timing, and display features of embedded control applications not illustrated in the previous examples. 68HC05 Memory Organization $0000 I/O & CONTROL $0200 $CD REGISTERS $0020 $0201 $11 JSR $1120 $0202 $20 RAM $0203 $B7 STA $11 $0204 $11 $0205 $D6 $0100 $0206 $04 LDA $0400,X $0207 $00 ROM/EPROM $xxFA $03 IRQ VECTOR ($03CD) $xx00 $xxFB $CD $xxFC $02 SWI VECTOR BOOT ROM $xxFD $F0 ($02F0) $xxF0 $xxFE $01 RESET VECTOR VECTORS $xxFF $00 ($0100) $xxFF 3 98/07/02 The 68HC05 is a Von Neumann computer.
    [Show full text]
  • Fairchild Semiconductor
    Report to the Computer History Museum on the Information Technology Corporate Histories Project Semiconductor Sector Fairchild Semiconductor Company Details Name: Fairchild Semiconductor Sector: Semiconductor Sector Description . THIS SITE WAS ESTABLISHED TO COLLECT AND PRESENT INFORMATION AND STORIES RELATED TO FAIRCHILD SEMICONDUCTOR AS PART OF THE OCTOBER 2007 CELEBRATION OF THE FIFTIETH ANNIVERSARY OF THE FOUNDING OF THE COMPANY. IF YOU HAVE ANY CORRECTIONS OR ADDITIONAL INFORMATION TO CONTRIBUTE PLEASE CONTACT THE FACILITATORS LISTED BELOW. Overview Founded in 1957 in a building now designated as California Historical Landmark # 1000 in Palo Alto, California by eight young engineers and scientists from Shockley Semiconductor Laboratories, Fairchild Semiconductor Corporation pioneered new products and technologies together with an entrepreneurial style and manufacturing and marketing techniques that reshaped Silicon Valley and the world-wide industry. The Planar process invented in 1959 revolutionized the production of semiconductor devices and enables the manufacture of today's billion transistor microprocessor and memory chips. Funded by and later acquired as a division of Fairchild Camera and Instrument Corporation of Syosset, New York, Fairchild was the first manufacturer to introduce high-frequency silicon transistors and practical monolithic integrated circuits to the market. At the peak of its influence in the mid-1960s, the division was one of the world’s largest producers of silicon transistors and controlled over 30 percent of the market for ICs. Director of Research and Development, Gordon Moore observed in 1965 that device complexity was increasing at a consistent rate and predicted that this would continue into the future. “Moore’s Law,” as it became known, created a yardstick against which companies have measured their technology progress for over 40 years.
    [Show full text]