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Renesas Microcomputer SuperH RISC engine Family Selection Guide www.renesas.com 2011.11 SH7780 Series External Bus Serial On-Chip Other Device Memory CPU DMA Interface Clock ADC DAC Timer Interface CAN I/O Port Debug Function Functions Cbus LCD 2 SSU/ I Ethernet (ns) FPU CPU 8-bit Input MMU USB HOST 16-bit 32-bit Cache Series Group Others Control Part No. Part Memory USB Function Package Code Package Supply Voltage Supply Channels Minimum Instruction Data flash/ Data Watchdog timer Watchdog ROM Type* ROM Temperature (˚C) Temperature Application Special Serial I/O Special Serial RAM (bytes) E2Data flash E2Data ROM (bytes) ROM Clock Sync./ Clock Clock Async. Clock DTC/DMACII Bus structure Operating Ambient Operating Execution Time Execution On-Chip Debug Operating Frequency/ Operating Real Time Clock Real External Interrupt Pins Interrupt External 3-Phase Inverter 3-Phase Inverter 2-Phase Encoder Clock Sync. Only Sync. Clock DMAC (channels) DMAC Basic Instructions Bus State Controller Bus State Resolution x Channels Resolution x Channels Input Only (Numbers) CMOS I/O (Numbers) (32K SRAM/MPX/ .. 533MHz/ -40 R8A77860HBG Burst ROM/ Local bus 9(NMI + (instruction) + 0.94 DDR3 60 1.25V(internal), to 85 SH7786 - (8K + 16K) 32K(data)) x 2 24(max) Byte control 12(TMU) 6(max) 2(max) 1(max) 2(max) 1(max) 15(15 level) 1 BGA593 × 2 (@533MHz) PCI- (max) 3.3V(I/O etc.), .. SRAM/ or 8)(max) R8A77860NBG + 256K Express 1.5V(DDR3 etc.) (L2Cache) PCMCIA -20 - - Display 8K (high speed) Local bus Unit to 85 R8A77850BANBG + 16K (high- (8/16/32/64-bit*1 )/ 600MHz/ SRAM/ - SH7785 - speed) 0.85 DDR2(32-bit)/ 108 1.1V(internal), PRBG0436GA-A + 128K (@600MHz) MPX/ PCI(32-bit) 6(Max.) (Max.) 3.3V(I/O), 12(4 of 9(NMI + R8A77850BADBG (medium- them are BurstROM/ *1:when not 1.8V(DDR2) General-purpose speed) Byte using PCI/DU - - - - 15(15 level) 2 -40 available or 8) to 85 externally) control R8A77800BDBG 16K (high- SRAM/ Local bus - - - 400MHz/ SH7780 - speed) 1.25 PCMCIA (8/16/32-bit)/ Yes 4(CMT) 2(Max.) - 75 1.25V(internal), BP-449 + 32K (medium- (@400MHz) DDR(32-bit)/ (Max.) 3.3V(I/O), -20 R8A77800BNBG speed) PCI(32-bit) 2.5V(DDR) Yes - - - - - to 75 R5S77640N300BG -20 R5S77640D300BG to 85 Separate bus 6(TMU) 324MHz/ SH7780 R5S77641P300BG L - SH-4A 103 Yes - 1 Yes 1.2V(Internal), -40 to 85 core 6(2 of (8/16/32-bit) 1 1 R5S77641D300BG 32K 1.5 them are SRAM/ Can be 6 (selectable (selectable 3.3V(I/O) SH7764 - 16K (instruction), - - 1 1 77 3 - -20 PRBG0404GA-A (@324MHz) available SDRAM connected with (SSI× 6) Host/ Host/ to 85 R5S77641N300BG 32K (data), externally) SDRAM Function) Function) 4-wayset- 324MHz/ (64bit bus) -40 R5S77640P300BG associative 3 1.2V(Internal)/ 3.3V(I/O) to 85 R5S77630AY266BGV SRAM/ Local bus 3 6(4 of MPX/ (8/16/32-bit)/ Yes Yes 266MHz/ Yes 9(NMI + - 1.9 them are Burst ROM/ DDR(32-bit)/ 10-bit 8-bit 3(serial (selectable (selectable 4 107 4 1.25V(internal), -20 SH7763 R5S77631AY266BGV 16K (@266MHz) available Byte control PCI(32-bit)/ × 4 × 2 4(CMT) 2 IO× 3) 2(G-bit) USB USB (Max.) (Max.) 15(15 level) 3.3V(I/O), to 75 BP-449 externally) SRAM/ Multiplexed bus Function) HOST) or 8) 2.5V(DDR) R5S77632AY266BGV PCMCIA (32-bit) 5 Yes Separate RSPI× 1(max), 533MHz/ bus 2(max) 1(max) 17(NMI, 1.25V (internal), .. - ILRAM 16KB 0.94 - 10-bit - - - HSPI× 1(max), Gethernet 12 160 6 -40 SH7734 R8A77343D533BG OLRAM 16KB (@533MHz) 34 Yes (8/16-bit) × 8 5(MTU2) 9 (MTU2) (MTU2) 6(max) 2(max) QSPI× 1(max), 2(max) × 1 (max) (High- (High- (max) (max) IRQ× 8, 3.0 to 3.6V to +85 BGA440 DDR SSI× 4(max) Speed) Speed) PINT× 8) (peripharl), (16-bit) 1.8/1.5V (DDR) . : New product .. : Under development *F : Flash memory version, L : ROM-less version, M : Mask ROM version, O : One-time PROM version, Qz : QzROM version 1HAC, SSI, NAND flash interface, SDIF, HSPI (Some pins for each moduleare multiplexed) 2HAC, SSI, MultiMedia card interface, NAND flash interface (Some pins for each moduleare multiplexed) 3sec.acceralater, HAC, SSI, MultiMedia card interface, Stream interface (Some pins for each moduleare multiplexed) 4HAC, SSI, MultiMedia card interface, Stream interface (Some pins for each moduleare multiplexed) 5sec.acceralater, SD Host interface, HAC, SSI, MultiMedia card interface, Stream interface (Some pins for each moduleare multiplexed) 6Video in, Display cntl., SRC, FLCTL, MMC, VEU option (STIF, RCAN, SDHI, 2D Graphics Accelerator) SuperH RISC engine Family Selection Guide 2011.11 1 SH7780 Series External Bus Serial On-Chip Other Device Memory CPU DMA Interface Clock ADC DAC Timer Interface CAN I/O Port Debug Function Functions Cbus LCD 2 SSU/ I Ethernet (ns) FPU CPU 8-bit Input MMU USB HOST 16-bit 32-bit Cache Series Group Others Control Part No. Part Memory USB Function Package Code Package Supply Voltage Supply Channels Minimum Instruction Data flash/ Data Watchdog timer Watchdog ROM Type* ROM Temperature (˚C) Temperature Application Special Serial I/O Special Serial RAM (bytes) E2Data flash E2Data ROM (bytes) ROM Clock Sync./ Clock Clock Async. Clock DTC/DMACII Bus structure Operating Ambient Operating Execution Time Execution On-Chip Debug Operating Frequency/ Operating Real Time Clock Real External Interrupt Pins Interrupt External 3-Phase Inverter 3-Phase Inverter 2-Phase Encoder Clock Sync. Only Sync. Clock DMAC (channels) DMAC Basic Instructions Bus State Controller Bus State Resolution x Channels Resolution x Channels Input Only (Numbers) CMOS I/O (Numbers) 333MHz/ R8A77310C333BA SRAM/ Local bus PLBG0417KB-A 6(1of them Burst ROM/ 9(NMI 1 1.3V(internal), SH4AL- (16/32-bit) 4(TMUx 3, 3(SCIF 2(SIOF 1(High- High- 3.3V(I/O) -40 SH7731 - 148K 170 1.5(@333MHz) - is available Byte control 4(TPU) 1 23 100 + 1 DSP core SDRAM - - CMTx 1) x 3) x 2) Speed) Speed 266MHz/ to 85 externally) SRAM/ (16/32/64-bit) IRQ 8) R8A77310D333BG PCMCIA 1.2V(internal), PRBG0449GA-A 3.3V(I/O) R8A77300C200FP 200MHz/ 32K(instruction), 2.5(@200MHz) 1.2V(internal), R8A77301C200FP 3.3V(I/O) 32K(data), - - -20 4-wayset- to 75 General-purpose SRAM/ 266MHz/ R8A77301C266FP associative 1.88(@266MHz) 6(2 of SDRAM/ Separate 8(TMUx 21(NMI 1.2V(internal), 16K(high- them are Burst ROM/ bus 3, + 3.3V(I/O) SH7730 - Yes 6(TPU) 6 2 - - - 28 78 - PLQP0208KB-A speed) available Byte control (8/16/32- 10-bit CMTx 20(15 200MHz/ R8A77301D200FP 2.5(@200MHz) externally) SRAM/ bit) x 2 5) level)) 1.2V(internal), PCMCIA 3.3V(I/O) -40 L - SH-4A - - - - - - 266MHz/ to 85 SH7780 core 103 Yes Yes 10-bit 1 Yes R8A77301D266FP 1.88(@266MHz) x 4 1.2V(internal), 3.3V(I/O) R8A77240B500BB L1C: 500MHz/ -20 PVBG0441KB-A to 70 SH7724 - 16K 32K(instruction), 1.00(@500MHz) 1 2 1.2V(internal), Local bus 3.3V(I/O), -40 R8A77240D500BG 32K(data) 12(2 of 3(SCIF 4-wayset- them are (16/32-bit) 6(TMU), x 3) 2(MSIOF 1.8V(DDR2) to 85 associative available DDR1- 1(CMT) 3(SCIFA x 2) Yes 6 162 R8A77230C400BG SDRAM 400MHz/ -20 PRBG0449GA-A L2C: 256K externally) x 3) to 70 SH7723 - 16K 1.25(@400MHz) SRAM/ (32-bit) 3 1.2V(internal), (Mixed instruction 9(NMI 1 3.3V(I/O), R8A77230D400BG Burst ROM/ -40 and operand type) - - 4(TPU) 1 Yes Yes + 2.5V(DDR) to 85 NOR-Flash/ IRQ 8) PCMCIA - 266MHz/ R8A77220AC266BA -20 PLBG0417KB-A 32K(instruction), 6(1of them Local bus 1.2V(internal), to 70 SH7722 - 148K 32K(data), SH4AL- 170 1.5(@333.4MHz) is available (16/32-bit) - 4(TMUx 3, 3(SCIF 2(SIOFx 2) - 23 100 4 3.3V(I/O) 4-wayset- DSP core SDRAM CMTx 1) x 3) 2(SIUx 2) 333MHz/ externally) -40 R8A77220AC266BG associative (16/32/64-bit) 1.3V(internal), PRBG0449GA-A 3.3V(I/O) to 85 . : New product .. : Under development *F : Flash memory version, L : ROM-less version, M : Mask ROM version, O : One-time PROM version, Qz : QzROM version 1LCD controller (LCDC), Key scan interface (KEYSC), SD card host interface (SDHI) 2Video processing unit (VPU5F), Video I/O (VIO5), Video output unit (VOU), TS I/F (TSIF), Key scan interface (KEYSC), 2D graphic acceralator (2DG), SD card hostI/F (SDHI), NAND flash memory control (FLCTL), ATAPI I/F(ATAPI) 3Video processing unit (VPU5F), Video I/O (VIO5), Video output unit (VOU), TS interface (TSIF), Key scan interface (KEYSC), 2D graphic acceralator (2DG), SD card host interface (SDHI), NAND flash memory control (FLCTL), ATAPI interface (ATAPI) 4Video processing unit (VPU), Video I/O (VIO), JPEG processing unit (JPU), Video output unit (VOU), TS interface (TSIF), Key scan interface (KEYSC), 2D graphic acceralator (2DG), SD card host interface (SDHI), NAND flash memory control (FLCTL) SuperH RISC engine Family Selection Guide 2011.11 2 SH7750 Series Device Memory CPU DMA External Bus Clock ADC DAC Timer Serial CAN I/O Port On-Chip Other Interface Interface Debug Function Functions Cbus LCD 2 SSU/ I Ethernet (ns) FPU CPU 8-bit Input MMU USB HOST 16-bit 32-bit Cache Series Group Others Control Part No. Part Memory USB Function Package Code Package Supply Voltage Supply Channels Minimum Instruction Data flash/ Data Watchdog timer Watchdog ROM Type* ROM Temperature (˚C) Temperature Application Special Serial I/O Special Serial RAM (bytes) E2Data flash E2Data ROM (bytes) ROM Clock Sync./ Clock Clock Async. Clock DTC/DMACII Bus structure Operating Ambient Operating Execution Time Execution On-Chip Debug Operating Frequency/ Operating Real Time Clock Real External Interrupt Pins Interrupt External 3-Phase Inverter 3-Phase Inverter 2-Phase Encoder Clock Sync.
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  • Digital and System Design

    Digital and System Design

    Digital System Design — Use of Microcontroller RIVER PUBLISHERS SERIES IN SIGNAL, IMAGE & SPEECH PROCESSING Volume 2 Consulting Series Editors Prof. Shinsuke Hara Osaka City University Japan The Field of Interest are the theory and application of filtering, coding, trans- mitting, estimating, detecting, analyzing, recognizing, synthesizing, record- ing, and reproducing signals by digital or analog devices or techniques. The term “signal” includes audio, video, speech, image, communication, geophys- ical, sonar, radar, medical, musical, and other signals. • Signal Processing • Image Processing • Speech Processing For a list of other books in this series, see final page. Digital System Design — Use of Microcontroller Dawoud Shenouda Dawoud R. Peplow University of Kwa-Zulu Natal Aalborg Published, sold and distributed by: River Publishers PO box 1657 Algade 42 9000 Aalborg Denmark Tel.: +4536953197 EISBN: 978-87-93102-29-3 ISBN:978-87-92329-40-0 © 2010 River Publishers All rights reserved. No part of this publication may be reproduced, stored in a retrieval system, or transmitted in any form or by any means, mechanical, photocopying, recording or otherwise, without prior written permission of the publishers. Dedication To Nadia, Dalia, Dina and Peter D.S.D To Eleanor and Caitlin R.P. v This page intentionally left blank Preface Electronic circuit design is not a new activity; there have always been good designers who create good electronic circuits. For a long time, designers used discrete components to build first analogue and then digital systems. The main components for many years were: resistors, capacitors, inductors, transistors and so on. The primary concern of the designer was functionality however, once functionality has been met, the designer’s goal is then to enhance per- formance.