Superh RISC Engine Family Selection Guide

Renesas Microcomputer SuperH RISC engine Family Selection Guide

www.renesas.com 2011.11 SH7780 Series External Bus Serial On-Chip Other Device Memory CPU DMA Interface Clock ADC DAC Timer Interface CAN I/O Port Debug Function Functions Cbus LCD 2 SSU/ I Ethernet (ns) FPU CPU 8-bit Input MMU USB HOST 16-bit 32-bit Cache Series Group Others Control Part No. Part Memory USB Function Package Code Package Supply Voltage Supply Channels Minimum Instruction Data flash/ Data Watchdog timer Watchdog ROM Type* ROM Temperature (˚C) Temperature Application Special Serial I/O Special Serial RAM (bytes) E2Data flash E2Data ROM (bytes) ROM Clock Sync./ Clock Clock Async. Clock DTC/DMACII Bus structure Operating Ambient Operating Execution Time Execution On-Chip Debug Operating Frequency/ Operating Real Time Clock Real External Interrupt Pins Interrupt External 3-Phase Inverter 3-Phase Inverter 2-Phase Encoder Clock Sync. Only Sync. Clock DMAC (channels) DMAC Basic Instructions Bus State Controller Bus State Resolution x Channels Resolution x Channels Input Only (Numbers) CMOS I/O (Numbers) (32K SRAM/MPX/ .. 533MHz/ -40 R8A77860HBG Burst ROM/ Local bus 9(NMI + (instruction) + 0.94 DDR3 60 1.25V(internal), to 85 SH7786 - (8K + 16K) 32K(data)) x 2 24(max) Byte control 12(TMU) 6(max) 2(max) 1(max) 2(max) 1(max) 15(15 level) 1 BGA593 × 2 (@533MHz) PCI- (max) 3.3V(I/O etc.), .. SRAM/ or 8)(max) R8A77860NBG + 256K Express 1.5V(DDR3 etc.) (L2Cache) PCMCIA -20 - - Display 8K (high speed) Local bus Unit to 85 R8A77850BANBG + 16K (high- (8/16/32/64-bit*1 )/ 600MHz/ SRAM/ - SH7785 - speed) 0.85 DDR2(32-bit)/ 108 1.1V(internal), PRBG0436GA-A + 128K (@600MHz) MPX/ PCI(32-bit) 6(Max.) (Max.) 3.3V(I/O), 12(4 of 9(NMI + R8A77850BADBG (medium- them are BurstROM/ *1:when not 1.8V(DDR2) General-purpose speed) Byte using PCI/DU - - - - 15(15 level) 2 -40 available or 8) to 85 externally) control R8A77800BDBG 16K (high- SRAM/ Local bus - - - 400MHz/ SH7780 - speed) 1.25 PCMCIA (8/16/32-bit)/ Yes 4(CMT) 2(Max.) - 75 1.25V(internal), BP-449 + 32K (medium- (@400MHz) DDR(32-bit)/ (Max.) 3.3V(I/O), -20 R8A77800BNBG speed) PCI(32-bit) 2.5V(DDR) Yes - - - - - to 75 R5S77640N300BG -20 R5S77640D300BG to 85 Separate bus 6(TMU) 324MHz/ SH7780 R5S77641P300BG L - SH-4A 103 Yes - 1 Yes 1.2V(Internal), -40 to 85 core 6(2 of (8/16/32-bit) 1 1 R5S77641D300BG 32K 1.5 them are SRAM/ Can be 6 (selectable (selectable 3.3V(I/O) SH7764 - 16K (instruction), - - 1 1 77 3 - -20 PRBG0404GA-A (@324MHz) available SDRAM connected with (SSI× 6) Host/ Host/ to 85 R5S77641N300BG 32K (data), externally) SDRAM Function) Function) 4-wayset- 324MHz/ (64bit bus) -40 R5S77640P300BG associative 3 1.2V(Internal)/ 3.3V(I/O) to 85 R5S77630AY266BGV SRAM/ Local bus 3 6(4 of MPX/ (8/16/32-bit)/ Yes Yes 266MHz/ Yes 9(NMI + - 1.9 them are Burst ROM/ DDR(32-bit)/ 10-bit 8-bit 3(serial (selectable (selectable 4 107 4 1.25V(internal), -20 SH7763 R5S77631AY266BGV 16K (@266MHz) available Byte control PCI(32-bit)/ × 4 × 2 4(CMT) 2 IO× 3) 2(G-bit) USB USB (Max.) (Max.) 15(15 level) 3.3V(I/O), to 75 BP-449 externally) SRAM/ Multiplexed bus Function) HOST) or 8) 2.5V(DDR) R5S77632AY266BGV PCMCIA (32-bit) 5 Yes Separate RSPI× 1(max), 533MHz/ bus 2(max) 1(max) 17(NMI, 1.25V (internal), .. - ILRAM 16KB 0.94 - 10-bit - - - HSPI× 1(max), Gethernet 12 160 6 -40 SH7734 R8A77343D533BG OLRAM 16KB (@533MHz) 34 Yes (8/16-bit) × 8 5(MTU2) 9 (MTU2) (MTU2) 6(max) 2(max) QSPI× 1(max), 2(max) × 1 (max) (High- (High- (max) (max) IRQ× 8, 3.0 to 3.6V to +85 BGA440 DDR SSI× 4(max) Speed) Speed) PINT× 8) (peripharl), (16-bit) 1.8/1.5V (DDR)

. : New product .. : Under development *F : Flash memory version, L : ROM-less version, M : Mask ROM version, O : One-time PROM version, Qz : QzROM version

1HAC, SSI, NAND flash interface, SDIF, HSPI (Some pins for each moduleare multiplexed) 2HAC, SSI, MultiMedia card interface, NAND flash interface (Some pins for each moduleare multiplexed) 3sec.acceralater, HAC, SSI, MultiMedia card interface, Stream interface (Some pins for each moduleare multiplexed) 4HAC, SSI, MultiMedia card interface, Stream interface (Some pins for each moduleare multiplexed) 5sec.acceralater, SD Host interface, HAC, SSI, MultiMedia card interface, Stream interface (Some pins for each moduleare multiplexed) 6Video in, Display cntl., SRC, FLCTL, MMC, VEU option (STIF, RCAN, SDHI, 2D Graphics Accelerator)

SuperH RISC engine Family Selection Guide 2011.11 1 SH7780 Series External Bus Serial On-Chip Other Device Memory CPU DMA Interface Clock ADC DAC Timer Interface CAN I/O Port Debug Function Functions Cbus LCD 2 SSU/ I Ethernet (ns) FPU CPU 8-bit Input MMU USB HOST 16-bit 32-bit Cache Series Group Others Control Part No. Part Memory USB Function Package Code Package Supply Voltage Supply Channels Minimum Instruction Data flash/ Data Watchdog timer Watchdog ROM Type* ROM Temperature (˚C) Temperature Application Special Serial I/O Special Serial RAM (bytes) E2Data flash E2Data ROM (bytes) ROM Clock Sync./ Clock Clock Async. Clock DTC/DMACII Bus structure Operating Ambient Operating Execution Time Execution On-Chip Debug Operating Frequency/ Operating Real Time Clock Real External Interrupt Pins Interrupt External 3-Phase Inverter 3-Phase Inverter 2-Phase Encoder Clock Sync. Only Sync. Clock DMAC (channels) DMAC Basic Instructions Bus State Controller Bus State Resolution x Channels Resolution x Channels Input Only (Numbers) CMOS I/O (Numbers) 333MHz/ R8A77310C333BA SRAM/ Local bus PLBG0417KB-A 6(1of them Burst ROM/ 9(NMI 1 1.3V(internal), SH4AL- (16/32-bit) 4(TMUx 3, 3(SCIF 2(SIOF 1(High- High- 3.3V(I/O) -40 SH7731 - 148K 170 1.5(@333MHz) - is available Byte control 4(TPU) 1 23 100 + 1 DSP core SDRAM - - CMTx 1) x 3) x 2) Speed) Speed 266MHz/ to 85 externally) SRAM/ (16/32/64-bit) IRQ 8) R8A77310D333BG PCMCIA 1.2V(internal), PRBG0449GA-A 3.3V(I/O) R8A77300C200FP 200MHz/ 32K(instruction), 2.5(@200MHz) 1.2V(internal), R8A77301C200FP 3.3V(I/O) 32K(data), - - -20 4-wayset- to 75

General-purpose SRAM/ 266MHz/ R8A77301C266FP associative 1.88(@266MHz) 6(2 of SDRAM/ Separate 8(TMUx 21(NMI 1.2V(internal), 16K(high- them are Burst ROM/ bus 3, + 3.3V(I/O) SH7730 - Yes 6(TPU) 6 2 - - - 28 78 - PLQP0208KB-A speed) available Byte control (8/16/32- 10-bit CMTx 20(15 200MHz/ R8A77301D200FP 2.5(@200MHz) externally) SRAM/ bit) x 2 5) level)) 1.2V(internal), PCMCIA 3.3V(I/O) -40 L - SH-4A ------266MHz/ to 85 SH7780 core 103 Yes Yes 10-bit 1 Yes R8A77301D266FP 1.88(@266MHz) x 4 1.2V(internal), 3.3V(I/O) R8A77240B500BB L1C: 500MHz/ -20 PVBG0441KB-A to 70 SH7724 - 16K 32K(instruction), 1.00(@500MHz) 1 2 1.2V(internal), Local bus 3.3V(I/O), -40 R8A77240D500BG 32K(data) 12(2 of 3(SCIF 4-wayset- them are (16/32-bit) 6(TMU), x 3) 2(MSIOF 1.8V(DDR2) to 85 associative available DDR1- 1(CMT) 3(SCIFA x 2) Yes 6 162 R8A77230C400BG SDRAM 400MHz/ -20 PRBG0449GA-A L2C: 256K externally) x 3) to 70 SH7723 - 16K 1.25(@400MHz) SRAM/ (32-bit) 3 1.2V(internal), (Mixed instruction 9(NMI 1 3.3V(I/O), R8A77230D400BG Burst ROM/ -40 and operand type) - - 4(TPU) 1 Yes Yes + 2.5V(DDR) to 85 NOR-Flash/ IRQ 8) PCMCIA - 266MHz/ R8A77220AC266BA -20 PLBG0417KB-A 32K(instruction), 6(1of them Local bus 1.2V(internal), to 70 SH7722 - 148K 32K(data), SH4AL- 170 1.5(@333.4MHz) is available (16/32-bit) - 4(TMUx 3, 3(SCIF 2(SIOFx 2) - 23 100 4 3.3V(I/O) 4-wayset- DSP core SDRAM CMTx 1) x 3) 2(SIUx 2) 333MHz/ externally) -40 R8A77220AC266BG associative (16/32/64-bit) 1.3V(internal), PRBG0449GA-A 3.3V(I/O) to 85 . : New product .. : Under development *F : Flash memory version, L : ROM-less version, M : Mask ROM version, O : One-time PROM version, Qz : QzROM version

1LCD controller (LCDC), Key scan interface (KEYSC), SD card host interface (SDHI) 2Video processing unit (VPU5F), Video I/O (VIO5), Video output unit (VOU), TS I/F (TSIF), Key scan interface (KEYSC), 2D graphic acceralator (2DG), SD card hostI/F (SDHI), NAND flash memory control (FLCTL), ATAPI I/F(ATAPI) 3Video processing unit (VPU5F), Video I/O (VIO5), Video output unit (VOU), TS interface (TSIF), Key scan interface (KEYSC), 2D graphic acceralator (2DG), SD card host interface (SDHI), NAND flash memory control (FLCTL), ATAPI interface (ATAPI) 4Video processing unit (VPU), Video I/O (VIO), JPEG processing unit (JPU), Video output unit (VOU), TS interface (TSIF), Key scan interface (KEYSC), 2D graphic acceralator (2DG), SD card host interface (SDHI), NAND flash memory control (FLCTL)

SuperH RISC engine Family Selection Guide 2011.11 2 SH7750 Series Device Memory CPU DMA External Bus Clock ADC DAC Timer Serial CAN I/O Port On-Chip Other Interface Interface Debug Function Functions Cbus LCD 2 SSU/ I Ethernet (ns) FPU CPU 8-bit Input MMU USB HOST 16-bit 32-bit Cache Series Group Others Control Part No. Part Memory USB Function Package Code Package Supply Voltage Supply Channels Minimum Instruction Data flash/ Data Watchdog timer Watchdog ROM Type* ROM Temperature (˚C) Temperature Application Special Serial I/O Special Serial RAM (bytes) E2Data flash E2Data ROM (bytes) ROM Clock Sync./ Clock Clock Async. Clock DTC/DMACII Bus structure Operating Ambient Operating Execution Time Execution On-Chip Debug Operating Frequency/ Operating Real Time Clock Real External Interrupt Pins Interrupt External 3-Phase Inverter 3-Phase Inverter 2-Phase Encoder Clock Sync. Only Sync. Clock DMAC (channels) DMAC Basic Instructions Bus State Controller Bus State Resolution x Channels Resolution x Channels Input Only (Numbers) CMOS I/O (Numbers) SRAM/ HAC x 2, -40 HD6417760BL200AD SDRAM/ SSI x 2, 8(4 of them MPX/ MultiMedia to 85 - - - 10- - 1(Full 69 200MHz/1.5V, BP−256B SH7760 2.5(@200MHz) are available Burst ROM/ bitx 4 4(CMT) 3(TMU) 3 2 2 speed) Yes (Max.) card interface 3.3V(I/O) externally) Byte control (*Some pins for HD6417760BL200A SRAM/ each moduleare -20 PCMCIA multiplexed) to 75 HD6417751RBG240 2.1(@240MHz) 240MHz/1.5V, 3.3V(I/O) HD6417751RBG200D -40 to 85 2.5(@200MHz) Separate 200MHz/1.5V, 3.3V(I/O) PRBG0292GA−A General-purpose HD6417751RBG200 bus(8/16/32- -20 to 75 HD6417751RBG240D 2.1(@240MHz) bit)/ 240MHz/1.5V, 3.3V(I/O) -40 to 85 8(2 of Multiplexed HD6417751RBP200 200MHz/1.5V, -20 to 75 2.5(@200MHz) them are bus(32-bit) HD6417751RBP200D available 39 3.3V(I/O) -40 SH7751R - - PRBG0256DE−B HD6417751RBP240D externally) (Max.) to 85 + 4(PCI 240MHz/1.5V, HD6417751RBP240 16K 2.1(@240MHz) only) 3.3V(I/O) (instruction), -20 HD6417751RF240 to 75 HD6417751RF200 32K(data), 2-wayset- 2.5(@200MHz) 200MHz/1.5V, PRQP0256LA−B HD6417751RF200D associative 3.3V(I/O) -40 HD6417751RF240D 240MHz/1.5V, to 85 2.1(@240MHz) 5(TMU) HD6417750RBG240 5(NMI 3.3V(I/O) -20 to 75 + HD6417750RBG200D - SH-4 ------15(15 Yes 200MHz/1.5V, -40 to 85 SH7750 L core 94 2.5(@200MHz) Yes Yes SRAM/ 1 PRBG0292GA−A HD6417750RBG200 DRAM/ level) 3.3V(I/O) -20 to 75 SDRAM/ or 4) HD6417750RBG240D 2.1(@240MHz) *(Some pins for 240MHz/1.5V, 3.3V(I/O) -40 to 85 HD6417750RBP200 MPX/ ------20 to 75 Burst ROM/ Yes 1 1 each moduleare 200MHz/1.5V, 2.5(@200MHz) 8(2 of multiplexed) HD6417750RBP200D them are Byte 3.3V(I/O) -40 SH7750R - - PRBG0256DE−B HD6417750RBP240D available controlSRAM/ to 85 externally) PCMCIA 240MHz/1.5V, HD6417750RBP240 2.1(@240MHz) 3.3V(I/O) -20 HD6417750RF240 Separate to 75 HD6417750RF200 2.5(@200MHz) bus(8/16/32/64- 200MHz/1.5V, PRQP0208KE−B 28 3.3V(I/O) HD6417750RF200D bit)/ (Max.) -40 HD6417750RF240D 2.1(@240MHz) Multiplexed 240MHz/1.5V, 3.3V(I/O) to 85 bus(32/64-bit) HD6417750SBP200W 200MHz/1.95V, 2.5(@200MHz) PRBG0256DE−A HD6417750SBP200 3.3V(I/O) HD6417750SF167I 3(@167MHz) 167MHz/1.8V, 3.3V(I/O) HD6417750SF200W 8K 2.5(@200MHz) 4(2 of 200MHz/1.95V, 3.3V(I/O) (instruction), them are SH7750S HD6417750SF167D - - 3(TMU) 167MHz/1.8V, - PRQP0208KE−B 16K(data), 3(@167MHz) available HD6417750SF167 Direct map externally) 3.3V(I/O) HD6417750SF200 2.5(@200MHz) 200MHz/1.95V, 3.3V(I/O) HD6417750SVBT133 133MHz/1.5V, PLBG0264GA−A 3.8(@133MHz) HD6417750SVF133 3.3V(I/O) PRQP0208KE−B . : New product .. : Under development *F : Flash memory version, L : ROM-less version, M : Mask ROM version, O : One-time PROM version, Qz : QzROM version

SuperH RISC engine Family Selection Guide 2011.11 3 SH7700 Series Device Memory CPU DMA External Bus Clock ADC DAC Timer Serial CAN I/O Port On-Chip Other Interface Interface Debug Function Functions Cbus LCD 2 SSU/ I Ethernet (ns) FPU CPU 8-bit Input MMU USB HOST 16-bit 32-bit Cache Series Group Others Control Part No. Part Memory USB Function Package Code Package Supply Voltage Supply Channels Minimum Instruction Data flash/ Data Watchdog timer Watchdog ROM Type* ROM Temperature (˚C) Temperature Application Special Serial I/O Special Serial RAM (bytes) E2Data flash E2Data ROM (bytes) ROM Clock Sync./ Clock Clock Async. Clock DTC/DMACII Bus structure Operating Ambient Operating Execution Time Execution On-Chip Debug Operating Frequency/ Operating Real Time Clock Real External Interrupt Pins Interrupt External 3-Phase Inverter 3-Phase Inverter 2-Phase Encoder Clock Sync. Only Sync. Clock DMAC (channels) DMAC Basic Instructions Bus State Controller Bus State Resolution x Channels Resolution x Channels Input Only (Numbers) CMOS I/O (Numbers) R8A77210C133BA PLBG0256KA-A SRAM/ 1 R8A77210C133BG PLBG0256GA-A SH7721 - 16K SDRAM/ R8A77211C133BA 6(2 of Burst 9(TPU 2 1 PLBG0256KA-A SH3- 2 R8A77211C133BG them are ROM/ 8-bit x 4, (selectable (selectable 133MHz/ DSP 160 7.5(@133MHz) Yes 1 Yes 7 110 1.5V, 3.3V core available Byte x 2 CMT USB USB PLBG0256GA-A HD6417320BP133C externally) control x 5) Function) HOST) 23(NMI 3 32K, 10-bit SH7720 HD6417720BL133C - 16K 4-wayset- SRAM/ 2 - +22(15 PLBG0256KA-A PCMCIA x 4 4 HD6417720BP133C associative level)) PLBG0256GA-A Separate bus -20 SH7700 HD6417705BP100B L - 10(@100MHz) - Yes - SRAM/ - 3(TMU) - - 1 - - - Yes 100MHz/1.5V, 3.3V (8/16/32-bit) to 75 TTBG0208JA-A General-purpose HD6417705BP133B 7.5(@133MHz) SDRAM/ 5(TPU 133MHz/1.5V, 3.3V SH7705 - - SH-3 68 Burst ROM/ - x 4, - 1 - 105 - HD6417705F100B core 10(@100MHz) 100MHz/1.5V, 3.3V 4(2 of Byte control Yes(not CMT) PLQP0208KA-A HD6417705F133B 7.5(@133MHz) SRAM 133MHz/1.5V, 3.3V them are separated - - HD6417727BP100C 10(@100MHz) available SRAM/ power 100MHz/1.8V, 3.3V externally) supply) 2 1 PLBG0240JA-A HD6417727BP160C 16K, SH3- 6.3(@160MHz) SDRAM/ (selectable (selectable 7(NMI 160MHz/1.9V, 3.3V SH7727 - 16K 4-wayset- DSP 160 Burst 10-bit 8-bit 1(CMT) 1 1 Yes 104 + 6(15 DSP HD6417727F100C 10(@100MHz) x 6 x 2 USB USB function 100MHz/1.8V, 3.3V associative core ROM/ Function) HOST) level)) PRQP0240KC-B HD6417727F160C 6.3(@160MHz) PCMCIA 160MHz/1.9V, 3.3V . : New product .. : Under development *F : Flash memory version, L : ROM-less version, M : Mask ROM version, O : One-time PROM version, Qz : QzROM version

1DSP function, MultiMedia card interface, Compare match timer 2DSP function, MultiMedia card interface, Compare match timer, SD Host interface 3DSP function, MultiMedia card interface, Compare match timer, SD Host interface, SSL acceralater 4DSP function, MultiMedia card interface, Compare match timer, SSL acceralater

SuperH RISC engine Family Selection Guide 2011.11 4 SH7700 Series Device Memory CPU DMA External Bus Clock ADC DAC Timer Serial CAN I/O Port On-Chip Other Interface Interface Debug Function Functions Cbus LCD 2 SSU/ I Ethernet (ns) FPU CPU 8-bit Input MMU USB HOST 16-bit 32-bit Cache Series Group Others Control Part No. Part Memory USB Function Package Code Package Supply Voltage Supply Channels Minimum Instruction Data flash/ Data Watchdog timer Watchdog ROM Type* ROM Temperature (˚C) Temperature Application Special Serial I/O Special Serial RAM (bytes) E2Data flash E2Data ROM (bytes) ROM Clock Sync./ Clock Clock Async. Clock DTC/DMACII Bus structure Operating Ambient Operating Execution Time Execution On-Chip Debug Operating Frequency/ Operating Real Time Clock Real External Interrupt Pins Interrupt External 3-Phase Inverter 3-Phase Inverter 2-Phase Encoder Clock Sync. Only Sync. Clock DMAC (channels) DMAC Basic Instructions Bus State Controller Bus State Resolution x Channels Resolution x Channels Input Only (Numbers) CMOS I/O (Numbers) HD6417729RBP133B 133MHz/ PLBG0240JA-A 7.5(@133MHz) HD6417729RF133B SH3- 1.8V, 3.3V - DSP PLQP0208KA-A SH7729R 16K DSP 160 function HD6417729RF167B core 6(@167MHz) 167MHz/1.9V, 3.3V HD6417729RHF200B 5(@200MHz) 200MHz/2.0V, 3.3V PRQP0208KE-B HD6417709SBP167B 6(@167MHz) 23(NMI 167MHz/1.9V, 3.3V HD6417709SBP100B 10(@100MHz) SRAM/ 10-bit 100MHz/1.7V, 3.3V 4(2 of x 8 2 96 + 22(15 PLBG0240JA-A HD6417709SBP133B 16K, 7.5(@133MHz) SDRAM/ Separate level)) 133MHz/1.8V, 3.3V L - - them are - Yes 8-bit - 1(CMT) 3(TMU) - - 1 1 ------Yes -20 SH7700 4-wayset- Yes Burst bus x 2 to 75 SH7709S HD6417709SF100B - - 10(@100MHz) available ROM/ (8/16/32-bit) 100MHz/1.7V, 3.3V associative externally) General-purpose PCMCIA HD6417709SF133B SH-3 68 7.5(@133MHz) - 133MHz/1.8V, 3.3V PLQP0208KA-A HD6417709SF167B core 6(@167MHz) 167MHz/1.9V, 3.3V HD6417709SHF200B 5(@200MHz) 200MHz/2.0V, 3.3V PRQP0208KE-B HD6417706BP133 7(NMI TTBG0208JA-A SH7706 - - 7.5(@133MHz) 10-bit 1 72 + 6(15 133MHz/ HD6417706F133 x 4 level)) 1.9V, 3.3V PLQP0176KD-A . : New product .. : Under development *F : Flash memory version, L : ROM-less version, M : Mask ROM version, O : One-time PROM version, Qz : QzROM version

SuperH RISC engine Family Selection Guide 2011.11 5 SH7200 Series External Bus Serial On-Chip Other Device Memory CPU DMA Interface Clock ADC DAC Timer Interface CAN I/O Port Debug Function Functions Cbus LCD 2 SSU/ I Ethernet (ns) FPU CPU 8-bit Input MMU USB HOST 16-bit 32-bit Cache Series Group Others Control Part No. Part Memory USB Function Package Code Package Supply Voltage Supply Channels Minimum Instruction Data flash/ Data Watchdog timer Watchdog ROM Type* ROM Temperature (˚C) Temperature Application Special Serial I/O Special Serial RAM (bytes) E2Data flash E2Data ROM (bytes) ROM Clock Sync./ Clock Clock Async. Clock DTC/DMACII Bus structure Operating Ambient Operating Execution Time Execution On-Chip Debug Operating Frequency/ Operating Real Time Clock Real External Interrupt Pins Interrupt External 3-Phase Inverter 3-Phase Inverter 2-Phase Encoder Clock Sync. Only Sync. Clock DMAC (channels) DMAC Basic Instructions Bus State Controller Bus State Resolution x Channels Resolution x Channels Input Only (Numbers) CMOS I/O (Numbers) 64K (high− SH2A- 17(NMI, FLCTL, 200MHz/ SH7203 - - 5(MTU), - - 6(SSUx 2, 1(High- High- PRQP0240KC-A R5S72030W200FP speed) 16K FPU 112 Yes Yes Yes 2(CMT) 4 SSIx 4) 2 Speed) Speed Yes 16 82 IRQx 8, TFT-support 1.1 to 1.3V, +16K core PINTx 8) LCDC 3.0 to 3.6V (retention) 8(4 of them are available SRAM/ 11(MTU2 - 1 4 externally) Bytes control 16K, x 6, 2(shared 200MHz/ SH-2A SRAM/ Separate bus MTU2S 1.15 to 1.35V, -20 SH7206 R5S72060W200FPV - 128K 4-wayset- 91 5(@200MHz) - Burst ROM/ - - with 1 - - - - 8 71 9 - PLQP0176KD-A Industrial field Industrial associative core (8/16/32-bit) x 3, MTU2, 3.0 to 3.6V to 85 MPX-IO/ CMT (bus) SDRAM/ MTU2S) SH7200 L - - - 10-bit 8-bit x 2) - - Yes PCMCIA x 8 x 2 96K 9(MTU 2(shared (high− SH2A- with - 17(NMI, FLCTL, 200MHz/ - - x 5, 8(SSUx 2, 2(High- High- SH7205 R5S72050W200BG speed) 16K FPU 14 Yes CMT 1(MTU2) MTU2) 2 6 4 SSIx 6) Speed) Speed 11 96 IRQx 8, ATAPI, 1.1 to 1.3V, PRBG0272GA-A +16K core x 4) PINTx 8) 2DG 3.0 to 3.6V (retention) 1(shared 112 Yes Yes with 2 R5S72011RB120FP 8.33(@120MHz) MTU2) 120MHz/ -20 16K, 8(4 of them 3.0 to 3.6V to 70 - SH-2A SRAM/ Separate bus - - - - SH7201 32K 4-wayset- core are available SDRAM (8/16/32-bit) 2(TMR) 6(MTU2) 1 8 3 2(SSIx 2) 14 104 17 PLQP0176KB-A R5S72011RW100FP associative 10(@100MHz) externally) 100MHz/ -20 3.0 to 3.6V to 85 . : New product .. : Under development *F : Flash memory version, L : ROM-less version, M : Mask ROM version, O : One-time PROM version, Qz : QzROM version

SuperH RISC engine Family Selection Guide 2011.11 6 SH7260 Series External Bus Serial On-Chip Other Device Memory CPU DMA Interface Clock ADC DAC Timer Interface CAN I/O Port Debug Function Functions Cbus LCD 2 SSU/ I Ethernet (ns) FPU CPU 8-bit Input MMU USB HOST 16-bit 32-bit Cache Series Group Others Control Part No. Part Memory USB Function Package Code Package Supply Voltage Supply Channels Minimum Instruction Data flash/ Data Watchdog timer Watchdog ROM Type* ROM Temperature (˚C) Temperature Application Special Serial I/O Special Serial RAM (bytes) E2Data flash E2Data ROM (bytes) ROM Clock Sync./ Clock Clock Async. Clock DTC/DMACII Bus structure Operating Ambient Operating Execution Time Execution On-Chip Debug Operating Frequency/ Operating Real Time Clock Real External Interrupt Pins Interrupt External 3-Phase Inverter 3-Phase Inverter 2-Phase Encoder Clock Sync. Only Sync. Clock DMAC (channels) DMAC Basic Instructions Bus State Controller Bus State Resolution x Channels Resolution x Channels Input Only (Numbers) CMOS I/O (Numbers) R5S72690W266FP.. -20 R5S72691W266FP.. 12(RSPI 2D Graphics to 85 Accelerator, PLQP0256LB-A R5S72690P266FP.. x 2, 2500K RQSPI Video -40 R5S72691P266FP.. Decoder, to 85 - (SRAM) 10-bit x 2, SH7269 .. 4 8 133 Video in, R5S72690W266BG + 64K 8K x 8 SSIx 6, 266MHz/ -20 to 85 (high-speed) SPDIF Display R5S72690P266BG.. (instruction), cntl., 1.15 to 1.35V -40 8K(data), 3.76 Separate bus x 1, 3 (internal), PRBG0272GA-A R5S72691P266BG.. (@266MHz) (8/16/32-bit) SIOFx 1) JPEG to 85 4-way set- Decoder, 3.0 to 3.6V R5S72691W266BG.. associative 17(NMI, (peripheral) -20 to 85 8 IRQ x 8, CDROM R5S72681P266FP.. -40 to 85 2500K 9(RSPI x 2, PINT x 8) Decoder, .. SRC, R5S72680W266FP (SRAM) SH2A- 7(MTU2 2(shared 1(shared RQSP x 2, 1(High- High- -20 SH7260 SH7268 - L - FPU 112 Yes - 16 - Yes Yes - - x 5, - with with 1 - 2 - - 101 Yes FLCTL, SD, PLQP0208KB-A R5S72681W266FP.. + 64K SSIx 4, Speed) Speed to 85 (high-speed) core CMTx 2) MTU2) MTU2) SPDIFx 1) MMC R5S72680P266FP.. -40 to 85 R5S72670P144FP -40 to 85 1500K - Automotive, Industrial field Industrial Automotive, R5S72670W144FP (SRAM) 10-bit 6(RSPI -20 to 85 SH7267 - x 2, 6 92 Video in, PLQP0176KB-A R5S72671P144FP +64K x 6 Display 144MHz/ -40 to 85 (high-speed) SSIx 4) 2 R5S72671W144FP cntl., 1.15 to 1.35V -20 to 85 16K 6.94 Separate bus 3 CDROM (internal), R5S72660P144FP (@144MHz) (8/16-bit) Decoder, 3.0 to 3.6V -40 to 85 1500K 4(RSPI - R5S72660W144FP (SRAM) 9(NMI, SRC, (peripheral) -20 to 85 SH7266 - 5 x 1, 68 FLCTL PLQP0144KA-A R5S72661P144FP +64K SSIx 3) IRQ x 8) -40 to 85 (high-speed) 2 R5S72661W144FP -20 to 85 . : New product .. : Under development *F : Flash memory version, L : ROM-less version, M : Mask ROM version, O : One-time PROM version, Qz : QzROM version

SuperH RISC engine Family Selection Guide 2011.11 7 SH7260 Series External Bus Serial On-Chip Other Device Memory CPU DMA Interface Clock ADC DAC Timer Interface CAN I/O Port Debug Function Functions Cbus LCD 2 SSU/ I Ethernet (ns) FPU CPU 8-bit Input MMU USB HOST 16-bit 32-bit Cache Series Group Others Control Part No. Part Memory USB Function Package Code Package Supply Voltage Supply Channels Minimum Instruction Data flash/ Data Watchdog timer Watchdog ROM Type* ROM Temperature (˚C) Temperature Application Special Serial I/O Special Serial RAM (bytes) E2Data flash E2Data ROM (bytes) ROM Clock Sync./ Clock Clock Async. Clock DTC/DMACII Bus structure Operating Ambient Operating Execution Time Execution On-Chip Debug Operating Frequency/ Operating Real Time Clock Real External Interrupt Pins Interrupt External 3-Phase Inverter 3-Phase Inverter 2-Phase Encoder Clock Sync. Only Sync. Clock DMAC (channels) DMAC Basic Instructions Bus State Controller Bus State Resolution x Channels Resolution x Channels Input Only (Numbers) CMOS I/O (Numbers) R5S72644P144FPU -40 to 85 - R5S72644W144FPU -20 to 85 R5S72645P144FPU 640K -40 to 85 2 R5S72645W144FPU (SRAM) -20 to 85 + 64K R5S72646P144FPU -40 to 85 (high− - R5S72646W144FPU speed) -20 to 85 R5S72647P144FPU -40 to 85 2 R5S72647W144FPU -20 to 85 SH7264 - 10-bit 8 115 PLQP0208KB-A R5S72640P144FPU x 8 -40 to 85 - R5S72640W144FPU -20 to 85 R5S72641P144FPU 1000K -40 to 85 2 R5S72641W144FPU (SRAM) -20 to 85 + 64K R5S72642P144FPU -40 to 85 (high− - Automotive, Industrial field Industrial Automotive, speed) R5S72642W144FPU Video in, -20 to 85 R5S72643P144FPU Display 144MHz/ -40 to 85 SH2A- Separate 7(MTU2 2(shared 1(shared 6(RSPIx 2 17(NMI, cntl., 1.1 to 1.3V R5S72643W144FPU 6.94 1(High- High- -20 to 85 SH7260 L - 16K FPU 112 Yes - 16 - Yes bus Yes - - x 5, - with with 1 8 - 3 2, SSIx - - IRQ x 8, Yes CDROM (internal), R5S72624P144FPU (@144MHz) Speed) Speed -40 to 85 core (8/16-bit) CMTx 2) MTU2) MTU2) 4) - PINT x 8) Decoder, 3.0 to 3.6V R5S72624W144FPU SRC, (peripheral) -20 to 85 FLCTL R5S72625P144FPU 640K -40 to 85 2 R5S72625W144FPU (SRAM) -20 to 85 + 64K R5S72626P144FPU -40 to 85 (high− - R5S72626W144FPU speed) -20 to 85 R5S72627P144FPU -40 to 85 2 R5S72627W144FPU -20 to 85 SH7262 - 10-bit 4 89 PLQP0176KB-A R5S72620P144FPU x 4 -40 to 85 - R5S72620W144FPU -20 to 85 R5S72621P144FPU 1000K -40 to 85 2 R5S72621W144FPU (SRAM) -20 to 85 + 64K R5S72622P144FPU -40 to 85 (high− - R5S72622W144FPU speed) -20 to 85 R5S72623P144FPU -40 to 85 2 R5S72623W144FPU -20 to 85 . : New product .. : Under development *F : Flash memory version, L : ROM-less version, M : Mask ROM version, O : One-time PROM version, Qz : QzROM version

SuperH RISC engine Family Selection Guide 2011.11 8 SH7260 Series External Bus Serial On-Chip Other Device Memory CPU DMA Interface Clock ADC DAC Timer Interface CAN I/O Port Debug Function Functions Cbus LCD 2 SSU/ I Ethernet (ns) FPU CPU 8-bit Input MMU USB HOST 16-bit 32-bit Cache Series Group Others Control Part No. Part Memory USB Function Package Code Package Supply Voltage Supply Channels Minimum Instruction Data flash/ Data Watchdog timer Watchdog ROM Type* ROM Temperature (˚C) Temperature Application Special Serial I/O Special Serial RAM (bytes) E2Data flash E2Data ROM (bytes) ROM Clock Sync./ Clock Clock Async. Clock DTC/DMACII Bus structure Operating Ambient Operating Execution Time Execution On-Chip Debug Operating Frequency/ Operating Real Time Clock Real External Interrupt Pins Interrupt External 3-Phase Inverter 3-Phase Inverter 2-Phase Encoder Clock Sync. Only Sync. Clock DMAC (channels) DMAC Basic Instructions Bus State Controller Bus State Resolution x Channels Resolution x Channels Input Only (Numbers) CMOS I/O (Numbers) CDROM, SRC, FLCTL, R5S72630P200FP TFT-support LCDC CDROM, SRC, R5S72631P200FP FLCTL, SDHI, 64K TFT-support 8(4 of 6(SSU (high− them are 5(MTU), 1(High- LCDC SH7263 - speed) - - - 1 4 x 2, 16 82 PRQP0240KC-A available 2(CMT) SSI x 4) Speed) CDROM, SRC, +16K externally) (retention) FLCTL, R5S72632P200FP TFT-support LCDC CDROM, SRC, FLCTL, SDHI, R5S72633P200FP SH2A- 17(NMI, TFT-support 200MHz/ - - 4 High- IRQx 8, 1.1 to 1.3V, -40 16K FPU 5(@200MHz) Yes Speed LCDC to 85 core PINTx 8) 3.0 to 3.6V FLCTL, ATAPI, Automotive, Industrial fields Industrial Automotive, R5S72650P200BG 2 2DG, AAC encoder FLCTL, ATAPI, 2DG, R5S72651P200BG 96K 10-bit 8-bitx SH7260 L - 112 Yes - - Yes 9(MTU - - - Yes AAC encoder, (high− x 8 2 8(SSU SHDI SH7265 - speed) 14 x 5, 1(MTU2) 2 6 x 2, 2(High- 11 96 PRBG0272GA-A +16K CMT SSI x 6) Speed) FLCTL, ATAPI, R5S72652P200BG (retention) x 4) 2DG, AAC encoder FLCTL, ATAPI, 2DG, R5S72653P200BG 2(shared 1(shared AAC encoder, with with SDHI MTU2) MTU2) 120MHz/ -20 R5S72611RB120FP 8.33(@120MHz) 2(SSI 3.0 to 3.6V to 70 x 2) 100MHz/ -40 R5S72611RP100FP 10(@100MHz) 3.0 to 3.6V to 85 R5S72612RB120FP 8.33(@120MHz) 8(4 of 120MHz/ -20 16K, 3.0 to 3.6V to 70 SH7261 - 32K 4-wayset- SH-2A them are SRAM/ Separate bus 2(TMR) 6(MTU2) - 1 8 3 - - - 14 104 17 - PLQP0176KB-A associative core available SDRAM (8/16/32-bit) 100MHz/ -40 R5S72612RP100FP 10(@100MHz) externally) 3(SSI 3.0 to 3.6V to 85 x 2, IEBus) 120MHz/ -20 R5S72613RB120FP 8.33(@120MHz) 3.0 to 3.6V to 70 2 100MHz/ -40 R5S72613RP100FP 10(@100MHz) 3.0 to 3.6V to 85 . : New product .. : Under development *F : Flash memory version, L : ROM-less version, M : Mask ROM version, O : One-time PROM version, Qz : QzROM version

SuperH RISC engine Family Selection Guide 2011.11 9 SH7260 Series External Bus Serial On-Chip Other Device Memory CPU DMA Interface Clock ADC DAC Timer Interface CAN I/O Port Debug Function Functions Cbus LCD 2 SSU/ I Ethernet (ns) FPU CPU 8-bit Input MMU USB HOST 16-bit 32-bit Cache Series Group Others Control Part No. Part Memory USB Function Package Code Package Supply Voltage Supply Channels Minimum Instruction Data flash/ Data Watchdog timer Watchdog ROM Type* ROM Temperature (˚C) Temperature Application Special Serial I/O Special Serial RAM (bytes) E2Data flash E2Data ROM (bytes) ROM Clock Sync./ Clock Clock Async. Clock DTC/DMACII Bus structure Operating Ambient Operating Execution Time Execution On-Chip Debug Operating Frequency/ Operating Real Time Clock Real External Interrupt Pins Interrupt External 3-Phase Inverter 3-Phase Inverter 2-Phase Encoder Clock Sync. Only Sync. Clock DMAC (channels) DMAC Basic Instructions Bus State Controller Bus State Resolution x Channels Resolution x Channels Input Only (Numbers) CMOS I/O (Numbers) R5S726A0D216FP.. - R5S726A0P216FP.. 8(RSPI PLQP0120KA-A .. x 2, R5S726A1D216FP SPIMulti 2 1250K(SRAM) 10-bit 1(Full- SH726A R5S726A2D216FP.. - + 64K(high- x 1, 8 57 x 6 - Speed) R5S726A2P216FP.. speed) SSI x 4, SPDIF SPIBSC, 216MHz/ PLQP0120LA-A R5S726A3D216FP.. 8K(instruction), SH2A- 7(MTU2 2(shared 1(shared 17(NMI, 1.15 to 1.35V 8K(data), 4.6 Separate bus x 1) Full- CDROM -40 .. - 112 Yes - 16 - Yes Yes - - - with with 1 5 - 4 2 - - IRQx 8, Yes (internal), SH7260 R5S726A3P216FP L FPU (@216MHz) (8/16-bit) x 5, Speed Decoder, to +85 4-way set- core CMTx 2) MTU2) MTU2) PINT x 8) 3.0 to 3.6V associative SRC, SD R5S726B0D216FP.. 9(RSPI (peripheral) x 3, - R5S726B0P216FP.. 1250K(SRAM) SPIMulti SH726B - + 64K(high- 10-bit x 1, 2(Full- 12 74 PLQP0144KA-A R5S726B1D216FP.. speed) x 8 SSI x 4, Speed) SPDIF 2 .. Automotive, Industrial fields Industrial Automotive, R5S726B1P216FP x 1) . : New product .. : Under development *F : Flash memory version, L : ROM-less version, M : Mask ROM version, O : One-time PROM version, Qz : QzROM version

SuperH RISC engine Family Selection Guide 2011.11 10 SH-Ether Series External Bus Serial On-Chip Other Device Memory CPU DMA Interface Clock ADC DAC Timer Interface CAN I/O Port Debug Function Functions Cbus LCD 2 SSU/ I Ethernet (ns) FPU CPU 8-bit Input MMU USB HOST 16-bit 32-bit Cache Series Group Others Control Part No. Part Memory USB Function Package Code Package Supply Voltage Supply Channels Minimum Instruction Data flash/ Data Watchdog timer Watchdog ROM Type* ROM Temperature (˚C) Temperature Application Special Serial I/O Special Serial RAM (bytes) E2Data flash E2Data ROM (bytes) ROM Clock Sync./ Clock Clock Async. Clock DTC/DMACII Bus structure Operating Ambient Operating Execution Time Execution On-Chip Debug Operating Frequency/ Operating Real Time Clock Real External Interrupt Pins Interrupt External 3-Phase Inverter 3-Phase Inverter 2-Phase Encoder Clock Sync. Only Sync. Clock DMAC (channels) DMAC Basic Instructions Bus State Controller Bus State Resolution x Channels Resolution x Channels Input Only (Numbers) CMOS I/O (Numbers) HD6417615ARBP SRAM/ Separate DSP PLBG0240JA-A SH7615 - 8K SH2- - 5(NMI HD6417615ARF 16 SDRAM/ bus 4(FRT, 2(serial function, 62.5MHz/ 4K DSP 65 2 2 29 + 4(15 3.3V (@62.5MHz) DRAM/ (8/16/32- TPU x 3) IO x 2) level)) E-DMAC -20 to PLQP0208KA-A SH7616 HD6417616SF - 8K core Burst ROM bit) TPU x 2 1 75 HD6417618ABG100V 100MHz/ Separate 1.4 to 1.6V, SH7618 HD6417618ABGN100V - 4K 10 - bus - 71 L - (@100MHz) - - - SRAM/ ------1 ------Yes 3.0 to 3.6V HD6417618ABGW100V SDRAM/ (8/16-bit) (bus) -40 to 85 SH-2 Byte 9(NMI E-DMAC R4S76191B125BGV 16K 62 2(CMT) - 3 -20 to 70 PLBG0176GA-A core 4(2 of control Separate + 8) x 2 125MHz/ R4S76191D125BGV 8 them are SRAM/ bus 1(SIOF 1 1.71 to 1.89V, -40 to 85 SH7619 - 16K (with 78 Communications R4S76191N125BGV (@125MHz) available PCMCIA (8/16/32- x 1) 3.0 to 3.6V -20 to externally) bit) PHY) ( bus) R4S76191W125BGV 85 HD6417710BP DSP function, PLBG0256GA-A SRAM/ IP sec. SDRAM/ acceralater, SH- HD6417710F 6(2 of Burst Separate Yes(not 2(with 7(NMI PRQP0256LA-B 32K, SH3- Bridge) E-DMAC x 4 200MHz/ Ether - - 5 - Yes them are - ROM/ bus separated - - - - 3(TMU) - - 1 2 - - 2(serial - - - - - 24 + 4(15 yes 1.5V(core), -20 to SH7710 HD6417712BP 16K L 4-wayset- DSP 160 available Byte (8/16/32- power IO x 2) level) DSP function, 75 PLBG0256GA-A associative core (@200MHz) 3.3V(I/O) HD6417712F externally) control bit) supply) or 6) E-DMAC x 4 PRQP0256LA-B HD6417713BP SRAM/ PLBG0256GA-A PCMCIA 1 DSP function, HD6417713F E-DMAC x 2 PRQP0256LA-B R5S76700B200BG 5(@200MHz) -20 to 70 - R5S76700D133BG 7.5(@133MHz) -40 to 85 R5S76710B200BG 5(@200MHz) SRAM/ -20 to 70 SDHI R5S76710D133BG D cache SH2A- 7.5(@133MHz) 8(2 of SDRAM/ Separate 1(selectable -40 to 85 - - 8KB, - them are - Byte bus ------2(SSI - 1(selectable - 9(NMI - SH7670 R5S76720B200BG 32K L FPU 112 5(@200MHz) yes 2(CMT) 1 3 1 x 2) 1 USB 8 86 Yes Encryption -20 to 70 PRBG0256GA-A I cache core available control (8/16/32- Function) USB Host) + 8) R5S76720D133BG 8KB 7.5(@133MHz) externally) SRAM/ bit) function -40 to 85 PCMCIA R5S76730B200BG 5(@200MHz) SDHI, -20 to 70 Encryption R5S76730D133BG 7.5(@133MHz) function -40 to 85 . : New product .. : Under development *F : Flash memory version, L : ROM-less version, M : Mask ROM version, O : One-time PROM version, Qz : QzROM version

SuperH RISC engine Family Selection Guide 2011.11 11 SH7216 Series External Bus Serial On-Chip Other Device Memory CPU DMA Interface Clock ADC DAC Timer Interface CAN I/O Port Debug Function Functions Cbus LCD 2 SSU/ I Ethernet (ns) FPU CPU 8-bit Input MMU USB HOST 16-bit 32-bit Cache Series Group Others Control Part No. Part Memory USB Function Package Code Package Supply Voltage Supply Channels Minimum Instruction Data flash/ Data Watchdog timer Watchdog ROM Type* ROM Temperature (˚C) Temperature Application Special Serial I/O Special Serial RAM (bytes) E2Data flash E2Data ROM (bytes) ROM Clock Sync./ Clock Clock Async. Clock DTC/DMACII Bus structure Operating Ambient Operating Execution Time Execution On-Chip Debug Operating Frequency/ Operating Real Time Clock Real External Interrupt Pins Interrupt External 3-Phase Inverter 3-Phase Inverter 2-Phase Encoder Clock Sync. Only Sync. Clock DMAC (channels) DMAC Basic Instructions Bus State Controller Bus State Resolution x Channels Resolution x Channels Input Only (Numbers) CMOS I/O (Numbers) R5F72145ADBG PLBG0176GA-A R5F72145ADFA 1ch PLQP0176LA-B R5F72145ADFP 5 200MHz/ PLQP0176KB-A R5F72145BDBG (@200MHz) 3.0 to 3.6V PLBG0176GA-A R5F72145BDFA - PLQP0176LA-B R5F72145BDFP PLQP0176KB-A 512K 64K R5F72145GDBG PLBG0176GA-A R5F72145GDFA 1ch PLQP0176LA-B R5F72145GDFP 10 100MHz/ PLQP0176KB-A R5F72145HDBG (@100MHz) 3.0 to 3.6V PLBG0176GA-A - General-purpose R5F72145HDFA PLQP0176LA-B R5F72145HDFP PLQP0176KB-A R5F72146ADBG PLBG0176GA-A R5F72146ADFA Direct 1ch PLQP0176LA-B R5F72146ADFP 5 connection 200MHz/ PLQP0176KB-A R5F72146BDBG (@200MHz) to ROM, 3.0 to 3.6V PLBG0176GA-A R5F72146BDFA SRAM, - PLQP0176LA-B R5F72146BDFP SH-2A PLQP0176KB-A 768K 96K 91 - SDRAM, R5F72146GDBG core MPX-I/O, PLBG0176GA-A R5F72146GDFA and 1ch PLQP0176LA-B R5F72146GDFP 10 the others 100MHz/ PLQP0176KB-A R5F72146HDBG (@100MHz) is 3.0 to 3.6V PLBG0176GA-A R5F72146HDFA supported - PLQP0176LA-B R5F72146HDFP PLQP0176KB-A R5F72147ADBG PLBG0176GA-A R5F72147ADFA 1ch PLQP0176LA-B R5F72147ADFP 5 200MHz/ PLQP0176KB-A R5F72147BDBG (@200MHz) 3.0 to 3.6V PLBG0176GA-A R5F72147BDFA - PLQP0176LA-B R5F72147BDFP PLQP0176KB-A 1M 128K R5F72147GDBG PLBG0176GA-A R5F72147GDFA 1ch PLQP0176LA-B R5F72147GDFP 10 100MHz/ PLQP0176KB-A R5F72147HDBG (@100MHz) Yes 3.0 to 3.6V PLBG0176GA-A R5F72147HDFA 11(MTU2 2(shared 5(SCI - (user's PLQP0176LA-B 8(4 of x 6, 2(shared 9(NMI degug R5F72147HDFP 32K(Data them are Separate bus 12-bit with x 4, -40 PLQP0176KB-A SH7216 SH7216 F - - DTC - - - MTU2S - with 1 - 1 1(RSPI) 1ch - 1ch - 10 100 + IRQ interface/ - R5F72165ADBG flash:FLD) available (8/16/32-bit) x 8 MTU2, SCIF to 85 PLBG0176GA-A x 3, MTU2) MTU2S) x 1) x 8) advanced R5F72165ADFA externally) CMT x 2) 1ch user's PLQP0176LA-B R5F72165ADFP 5 debugger) 200MHz/ PLQP0176KB-A R5F72165BDBG (@200MHz) 3.0 to 3.6V PLBG0176GA-A R5F72165BDFA - PLQP0176LA-B R5F72165BDFP PLQP0176KB-A 512K 64K R5F72165GDBG PLBG0176GA-A R5F72165GDFA 1ch PLQP0176LA-B R5F72165GDFP 10 100MHz/ PLQP0176KB-A R5F72165HDBG (@100MHz) 3.0 to 3.6V PLBG0176GA-A R5F72165HDFA - PLQP0176LA-B R5F72165HDFP PLQP0176KB-A R5F72166ADBG PLBG0176GA-A R5F72166ADFA Direct 1ch PLQP0176LA-B R5F72166ADFP 5 connection 200MHz/ PLQP0176KB-A R5F72166BDBG (@200MHz) to ROM, 3.0 to 3.6V PLBG0176GA-A R5F72166BDFA - PLQP0176LA-B SH2A- SRAM, R5F72166BDFP SDRAM, PLQP0176KB-A 768K 96K FPU 112 Yes R5F72166GDBG core MPX-I/O, PLBG0176GA-A R5F72166GDFA and 1ch PLQP0176LA-B R5F72166GDFP 10 the others 100MHz/ PLQP0176KB-A R5F72166HDBG (@100MHz) is 3.0 to 3.6V PLBG0176GA-A R5F72166HDFA supported - PLQP0176LA-B R5F72166HDFP PLQP0176KB-A R5F72167ADBG PLBG0176GA-A R5F72167ADFA 1ch PLQP0176LA-B R5F72167ADFP 5 200MHz/ PLQP0176KB-A R5F72167BDBG (@200MHz) 3.0 to 3.6V PLBG0176GA-A R5F72167BDFA - PLQP0176LA-B R5F72167BDFP PLQP0176KB-A 1M 128K R5F72167GDBG PLBG0176GA-A R5F72167GDFA 1ch PLQP0176LA-B R5F72167GDFP 10 100MHz/ PLQP0176KB-A R5F72167HDBG (@100MHz) 3.0 to 3.6V PLBG0176GA-A R5F72167HDFA - PLQP0176LA-B R5F72167HDFP PLQP0176KB-A . : New product .. : Under development *F : Flash memory version, L : ROM-less version, M : Mask ROM version, O : One-time PROM version, Qz : QzROM version SuperH RISC engine Family Selection Guide 2011.11 12 SH7239, 7231, 7280 Series External Bus Serial On-Chip Other Device Memory CPU DMA Interface Clock ADC DAC Timer Interface CAN I/O Port Debug Function Functions Cbus LCD 2 SSU/ I Ethernet (ns) FPU CPU 8-bit Input MMU USB HOST 16-bit 32-bit Cache Series Group Others Control Part No. Part Memory USB Function Package Code Package Supply Voltage Supply Channels Minimum Instruction Data flash/ Data Watchdog timer Watchdog ROM Type* ROM Temperature (˚C) Temperature Application Special Serial I/O Special Serial RAM (bytes) E2Data flash E2Data ROM (bytes) ROM Clock Sync./ Clock Clock Async. Clock DTC/DMACII Bus structure Operating Ambient Operating Execution Time Execution On-Chip Debug Operating Frequency/ Operating Real Time Clock Real External Interrupt Pins Interrupt External 3-Phase Inverter 3-Phase Inverter 2-Phase Encoder Clock Sync. Only Sync. Clock DMAC (channels) DMAC Basic Instructions Bus State Controller Bus State Resolution x Channels Resolution x Channels Input Only (Numbers) CMOS I/O (Numbers) Separate bus SRAM/ (8/16-bit)/ 160MHz/ R5F72394ADFP 6.25(@160MHz) 256K 32K MPX-I/O Multiplexed bus 3.0 to 3.6V SH2A- (8/16-bit) SH7239 R5F72394BDFP FPU 112 Yes 100MHz/ core 10(@100MHz) - - R5F72395BDFP 4.5V to 5.5V 11 Yes(User 512K 64K 8 (MTU2 2 R5F72395ADFP Separate bus 2 8 debug 160MHz/ 32K (4 of x 6, (shared 4 3.0 to 3.6V . F - - SRAM/ (8/16-bit)/ - 12-bit - - - (shared - - 1 1ch - - - - (NMI interface/ - -40 SH7239 (Data 6.25(@160MHz) them are DTC MPX-I/O Multiplexed bus MTU2S with 1 (SCIx3, (RSPI) 16 69 Advanced to 85 PLQP0120KA-A x 16 with SCIFx1) + IRQ 160MHz/ R5F72374ADFP flash:FLD) available (8/16-bit) x 3, MTU2) MTU2, x 7) user's General-purpose 256K 32K 3.0V to 3.6V externally) CMT MTU2S) debuggers) R5F72374BDFP x 2) 10(@100MHz) - - 100MHz/ R5F72375BDFP SH-2A - 4.5V to 5.5V SH7237 core 91 Separate bus 512K 64K SRAM/ (8/16-bit)/ 160MHz/ R5F72375ADFP 6.25(@160MHz) MPX-I/O Multiplexed bus 3.0V to 3.6V (8/16-bit) R5F72314LNBG.. -20 to 85 PLBG0256KA-B R5F72314LDBA.. 768K KEYC -40 to 85 R5F72314LNBA.. -20 Direct 12 R5F72315ANBA.. LVDS to 85 connection (MTU2 Yes(User Receiver 4 to ROM/ Separate bus x 6, 4 2 100MHz/ PRBG0272GA-A .. 25 debug I/Fx2ch, -40 R5F72315ADBA 32K SH2A- (2 of SRAM/ (8/16/32-bit)/ 10-bit 2 MTU2S (shared (shared 8 1 interface/ KEYC 3.0 to SH7231 SH7231 32KB+12KB F (Data - FPU 112 10(@100MHz) Yes - them are DTC SDRAM/ Multiplexed - - (TIM32C x 3, 1 with with 1 (SCIx4, - 1ch 1ch - - - - 22 162 (NMI 3.6(core, I/O), to 85 .. x 16 (RSPI) Advanced R5F72315LNBA flash:FLD) core available MPX-I/ bus x 2) CMT (CMT2) MTU2, MTU2, SCIFx4) + IRQ 1.65 to 1.95 or -20 to 85 x 24) user's KEYC R5F72315LDBA.. 1M externally) O/the (8/16-bit) x 2, TIM32C) MTU2S) debuggers) 3.0 to 3.6(I/O) -40 to 85 otehrs is TIM32C supported x 1) LVDS Receiver R5F72315ANBG.. -20 I/Fx2ch, PLBG0256KA-B KEYC to 85 R5F72315LNBG.. KEYC R5F72865D100FA -40 PLQP0176LB-A R5F72865D100FP to 85 PLQP0176KB-A 512K 24K R5F72865N100FA -20 PLQP0176LB-A R5F72865N100FP to 85 PLQP0176KB-A R5F72866D100FA 8 Separate bus -40 PLQP0176LB-A Direct R5F72866D100FP (4 of (8/16/32-bit)/ to 85 PLQP0176KB-A SH7286 768K them are connection Multiplexed 12-bit 8-bitx 11 1ch 14 99 R5F72866N100FA to ROM/ x 12 2 (MTU2 2 Yes(User PLQP0176LB-A available bus 2 5(SCI 9 debug -20 R5F72866N100FP externally) SRAM/ (8/16/32-bit) x 6, (shared to 85 PLQP0176KB-A 32K F - - SH-2A - - - - - (shared x 4, - - - - (NMI interface/ - 100MHz/ SH7280 core 91 10(@100MHz) DTC SDRAM/ MTU2S with with 1 SCIF 1 1 1ch + IRQ 3.0 to 5.5V R5F72867D100FA MPX-I/ x 3, MTU2, Advanced -40 PLQP0176LB-A MTU2) x 1) x 8) user's R5F72867D100FP O/the CMT MTU2S) to 85 PLQP0176KB-A 1M debuggers) R5F72867N100FA otehrs is x 2) PLQP0176LB-A supported -20 R5F72867N100FP to 85 PLQP0176KB-A R5F72855D100FP 8 Separate bus -40 to 85 512K 24K R5F72855N100FP (2 of (8/16-bit)/ -20 to 85 SH7285 them are Multiplexed 12-bit - - 10 89 PLQP0144KA-A R5F72856D100FP x 8 -40 to 85 768K 32K available bus R5F72856N100FP externally) (8/16-bit) -20 to 85 . : New product .. : Under development *F : Flash memory version, L : ROM-less version, M : Mask ROM version, O : One-time PROM version, Qz : QzROM version

SuperH RISC engine Family Selection Guide 2011.11 13 SH7243, 7210, 7080 Series External Bus Serial On-Chip Other Device Memory CPU DMA Interface Clock ADC DAC Timer Interface CAN I/O Port Debug Function Functions Cbus LCD 2 SSU/ I Ethernet (ns) FPU CPU 8-bit Input MMU USB HOST 16-bit 32-bit Cache Series Group Others Control Part No. Part Memory USB Function Package Code Package Supply Voltage Supply Channels Minimum Instruction Data flash/ Data Watchdog timer Watchdog ROM Type* ROM Temperature (˚C) Temperature Application Special Serial I/O Special Serial RAM (bytes) E2Data flash E2Data ROM (bytes) ROM Clock Sync./ Clock Clock Async. Clock DTC/DMACII Bus structure Operating Ambient Operating Execution Time Execution On-Chip Debug Operating Frequency/ Operating Real Time Clock Real External Interrupt Pins Interrupt External 3-Phase Inverter 3-Phase Inverter 2-Phase Encoder Clock Sync. Only Sync. Clock DMAC (channels) DMAC Basic Instructions Bus State Controller Bus State Resolution x Channels Resolution x Channels Input Only (Numbers) CMOS I/O (Numbers)

R5F72433D100FP 8 Direct Separate bus 11 2 3 -40 to 85 128K 8K connection to (MTU2 2 9 Yes(User Debug R5F72433N100FP (2 of (8/16-bit)/ (shared (SCI -20 to 85 F - - SH-2A 10 - - ROM/SRAM/ - 12-bit - - x 6, - (shared ------(NMI Interface)/ - 100MHz/ SH7243 SH7243 core 91 (@100MHz) them are DTC Multiplex x 8 with 1 x 2, 8 63 3.0 to 5.5V PLQP0100KB-A R5F72434D100FP available SDRAM/ bus MTU2S with MTU2, SCIF + IRQ Advanced user's -40 to 85 256K 12K externally) MPX-I/O is (8/16-bit) x 3, MTU2) MTU2S) x 1) x 8) debuggers) R5F72434N100FP supported CMTx 2) -20 to 85 Direct 11 R5F72114D160FPV 384K 24K 8 connection to Separate bus (MTU2 2 2 9 Yes(User Debug 160MHz/ (8/16-bit)/ (shared SH7210 SH7211 - - SH-2A 91 6.25 - - (4 of them - ROM/SRAM/ - 12-bit 8-bit - x 6, - (shared 1 4 - 1 ------2 73 (NMI Interface)/ - 1.4 to 1.6V, PLQP0144KA-A F core (@160MHz) are available SDRAM/ Multiplex x 8 x 2 MTU2S with with (SCIF) + IRQ Advanced user's 3.0 to -40 bus MTU2, General-purpose R5F72115D160FPV 512K 32K externally) MPX-I/O is x 3, MTU2) x 8) debuggers) 3.6V(I/O) to 85 supported (8/16-bit) CMTx 2) MTU2S) R5F70865AD80FPV SH7086 512K 32K F 10-bitx 16 118 Yes(User Debug PLQP0176KB-A R5F70865AN80FPV 16 Interface) -20 to 85 R5S70850AD80FPV -40 to 85 - L - R5S70850AN80FPV Separate bus -20 to 85 R5F70854AD80FPV (8/16/32-bit)/ Yes(User Debug -40 to 85 16K F Multiplex R5F70854AN80FPV Interface) -20 to 85 SH7085 256K bus 100 PLQP0144KA-A R5M70854ADXXXFPV (8/16/32-bit) -40 to 85 M - R5M70854ANXXXFPV -20 to 85 R5F70855AD80FPV Yes(User Debug -40 to 85 512K 32K F Yes R5F70855AN80FPV Interface) -20 to 85 R5S70840AD80FPV -40 to 85 - L - R5S70840AN80FPV -20 to 85 R5F70844AD80FPV Yes(User Debug -40 to 85 16K F R5F70844AN80FPV Interface) -20 to 85 SH7084 256K 76 PLQP0112JA-A R5M70844ADXXXFPV -40 to 85 M Direct - R5M70844ANXXXFPV connection 11 2 4 -20 to 85 (MTU2 2 9 80MHz/ R5F70845AD80FPV SH-2 12.5 4(externally to ROM/ (shared (SCI Yes(User Debug -40 to 85 SH7080 512K 32K F - - 62 - - DTC SRAM/ - - - x 6, - (shared with 1 x 3, - 1 - - - - - (NMI - 4.0 to 5.5V R5F70845AN80FPV core (@80MHz) available) MTU2S with (SSU) + IRQ Interface) or -20 to 85 SDRAM/ 10-bit MTU2, SCIF 8 MPX-I/O is x 8 x 3, MTU2) MTU2S) x 1) x 8) 3.0 to 3.6V R5S70830AD80BGV CMTx 2) -40 PLBG0112GA-A R5S70830AD80FTV supported to 85 PTQP0100KA-A - L - R5S70830AN80BGV Separate bus -20 PLBG0112GA-A R5S70830AN80FTV (8/16-bit)/ to 85 PTQP0100KA-A Multiplex R5F70834AD80BGV bus -40 PLBG0112GA-A R5F70834AD80FTV (8/16-bit) Yes(User to 85 PTQP0100KA-A 16K F Debug R5F70834AN80BGV Interface) -20 PLBG0112GA-A R5F70834AN80FTV to 85 PTQP0100KA-A SH7083 256K - 65 R5M70834ADXXXBGV -40 PLBG0112GA-A R5M70834ADXXXFTV to 85 PTQP0100KA-A M - R5M70834ANXXXBGV -20 PLBG0112GA-A R5M70834ANXXXFTV to 85 PTQP0100KA-A R5F70835AD80BGV -40 PLBG0112GA-A R5F70835AD80FTV Yes(User to 85 PTQP0100KA-A 512K 32K F Debug R5F70835AN80BGV Interface) -20 PLBG0112GA-A R5F70835AN80FTV to 85 PTQP0100KA-A . : New product .. : Under development *F : Flash memory version, L : ROM-less version, M : Mask ROM version, O : One-time PROM version, Qz : QzROM version

SuperH RISC engine Family Selection Guide 2011.11 14 SH7137, 7146 Series External Bus Serial On-Chip Other Device Memory CPU DMA Interface Clock ADC DAC Timer Interface CAN I/O Port Debug Function Functions Cbus LCD 2 SSU/ I Ethernet (ns) FPU CPU 8-bit Input MMU USB HOST 16-bit 32-bit Cache Series Group Others Control Part No. Part Memory USB Function Package Code Package Supply Voltage Supply Channels Minimum Instruction Data flash/ Data Watchdog timer Watchdog ROM Type* ROM Temperature (˚C) Temperature Application Special Serial I/O Special Serial RAM (bytes) E2Data flash E2Data ROM (bytes) ROM Clock Sync./ Clock Clock Async. Clock DTC/DMACII Bus structure Operating Ambient Operating Execution Time Execution On-Chip Debug Operating Frequency/ Operating Real Time Clock Real External Interrupt Pins Interrupt External 3-Phase Inverter 3-Phase Inverter 2-Phase Encoder Clock Sync. Only Sync. Clock DMAC (channels) DMAC Basic Instructions Bus State Controller Bus State Resolution x Channels Resolution x Channels Input Only (Numbers) CMOS I/O (Numbers) R5F71374AD80FPV ROM/ Separate bus 12-bit -40 to 85 SH7137 256K 16K 16 57 PLQP0100KB-A R5F71374AN80FPV SRAM (8-bit) x 16 Yes (User -20 to 85 11 debug R5F71364AD80FPV -40 to 85 12-bit (MTU2 2 2 5 interface) 80MHz/ SH7136 256K 16K - - x 6, (shared 12 44 PLQP0080JA-A R5F71364AN80FPV SH-2 12.5 x 12 (shared (NMI 3.0 to 3.6V -20 to 85 SH7137 F - - 62 - - - DTC - - - MTU2S - with 1 3(SCI) - 1 1 1 - - - - - R5F71323AD80FPV 128K 8K core (@80MHz) ROM/ Separate bus 12-bit with + IRQ or SH7132 x 3, MTU2) MTU2, 16 57 x 4) 4.0 to 5.5V PLQP0100KB-A R5F71324AD80FPV 256K 16K SRAM (8-bit) x 16 CMT MTU2S) -40 x 2) - R5F71313AD80FPV 128K 8K 12-bit to 85 SH7131 - - 12 44 PLQP0080JA-A R5F71314AD80FPV 256K 16K x 12 General-purpose General-purpose R5F71494AD80FPV Direct Yes (User debug -40 to 85 F DTC R5F71494AN80FPV connection Separate interface) -20 to 85 SH7149 256K 8K to ROM, bus 11 63 PLQP0100KB-A R5M71494BDXXXFPV (MTU2 2 -40 to 85 M - SRAM is (8/16-bit) 2 5 - R5M71494BNXXXFPV supported x 6, (shared -20 to 85 SH7146 - - SH-2 62 12.5 - - - - 10-bit - - MTU2S - (shared with 1 3(SCI) ------12 (NMI, - 80MHz/ R5F71464AD80FPV core (@80MHz) x 12 x 3, with MTU2, IRQ Yes (User debug 4.0 to 5.5V -40 to 85 F DTC MTU2) x 4) R5F71464AN80FPV CMT MTU2S) interface) -20 to 85 SH7146 256K 8K - - 45 PLQP0080JA-A R5M71464BDXXXFPV x 2) -40 to 85 M - - R5M71464BNXXXFPV -20 to 85 . : New product .. : Under development *F : Flash memory version, L : ROM-less version, M : Mask ROM version, O : One-time PROM version, Qz : QzROM version

SuperH RISC engine Family Selection Guide 2011.11 15 SH/Tiny Series (SH7125) External Bus Serial On-Chip Other Device Memory CPU DMA Interface Clock ADC DAC Timer Interface CAN I/O Port Debug Function Functions Cbus LCD 2 SSU/ I Ethernet (ns) FPU CPU 8-bit Input MMU USB HOST 16-bit 32-bit Cache Series Group Others Control Part No. Part Memory USB Function Package Code Package Supply Voltage Supply Channels Minimum Instruction Data flash/ Data Watchdog timer Watchdog ROM Type* ROM Temperature (˚C) Temperature Application Special Serial I/O Special Serial RAM (bytes) E2Data flash E2Data ROM (bytes) ROM Clock Sync./ Clock Clock Async. Clock DTC/DMACII Bus structure Operating Ambient Operating Execution Time Execution On-Chip Debug Operating Frequency/ Operating Real Time Clock Real External Interrupt Pins Interrupt External 3-Phase Inverter 3-Phase Inverter 2-Phase Encoder Clock Sync. Only Sync. Clock DMAC (channels) DMAC Basic Instructions Bus State Controller Bus State Resolution x Channels Resolution x Channels Input Only (Numbers) CMOS I/O (Numbers) R5F71250AD50FA PRQP0064GC-A R5F71250AD50FP -40 PLQP0064KB-A to 85 R5F71250AD50NP PVQN0064LB-A 16K 4K R5F71250AN50FA PRQP0064GC-A R5F71250AN50FP -20 PLQP0064KB-A to 85 R5F71250AN50NP PVQN0064LB-A - R5F71251AD50FA PRQP0064GC-A -40 R5F71251AD50FP to 85 PLQP0064KB-A General-purpose R5F71251AD50NP PVQN0064LB-A 32K R5F71251AN50FA PRQP0064GC-A -20 R5F71251AN50FP PLQP0064KB-A 8 2 1 to 85 R5F71251AN50NP 5(NMI, 50MHz/ PVQN0064LB-A SH7125 F - - SH-2 62 20 ------10-bit - - (MTU2 - (shared (shared 1 3(SCI) ------8 37 - core (@50MHz) x 8 x 6, with with IRQ 4.0 to 5.5V R5F71252D50FA x 4) PRQP0064GC-A CMTx 2) MTU2) MTU2) -40 R5F71252D50FP to 85 PLQP0064KB-A R5F71252D50NP PVQN0064LB-A 64K 8K R5F71252N50FA PRQP0064GC-A R5F71252N50FP -20 PLQP0064KB-A to 85 R5F71252N50NP Yes(User PVQN0064LB-A Debug R5F71253D50FA Interface) PRQP0064GC-A R5F71253D50FP -40 PLQP0064KB-A SH/Tiny to 85 (SH7125) R5F71253D50NP PVQN0064LB-A 128K R5F71253N50FA PRQP0064GC-A -20 R5F71253N50FP to 85 PLQP0064KB-A R5F71253N50NP PVQN0064LB-A R5F71240AD50FP -40 PLQP0048JA-A R5F71240AD50NP to 85 PVQN0052LE-A 16K 4K R5F71240AN50FP -20 PLQP0048JA-A R5F71240AN50NP to 85 PVQN0052LE-A - R5F71241AD50FP -40 PLQP0048JA-A R5F71241AD50NP to 85 PVQN0052LE-A 32K R5F71241AN50FP -20 PLQP0048JA-A 8 2 1 4(NMI, R5F71241AN50NP SH-2 20 10-bit (MTU2 (shared (shared 50MHz/ to 85 PVQN0052LE-A SH7124 F - - 62 ------1 2(SCI) ------8 23 IRQ - R5F71242D50FP core (@50MHz) x 8 x 6, with with x 3) 4.0 to 5.5V -40 PLQP0048JA-A CMTx 2) MTU2) MTU2) R5F71242D50NP to 85 PVQN0052LE-A 64K 8K R5F71242N50FP -20 PLQP0048JA-A R5F71242N50NP Yes(User to 85 PVQN0052LE-A Debug R5F71243D50FP Interface) -40 PLQP0048JA-A R5F71243D50NP to 85 PVQN0052LE-A 128K R5F71243N50FP -20 PLQP0048JA-A R5F71243N50NP to 85 PVQN0052LE-A . : New product .. : Under development *F : Flash memory version, L : ROM-less version, M : Mask ROM version, O : One-time PROM version, Qz : QzROM version

SuperH RISC engine Family Selection Guide 2011.11 16 SH7144, 7060, 7047 Series Device Memory CPU DMA External Bus Clock ADC DAC Timer Serial CAN I/O Port On-Chip Other Interface Interface Debug Function Functions Cbus LCD 2 SSU/ I Ethernet (ns) FPU CPU 8-bit Input MMU USB HOST 16-bit 32-bit Cache Series Group Others Control Part No. Part Memory USB Function Package Code Package Supply Voltage Supply Channels Minimum Instruction Data flash/ Data Watchdog timer Watchdog ROM Type* ROM Temperature (˚C) Temperature Application Special Serial I/O Special Serial RAM (bytes) E2Data flash E2Data ROM (bytes) ROM Clock Sync./ Clock Clock Async. Clock DTC/DMACII Bus structure Operating Ambient Operating Execution Time Execution On-Chip Debug Operating Frequency/ Operating Real Time Clock Real External Interrupt Pins Interrupt External 3-Phase Inverter 3-Phase Inverter 2-Phase Encoder Clock Sync. Only Sync. Clock DMAC (channels) DMAC Basic Instructions Bus State Controller Bus State Resolution x Channels Resolution x Channels Input Only (Numbers) CMOS I/O (Numbers) HD6417145F50V -20 to 75 - L - HD6417145FW50V -40 to 85 HD64F7145F50V 1 Yes(User Debug -20 to 75 F Separate Interface/ Advanced user's SH7145 HD64F7145FW50V 8K bus 98 -40 to 85 PLQP0144KB-A (8/16/32- debugger) HD6437145XXXF 256K bit) -20 to 75 - HD6437145XXXFW -40 to 85 M HD6437145WXXXF Direct 7 -20 to 75

General-purpose 4(two of 2 1 9 - HD6437145WXXXFW connection (MTU -40 to 85 - - SH-2 20 - - them are - 10-bit - - - (shared (shared ------(NMI, - 50MHz/ SH7144 62 DTC to ROM/ x 5, 1 4(SCI) 8 IRQ HD6417144F50V core (@50MHz) available SRAM is x 8 CMT with with 3.0 to 3.6V -20 to 75 - L externally) MTU) MTU) x 8) HD6417144FW50V supported x 2) 1 -40 HD64F7144FW50V Yes(User Debug to 85 Interface/ F Separate Advanced user's SH7144 HD64F7144F50V 8K bus 74 debugger) -20 to 75 PRQP0112JB-A (8/16-bit) HD6437144WXXXFW 256K -40 to 85 HD6437144XXXF -20 to 75 M - - HD6437144XXXFW -40 to 85 HD6437144WXXXF 1 -20 to 75 Direct 5 60MHz/3.3V HD64F7065AF60V F connection to (TPU 4 (some of PLQP0176KC-A 4(two of them Separate SH7060 SH7065 256K 8K - - SH2-DSP 182 16 - - - ROM/SRAM/ - 10-bit 8-bit - x 2, - (shared 6 1 3 ------8 110 9 - - external -20 core (@60MHz) are available DRAM/EDO bus x 8 x 2 CMT with (MMT) I/O are to 75 externally) (8/16/32-bit) HD6437065AXXXF DRAM is x 2, TPU) available PLQP0176KD-A supported MMT) at 5V) M HD6437049XXXF 50MHz/5.0V -20 to 75 SH7049 128K 8K - HD6437049XXXFW 40MHz/5.0V -40 to 85 DTC 3(SCI) HD64F7047F50V 50MHz/5.0V -20 to 75 SH7047 256K 12K F 8 Yes HD64F7047FW40V Direct (MMTx (H-UDI) 40MHz/5.0V -40 to 85 2 HD6437109XXXF connection Separate 1, 2 -20 to 75 SH7047 SH7109 128K 4K - - SH-2 62 20 - - - to ROM/ bus - 10-bit - - MTUx - (shared (MTU, 1 - - - 1 - - - - 16 53 5 - PRQP0100KB-A HD6437109XXXFW core (@50MHz) SRAM is (8-bit) x16 5, with MMT) -40 to 85 MTU) HD6437107XXXF supported CMTx -20 to 75 SH7107 64K 4K M - 2(SCI) - 50MHz/5.0V HD6437107XXXFW 2) -40 to 85 HD6437105XXXF -20 to 75 SH7105 256K 8K HD6437105XXXFW -40 to 85 . : New product .. : Under development *F : Flash memory version, L : ROM-less version, M : Mask ROM version, O : One-time PROM version, Qz : QzROM version

SuperH RISC engine Family Selection Guide 2011.11 17 SH7046 Series External Bus Serial On-Chip Other Device Memory CPU DMA Interface Clock ADC DAC Timer Interface CAN I/O Port Debug Function Functions Cbus LCD 2 SSU/ I Ethernet (ns) FPU CPU 8-bit Input MMU USB HOST 16-bit 32-bit Cache Series Group Others Control Part No. Part Memory USB Function Package Code Package Supply Voltage Supply Channels Minimum Instruction Data flash/ Data Watchdog timer Watchdog ROM Type* ROM Temperature (˚C) Temperature Application Special Serial I/O Special Serial RAM (bytes) E2Data flash E2Data ROM (bytes) ROM Clock Sync./ Clock Clock Async. Clock DTC/DMACII Bus structure Operating Ambient Operating Execution Time Execution On-Chip Debug Operating Frequency/ Operating Real Time Clock Real External Interrupt Pins Interrupt External 3-Phase Inverter 3-Phase Inverter 2-Phase Encoder Clock Sync. Only Sync. Clock DMAC (channels) DMAC Basic Instructions Bus State Controller Bus State Resolution x Channels Resolution x Channels Input Only (Numbers) CMOS I/O (Numbers) HD64F7046F50V -20 to 75 SH7046 256K 12K F HD64F7046FW50V 8(MTU -40 to 85 HD6437148RXXXF x 5, -20 to 75 SH7148 64K 4K 20 DTC 10-bit CMTx 2, 2(MTU, 50MHz/4.0 HD6437148RXXXFW (@50MHz) x 12 MMT MMT) to 5.5V -40 to 85 HD6437048XXXF x 1) -20 to 75 SH7048 128K 4K HD6437048XXXFW -40 to 85 HD6437101XXXF 2(shared 5(NMI, -20 to 75 SH7046 SH7101 32K 2K - - SH-2 62 25 ------10-bit - - 7(MTUx 5, - with 1(MTU) 1 2(SCI) ------12 42 IRQ - - 40MHz/4.0 PRQP0080JD-A HD6437101XXXFW core (@40MHz) x 8 CMTx 2) to 5.5V -40 M MTU) x 4) General-purpose HD6437108XXXFW to 85 SH7108 128K 4K HD6437108XXXF 8(MTU - -20 HD6437106XXXF x 5, to 75 SH7106 64K 4K 20 10-bit CMTx 2, 2(MTU, 50MHz/4.0 HD6437106XXXFW (@50MHz) x 12 MMT MMT) to 5.5V -40 to 85 HD6437104XXXF x 1) -20 to 75 SH7104 256K 4K HD6437104XXXFW -40 to 85 . : New product .. : Under development *F : Flash memory version, L : ROM-less version, M : Mask ROM version, O : One-time PROM version, Qz : QzROM version

SuperH RISC engine Family Selection Guide 2011.11 18 SH7040, 7010 Series External Bus Serial On-Chip Other Device Memory CPU DMA Interface Clock ADC DAC Timer Interface CAN I/O Port Debug Function Functions Cbus LCD 2 SSU/ I Ethernet (ns) FPU CPU 8-bit Input MMU USB HOST 16-bit 32-bit Cache Series Group Others Control Part No. Part Memory USB Function Package Code Package Supply Voltage Supply Channels Minimum Instruction Data flash/ Data Watchdog timer Watchdog ROM Type* ROM Temperature (˚C) Temperature Application Special Serial I/O Special Serial RAM (bytes) E2Data flash E2Data ROM (bytes) ROM Clock Sync./ Clock Clock Async. Clock DTC/DMACII Bus structure Operating Ambient Operating Execution Time Execution On-Chip Debug Operating Frequency/ Operating Real Time Clock Real External Interrupt Pins Interrupt External 3-Phase Inverter 3-Phase Inverter 2-Phase Encoder Clock Sync. Only Sync. Clock DMAC (channels) DMAC Basic Instructions Bus State Controller Bus State Resolution x Channels Resolution x Channels Input Only (Numbers) CMOS I/O (Numbers) HD64F7045F28V -20 to 75 PRQP0144KB-A F HD64F7045FI28V Separate bus -40 SH7045 256K 4K(2K)* 98 FP-144 HD6437045XXXFI (8/16/32-bit) to 85 M HD6437045XXXF -20 to 75 PRQP0144KB-A 28.7MHz/5.0V HD64F7044FI28V 35 -40 to 85 F HD64F7044F28V (@28.7MHz) Separate bus -20 to 75 SH7044 256K 4K(2K)* 74 PRQP0112JA-A HD6437044XXXFI (8/16-bit) -40 to 85 HD6437044XXXF M -20 General-purpose HD6437043AXXXF 28.7MHz/5.0V, to 75 PRQP0144KB-A HD6437043AXXXFI 16.7MHz/3.3V -40 to 85 SH7043 HD6477043AVF16V 128K 4K(2K)* 63(@16MHz) Separate bus 98 16.7MHz/3.3V -20 to 75 FP-144 (8/16/32-bit) HD6477043AFI28V O -40 to 85 28.7MHz/5.0V HD6477043AF28V 35 -20 PRQP0144KB-A HD6437042AXXXF (@28.7MHz) to 75 28.7MHz/5.0V, PRQP0112JA-A HD6437042AXXXFI 16.7MHz/3.3V -40 M HD6437042AXXXXI Direct 7 to 85 63 4(two of connection 2 1 PTQP0120LA-A HD6437042AXXXX (MTU 16.7MHz/3.3V SH7042 128K 4K(2K)* - SH-2 (@16MHz) - - them are to ROM/ Separate bus - 10-bit - - - (shared (shared 1 2 ------8 74 9 - - SH7040 1K 62 DTC (8/16-bit) x 5, with with -20 HD6477042AVF16V core available SRAM/ x 8 CMT externally) DRAM is MTU) MTU) to 75 HD6477042AF28V 35 x 2) PRQP0112JA-A O supported 28.7MHz/5.0V HD6477042AFI28V (@28.7MHz) -40 to 85 HD6477042AVX16V 63(@16MHz) 16.7MHz/3.3V PTQP0120LA-A -20 HD6417041AF28V 28.7MHz/5.0V to 75 PRQP0144KB-A HD6417041AVF16V - L 16.7MHz/3.3V Separate bus SH7041 HD6417041ACFI28V 4K(2K)* (8/16/32-bit) 98 28.7MHz/5.0V -40 FP-144 HD6437041AXXXFI 35 to 85 64K M (@28.7MHz) 28.7MHz/5.0V, HD6437041AXXXF 16.7MHz/3.3V -20 PRQP0144KB-A HD6417040AF28V to 75 28.7MHz/5.0V HD6417040AFI28V -40 to 85 - L HD6417040AVF16V 60 -20 to 75 16.7MHz/3.3V PRQP0112JA-A HD6417040AVFI16V (@16.7MHz) -40 SH7040 4K(2K)* Separate bus 74 HD6437040AXXXFI 35 (8/16-bit) 28.7MHz/5.0V, to 85 HD6437040AXXXF (@28.7MHz) 16.7MHz/3.3V -20 to 75 64K M HD6437040AXXXXI 60 -40 to 85 16.7MHz/3.3V PTQP0120LA-A HD6437040AXXXX (@16.7MHz) -20 to 75 HD64F7017FI28V 10-bit -40 to 85 SH7017 128K 4K(2K)* F x 8 PRQP0112JB-A HD64F7017F28V Direct 74 2(two of connection (Middle SH7016 HD6437016XXXF 64K 3K(1K)* M speed) 2(shared 35 them are to ROM/ Separate - - 1K (@28.7MHz) available bus(8/16-bit) with 1 2 8 7 28.7MHz/5.0V SRAM/ 10-bit MTU) HD6417014F28V externally) DRAM is 5(MTU PRQP0112JA-A - SH-2 - - - - x 8 ------SH7010 SH7014 - 3K(1K)* core 62 supported x 3, 35 -20 (High- CMTx 2) HD6417014RF28V speed) to 75 L Direct - - - connection to Separate 2(TIM1, - - - - SH7011 HD6417011VTE20V 4K 50(@20MHz) ROM/SRAM is bus(16-bit) 10-bitx 7 TIM2) 1 11 9 20MHz/3.3V PTQP0100KA-A supported . : New product .. : Under development *F : Flash memory version, L : ROM-less version, M : Mask ROM version, O : One-time PROM version, Qz : QzROM version

SuperH RISC engine Family Selection Guide 2011.11 19 SH7030, 7020 Series External Bus Serial On-Chip Other Device Memory CPU DMA Interface Clock ADC DAC Timer Interface CAN I/O Port Debug Function Functions Cbus LCD 2 SSU/ I Ethernet (ns) FPU CPU 8-bit Input MMU USB HOST 16-bit 32-bit Cache Series Group Others Control Part No. Part Memory USB Function Package Code Package Supply Voltage Supply Channels Minimum Instruction Data flash/ Data Watchdog timer Watchdog ROM Type* ROM Temperature (˚C) Temperature Application Special Serial I/O Special Serial RAM (bytes) E2Data flash E2Data ROM (bytes) ROM Clock Sync./ Clock Clock Async. Clock DTC/DMACII Bus structure Operating Ambient Operating Execution Time Execution On-Chip Debug Operating Frequency/ Operating Real Time Clock Real External Interrupt Pins Interrupt External 3-Phase Inverter 3-Phase Inverter 2-Phase Encoder Clock Sync. Only Sync. Clock DMAC (channels) DMAC Basic Instructions Bus State Controller Bus State Resolution x Channels Resolution x Channels Input Only (Numbers) CMOS I/O (Numbers) HD6417034BVF20V -20 to 75 1(shared 1(shared PRQP0112JA-A HD6417034BVFW20V - 50 with ITU) with ITU) 20MHz/3.3V -40 to 85 L (@20MHz) HD6417034BVX20V ITU - -20 PTQP0120LA-A SH7034B HD6437034BXXXF 4K 1(shared 1(shared to 75 PRQP0112JA-A HD6437034BXXXE with ITU) with ITU) -40 to 85 64K M 80 12.5MHz/3.3V HD6437034BXXXX (@12.5MHz) -20 to 75 ITU - PTQP0120LA-A HD6437034BXXXXW -40 HD6417034FI20V 50(@20MHz) 20MHz/5.0V to 85 General-purpose HD6417034VF12 80 -20 to 75 12.5MHz/3.3V PRQP0112JA-A HD6417034VFI12 - L (@12.5MHz) Direct -40 to 85 HD6417034F20V 50(@20MHz) 4(two of connection 20MHz/5.0V -20 Separate 10-bit HD6417034VX12 - - SH-1 80(@12.5MHz) - - them are - to ROM/ - - - 5(ITU) - 1 2 ------8 32 9 - - 12.5MHz/3.3V to 75 PTQP0120LA-A SH7030 core 56 available SRAM/ bus(8/16-bit) x 8 HD6437034AXXXFI externally) DRAM is -40 to 85 PRQP0112JA-A SH7034 HD6437034AXXXF 4K supported M 1 1 20MHz/5.0V, -20 HD6437034AXXXX 50 12.5MHz/3.3V to 75 (shared (shared PTQP0120LA-A HD6437034AXXXXI (@20MHz) with with -40 64K ITU) ITU) HD6477034FI20V to 85 20MHz/5.0V HD6477034F20V PRQP0112JA-A O HD6477034VF12 80(@12.5MHz) 12.5MHz/3.3V HD6477034X20V -20 PTQP0120LA-A 20MHz/5.0V to 75 HD6417032F20V 50 SH7032 HD6417032VF12V - 4K L (@20MHz) 12.5MHz/3.3V PRQP0112JA-A HD6417032FI20V 20MHz/5.0V -40 to 85 HD6437021SXXXX -20 to 75 M 20MHz/5.0V, HD6437021SXXXXI 12.5MHz/3.3V -40 SH7021 50 to 85 HD6477021X20IV 32K 1K (@20MHz) 20MHz/5.0V HD6477021VX12V O Direct 12.5MHz/3.3V 4(two of connection -20 HD6477021X20V SH-1 them are to ROM/ Separate 1(shared 1(shared 20MHz/5.0V to 75 SH7020 - - 56 ------5(ITU) - with with 1 2 ------8 32 9 - - PTQP0100KA-A HD6417020VX12IV core 80(@12.5MHz) available SRAM/ bus(8/16-bit) 12.5MHz/3.3V -40 externally) DRAM is ITU) ITU) HD6417020X20IV - L to 85 supported 20MHz/5.0V SH7020 HD6417020X20V 1K 50 -20 to 75 HD6437020SXXXXI (@20MHz) 20MHz/5.0V, -40 to 85 16K M HD6437020SXXXX 12.5MHz/3.3V -20 to 75 . : New product .. : Under development *F : Flash memory version, L : ROM-less version, M : Mask ROM version, O : One-time PROM version, Qz : QzROM version

SuperH RISC engine Family Selection Guide 2011.11 20 SH7050, 7250, 7450 Series External Bus Serial On-Chip Other Device Memory CPU DMA Interface Clock ADC DAC Timer Interface CAN I/O Port Debug Function Functions Cbus LCD 2 SSU/ I Ethernet (ns) FPU CPU 8-bit Input MMU USB HOST 16-bit 32-bit Cache Series Group Others Control Part No. Part Memory USB Function Package Code Package Supply Voltage Supply Channels Minimum Instruction Data flash/ Data Watchdog timer Watchdog ROM Type* ROM Temperature (˚C) Temperature Application Special Serial I/O Special Serial RAM (bytes) E2Data flash E2Data ROM (bytes) ROM Clock Sync./ Clock Clock Async. Clock DTC/DMACII Bus structure Operating Ambient Operating Execution Time Execution On-Chip Debug Operating Frequency/ Operating Real Time Clock Real External Interrupt Pins Interrupt External 3-Phase Inverter 3-Phase Inverter RRPROM (bytes) RRPROM 2-Phase Encoder Clock Sync. Only Sync. Clock DMAC (channels) DMAC Basic Instructions Bus State Controller Bus State Resolution x Channels Resolution x Channels Input Only (Numbers) CMOS I/O (Numbers) HD64F7055SBP40K 40MHz/3.3V PRBG0272FA-A SH7055 512K 32K 25(@40MHz) - (External I/O : 5.0V, HD64F7055SF40K Bbus : 3.3V) PRQP0256KB-A SH-2E ROM/ Separate bus 10-bit 65 -40 SH7050 R4F70580SCK80BGV - F - - 79 Yes - 4 ------1 5 - - 2 - - - - - 149 9 - - PRBG0272FA-A SH7058S 1M 48K core SRAM (8/16-bit) x 32 (ATU-II) to 125 R4F70580SCK80FPV 80MHz/3.3V 12.5(@80MHz) 2 (External I/O : 5.0V, PRQP0256KB-A R4F70590K80FPV SH7059 1.5M 80K bus : 3.3V) Power train Power R4F70590K80BGV PRBG0272FA-A 160MHz/3.3V R5F72533KFPU.. 2M 96K 6.25(@160MHz) (external I/O : 5.0V, bus : 3.3V) 66 28 5 120MHz/3.3V SH7253 32K (8(DMAC) - - 12-bit 3 2(RSPI) 2 23 89 5 PLQP0176KB-A R5F72531KFPU 8.3(@120MHz) + x 32 (Timer (Timer (ecternal I/O : 5.0V, E, G, J) A, H) bus : 3.3V) 1.25M 64K 58(A-DMAC)) 160MHz/3.3V R5F72531DKFPU SH2A- 6.25(@160MHz) (external I/O : 5.0V, SH7250 F - - 112 Yes ------1 ------Yes - -40 FPU bus : 3.3V) to +125 core R5F72543RKBGV 2M 74 32 128K (8(DMAC) SH7254R R5F72544RKBGV 2.5M (Timer 3 + 7 200MHz/3.3V .. E, G, J) R5F72546RKBGV 3.75M 256K 128K 5(@200MHz) 66(A-DMAC)) ROM/ Separate bus 12-bit 5 3(RSPI) - 144 9 PRBG0272FA-A SRAM (8/16-bit) x 37 (Timer (external I/O : 5.0V, 86 36 A, H) bus : 3.3V) SH7256R R5F72567RKBGV.. 4M 256K (8(DMAC) (Timer 4 + 78(A-DMAC)) E, G, J) 240MHz/1.5V 8K + 16K(High (internal), 3.3V, 5V, speed) SH7450 R5F74504KBG 2M 240MHz/1.5V + 512K(Middle (internal), 3.3V, speed) 12-bit 240MHz/1.5V SRAM/ x 16, (internal), 5.0V 4.1(@240MHz) Separate bus 5 142 9 PRBG0292GB-A ROM (8/16/32-bit) 12-bit Direct 240MHz/1.5V 8K + 16K(High x 8 RAM input (internal), Active safety Active SH7451 R5F74513KBG 1.5M speed) 32K(instruction), 5 4 5 interface 3.3V, 5V, 1.5V + 512K(Middle (internal), SH7450 - F - 32K(data), SH-4A 103 Yes Yes 12 Yes - - - 6 (TimerA (shared (shared 1 4 - 1 - - - - - 24 Yes Direct RAM -40 speed) 4-wayset- core (TimerG) x 12, with with output 3.3V, 1.5V to 125 associative TMUx 3) TimerF) TOU) interface (internal), 5.0V 8K + 16K(High Parallel DAC speed) control SH7455 R5F74552KBG 1M 160MHz/1.5V + 256K(Middle 12-bit (internal), speed) 6.25(@160MHz) - - x 8, 4 92 7 3.3V, 5V, 1.5V PRBG0176GA−A 8K + 16K(High 12-bit (internal), x 8 3.3V, 1.5V SH7456 R5F74562KBG.. 1M speed) + 256K(Middle (internal), 5.0V speed) . : New product .. : Under development *F : Flash memory version, L : ROM-less version, M : Mask ROM version, O : One-time PROM version, Qz : QzROM version

SuperH RISC engine Family Selection Guide 2011.11 21 SuperH Tool Tool Chain Overview

Mass Prototyping Development Production

Integrated Development Environment High-performance Embedded Workshop Flash Coding Tool Development Coding Compiler MISRA C Toolkit Package Rule Flash (with Checker Programming simulator) Software +

Debug Build Emulator System Starter Kit On-Chip Debugging Emulator E8a HS0008EASF5H E10A-USB Programmer Unit Sample Software Code Middleware Peripheral Driver Full-Spec Emulator Generator (Automatic driver E200F E6000H generator for Drivers peripheral I/O drivers) OS Flash Programmers

*A free evaluation version of the coding tool and ﬂash programming software (Flash Development Toolkit) is provided.

SuperH Family Development Tool Lineup Emulator Programming Tool MCU Real Time OS Software Tool On-Chip Debugging Full-Spec Emulator Programmer*4 Emulator SH4A-MULTI - - -

SH-4A Core HI7750/4, - E8a*5, HS0008EASF5H*5 *6 HI7700/4*1, 2 SH-4 Core HI7300/PX* C/C++ Compiler Package for SuperH Family - - 3 SH-3 Core HI7700/4*1 (An integrated development environment* , E10A-USB - - compiler and simulator are included. SH2A-DUAL HI7200/MP The emulator-debugger is bundled with the emulator.) - - SH-2A Core E200F E8a*5, HS0008EASF5H*5 *6 HI7000/4 SH-2 Core (including SH/Tiny) E200F, E6000H E8a*5, HS0008EASF5H*5 *6 *1. Compatible microcontrollers: SH-3, SH3-DSP and SH4AL-DSP *2. Compatible microcontrollers: SH-4A and SH4AL-DSP *3. The High-performance Embedded Workshop is provided as an integrated development environment. *4. This programmer is for Renesas Flash on-board microcontrollers. *5. The E8a and HS0008EASF5H are usable with the Flash Development Toolkit [R0C00000FDW04R] (Free evaluation version available). *6. The HS0008EASF5H is used together with the F-ZTAT microcontroller on-board writing program Ver. 5.0 [HS6400FWIW5SR]. *For information about microcontrollers compatible with the emulator or emulator speciﬁcations, access the website: http://www.renesas.com/emulation_debugging Compatible emulators may vary according to the microcontroller part number.

SuperH RISC engine Family Selection Guide 2011.11 22 SuperH Tool Get up and running quickly: Starter kit Visit this website for information about development environment products. Want to start evaluating the SuperH right away? The Renesas Starter Kit is just what you need. It brings together in a single package all the development tools needed for microcontroller evaluation and initial implementation. The control signals from the microcontroller are output SuperH Family Development to the expansion board interface of the CPU board, allowing connection Environment Site to the target system under development for easy debugging. http://www.renesas.com/sh_tools

Including: SuperH On-board CPU Board On-Chip Debugging Emulator E10A-USB for Starter Kit Partner Alliances Multi region power supply The Alliance Partner Program is a web system that provides Free evaluation version of the C/C++ Compiler Package (with simulator) Renesas microcontroller users with the latest information Free evaluation version of the Flash Development Toolkit about a wide variety of solutions using partner company The High-performance Embedded Workshop is provided as an integrated products and services in coordination with Renesas products. development environment. Over 700 partner companies worldwide provide development tool products and a variety of services for Renesas microcontrollers needed by Renesas customers Renesas Starter Kit for SuperH RISC engine Family for product development. Renesas will continue Target Device strengthening and expanding its coordination with partner Product Name Part Number companies in the future and prepare the optimal solutions Series Group for our customers. SH/Tiny SH/7124, SH7125 Renesas Starter Kit for SH7124 R0K571242S001BE

SH7080 SH7083, SH7084, SH7085, SH7086 Renesas Starter Kit for SH7086 R0K570865S001BE

SH7137 SH7131, SH7132, SH7136, SH7137 Renesas Starter Kit for SH7137 R0K571374S000BE

SH7201 Renesas Starter Kit for SH7201 R0K572011S001BE SH7200 SH7203 Renesas Starter Kit+ for SH7203 R0K572030S000BE

SH7210 SH7211 Renesas Starter Kit for SH7211 R0K572115S001BE

SH7216 SH7214, SH7216 Renesas Starter Kit+ for SH7216 R0K572167S000BE

SH7243, SH7280 SH7243, SH7285, SH7286 Renesas Starter Kit for SH7286 R0K572867S000BE

R0K572643S000BE (with Linux CD) SH7260 SH7262, SH7264 Renesas Starter Kit+ for SH7264 YR0K572643S000BE-L (without Linux CD)

SH7670 SH7670 Renesas Starter Kit+ for SH7670 R0K576700S000BE

Strong alliances with over 700 partner companies worldwide

Click the following URL to access information about SuperH Family compatible partner products and services. http://www.renesas.com/sh_partners

SuperH RISC engine Family Selection Guide 2011.11 23 Renesas Microcomputer SuperH RISC engine Family Selection Guide

Notes: 1. All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please confirm the latest product information with a Renesas Electronics sales office. Also, please pay regular and careful attention to additional and different information to be disclosed by Renesas Electronics such as that disclosed through our website. 2. Renesas Electronics does not assume any liability for infringement of patents, copyrights, or other intellectual property rights of third parties by or arising from the use of Renesas Electronics products or technical information described in this document. No license, express, implied or otherwise, is granted hereby under any patents, copyrights or other intellectual property rights of Renesas Electronics or others. 3. You should not alter, modify, copy, or otherwise misappropriate any Renesas Electronics product, whether in whole or in part. 4. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. You are fully responsible for the incorporation of these circuits, software, and information in the design of your equipment. Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits, software, or information. 5. When exporting the products or technology described in this document, you should comply with the applicable export control laws and regulations and follow the procedures required by such laws and regulations. You should not use Renesas Electronics products or the technology described in this document for any purpose relating to military applications or use by the military, including but not limited to the development of weapons of mass destruction. Renesas Electronics products and technology may not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any applicable domestic or foreign laws or regulations. 6. Renesas Electronics has used reasonable care in preparing the information included in this document, but Renesas Electronics does not warrant that such information is error free. Renesas Electronics assumes no liability whatsoever for any damages incurred by you resulting from errors in or omissions from the information included herein. 7. Renesas Electronics products are classified according to the following three quality grades: "Standard", "High Quality", and "Specific". The recommended applications for each Renesas Electronics product depends on the product's quality grade, as indicated below. You must check the quality grade of each Renesas Electronics product before using it in a particular application. You may not use any Renesas Electronics product for any application categorized as "Specific" without the prior written consent of Renesas Electronics. Further, you may not use any Renesas Electronics product for any application for which it is not intended without the prior written consent of Renesas Electronics. Renesas Electronics shall not be in any way liable for any damages or losses incurred by you or third parties arising from the use of any Renesas Electronics product for an application categorized as "Specific" or for which the product is not intended where you have failed to obtain the prior written consent of Renesas Electronics. The quality grade of each Renesas Electronics product is "Standard" unless otherwise expressly specified in a Renesas Electronics data sheets or data books, etc. "Standard": Computers; office equipment; communications equipment; test and measurement equipment; audio and visual equipment; home electronic appliances; machine tools; personal electronic equipment; and industrial robots. "High Quality": Transportation equipment (automobiles, trains, ships, etc.); traffic control systems; anti-disaster systems; anti-crime systems; safety equipment; and medical equipment not specifically designed for life support. "Specific": Aircraft; aerospace equipment; submersible repeaters; nuclear reactor control systems; medical equipment or systems for life support (e.g. artificial life support devices or systems), surgical implantations, or healthcare intervention (e.g. excision, etc.), and any other applications or purposes that pose a direct threat to human life. 8. You should use the Renesas Electronics products described in this document within the range specified by Renesas Electronics, especially with respect to the maximum rating, operating supply voltage range, movement power voltage range, heat radiation characteristics, installation and other product characteristics. Renesas Electronics shall have no liability for malfunctions or damages arising out of the use of Renesas Electronics products beyond such specified ranges. 9. Although Renesas Electronics endeavors to improve the quality and reliability of its products, semiconductor products have specific characteristics such as the occurrence of failure at a certain rate and malfunctions under certain use conditions. Further, Renesas Electronics products are not subject to radiation resistance design. Please be sure to implement safety measures to guard them against the possibility of physical injury, and injury or damage caused by fire in the event of the failure of a Renesas Electronics product, such as safety design for hardware and software including but not limited to redundancy, fire control and malfunction prevention, appropriate treatment for aging degradation or any other appropriate measures. Because the evaluation of microcomputer software alone is very difficult, please evaluate the safety of the final products or system manufactured by you. 10. Please contact a Renesas Electronics sales office for details as to environmental matters such as the environmental compatibility of each Renesas Electronics product. Please use Renesas Electronics products in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances, including without limitation, the EU RoHS Directive. Renesas Electronics assumes no liability for damages or losses occurring as a result of your noncompliance with applicable laws and regulations. 11. This document may not be reproduced or duplicated, in any form, in whole or in part, without prior written consent of Renesas Electronics. 12. Please contact a Renesas Electronics sales office if you have any questions regarding the information contained in this document or Renesas Electronics products, or if you have any other inquiries. (Note 1) "Renesas Electronics" as used in this document means Renesas Electronics Corporation and also includes its majority-owned subsidiaries. (Note 2) "Renesas Electronics product(s)" means any product developed or manufactured by or for Renesas Electronics.

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