SH-1/SH-2/SH-DSP Programming Manual

Total Page:16

File Type:pdf, Size:1020Kb

SH-1/SH-2/SH-DSP Programming Manual Hitachi SuperH™ RISC Engine SH-1/SH-2/SH-DSP Programming Manual ADE-602-063C Rev. 4.0 5/13/99 Hitachi ,Ltd Cautions 1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party’s rights, including intellectual property rights, in connection with use of the information contained in this document. 2. Products and product specifications may be subject to change without notice. Confirm that you have received the latest product standards or specifications before final design, purchase or use. 3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However, contact Hitachi’s sales office before using the product in an application that demands especially high quality and reliability or where its failure or malfunction may directly threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation, traffic, safety equipment or medical equipment for life support. 4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as fail-safes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product. 5. This product is not designed to be radiation resistant. 6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from Hitachi. 7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor products. Introduction The SH-1 and SH-2 incorporates a RISC (Reduced Instruction Set Computer) type CPU. A basic instruction can be executed in one clock cycle, realizing high performance operation. A built-in multiplier can execute multiplication and addition as quickly as DSP. The SH-DSP is a 32 bit microcontroller based on Hitachi’s SuperTM RISC engine that realizes the same signal processing capability as a general usage DSP (Digital Signal Processor). The SH-DSP offers an improvement on the DSP functions of multiplication and multiply and accumulate in SuperH microprocessors by using a DSP style data path function. It maintains upward compatibility at the object code level with the SH-1 and SH-2 microprocessors and has the many functions, low power usage, and low price of other SuperH microprocessors. The SH-DSP achieves high performance in processing operations by using a RISC CPU core and a DSP unit with DSP functions. This new type of single chip RISC-DSP simultaneously integrates the peripheral functions needed to build systems into the SH-DSP and provides the lower-power consumption vital to microprocessor applications. This Programming Manual describes in detail the basic architecture and instructions for the SH-1, SH2, and SH-DSP and is intended as a reference on instruction operation and architecture. It also covers the operation of pipelines, which are a feature of the SuperH microprocessor. For software development environment system, contact your Hitachi sales office. Note: SuperHTM is a trademark of Hitachi, Ltd. Contents Section 1 Features............................................................................................................. 1 1.1 SH-1 and SH-2 Features ................................................................................................... 1 1.2 SH-DSP Features ..............................................................................................................2 Section 2 Register Configuration ................................................................................. 5 2.1 General Registers.............................................................................................................. 5 2.2 Control Registers .............................................................................................................. 8 2.3 System Registers............................................................................................................... 11 2.4 DSP Registers ................................................................................................................... 12 2.5 Precautions for Handling of Guard Bit and Overflow ...................................................... 14 2.6 Initial Values of Registers................................................................................................. 14 Section 3 Data Formats ................................................................................................... 15 3.1 Data Format in Registers .................................................................................................. 15 3.2 Data Format in Memory ................................................................................................... 15 3.3 Immediate Data Format .................................................................................................... 16 3.4 DSP Type Data Formats ................................................................................................... 16 3.5 DSP Instructions and Data Formats.................................................................................. 18 3.5.1 DSP Data Processing ........................................................................................... 18 3.5.2 X and Y Data Transfers ....................................................................................... 18 3.5.3 Single Data Transfers .......................................................................................... 18 Section 4 Instruction Features ....................................................................................... 23 4.1 RISC-Type Instruction Set................................................................................................ 23 4.2 Addressing Modes ............................................................................................................ 26 4.3 Instruction Format ............................................................................................................ 29 4.4 DSP................................................................................................................................... 32 4.5 DSP Data Addressing ....................................................................................................... 33 4.5.1 X and Y Data Addressing.................................................................................... 33 4.5.2 Single Data Addressing ....................................................................................... 35 4.5.3 Modulo Addressing ............................................................................................. 36 4.5.4 DSP Addressing Operation.................................................................................. 37 4.6 Instruction Formats for DSP Instructions ......................................................................... 39 4.6.1 Double and Single Data Transfer Instructions..................................................... 39 4.6.2 Parallel Processing Instructions........................................................................... 42 4.7 ALU Fixed Decimal Point Operations.............................................................................. 46 4.7.1 Function............................................................................................................... 46 4.7.2 Instructions and Operands ................................................................................... 47 4.7.3 DC Bit.................................................................................................................. 48 i 4.7.4 Condition Bits...................................................................................................... 51 4.7.5 Overflow Prevention Function (Saturation Operation)........................................ 51 4.8 ALU Integer Operations ................................................................................................... 51 4.9 ALU Logical Operations .................................................................................................. 53 4.9.1 Function............................................................................................................... 53 4.9.2 Instructions and Operands ................................................................................... 54 4.9.3 DC Bit.................................................................................................................. 55 4.9.4 Condition Bits...................................................................................................... 55 4.10 Fixed Decimal Point Multiplication.................................................................................. 55 4.11 Shift Operations................................................................................................................ 57 4.11.1 Arithmetic Shift Operations................................................................................
Recommended publications
  • Superh RISC Engine SH-1/SH-2
    SuperH RISC Engine SH-1/SH-2 Programming Manual September 3, 1996 Hitachi America Ltd. Notice When using this document, keep the following in mind: 1. This document may, wholly or partially, be subject to change without notice. 2. All rights are reserved: No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without Hitachi’s permission. 3. Hitachi will not be held responsible for any damage to the user that may result from accidents or any other reasons during operation of the user’s unit according to this document. 4. Circuitry and other examples described herein are meant merely to indicate the characteristics and performance of Hitachi’s semiconductor products. Hitachi assumes no responsibility for any intellectual property claims or other problems that may result from applications based on the examples described herein. 5. No license is granted by implication or otherwise under any patents or other rights of any third party or Hitachi, Ltd. 6. MEDICAL APPLICATIONS: Hitachi’s products are not authorized for use in MEDICAL APPLICATIONS without the written consent of the appropriate officer of Hitachi’s sales company. Such use includes, but is not limited to, use in life support systems. Buyers of Hitachi’s products are requested to notify the relevant Hitachi sales offices when planning to use the products in MEDICAL APPLICATIONS. Introduction The SuperH RISC engine family incorporates a RISC (Reduced Instruction Set Computer) type CPU. A basic instruction can be executed in one clock cycle, realizing high performance operation. A built-in multiplier can execute multiplication and addition as quickly as DSP.
    [Show full text]
  • Superh Family Catalog 3A
    SuperH® Family of Microcontrollers and Microprocessors ® 2006.4 Renesas Technology America SuperH® Family of Microcontrollers & Microprocessors 2006 Catalog Renesas — Your Best Decision for Microcontrollers and Microprocessors Choose for your next design; use for all your future ones. Renesas Technology, the leading global supplier of microcontrollers and microprocessors for embedded systems, especially flash microcomputers, makes it easy to select the right device for any application. The hundreds of devices in our H8®, M16C™ and SuperH® families, among others, have upwardly compatible architectures and standard platforms covering wide spans of performance, integration, power efficiency and price points. Your choices extend from cost-effective 8-bit microcontrollers to high-performance 16-bit and high-end 32-bit devices. These easy-to-use chips can enable your design innovations now and in the future. Our advanced silicon solutions simplify system optimizations, facilitate design enhancements and diversifications, and help you meet tight cost budgets. Key markets for Renesas microcontrollers and microprocessors include the mobile, automotive and PC/AV fields. For example, we are a leader in devices for car information systems, the technology forerunner in application processors for multimedia mobile phones, and an innovator in devices for power inverter applications. By choosing world-class Renesas solutions, you get highly reliable designs produced in high-quality fabrication facilities, and benefit from ongoing development defined by solid technology roadmaps. You can shorten your system design cycles and improve your time-to-market by taking advantage of our total system support, including software solutions, starter kits, reference platforms, reference designs, and middleware. Expert third-party support is available as well.
    [Show full text]
  • Embedded Operating Systems
    7 Embedded Operating Systems Claudio Scordino1, Errico Guidieri1, Bruno Morelli1, Andrea Marongiu2,3, Giuseppe Tagliavini3 and Paolo Gai1 1Evidence SRL, Italy 2Swiss Federal Institute of Technology in Zurich (ETHZ), Switzerland 3University of Bologna, Italy In this chapter, we will provide a description of existing open-source operating systems (OSs) which have been analyzed with the objective of providing a porting for the reference architecture described in Chapter 2. Among the various possibilities, the ERIKA Enterprise RTOS (Real-Time Operating System) and Linux with preemption patches have been selected. A description of the porting effort on the reference architecture has also been provided. 7.1 Introduction In the past, OSs for high-performance computing (HPC) were based on custom-tailored solutions to fully exploit all performance opportunities of supercomputers. Nowadays, instead, HPC systems are being moved away from in-house OSs to more generic OS solutions like Linux. Such a trend can be observed in the TOP500 list [1] that includes the 500 most powerful supercomputers in the world, in which Linux dominates the competition. In fact, in around 20 years, Linux has been capable of conquering all the TOP500 list from scratch (for the first time in November 2017). Each manufacturer, however, still implements specific changes to the Linux OS to better exploit specific computer hardware features. This is especially true in the case of computing nodes in which lightweight kernels are used to speed up the computation. 173 174 Embedded Operating Systems Figure 7.1 Number of Linux-based supercomputers in the TOP500 list. Linux is a full-featured OS, originally designed to be used in server or desktop environments.
    [Show full text]
  • Superh TM RISC Engine High-Performance Embedded Workshop 3 User's Manual
    To our customers, Old Company Name in Catalogs and Other Documents On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the old company name remains in this document, it is a valid Renesas Electronics document. We appreciate your understanding. Renesas Electronics website: http://www.renesas.com April 1st, 2010 Renesas Electronics Corporation Issued by: Renesas Electronics Corporation (http://www.renesas.com) Send any inquiries to http://www.renesas.com/inquiry. Notice 1. All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please confirm the latest product information with a Renesas Electronics sales office. Also, please pay regular and careful attention to additional and different information to be disclosed by Renesas Electronics such as that disclosed through our website. 2. Renesas Electronics does not assume any liability for infringement of patents, copyrights, or other intellectual property rights of third parties by or arising from the use of Renesas Electronics products or technical information described in this document. No license, express, implied or otherwise, is granted hereby under any patents, copyrights or other intellectual property rights of Renesas Electronics or others. 3. You should not alter, modify, copy, or otherwise misappropriate any Renesas Electronics product, whether in whole or in part. 4. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples.
    [Show full text]
  • Solaris, HP9000 Series 700
    To our customers, Old Company Name in Catalogs and Other Documents On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the old company name remains in this document, it is a valid Renesas Electronics document. We appreciate your understanding. Renesas Electronics website: http://www.renesas.com April 1st, 2010 Renesas Electronics Corporation Issued by: Renesas Electronics Corporation (http://www.renesas.com) Send any inquiries to http://www.renesas.com/inquiry. Notice 1. All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please confirm the latest product information with a Renesas Electronics sales office. Also, please pay regular and careful attention to additional and different information to be disclosed by Renesas Electronics such as that disclosed through our website. 2. Renesas Electronics does not assume any liability for infringement of patents, copyrights, or other intellectual property rights of third parties by or arising from the use of Renesas Electronics products or technical information described in this document. No license, express, implied or otherwise, is granted hereby under any patents, copyrights or other intellectual property rights of Renesas Electronics or others. 3. You should not alter, modify, copy, or otherwise misappropriate any Renesas Electronics product, whether in whole or in part. 4. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples.
    [Show full text]
  • Embedded Configurable Operating System
    eCos Embedded Configurable Operating System Embedded Track – FOSDEM 2003 Nick Garnett – Copyright © 2003 eCosCentric Features • Open Source • Royalty Free • Highly Configurable • Very Portable • Real Time • Small Footprint • Standards • Networking Embedded Track – FOSDEM 2003 Nick Garnett – Copyright © 2003 eCosCentric History • Cygnus Solutions – 1997 Project started – 1998 First release • Red Hat – 1999 Cygnus acquired by Red Hat – 2000 RedBoot added – 2002 Red Hat lay off eCos team • eCosCentric – 2002 eCos team form eCosCentric Embedded Track – FOSDEM 2003 Nick Garnett – Copyright © 2003 eCosCentric Licensing • RHEPL – Red Hat eCos Public License – Allowed proprietary code to be linked with eCos – Required all changes to be returned to Red Hat • GPL + exception – Standard GPL – Exception allows non-GPL code to be linked with eCos – No change requirement – No “plain” GPL code allowed in eCos Embedded Track – FOSDEM 2003 Nick Garnett – Copyright © 2003 eCosCentric Configuration • Packages – Separate package for each subsystem – Independently selectable – Self describing • Component Description Language – Describes features provided by package – Describes features required by package • Inference Engine – Automatic resolution of constraints Embedded Track – FOSDEM 2003 Nick Garnett – Copyright © 2003 eCosCentric Configuration Tools • GUI Configuration Tool – wxWindows based – Linux and Windows NT/2000/XP – Includes build and test systems – Large and small scale configuration • Command line Tool – Linux and Windows (Cygwin) – Automation
    [Show full text]
  • Hitachi / Stmicroelectronic S / Superh Jv Regulation
    EN Case No COMP/M.2439 - HITACHI / STMICROELECTRONIC S / SUPERH JV Only the English text is available and authentic. REGULATION (EEC) No 4064/89 MERGER PROCEDURE Article 6(1)(b) NON-OPPOSITION Date: 03/07/2001 Also available in the CELEX database Document No 301M2439 Office for Official Publications of the European Communities L-2985 Luxembourg COMMISSION OF THE EUROPEAN COMMUNITIES Brussels, 03/07/2001 In the published version of this decision, some information has been omitted pursuant PUBLIC VERSION to Article 17(2) of Council Regulation (EEC) No 4064/89 concerning non-disclosure of business secrets and other confidential information. The omissions are shown thus MERGER PROCEDURE […]. Where possible the information omitted ARTICLE 6(1)(b) DECISION has been replaced by ranges of figures or a general description. To the notifying parties Dear Sir/Madam, Subject: Case No COMP/M.2439 – Hitachi/STMicroelectronics/SuperH JV Notification of 31 May 2001 pursuant to Article 4 of Council Regulation No 4064/891 1. On 31.05.2001, the Commission received a notification of a proposed concentration by which Hitachi, Ltd. (“Hitachi”), Japan and STMicroelectronics N.V. (“ST”), The Netherlands, acquire within the meaning of Article 3(1)(b) of the Council Regulation joint control of a newly created joint venture, SuperH, Inc (“SuperH”), USA. 2. The Commission has concluded that the notified operation falls within the scope of the Merger Regulation and does not raise serious doubts as to its compatibility with the common market. I. THE PARTIES 3. Hitachi designs, develops, manufactures and markets a wide variety of electronic products, including microcomponents, semiconductors, computers, and consumer products.
    [Show full text]
  • Highintegritysystems
    HighIntegritySystems OPENRTOS® Features & Licensing OPENRTOS® from WITTENSTEIN High Integrity Benefits of licensingOPEN RTOS Systems is the commercially supported and licensed • Removes the FreeRTOS modified GPL conditions; version of the highly successful FreeRTOSTM, the most popular kernel available for embedded • Commercial indemnification including explicit micro-controllers. exclusion of open source code; • Confidentiality; OPENRTOS has minimal ROM, RAM and processing • Professional support; overhead. Typically an OPENRTOS kernel binary image will be in the region of 4K to 9K bytes. • Support for middleware through our CONNECT OPENRTOS is also very simple to use with the core of MIDDLEWARE product. the RTOS kernel being contained in only 3 C source files. OPENRTOS is available integrated with USB, FAT and TCP/IP, providing a complete embedded platform. WITTENSTEIN High Integrity Systems email: [email protected] phone: +44 1275 395 600 web: www.highintegritysystems.com An OPENRTOS licence gives peace of mind. Microcontroller Support WITTENSTEIN takes responsibility for validating that the code is working with your chosen processor / OPENRTOS supports a wide range of ARM compiler combination and delivers a working demo Cortex-M3, Cortex-M4, Cortex-M4F and ARM7/9 project with the source code. Developers benefit microcontrollers from various manufacturers. from a 12 month warranty that covers maintenance, The list of supported microcontrollers currently updates and professional technical support. includes:- The licensee is able to maintain confidentiality • Altera NIOS II by avoiding the FreeRTOS licence requirement • Atmel AVR32, AT91 to acknowledge the kernel is being used in their • Atmel SAM3, SAM4, SAM7, SAM9 product. The licensee also gains legal protection as • Cypress PSoC5 WITTENSTEIN provides full third party IP infringement • Energy Micro EFM32 indemnification.
    [Show full text]
  • Greg Ungerer <[email protected]>
    uClinux - State of the Nation Presented by Greg Ungerer <[email protected]> SnapGear - A division of Secure Computing Corp 825 Stanley St., Woolloongabba QLD. 4102. Australia PH: +61 7 3435 2888 www.snapgear.com uClinux Pronounced "you-see-linux", the name uClinux comes from combining the greek letter "mu" and the english capital "C". "Mu" stands for "micro", and the "C" is for "controller". • Linux for processors that have no memory management • targets classic embedded 32bit micro-controllers • modifications to standard Linux kernel source © Copyright 2007, Greg Ungerer <[email protected]> History 1998 Kenneth Albanowski and D.Jeff Dione release 2.0.33 kernel for Motorola DragonBall 1999 Motorola ColdFire support 2.0.38 kernel ARM support 2000 2.4.0 test kernel support 2002 shared libraries 2.5.46 uClinux merged with mainline © Copyright 2007, Greg Ungerer <[email protected]> Status of uClinux-2.0.x separate patch, and cvs repository currently at 2.0.39 support for m68k , arm, i960, sh2, h8/300, sparc, or32, nios flat format application binaries no active development? © Copyright 2007, Greg Ungerer <[email protected]> Status of uClinux-2.4.x separate patch, and cvs repository currently at 2.4.32 support for m68k, arm, h8/300, nios, microblaze, blackfin, e1, frv, v850 forks available for sparc, mips, sh2 non-integrated mm code flat and elf_fdpic format application binaries still actively developed and used © Copyright 2007, Greg Ungerer <[email protected]> Status of uClinux-2.6.x fully merged mainline support for m68k, h8/300,
    [Show full text]
  • CPU Technologies for Networks and Multimedia 40 CPU Technologies for Networks and Multimedia
    CPU Technologies for Networks and Multimedia 40 CPU Technologies for Networks and Multimedia Kunio Uchiyama OVERVIEW: Hitachi has put the H8/300 and H8/300L series 8-bit Hirofumi Mukai microcomputers, the H8/300H, H8S/2000 and H8S/2600 series 16-bit microcomputers and the SuperH RISC engine series 32-bit microcomputer Ikuya Kawasaki into commercial production to meet the various requirements placed on Tsuguji Tachiuchi electronic appliances in the consumer product, information, communications and industrial fields. Upward compatibility is maintained throughout the H8/H8S series, from the H8/300L at the low end to the H8S/2600 model at the high end. The series includes inexpensive and reduced power consumption models with limited numbers of pins, the world’s highest level CPU core for 16-bit microcomputer performance, large amounts of on- chip flash memory and a variety of peripheral modules, and allows you to select the combination that best suits your system. The SuperH RISC engine series allows you to freely select from among CPU cores with 26 to 360 MIPS (million instructions per second) performance based on our 16-bit, fixed-length instruction RISC (reduced instruction set computer) architecture. This series includes SH2-DSP/SH3-DSP models that incorporate DSPs (digital signal processors) and vector-type FPUs (floating- point units) for which there is strong demand from the network and multimedia fields. Hitachi has also developed the SH-5 with performance in the 1,000-MIPS class and an architecture expanded to 64 bits as the next-generation processor. Hitachi has also developed middleware for voice, image, audio and communications applications, to be run mainly on the SuperH RISC engines.
    [Show full text]
  • Hitachi Microcomputer Development Environment System
    To our customers, Old Company Name in Catalogs and Other Documents On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the old company name remains in this document, it is a valid Renesas Electronics document. We appreciate your understanding. Renesas Electronics website: http://www.renesas.com April 1st, 2010 Renesas Electronics Corporation Issued by: Renesas Electronics Corporation (http://www.renesas.com) Send any inquiries to http://www.renesas.com/inquiry. Notice 1. All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please confirm the latest product information with a Renesas Electronics sales office. Also, please pay regular and careful attention to additional and different information to be disclosed by Renesas Electronics such as that disclosed through our website. 2. Renesas Electronics does not assume any liability for infringement of patents, copyrights, or other intellectual property rights of third parties by or arising from the use of Renesas Electronics products or technical information described in this document. No license, express, implied or otherwise, is granted hereby under any patents, copyrights or other intellectual property rights of Renesas Electronics or others. 3. You should not alter, modify, copy, or otherwise misappropriate any Renesas Electronics product, whether in whole or in part. 4. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples.
    [Show full text]
  • Superh (SH) 64-Bit RISC Series SH-5 CPU Core, Volume 1: Architecture
    SuperHTM (SH) 64-Bit RISC Series SH-5 CPU Core, Volume 1: Architecture Last updated 22 February 2002 SuperH, Inc. 05-CC-10001 V1.0 SH-5 CPU Core, Volume 1: Architecture ii This publication contains proprietary information of SuperH, Inc., and is not to be copied in whole or part. Issued by the SuperH Documentation Group on behalf of SuperH, Inc. Information furnished is believed to be accurate and reliable. However, SuperH, Inc. assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of SuperH, Inc. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SuperH, Inc. products are not authorized for use as critical components in life support devices or systems without the express written approval of SuperH, Inc. is a registered trademark of SuperH, Inc. SuperH is a registered trademark for products originally developed by Hitachi, Ltd. and is owned by Hitachi Ltd. © 2001 SuperH, Inc. All Rights Reserved. SuperH, Inc. San Jose, U.S.A. - Bristol, United Kingdom - Tokyo, Japan www.superh.com SuperH, Inc. SH-5 CPU Core, Volume 1: Architecture 05-CC-10001 V1.0 Contents Preface xv SuperH SH-5 document identification and control xv SuperH SH-5 CPU core documentation suite xvi 1Overview 1 1.1 Introduction 1 1.2 Instruction set architecture 2 1.2.1 SHmedia 2 1.2.2 SHcompact 5 1.2.3 Mode switch 6 1.3 CPU control and configuration 7 1.4 SH compatibility model 8 1.4.1 User-mode compatibility 8 1.4.2 Limits of compatibility 10 2 Architectural state 13 2.1 Overview 13 2.2 User and privileged operation 13 2.3 Effective addresses 13 2.4 Notation 14 SuperH, Inc.
    [Show full text]