Scanworks Interconnect Development Station Bundle

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Scanworks Interconnect Development Station Bundle SCANWORKS INTERCONNECT DEVELOPMENT STATION BUNDLE With the ScanWorks Interconnect Development Station you’ll be able to quickly and easily create JTAG or boundary-scan– based tests that verify your board has been assembled correctly. As with all ScanWorks products, the Interconnect Development Station is an easy-to-use, affordable tool that quickly solves your test problems now, but has the power to solve the most difficult test problems later when they arise. The Interconnect Development Station has the tools you’ll need to create tests that verify your printed circuit board (PCB) is free of assembly defects such as shorts and opens. It includes all of the hardware that’s needed to apply the tests to a PCB, as well as several methods for controlling the way a test is applied. And when defects are detected, the Interconnect Development Station diagnoses them, often identifying defects on a specific device pin. Generally speaking, boundary scan or JTAG verifies the assembly of a PCB by testing the connections between devices (interconnects) to determine whether interconnects work as they were designed. Effective and safe interconnect testing requires several steps. First, ScanWorks Interconnect Development Station must be installed and set up. Second, ScanWorks will help you gather and organize information that describes your PCB design. Next, you’ll use ScanWorks tools to create and verify an accurate design description. Then ScanWorks automatically generates tests or you can develop custom tests that accomplish your test goals. Once the tests are complete, Highlights • Includes all the features ScanWorks organizes them into test sequences for application during design verification or needed for basic board assembly verification with boundary-scan • Additional test and programming features easily added • Organizes and manages design and test data • Creates and applies tests to verify design descriptions and scan path integrity • Provides a simple test executive and easy-to-use APIs to apply tests • Enables easy transition to manufacturing with either a ScanWorks Manufacturing Station or an Agilent 3070 in-circuit tester manufacturing. ScanWorks’ boundary-scan tests are easily moved from stations in development for re-use in manufacturing or for PCB repair. A ScanWorks Interconnect Development Station ensures you accomplish your test goals quickly and easily. GETTING STARTED Getting started with an Interconnect Development Station is straightforward and easy. The software comes on a CD. The PCI- 100 hardware, which is bundled with the Interconnect Development Station, is simply plugged into a PCI slot in your PC and connected to the PCB to be tested. Depending on the JTAG connector pin on the PCB being tested, an adapter cable may be needed. The entire installation process is described in a video on the ScanWorks installation CD. When you start ScanWorks for the first time, ScanWorks Assistant appears to lead you through the system’s set-up process, as well as the entire test development process to the point where the test is deployed in manufacturing. ScanWorks Assistant provides quick descriptions of each step so that you know why the step is necessary and how to accomplish it. If you need them, on-line videos will show you how each step in the process works. ORGANIZING YOUR DATA Before ScanWorks can generate boundary-scan tests, it needs a description of the boundary-scan features of the design. During test generation and application, design- specific information is created. ScanWorks organizes and manages this information for you by creating a data structure of projects, designs and actions. A project is a container for designs, which include all the information about each version of your design. An action includes all the information about each test you’ve created. All of this information is compiled in a single compressed file so it can be moved easily between ScanWorks Stations for further development, board repair, or manufacture. This ScanWorks Data Management compressed file also provides a convenient method of archiving your data to protect it. DESCRIBING YOUR DESIGN ScanWorks builds a description of your design from the information you provide, including Boundary Scan Description Language (BSDL) files, CAD files of your design and models of non-boundary-scan devices. BSDL files are the only required files, but when more information is provided such as CAD data and devices models, tests can be developed and deployed much faster. Many BSDL files, flash memory models, dynamic memory models and non-boundary-scan device models are available on ASSET’s web-based model library. ScanWorks provides two methods for describing your design. If you know the boundary-scan devices and their order in the scan path it is easy to list them in the proper order and to assign the proper BSDL file to them. ScanWorks then automatically builds the required description files from this list. If the 2 Scan Path Discovery Block Diagram design is large or you don’t have the CAD files, the ScanWorks Scan Path Discovery utility can automatically discover the devices on the scan path from a netlist, determine their order, create the required description files and a block diagram of the scan path, and generate scan path verification tests. ScanWorks will accept practically any netlist format. Net lists are imported and converted to the ScanWorks’ internal format. ScanWorks also uses non-boundary-scan device information to ensure that any tests of the connections between boundary-scan and non-boundary-scan devices will be safe for the board. ScanWorks will not test any nets it is not aware of ensuring that the generated test will be safe to apply to the board. Models describe the non-boundary-scan devices’ IO characteristics. Many of the most common device models are available to ScanWorks users under maintenance contracts from ASSET’s web-based model library. If a model is not available, it can be easily created. Available Completed CREATING TESTS Action types Actions Test creation in ScanWorks is semi-automated. Each type of test is organized as an “Action”. The different types of tests include scan path verification, interconnect tests, PLD programming, I2C programming, custom tests using ScanWorks macros and Boundary Scan Language (BSL) files, Serial Vector Format (SVF) tests, plus the optional memory access verification and flash programming. Multiple actions of each type can be created and saved for each design. Each action is created through an intuitive user interface designed specifically for that action. The organization and format of the dialog box ScanWorks Actions is consistent across all actions, making them easy to learn and use. Because most of the information needed to create a test is already available in the design description, the initial test can usually be built with one click of a button. Report logs indicate any errors or warnings that must be resolved. The test developer is given options to modify the test for increased coverage or to adjust the test for special circumstances. ScanWorks’ test coverage reports help you determine where additional coverage is needed and how to implement the additional coverage. Also, tests can be applied directly from the LabView using ScanWorks Virtual Instrument Library development dialog so they can be validated 3 rapidly against the hardware. You can also set preconditions to initialize your design for testing and select the scan path for testing if more than one is available. For more information on each test type refer to the detailed descriptions below. DEPLOYMENT TO MANUFACTURING Once tests have been created, they must be organized into a logical sequence for effective PCB testing. For prototype debugging and low volume applications, ScanWorks provides a simple operator user interface to control the application of test sequences. The sequence can be automatically created from the test actions created for the design. Later, sequences can be modified to set flow control options or to change the order in which the tests are applied. ScanWorksAPI allow your tests to be easily integrated into the most prevalent test methods such as LabView, TestStand, Agilent VEE, or Visual Basic. With ScanWorks API, you can create your own sequence of actions or apply a sequence that was previously created in ScanWorks. An Interconnect Development Station can be used as a manufacturing station, but a more economical alternative would be to move the tests to the more cost-effective ScanWorks Manufacturing Station. The complete test set-up can be moved to manufacturing by exporting a single compressed file containing all the data needed for testing and then importing this file onto a manufacturing station. DIAGNOSING DEFECTS Finding defects is only half the battle. You must also be able to isolate the defect to be able to fix it and return the PCB to the manufacturing process. A ScanWorks Interconnect development Station includes several features that help isolate defects, including pin level diagnostic reports and a test results windows that can display test results vector by vector. Additional diagnostic capabilities are available as options. Graphical Fault Highlighting adds the ability to link fault reports to a graphical view of the board layout or schematic to help pinpoint the likely location of a defect. The Debugger and Interconnect Test Results Dialog Scan Analyzer interactively control scan operations at the level of a boundary-scan cell or register. These features can also create a waveform view of the test results. 4 INTERCONNECT DEVELOPMENT STATION TESTS SCAN PATH VERIFICATION TESTS Scan path verification tests are very important to effective boundary-scan testing. Before any test is applied, you should always verify that the scan path is working correctly. Scan path verification tests are created automatically by the scan path discovery tool or by a single button click in the scan path verify dialog. The test developer is presented with several options so that the test can be configured for a specific application.
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