Transistors to Integrated Circuits Howar

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Transistors to Integrated Circuits Howar Fabe Th : o t b FroLa e mTh Transistors to Integrated Circuits Howar . HufdR f International SEMATECH 2706 Montopolis Drive Austin, TX 78741 Abstract. Transistor actio experimentalls nwa y observe Johy db n Bardee Walted nan r Brattai n-typn i e polycrystalline germanium on December 16, 1947 (and subsequently polycrystalline silicon) as a result of the judicious placement of gold-plated probe tip nearbn si y single crystal polycrystallingraine th f so e material (i.e. point-contace th , t semiconductor amplifier, often point-contace referreth s a o dt t transistor).The device configuration exploite inversioe dth ne layeth s a r channel through which most of the emitted (minority) carriers were transported from the emitter to the collector. The point-contact transistor was manufactured for ten years starting in 1951 by the Western Electric Division of AT&T. The a priori tuning of the point-contact transistor parameters, however, was not simple inasmuch as the device was dependent detailee onth d surface structure and, therefore, very sensitiv humidito et temperaturd yan s welea s exhibitina l g high noise levels. Accordingly, the devices differed significantly in their characteristics and electrical instabilities leading to "burnout" were not uncommon. With the implementation of crystalline semiconductor materials in the early 1950s, however, p-n junction (bulk) transistors began replacing the point-contact transistor, silicon began replacing germanium antransfee dth transistof o r r accelerated b technologfa e th shale o t W y.b l frola revie e m th historicae wth l rout whicy eb h single crystalline materials were develope accompanyine th d dan g methodologie transistof o s r fabrication, leadine th o gt Integratee onseth f o t d Circuit (1C) era. Finally, highlight earle th y f a wil o s1e year Creviewee er th b l f o s d froe mth 256 bit through the 4M DRAM. Elements of 1C scaling and the role of Moore's Law in setting the parameters by which the 1C industry's growt monitores hwa d wil discussede lb . INTRODUCTION replacing the point-contact transistor, silicon began replacing germanium [5,7,8] and the Transistor action was experimentally transfer of transistor technology from the lab to observed by John Bardeen and Walter Brattain in acceleratedb fa e th . n-type polycrystalline germaniu n Decembemo r We shall briefly review the historical route 16, 1947 (and subsequently polycrystalline by which single crystalline materials were silicon) as a result of the judicious placement of develope e accompanyinth d an d g methodologies gold-plated probe tipn nearbi s y single crystal of bipolar transistor fabrication (i.e., grown grains of the polycrystalline material (i.e., the junction, allo diffused)d yan e oxidTh . e masking point-contact semiconductor amplifier, often and photolithographic technique of Carl Frosch e point-contacreferreth s a o t d t transistor) [1-3]. and Link Derick [9,10] and its embodiment in the e devicTh e configuration exploite e inversioth d n mesa process e utilizatioth , e silicoth f no n oxide e channelayeth s a r l through whiche mosth f o t e passivatiofoth r e silicoth f o n surfacy b e emitted (minority) carriers were presumed to be Mohammed (John) Atall colleagued aan s [11d an ] transported from the emitter to the collector. The the development of the planar silicon transistor point-contact transistor was manufactured for ten by Jean Hoerni (i.e., the planar process) [12-15] years startin e Wester th n 195i g y b 1 n Electric whereby the SiO2 masking layer, utilized in the Divisio f AT&no prioriTa e [4]Th . tunine th f go fabricatio f diffuseno d silicon transistors s leftwa , point-contact transistor parameters, however, was ie npassivatio th plac n r junctionp- fo e f o n s not simple inasmuch as the device was dependent intersecting the wafer surface set the stage for on the detailed surface structure and, therefore, MOSFET fabrication as well as the utilization of very sensitive to humidity and temperature as the dielectric layer for supporting metallic well as exhibiting high noise levels. Accordingly, conductor overlayers in the integrated circuit (1C) e deviceth s differed significantl n i theiy r era [16]. characteristic electricad an s l instabilities leading The Si-SiO2 diffusion technology, transferred from to "burnout" were not uncommon [5]. With the AT&T's Bell Telephone Laboratories (BTL) to implementation of single crystalline Shockley Semiconductor and, therefore, to Fairchild semiconductor materials in the early 1950s [3,6- Semiconductor Corporation led to the phenomenon of 8], however, p-n junction (bulk) transistors began "Silicon e creatioValley e th 1C th d industryf an "no . This manuscript was published previously in VLSI Process Integration 2003-06V P S III,EC , 15-67 (2003). CP683, Characterization and Metrology for VLSI Technology: 2003 International Conference, . SeilerDiebold. G C edite. ShaffnerD J A , . y dT b , McDonald. R , . SeculZollner. S ,M . Khosla . P E . a R d , an , © 2003 American Institute of Physics 0-7354-0152-7/03/$20.00 3 Indeed, Gordon Moore has noted "... and you are transistosilicoe th vera r ns fo y rcontroversiawa l matter once again reminded tha tlongeo n thi s i s r jusn a t at that time, althoug e importancth h f high-purito e y industry economin a t bu ,cultura d can l phenomenon, material to achieve a high rectification characteristic cruciaa modere l heare forcth th f t o tea n world" [17]. was understood. Gordon Tea notes lha d [58]: e criticaTh l rol f Joheo n Moll's n laboratori L BT t ya 1954 and the development of the oxidation, diffusion, "Bill Shockley was opposed to the work on lithography, aluminum metallizatiod an n germanium single crystals whe nI suggeste , dit thermocompression bonding techniques for the because, as he has publicly stated on several fabricatio e junctioth f o nn transistor d siliconan s - important occasions e thoughh , t that transistor controlled rectifier [18-21] conjunction i , n with Nick science could be elicited from small specimens Holonyak [22], are reviewed. of polycrystalline masses of material." oxidatioe Th n kinetic f silicoo s Brucy nb e Deal and Andy Grove [23] e explicatioth , e chargth f no e Teal, however, was a proponent of the criticality drifd an t mechanism Si-SiC>e th n si 2 syste Deamy b t e l of single-crystal materials for the electronics era, al. [24-30] and the role of Pieter Balk [31,32] in recognizing that Shockley's bipolar junction transistor emphasizing the importance of subsequent hydrogen characteristics [59-62 single-crystan ]i l germanium [63- and nitrogen annealing are briefly discussed. The mesa 66] and silicon [67,68] would be substantially better and and planar processes described abovy e pavewa e dth more reproducible than those of polycrystalline material inventioe foth r 1Jace y Cb th kf n o Kilb 195n yi 8 [33- [6-8,58]. The limited capability for the fabrication of 36] (utilizing the mesa methodology in germanium) single crystal materials further exacerbate situatione dth . Noycb andBo 195n ei 9 [37-39] (utilizin planae gth r Indeed, Shockley later realized the shortcomings in his procedure, e i.e.subsequenn th i silicon, d an ) t previous assessmen usefulnese th f o t necessitd an s f yo microprocessor era [40-42]. The critical differences single crystals [69,70]. o patentbetweetw e sth n (i.e.e interconnectioth , n Teal believed the fundamental property of a methodology e clarifiear ) y Walteb d r Runyad an n crystalline semiconductor, which would s resulit n i t Kenneth Bean [43]. technological importance, was the easily controllable 4 e th earlo e t t Th ybi 1yeare 6 Cth fro25 f so e mth and spatially variable concentration, typmobilitd ean y DRAM e theMar n reviewed [44], buildinb Bo n go of free carriers, whic indees hwa case dth efoune b o dt Dennard's one transistor cell structure [45] and [71-78]. Accordin Teao gt l [6-8,58,79-81]: associated scaling methodology [46-49]. Gordon Moore's remarkably prescient assessment that the I reasone" d that polycrystalline germanium, numbe f memoro r y bits would doubl r yeaepe r (now wits it variationh n i resistivits sit d an y take abous na months)8 1 t , enshrine Moore's da s law, randomly occurring grain boundaries, twins becam e productivitth e y criterio y whicb n e 1Cth h and crystal defects that acte s uncontrolleda d industry grew at about a 25% compound annual resistances, electron or hole emitters and traps growth rate [50-54 s illustratea ] Internationae th n di l would affect transistor operation i n Technology Roadmap for Semiconductors (ITRS) uncontrolled ways. Additionally, it seemed to [55]. More than just monitoring productivity, whether me that use of this material to produce many by staying on the productivity curve or increasing complex units mean identicale b o t , with close manufacturing effectiveness, however, is required. performance tolerances, woul inconsistente db Rather, modeling productivity—the identificatiof o n with high yields and, therefore, also with low new productivity measures—i requirew sno d [56]. costs. Even in developing complex transistor Finally, potential direction r enhancefo s d 1C devices, it seemed to me essential to have a performance ITRe th r S pe [55], briefle ar , y discussed. high-perfection, high-purity controlled These include both carrier transport mechanisme th n si composition semiconducto orden i r achievo rt e channel using variously strained structure enhanco st e a separatio f variouno s available electrod nan the carrie r w MOSFEmobilitne d an Ty device hole conduction processes in order to analyze configurations, including various vertical transistor and understan operatioe dth f thesno e devices configurations [57].
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