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HMP8117 Datasheet

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HMP8117 Datasheet HMP8117 NTSC/PAL Video Decoder NOT RECOMMENDED FOR NEW DESIGNS DATASHEET NO RECOMMENDED REPLACEMENT The HMP8117 is a high qual contact our Technical Support Center at decoder with internal A/D conv 1-888-INTERSIL or www.intersil.com/tsc NTSC M, PAL B, D, G, H, I, M,ity N, NTSC and combinationand PAL video N (N video standards. erters. It is compatible with FN4643 Rev 4.00 Both composite and S-video Features July 29, 2009 ) supported. A 2-line comb fil C • (M) NTSC and (B, D chrominance trap fil (Y/C) input formats are ter plus a user-selectable - Optional Auto Detect, G,of VideoH, I, M, Standard N, N User adjustments includeter provide brig high quality Y/C separation. - ITU-R BT.601 (CCIR601) and Square Pixel) PAL Operation Operation hue, and sharpness. C htness, contrast, saturation, • Videolyzer Feature Vertical blanking interval (VBI) data, such as Closed - Macrovision™ Bypass and Detection Captioning, Wide Screen Sig captured and output • Digital Anti-Alias Filter nalling and Teletext, may be Captioning and Wide asScreen BT.656 Signalling ancillary information data. Closed may also • Power Down Mode be read out via the I • Digital Output Formats 2C interface. The Videolyzer™ feature provides approved Macrovision - VMI Compatible copy-protection bypass and detection. - 8-bit, 16-bit 4:2:2 YCbCr - 15-bit (5, 5, 5), 16-bit (5, 6, 5) RGB Ordering Information ™ - Linear or Gamma-Corrected -8-bit BT.656 PART NUMBER • Analog Input Formats PART TEMP HMP8117CN HMP8117CNMARKING 0 to +70 80RANGE Ld PQFP - Three Analog Composite Inputs (°C) PACKAGE PKG - Analog Y/C (S-video) Input HMP8117CNZ DWG. # • “Raw” (Oversampled) VBI Data Capture (Note 1) Q80.14x20 HMP8117CNZ 0 to +70 80 (NoteLd PQFP 2) • “Sliced” VBI Data Capture Capabilities - Closed Captioning HMPVIDEVAL/ISA Evaluation Board: ISA Frame(Note Grabber 2) (NoteQ80.14x20 3) - Widescreen Signalling (WSS) NOTES: (Pb-free) - BT.653 System B, C and D Teletext 1. Intersil Pb-free plus anneal products employ special Pb-free - North American Broadcast Teletext (NABTS) sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatib - World System Teletext (WST) with both SnPb and Pb-free sol • 2-Line (1H) Comb Filter Y/C Separator products are MSL classified at Pb-free peak reflow temperaturesmaterial meet or exceed the Pb-free requirementsdering operations. of IPC/JEDEC Intersil J Pb-frSTD-020. •Fast I 2C Interface 2. PQFP is also known as QFP and MQFP. le ee • Pb-Free Plus Anneal Available (RoHS Compliant) 3. Evaluation Board descriptions a that Applications re in the Applications section • Multimedia PCs . • Video Conferencing • Video Compression Systems • Video Security Systems • LCD Projectors and Overhead Panels • Related Products - NTSC/PAL Encoders: HMP8156, HMP8170 FN4643 Rev 4.00 July 29, 2009 Page 1 of 45 July 29, 2009 FN4643 Rev 4.00 Functional Block Diagram HMP8117 SEE ANALOG FRONT END BLOCK DIAGRAM SEE DIGITAL PROCESSING BLOCK DIAGRAM EXTERNAL MACROVISION ANTI-ALIAS DETECT FILTER VBI Y Y DETECTION & OUT IN DECODING LOGIC COMPOSITE/LUMA CVBS1 INPUT CLAMP, YIN[7:0] MUX, CVBS2 ADC COARSE AGC, P[15:0] DC-RESTORE CVBS3(Y) HSYNC FINE AGC, INPUT Y/C OUTPUT OUTPUT VSYNC DC-RESTORE SEPARATION LCAP SAMPLE SAMPLE TIMING CONTROL BLANK RATE AND RATE AND USER DATA CONVERTER CONVERTER FIELD ADJUSTS FIFO DVALID CHROMA EXTERNAL C COARSE AGC CIN[7:0] VBIVALID ADC ANTI-ALIAS DC-RESTORE FILTER CCAP SYNC-TIP, BACKPORCH TIMING MICROPROCESSOR INTERFACE AND CONTROL Page 2 of 45 of 2 Page RESET INTREQ SASCL SCL July 29, 2009 FN4643 Rev 4.00 Analog Front End Block Diagram HMP8117 (EXTERNAL) (INTERNAL CLAMP) VAA 1.75V GAIN CONTROL BACKPORCH INPUT nmos + TO SET POINT ENABLE VIDEO 1.0F - MUX 13 4 # 4 TO 13 GAIN LOW-PASS 75 PIN 50A DECODER 11 CORRECTION FILTER CHROMA LOGIC (REMOVE Fsc) ATTEN 1.0F (BELOW) CHROMA MULT. FINE ADJUST MULT. FACTOR VID1 CVBS1 7 CLAMP (BELOW) 1.0F 2.5V VID2 CVBS2 TRUNCATE 6 CLAMP YOUT Y IN DIGITAL 8-BIT 13-STEP 10 M EXTERNAL 10-BIT ANTI- Y[7:0] 1.0F 2X 9 8 BUF Y_IN U VARIABLE ANTI-ALIAS ADC CVBS3(Y) ALIAS CORRECTION 5 CLAMP ATTENUATOR MULTIPLIER X FILTER FILTER 75 75 75 1.75V 1.5V 1.75V REF CHARGE PUMP DISABLE MUX 100A SELECT DISCHARGE LCAP LUMA 76 CHARGE DC-RESTORE (OFFSET LUMA SIGNAL TO LOWER ADC REF ~= 1.5V) LOGIC STORAGE 0.1F 100A CAP CHROMA SYNC-TIP ENABLE CHROMA ATTEN CHROMA INPUT MULT. 2.5V TRUNCATE 1.0F DIGITAL 8-BIT C_IN EXTERNAL 13-STEP A/D_TEST C 10-BIT 10 ANTI- C[7:0] ANTI-ALIAS 19 VARIABLE 2X 17 BUF (SIGNAL BIAS ~ 2.0V) ADC ALIAS FILTER ATTENUATOR CORRECTION 75 FILTER MULTIPLIER 1.5V 2.0V CHARGE PUMP DISABLE 100A DISCHARGE CCAP CHROMA 29 DC-RESTORE (OFFSET CHROMA SIGNAL TO ADC MID-SCALE ~= 2.0V) CHARGE STORAGE 0.1F LOGIC CAP 100A POWERDOWN SYNC-TIP ENABLE # DECODER PIN # RSET BIAS/ 28 12.1k INTERNAL REF_CAP PIN # NOMINAL (NTSC) OPERATING CONDITION PIN # NOMINAL (NTSC) OPERATING CONDITION REFERENCE 78 Page 3 of 45 of 3 Page 5 6 7 CVBSX. SIZE = INPUT. SYNC TIP CLAMPED AT ~= 1.75 VDC. 76 LCAP. DC-SIGNAL OFFSET ~= 2.4 VDC. 1.0F 9 8 YOUT/YIN. SIZE = ~1.0 VP-P, SYNC TIP OFFSET ~= 1.5 VDC. 29 CCAP. DC-SIGNAL OFFSET ~= 2.4 VDC. 19 C. SIZE = INPUT SIZE. PORCH OFFSET ~= 2.0 VDC. 28 RSET. DC-SIGNAL OFFSET ~= 1.2 VDC. 17 A/D_TEST. SIZE ~= F(LUMA AGC), PORCH OFFSET ~= 2.0VDC. 78 REF_CAP. DC-SIGNAL OFFSET ~= 2.5 VDC. July 29, 2009 FN4643 Rev 4.00 Digital Processing Block Diagram HMP8117 CLK2 FREQ SELECT HUE (24.54, 27.0 or 29.5MHz) LOCK ADJUST STATUS CHROMA CHROMA LINE LOCKED CHROMA PLL LOOP PHASE LINE LOCKED PLL LOOP PLL NCO FILTER DETECTOR NCO FILTER FIELD AND CLK2 TO VSYNC VSYNC DETECT 4FSC RATIO CHROMA TO FIFO AGC AND 4FSC SATURATION CLOCK CHROMA DATA ADJUST C[7:0] LINE U/V TO CbCr CHROMA M CHROMA U, V COLOR SPACE LP FILTER C, CVBS DELAY CbCr P[15:0] U CONVERTER, X COMB DEMOD FILTER COLOR KILLER SYNC HSYNC INPUT STRIPPER, OUTPUT SAMPLE OUTPUT BRIGHTNESS DATA VSYNC ENABLE AND TIMING RATE SAMPLE CONTRAST AND BLANK CHROMA CONVERTER ADJUST, TIMING DATA TRAP RATE FIELD RGB FIFO CONVERTER CONVERSION DVALID HORIZONTAL Y[7:0] M AND VERTICAL NORMAL M Y LUMA DATA Y VBIVALID U SHARPNESS U X ADJUST LP FILTER X SHARPNESS STANDARD VBI STATUS ADJUST FILTER SELECT SELECT VBI DETECTION AND DECODING LOGIC MACROVISION MV STATUS DETECT Page 4 of 45 of 4 Page HMP8117 Introduction Digitization of Video The HMP8117 is designed to decode baseband composite Prior to A/D conversion, the input signal is offset and scaled to or S-video NTSC and PAL signals, and convert them to known video levels. After digitization, sample rate converters either digital YCbCr or RGB data. In addition to performing and a comb filter are used to perform color separation and the basic decoding operations, these devices include demodulation. hardware to decode different types of VBI data and to A/D Conversion generate full-screen blue, black and color bar patterns. Each CVBSX video input channel has a video clamp circuit Digital PLLs are used to synchronize to all NTSC and PAL that is independent of PLL timing. The input clamp provides standards. A chroma PLL is used to maintain color lock for a coarse signal offset to position the sync tip within the A/D chroma demodulation while a line-locked PLL is used to converter sampling range so that the AGC and DC- maintain vertical spatial alignment. The PLLs are designed RESTORE logic can operate. to maintain lock in the presence of VCR head switches, VCR trick-mode and multi-path noise. A/D Conversion Video data is sampled at the CLK2 frequency then processed The HMP8117 provides the Videolyzer feature for by the input sample rate converter. The output levels of the Macrovision (MV) copy-protection bypass and detection. ADC after AGC and DC restoration processing are: External Video Processing (M) NTSC (B, D, G, H, I, NC) Before a video signal can be digitized the decoder has some (M, N) PAL PAL external processing considerations that need to be white 196 196 addressed. This section discusses those external aspects of the HMP8117. black 66 59 blank 56 59 Analog Video Inputs The HMP8117 supports either three composite or two sync 0 0 composite and one S-video input. AGC and DC Restoration Three analog video inputs (CVBS 1-3) are used to select The AGC amplifier attenuates or amplifies the analog video which one of three composite video sources are to be signal to ensure that the blank level generates code 56 or 59 decoded. To support S-video applications, the Y channel depending on the video standard. The difference from the drives the CVBS3(Y) analog input, and the C channel drives ideal blank level of 56 or 59 is used to control the amount of the C analog input. attenuation or gain of the analog video signal. To obtain a The analog inputs must be AC-coupled to the video signals, stable DC reference for the AGC, a digital low-pass filter as shown in the Applications section. removes the chroma burst from the input signal’s backporch. Anti-alias Filters DC restoration positions the video signal so that the sync tip Although a 23 tap digital halfband anti-alias filter is provided generates a code 0. The internal timing windows for AGC for each A/D channel, an external passive filter is and DC restoration are show in Figure 3.
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