About the Contributors

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Raimund Ubar is a professor of computer engineering at Tallinn Technical University and the head of Centre of Excellence for Integrated Electronic Systems and Biomedical Engineering in Estonia. R. Ubar received his PhD degree in 1971 at the Bauman Technical University in Moscow. His main research interests include computer science, electronics design, digital test, diagnostics and fault-tolerance. He has published more than 250 papers and three books, lectured as a visiting professor in more than 25 universities in about 10 countries, and served as a General Chairman for 10th European Test Con- ference, NORCHIP, BEC, EWDTC. He is a member of Estonian Academy of Sciences, Golden Core member of IEEE Computer Society and honorary professor of National University of Radioelectronics Charkiv (Ukraine). He was a chairman of Estonian Science Foundation, and a member of the Academic Advisory Board of the Estonian President.

Jaan Raik received his M.Sc. and Ph.D. degrees in Computer Engineering from Tallinn University of Technology (TUT) in 1997 and in 2001, respectively. Since 2002 he holds a position of senior research fellow at TUT. He is a member of IEEE Computer Society, a Steering Committee member of European Dependable Computing Conference and Programme Committee member for many leading conferences (DATE, ETS, DDECS, etc.). Dr. Raik has co-authored more than 100 scientific publications. In 2004, he was awarded the national Young Scientist Award. In 2005, he served as the Organisation Chair of the IEEE European Test Symposium. He has carried out research work at several foreign institutes including Darmstadt University of Technology, INPG Grenoble, Nara Institute of Science and Technology (Japan), Fraunhofer Institute of Integrated Circuits (Dresden), University of Stuttgart and University of Verona. His main research interests include high-level test generation, fault tolerant design and verification. Dr. Raik was the local project lead for the VERTIGO FP6 STREP project on verification and is the coordinator of the DIAMOND FP7 STREP project.

Heinrich Theodor Vierhaus received a diploma degree in electrical engineering from Ruhr-University Bochum (Germany) in 1975. From 1975 to 1977 he was with the German Volunteer Service (DED/ GVS), teaching electronic and RF engineering courses at the Dar-es-Salaam Technical College in Tanzania (East Africa). Later he became a research assistant at the University of Siegen Germany), where he received a doctorate (Dr.- Ing.) in microelectronics in 1983. From 1983 to 1996 he was a senior researcher with GMD, the German national research institute for information technology at St. Augustin near Bonn, where he became the acting director of the System Design Technology Institute (SET) in 1993. During this time he also served as a part-time lecturer for the University of Bonn and Darmstadt University of Technology. Since 1996 he has been a full professor for computer engineering at Brandenburg University

of Technology Cottbus. He has authored or co-authored more than 100 papers in the area of IC design and test technology. He has been a member of the IEEE for about 30 years.

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Igor Aleksejev received his M.Sc. in computer engineering from the Tallinn University of Technol- ogy, Estonia in 2008. He is employed as a researcher at Dept. of Computer Engineering of TUT. He has co-authored 8 scientific papers. His research interests include testing technologies, like Boundary Scan, Built-In Self-Test and Test Compaction topics.

Marcel Baláž graduated from the Slovak University of Technology in Bratislava (Slovakia) with the Master’s degree in Computer Engineering in 2003. He has been with the Institute of Informatics of Slovak Academy of Sciences (IISAS) since that year. From 2008 he has been the deputy leader of Design and Test research group at IISAS. Marcel is a co-author of several published papers in both design and test of integrated circuits and a co-author of a chapter in electronic system testing handbook. He has been involved in several national and international projects. He submitted his PhD thesis in Applied Informatics in February 2010.

Paolo Bernardi is an Assistant Professor in the Department of Control and Computer Engineer- ing of Politecnico di Torino (Torino, Italy). His research interests include SoC testing and diagnosis, fault-tolerant systems, and tester architectures. He has an MS (’02) and a PhD (’06), both in Computer Engineering, from Politecnico di Torino. Paolo Bernardi is recipient of the DATE 06 best paper and the EDAA PhD 06 awards; he is currently serving the technical program committee of IEEE Design Automation and Test in Europe (DATE) Conference and IEEE European Test Symposium (ETS). Paolo Bernardi is a member of IEEE and IEEE Computer Society.

Krishnendu Chakrabarty received the B. Tech. degree from the Indian Institute of Technology, Kharagpur, in 1990, and the M.S.E. and Ph.D. degrees from the University of Michigan, Ann Arbor, in 1992 and 1995, respectively. He is now Professor of Electrical and Computer Engineering at Duke University. His current research projects include testing and design-for-testability of integrated circuits, digital microfluidics and biochips, and circuits based on DNA self-assembly. Prof. Chakrabarty is a Fel- low of IEEE, a Golden Core Member of the IEEE Computer Society, and a Distinguished Engineer of ACM. He is the Editor-in-Chief for IEEE Design & Test of Computers and ACM Journal on Emerging Technologies in Computing Systems. He is an Associate Editor for IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on Circuits and Systems II, and IEEE Transactions on Biomedical Circuits and Systems. He serves as an Editor of the Journal of Electronic Testing: Theory and Applications.

Anton Chepurov received his M.Sc. in Computer Engineering from Tallinn University of Technology in 2008. He has co-authored more than 15 scientific papers. His research interests include modeling and debug of digital systems.

Adam Dabrowski is a full professor in multimedia and digital signal processing at the Department of Computing and head of the Division of Signal Processing and Electronic Systems, Poznan University

535 About the Contributors

of Technology, Poland. His scientific interests concentrate on: digital signal and image processing (filter- ing, signal separation, multirate and multidimensional systems, wavelet transformation), multimedia, biometrics, visual systems, processor architectures, and fault tolerant as well self repairing systems. He is author or co-author of 4 books and over 200 scientific papers. He was a Humboldt Foundation fellow at the Ruhr-University Bochum (Germany), visiting professor at the ETH Zurich (Switzerland), Catholic University in Leuven (Belgium), University of Kaiserslautern (Germany), and the Technical University of Berlin (Germany). He is Chairman of the Circuits & Systems (CAS) and Signal Process- ing (SP) Chapters of the Poland IEEE (The Institute of Electrical and Electronic Engineers) Section. Professor Adam Dabrowski won the IEEE Chapter of the Year Award, New York, USA. He was also awarded with the diploma for the outstanding position in the IEEE Chapter of the Year Contest (2001).

Sergei Devadze has received his M.Sc. and Ph.D. degrees in computer engineering from Tallinn University of Technology, Estonia in 2004 and 2009 respectively and currently holds the position of researcher in this university. His primary research interests embrace such topics as fault simulation, fault modeling, extended board-level test, and decomposition of finite-state machines. He is a co-author of over 30 scientific papers in the field of digital design and test published in international journals and refereed conference proceedings.

Roland Dobai received the Master’s degree in Computer Engineering from the Slovak University of Technology in Bratislava (Slovakia) in 2008. Currently he is a PhD student at the Institute of Infor- matics of the Slovak Academy of Sciences in Bratislava (Slovakia) in the field of Applied Informatics. His research is targeted at testing of asynchronous sequential digital circuits. He is a student member of the IEEE.

Rolf Drechsler received his diploma and Dr. phil. nat. degree in computer science from the J.W. Goethe-University in Frankfurt am Main, Germany, in 1992 and 1995, respectively. He was with the Institute of Computer Science at the Albert-Ludwigs-University of Freiburg im Breisgau, Germany from 1995 to 2000 and joined the Corporate Technology Department of Siemens AG, Munich in 2000. Since October 2001 he has been with the University of Bremen, Germany, where he is now a full professor for computer architecture. His research interests include data structures, logic synthesis, test and verification. Among other conferences he worked on the program committees of DAC, ICCAD, ASP-DAC, and DATE. He received a best paper award at the Forum on Design Languages (FDL) in 2007 and at the Haifa Verification Conference (HVC) in 2006.

Petru Eles received the Ph.D. degree in computer science from the Politehnica University of Bucha- rest, Romania, in 1993. He is currently a professor with the Department of Computer and Information Science at Linköping University, Sweden. His research interests include embedded systems design, hardware-software codesign, real-time systems, system specification and testing, and CAD for digital systems. He has published extensively in these areas and coauthored several books, such as “System Synthesis with VHDL” (Kluwer Academic Publishers, 1997), “System Level Design Techniques for Energy-Efficient Embedded Systems” (Kluwer Academic Publishers, 2003), “Analysis and Synthesis of Distributed Real-Time Embedded Systems” (Kluwer Academic Publishers, 2004), and “Real-Time Applications with Stochastic Task Execution Times: Analysis and Optimisation” (Springer, 2006). He was a corecipient of the Best Paper Awards at the European Design Automation Conference in 1992

536 About the Contributors

and 1994, the Design Automation and Test in Europe Conference in 2005, the International Conference on Hardware/ Software Codesign and System Synthesis in 2009, and of the Best Presentation Award at the 2003 International Conference on Hardware/ Software Codesign and System Synthesis. Petru Eles is an Associate Editor of the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, and of the IEE Proceedings - Computers and Digital Techniques. He has served as a General Chair, TPC Chair and Program Committee member for numerous international conferences in the areas of Design Automation, Embedded Systems, and Real-Time Systems. Petru Eles has served as an IEEE CAS Distinguished Lecturer for 2004 and 2005. He is a member of the IEEE and of the ACM.

Peeter Ellervee is professor at the Department of Computer Engineering at Tallinn University of Technology, Estonia. He received his Dipl.Eng. degree from Tallinn University of Technology in 1984 and PhD degree from Royal Institute of Technology (KTH), Stockholm, Sweden in 2000. He in the editorial board of Elsevier’s journal Microprocessors and Microsystems: Embedded Hardware Design (MICPRO). He has been a vice chair of Baltic Electronics Conferences 2008 & 2010, and Norchip Con- ference 2008. He is a member of the management committee of Norchip Conferences. He belongs to the program committees of International Conference on Field Programmable Logic and Applications; European Workshop on Microelectronics Education; International Conference on Advances in Circuits, Electronics and Micro-electronics; Workshop on Reconfigurable Communication-centric Systems-on- Chip; and International Symposium on System-on-Chip. He has also served as a reviewer for several major conferences and journals, such as DAC, DATE, FPL, Euromicro DSD, MICPRO, JSA, JRC, IET CDT, IEEE TE, IEEE TVLSI. He has published more than 70 internationally reviewed papers and 3 book chapters in the fields of high- and logic level synthesis, and digital systems design.

Görschwin Fey received his PhD degree from the University of Bremen, Germany. He served as a guest associate professor at the University of Tokyo, Japan in 2007 and 2008. Currently he is with the Group of Computer Architecture at the University of Bremen. His research interests are in the application of formal methods throughout the design flow of circuits and systems; a particular focus is on debugging algorithms and on the verification of robustness. He received a best paper award at the Haifa Verification Conference (HVC) in 2006.

Mária Fischerová graduated from the Faculty of Mathematics and Physics of the Comenius University in Bratislava (Slovakia) with the Master’s degree in Physics in 1979. After finishing her study she has worked as a researcher at the Design and Diagnostics of Digital Systems Department of the Institute of Informatics of Slovak Academy of Sciences and as the head of the research group in 2005. Her research interests are targeted at testing and reliability of digital systems. She is a co-author of several published papers in the field and a co-author of a chapter in electronic system testing handbook. She has been involved in several national and international projects.

Elena Gramatová graduated from the Comenius University in Bratislava, Slovakia (mathematics) and received PhD degree in the Technical Cybernetics program from the Slovak Academy of Sciences (SAS) in 1971 and 1984, respectively. She has worked at the Institute of Informatics SAS in Bratislava since 1971 for the Design and Diagnostics of Digital Systems Department. She is a member of IEEE Computer Society (from 2009 a member of the IEEE Golden Core) and the Slovak contact person of the Test Technology Technical Council. In June 2009 she has started as associate professor at the Faculty

537 About the Contributors

of Informatics and Information Technologies of the Slovak University of Technology in Bratislava. Her research and courses are targeted at testing and reliability of digital systems.

Daniel Große received his PhD degree from the University of Bremen, Germany, in 2008. Currently, he is postdoctoral researcher in the Group of Computer Architecture at the University of Bremen and on leave for a substitute professorship in Computer Architecture at the Albert-Ludwigs-University, Freiburg im Breisgau. His research interests include verification, synthesis, and high-level languages like SystemC. He received a best paper award at the Forum on Specification and Design Languages (FDL) in 2007.

Michelangelo Grosso received the MS degree in Electronic Engineering (summa cum laude) in 2004 and the PhD degree in Computers and Systems Engineering, in 2008, both from Politecnico di Torino (Torino, Italy). From 2008, he is a postdoctoral fellow at the Department of Control and Computer En- gineering of Politecnico di Torino. His research interests range from verification and test to reliability of integrated circuits and systems: they include system prototyping, Design for Testability, software-based testing, test automation, reliability characterization, online error detection and correction. He has co- authored more than 30 papers in leading conferences and journals. Michelangelo Grosso is a member of IEEE and IEEE Computer Society.

Zhiyuan He received the B.Eng. and M.Eng. degrees in Computer Science from Xi’an Jiaotong University and Tsinghua University, China, in 1998 and 2002, respectively. He received the Licentiate of Engineering degree in Computer Systems from Linkцping University, Sweden, in 2007, and he is currently pursuing a Ph.D. degree in the same university. His main research interests include electronic testing and embedded systems design. More specifically, his research covers the areas of system-onchip testing, design for testability, test scheduling, power-aware testing, temperature-aware testing, and multi-temperature testing.

Urban Ingelsson received the M.Sc. degree in Computer Science and Engineering from Linköping University, Linköping, Sweden, in 2005. In 2009, he received his Ph.D. degree in Electronics and Computer Science from the School of Electronics and Computer Science, University of Southampton, Southampton, U.K. He is currently in a Post-Doc position in the Embedded Systems Laboratory of the Department of Computer and Information Science at Linköping University, Sweden. He spent eight months of 2004 with the Digital Design and Test Group, Philips Research, Eindhoven, The Netherlands, as part of his M.Sc. thesis project. His research interests include test and diagnosis of digital systems and low-power design. Urban is a member of IEEE.

Viacheslav Izosimov (shortly Slava) is Functional Safety Systems Engineer at the Embedded In- telligent Solutions (EIS) By Semcon AB Corporation. He performs advanced consultancy work in the area of safety-critical embedded systems, functional safety and reliability. In particular, he works with ISO 26262 and IEC 61508 standards. Viacheslav defended his PhD in Computer Systems at Linköping University (LiU) in 2009. His PhD thesis entitled “Scheduling and Optimization of Fault-Tolerant Distri- buted Embedded Systems” dealt with several aspects related to design optimization and scheduling of distributed embedded systems with fault tolerance against transient and intermittent faults. During his PhD, Viacheslav was involved into the National Graduate School in Computer Science (CUGS) and the ARTES++ National Graduate School in Real-Time Systems. Viacheslav was previously awarded with

538 About the Contributors

the Licentiate Degree in Computer Systems also from Linköping University (LiU) in 2006. He received the Qualified Engineer degree in Computer Science with honour from St.Petersburg State University of Telecommunications (Russian Federation) in 2002, and the Master of Science degree in Information Processing and Telecommunications from Lappeenranta University of Technology (Finland) in 2003 (IMPIT-program). Viacheslav also received the Best Paper Award at the Design, Automation and Test in Europe Conference (DATE 2005).

Maksim Jenihhin received his M.Sc. and Ph.D. degrees in Computer Engineering from Tallinn University of Technology in 2004 and in 2008, respectively. 2004-2007 he was employed as a researcher in ELIKO Technology Development Center, Tallinn. Currently he is employed as a researcher at Dept. of computer Engineering of TUT. He has co-authored more than 30 scientific papers. His research interests include hardware functional verification and manufacturing testing topics.

Gert Jervan is a senior research fellow at the Department of Computer Engineering at Tallinn University of Technology, Estonia. He received his MSc degree from Tallinn University of Technology in 1998 and Tech. Lic. and PhD degrees from Linköping University (LIU), Sweden in 2002 and 2005, respectively. He has been a special session chair of the 2010 Diagnostic Services in Network-on-Chips workshop (co-located with DAC 2010), vice program chair of Norchip 2008, general chair of the 19th EAEEEIE Annual Conference (2008) and was one of the organizers of the DATE 2008 Friday Workshop Impact of Process Variability on Design and Test. He belongs to the program committees of the Norchip Conference, International Conference on Architecture of Computing Systems and Workshop on Low Power Design Impact on Test and Reliability. He has also served as a reviewer for several conferences and journals, such as DATE, ITC, ETS, ATS, Euromicro DSD, MICPRO, IET CDT, IEEE Trans. on VLSI, IJERTCS, Integration, the VLSI Journal, JOLPE, IEEE Trans. on Education, IEEE Trans. on CAD, Journal of Parallel and Distributed Computing and others. He has published more than 50 internationally reviewed papers and 2 book chapters in the fields of test and diagnostics of digital systems, built-in self-test, reliability and fault tolerance.

Artur Jutman received his M.Sc. and Ph.D. degrees in computer engineering from Tallinn Univer- sity of Technology (TUT), Estonia in 1999 and 2004 respectively. In 1999, he joined the Department of Computer Engineering in TUT where he is currently a Senior Researcher. His primary research interests include: board-level test, fault modeling and simulation, DFT and self-test (adding up to over 100 scientific publications). Dr. Jutman is a council member of the European Association for Education in Electrical and Information Engineering (EAEEIE) and a member of the executive committee of the Nordic Test Forum (NTF) society. He is a managing director of TUT spin-off company Testonica Lab that operates in the field of digital test.

Tobias Koal received a Bachelor degree from BTU Cottbus in 2004 and a Master degree in 2007, both in Information and Media Technology. He has been a researcher in the Computer Engineering Group since 2008 with a focus on IC self repair technologies, where he is working towards a doctorate. He also made the final design of the BTU test processor.

Zdeněk Kotásek received his MSc and PhD degrees (in 1969 and 1991) from Brno University of Technology, both in computer science. Since 1969 to 2001 he was with the Department of Computer

539 About the Contributors

Science, Brno University of Technology. Since January 1st, 2002 he has been employed at the Depart- ment of Computer Systems, Faculty of Information Technology, Brno University of Technology. He is associate professor in computer science at the same university since 2000 and the head of the Depart- ment of Computer Systems (2005). His research interests include digital circuit diagnostics and testing, digital circuit testability analysis and design and synthesis for testability. He is an IEEE member (2003).

Rene’ Kothe received his diploma degree in Computer Science from Brandenburg University of Technology Cottbus in 2004. He has worked since then as a scientific assistant for the Computer En- gineering Group at BTU. His main interest is in IC test technology, specifically low-power scan test, where he is currently working towards his doctorate.

Pavel Kubalík is assistant professor at the Department of Digital Design at Faculty of Information Technology, Czech Technical University in Prague. He performed his PhD defence (thesis with a title „Design of Self Checking Circuits Based on FPGAs“) in September 2007 at CTU in Prague. His research interests include: digital design, on-line testing methods especially for programmable hardware (FPGA), dependability computations, fault injection methods, hardware implementation of special applications for FPGAs and microprocessors. His research is granted by several sources (Grant Agency of Czech Republic - GACR, Ministry of Education, Ministry of Industry and Trade).

Hana Kubátová is associate professor and a head of the Department of Digital Design at Faculty of Information Technology, Czech Technical University in Prague. She performed her PhD defence (thesis with a title „Modified Petri Nets“) in 1987 at CTU in Prague. Her research interests include Petri nets in modeling, simulation and hierarchical digital system design, automata theory, digital design methods with respect to special properties (fault-tolerance, fail-safe, low-power), formal models of dependability and dependability parameters computation methods. She has 30 year practice in teaching and installation of subjects from the digital design area, like Structure and architecture of computers, Logical circuits, Reliability and Diagnostics, Computer Units, etc. She is a correspondent of international scientific, engineering and educational organization EUROMICRO and she has been a program chair and member of program committee’s of many conferences, e.g. DSD, ISQED, DDECS, FPL. She successfully supervised several research and educational grants.

Anders Larsson received his M.Sc degree from Halmstad University, Sweden, in 2002 and his Ph.D. from Linköping University, Sweden, in 2008. His research interest includes planning and optimization of manufacturing test for advanced system-on-chips. He has supervised several student theses and has published more than a dozen papers. Dr. Larsson spent three months as a visiting researcher at the Depart- ment of Electrical and Computer Engineering at Duke University. He is currently a design engineer at Kodgruvan AB, Sweden, working with research and development within the telecommunication industry.

Erik Larsson received his Ph.D. in 2000 and is currently Associate Professor at the Department of Computer and Information Science at Linköping University, Sweden. His current research interests include test planning for manufacturing test, test during operation (in-situ), scan-chain diagnosis, silicon debug and validation, IJTAG/SJTAG, stacked 3D chip test, fault-tolerance for MPSoCs (Multi-Processor System-on-Chip), and property checking in distributed systems (MPSOcS with Network-on-Chip (NoC)). He has more than 100 publications in these areas. He received the Institution of Engineering

540 About the Contributors

and Technology (IET) Premium Award, 2009, and the best paper award at IEEE Asian Test Symposium (ATS), 2002. He has had a number of best paper nominations. Erik Larsson is Senior member of IEEE.

Silvio Misera received his graduate engineer in electrical engineering from Brandenburg University of Technology Cottbus (Germany) in 1998. He completed his diploma’s thesis in EDISEN-electronic company developing processing modules for capacitive sensors. After this, he continued the development of electronical circuits of capacitive sensors for human machine interface in EDISEN for a couple of years. He has also a doctor degree in computer engineering from BTU Cottbus. He defends his doctoral thesis on simulation of faults in digital circuits with SystemC in 2007. Currently, he is working at the research and development department of Kjellberg Finsterwalde, Germany. His research interest includes the simulation of electrical circuits with SystemC and Spice.

Dimitar Nikolov received his Diploma Engineer degree with a major in computer science, information technology and automation from the Faculty of Electrical Engineering and Information Technolo- gies, University Ss. “Cyril & Methodius”, Skopje, Macedonia, in 2008. Currently, he is pursuing Ph.D studies at Linköping University, Linköping, Sweden. His research interests include fault tolerance in embedded systems, design and test of embedded systems.

Ondřej Novák was born in 1955 in Liberec, Czech Republic. He received his Ph.D. degree in 1987 at the Czech Technical University in Prague. Currently he is a professor of Computer Science at the Liberec Technical University. His main research interests include digital design, design for testability, low power easy testable design, test pattern compression and built-in self-testing. He has authored/co- authored several books and journal papers on electronic design and testing. His research program is currently founded by the project of the Grant Agency of the Czech Republic (GACR) No. 102/09/1668 - “SoC circuits reliability and availability improvement”. He is the general chair of the 15th ETS symposium, which will be held in Prague in 2010. He is a member of the IEEE DDECS symposium steering committee. He is a member of the IEEE, TTTC and ETTC. Currently, he is a contact person of the ETTC for the Czech Republic.

Pawel Pawlowski is assistant professor and a member of the staff of the Division of Signal Process- ing and Electronic Systems, Poznan University of Technology, Poland. He finished this University in 2000 with M.S. degree in electronics and telecommunications and in 2007 he received the Ph.D. degree in automation and robotics. In 2001 he was guest at University Kaiserslautern, in 2008 at University Cottbus, Germany. He is also visiting researcher at the University of Technology and Life Sciences in Bydgoszcz, Poland. His research interests include real-time computing with exact or controlled variable arithmetic accuracy in floating-point arithmetics, microcontrollers and video processing. He designed many measurement systems (e.g. ACCINO system for testing road restraint systems, setup for automatic testing of chips with switched capacitor filters, ultrasonic measurement system for tracking cars). He is IEEE Member, reviewer of Journal of Circuits Systems and Computers, international conferences EUROCON, SPA and author of over 60 scientific contributions.

Zebo Peng is Professor of Computer Systems, Director of the Embedded Systems Laboratory, and Chairman of the Division for Software and Systems in the Department of Computer Science, Linköping University. He received his Ph.D. in Computer Science from Linköping University in 1987. His current

541 About the Contributors

research interests include design and test of embedded systems, electronic design automation, SoC testing, fault tolerant design, hardware/software co-design, and real-time systems. He has published over 250 technical papers and four books in these areas. Prof. Peng received four best paper awards, two at the European Design Automation Conferences (EURO DAC’92 and EURO-DAC’94), one at the IEEE Asian Test Symposium (ATS’02), and one at the Design, Automation and Test in Europe Conference (DATE’05), as well as a best presentation award at the IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (2003). Two of his publications have been selected as the most influential papers of 10 years of DATE, the Design, Automation, and Test in Europe Conferen- ces. Prof. Peng serves as Associate Editor of the IEEE Transaction on VLSI Systems, the VLSI Design Journal, and the EURASIP Journal on Embedded Systems. He has served on the program committee of a dozen international conferences and workshops, including ATS, ASP-DAC, DATE, DDECS, DFT, ETS, ITSW, MEMOCDE and VLSI-SOC. He was the Program Chair of the 12th IEEE European Test Symposium (ETS 07), and the 11th Design Automation and Test in Europe Conference (DATE 08).

Paul Pop is an associate professor at the Informatics and Mathematical Modelling Dept., Technical University of Denmark. He has received his Ph.D. in Computer Systems from Linköping University, Sweden, in 2003. He is active in the area of analysis and design of real-time embedded systems, where he has published extensively and co-authored several book chapters and one book. He is the coordinator of the Danish national Safety-Critical Systems Interest Group. Paul Pop received the best paper award at the International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES 2010), Design, Automation and Test in Europe Conference (DATE 2005) and at the Real-Time in Sweden Conference (RTiS 2007).

Urmas Repinski received his M.Sc. in Computer Engineering from Tallinn University of Technology in 2010. His research interests include fault simulation and diagnosis at register-transfer and behavioral levels.

Ernesto Sánchez received his degree in Electronic Engineering from Universidad Javeriana (Bogota, Colombia) in 2000. In 2006 he received his Ph.D. degree in Computer Engineering from Politecnico di Torino (Torino, Italy), where currently he is an Assistant Professor within the Department of Control and Computer Engineering in the IV School of Engineering – Management and Industrial Engineering. His main research interests concern with the improvement and the evolution of manual and automatic methodologies for generation of test programs for processors validation, verification, and testing. These activities have been performed exploiting, among others, the Evolutionary Algorithms (EA) paradigm. Ernesto Sanchez received the “HUMIES” award for human-competitive results produced by genetic and evolutionary computation, in GECCO 2005, and the best paper award in DATE 2006. Ernesto Sanchez is a member of IEEE.

Daniel Scheit has finished his electronic engineering study in 2007. Afterwards he was a student of the Dependable Systems Class of the International Graduate School Cottbus. Since Mai 2008, he is working at the chair of computer science at the Technical University of Brandenburg. His research focus lies on integrated interconnection reliability based on reconfiguration.

542 About the Contributors

Mario Schölzel studied computer science at Brandenburg University of Technology from 1995 to 2001. He received his doctoral degree in computer science from the same university in 2006. Since 2007 he is senior researcher and teaching assistant in the computer engineering group at Brandenburg University of Technology. He published several papers in the area of the design space exploration of VLIW processors and the design of fault tolerant application specific processors. In 2010 he received the best paper award at the International IEEE Symposium on “Design and Diagnostics of Electronic Circuits & Systems”. His research interests include design space exploration of processors, compilation for parallel architectures and the design of fault tolerant systems.

Virendra Singh obtained Ph.D in Computer Science from Nara Institute of Science and Technology (NAIST), Nara, Japan in 2005. He received B.E and M.E in Electronics and Communication Engineering from Malaviya National Institute of Technology (MNIT), Jaipur, in 1995 and 1997 respectively. Cur- rently, he is a faculty member at Supercomputer Education and Research Centre (SERC), Indian Insti- tute of Science (IISc), Bangalore since May 2007. He served Central Electronics Engineering Research Institute (CEERI), Pilani (Rajasthan) India, as a Scientist for 10 years prior to join IISc. He also served as an Assistant Professor at Department of Computer Science, Banasthali University from June 1996 to March 1997. His research interests are testing and verification of high performance processors, VLSI testing, formal verification, fault tolerant computing, high performance computer architecture, embedded system design, design for reliability, hardware accelerators, and trusted computing. He is a member of the IEEE, the ACM, the VSI, and life member of the IETE. He is PC member of various conferences. He is a co-founder of IEEE annual workshop on Reliability Aware System Design and Test (RASDAT)

Jaroslav Škarvada received his MSc and PhD degrees (in 2004 and 2009) from Brno University of Technology, both in computer science. In his PhD thesis he dealt with the problem of digital systems test application optimization for low power consumption. Since 2010 he is with Red Hat, Inc.

Matteo Sonza Reorda took his MS degree in Electronic Engineering from Politecnico di Torino (Torino, Italy) in 1986, and the PhD degree in Computer Engineering from the same Institution in 1990. Since 1990 he works with the Department of Computer Engineering and Automation of Politecnico di Torino, where he is currently a Full Professor. His main research interests include Testing and Fault Tolerant design of Electronic Systems. Matteo SONZA REORDA has published more than 250 papers on international journals and conference proceedings. He is a Senior Member of IEEE. He has been the General (1998) and Program Co-chair (2002, 2003) of the IEEE International On-line Testing Symposium (IOLTS), the Program Chair of the IEEE Workshop on Design and Diagnostics of Electronic Circuits & Systems (DDECS) in 2006, and the General Chair of the IEEE European Test Symposium (ETS) in 2008. Currently, he is the chair of the European Test Technology Test Council (eTTTC).

Luca Sterpone received the M.S. degree in Computer Engineering in 2003 and the Ph.D. degree in Computer and System Engineering, in 2007, both from Politecnico di Torino, Torino, Italy. From 2007, he is a research assistant at the Department of Automation and Computer Science of Politecnico di To- rino. His research interests include fault tolerance, reliability and reconfigurable systems. He authored one book on the design of electronic systems for safety critical applications and more than 65 papers on international journals and proceedings of international conferences.

543 About the Contributors

Mihkel Tagel is a PhD student and a research fellow at the Department of Computer Engineering at Tallinn University of Technology, Estonia. He received his MSc degree from Tallinn University of Tech- nology in 2006. His PhD research topic is related to dependable network-onchip based systems-on-chip.

Roberto Urban received his diploma in computer science from Brandenburg University of Tech- nology Cottbus, Germany in 2009. For his diploma thesis, he developed a fault diagnosis method for FPGAs. Since his graduation, he is working at the chair of computer engineering of the Brandenburg University of Technology Cottbus, Germany. His current research interests are in the fields of the delay calculation and simulation of nanoscale circuits.

Mikael Väyrynen received his M.Sc. in Applied Physics and Electrical Engineering from Linköping University, Sweden, in 2009. His research interests include optimization of fault tolerance for multi- processor system-on-chip. His master thesis resulted in a paper that was nominated as best paper at Design Automation and Test Europe 2009. Mr. Väyrynen is currently a development engineer for Fondelius Control Systems developing software for embedded system where control theory and signal processing constitute the central parts of the application.

Massimo Violante received the MS (1996) and PhD (2001) from Politecnico di Torino, Torino, Italy. Since 2001 he is with the Dept. of Computer and Automation Engineering at Politecnico di Torino where he is now Assistant Professor. Massimo Violante research activities focus on the design and evaluation of mission-critical systems, with particularly emphasis on the development of tools and techniques for enabling the use of commercial-off-the-shelf (COTS) components in space. Massimo Violante leads a team of 6 persons within Politecnico di Torino, which is involved in a number of projects with several companies/agencies like Atmel, Boeing Satellite Systems, European Space Agency, and EADS. Massimo Violante authored one book on Software-Implemented Hardware Fault Tolerance, and more than 130 papers on international journals and proceedings of international conferences.

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