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Hardware-Software Codesign for Soc Hardware-Software Codesign for SoC Part of the SoC Design Flow and Tools Course Department of Computer Science & Information Engineering National Chung Cheng University Chiayi, Taiwan 1 Outline z Introduction to Hardware-Software Codesign z System Modeling, Architectures, Languages z Partitioning Methods z Design Quality Estimation z Specification Refinement z Co-synthesis Techniques z Function-Architecture Codesign Paradigm z Coverification Methodology & Tools z Codesign Case Studies – ATM Virtual Private Network – Digital Camera and JPEG 2 1 Classic Hardware/Software Design Process z Basic features of current process: – System immediately partitioned into hardware and software components – Hardware and software developed separately – “Hardware first” approach often adopted z Implications of these features: – HW/SW trade-offs restricted • Impact of HW and SW on each other cannot be assessed easily – Late system integration z Consequences of these features: – Poor quality designs – Costly modifications – Schedule slippages Misconceptions in Classic Hardware/Software Design Process z Hardware and software can be acquired separately and independently, with successful and easy integration of the two later z Hardware problems can be fixed with simple software modifications z Once operational, software rarely needs modification or maintenance z Valid and complete software requirements are easy to state and implement in code 2 Codesign Definition and Key Concepts z Co-design – The meeting of system-level objectives by exploiting the trade-offs between hardware and software in a system through their concurrent design z Key concepts – Concurrent: hardware and software developed at the same time on parallel paths – Integrated: interaction between hardware and software developments to produce designs that meet performance criteria and functional specifications Classic Design & Codesign classic design co-design HW SW HW SW 6 3 Motivations for Codesign z Co-design helps meet time-to-market because developed software can be verified much earlier. z Co-design improves overall system performance, reliability, and cost effectiveness because defects found in hardware can be corrected before tape-out. z Co-design benefits the design of embedded systems and SoCs, which need HW/SW tailored for a particular application. – Faster integration: reduced design time and cost – Better integration: lower cost and better performance – Verified integration: lesser errors and re-spins 7 Driving Factors for Codesign z Reusable Components – Instruction Set Processors – Embedded Software Components – Silicon Intellectual Properties z Hardware-software trade-offs more feasible – Reconfigurable hardware (FPGA, CPLD) – Configurable processors (Tensilica, ARM, etc.) z Transaction-Level Design and Verification – Peripheral and Bus Transactors (Bus Interface Models) – Transaction-level synthesis and verification tools z Multi-million gate capacity in a single chip z Software-rich chip systems z Growing functional complexity z Advances in computer-aided tools and technologies – Efficient C compilers for embedded processors – Efficient hardware synthesis capability 8 4 Codesign Applications z Embedded Systems & SoC – Consumer electronics – Telecommunications – Manufacturing control – Vehicles z Instruction Set Architectures – Application-specific instruction set processors. • Instructions of the CPU are also the target of design. – Dynamic compiler provides the tradeoff of HW/SW. z Reconfigurable Systems 9 Categories of Codesign Problems z Codesign of embedded systems – Usually consist of sensors, controller, and actuators – Are reactive systems – Usually have real-time constraints – Usually have dependability constraints z Codesign of ISAs – Application-specific instruction set processors (ASIPs) – Compiler and hardware optimization and trade-offs z Codesign of Reconfigurable Systems – Systems that can be personalized after manufacture for a specific application – Reconfiguration can be accomplished before execution or concurrent with execution (called evolvable systems) 10 5 The next design challenge: SoC System-on-chip – prefabricated SGS-Thomson Videophone components: IP cores DSP core 1 VLIV DSP: – great importance of (ST18950): Programmable video operations software modem std. extensions A/D z How do you design DSP core 1 High-speed H/W: & such systems? (ST18950): Video operators for DCT, inv. D/A Sound codec DCT, motion estimation MCU 1 (ASIP): Glue logic Master control MCU 2 (ASIP): Memory: Hardware I/O: Serial interface Mem. Controller Video RAM Embedded MCU 3 (ASIP): Real-time I/O: Host interface Bit manip. Software 11 Typical Codesign Process System FSM- Description Concurrent processes directed graphs (Functional) Programming languages HW/SW Unified representation Partitioning (Data/control flow) SW HW Another HW/SW Software Interface Hardware partition Synthesis Synthesis Synthesis System Instruction set level Integration HW/SW evaluation 12 6 Codesign Process z System specification z HW/SW partitioning – Architectural assumptions: • Type of processor, interface style, etc. – Partitioning objectives: • Speedup, latency requirement, silicon size, cost, etc. – Partitioning strategies: • High-level partitioning by hand, computer-aided partitioning technique, etc. z HW/SW synthesis – Operation scheduling in hardware – Instruction scheduling in compiler – Process scheduling in operating systems 13 Requirements for the Ideal Codesign Environment z Unified, unbiased hardware/software representation – Supports uniform design and analysis techniques for hardware and software – Permits system evaluation in an integrated design environment – Allows easy migration of system tasks to either hardware or software z Iterative partitioning techniques – Allow several different designs (HW/SW partitions) to be evaluated – Aid in determining best implementation for a system – Partitioning applied to modules to best meet design criteria (functionality and performance goals) 7 Requirements for the Ideal Codesign Environment (cont.) z Integrated modeling substrate – Supports evaluation at several stages of the design process – Supports step-wise development and integration of hardware and software z Validation Methodology – Insures that system implemented meets initial system requirements Cross-fertilization Between Hardware and Software Design z Fast growth in both VLSI design and software engineering has raised awareness of similarities between the two – Hardware synthesis – Programmable logic – Description languages z Explicit attempts have been made to “transfer technology” between the domains 8 Conventional Codesign Methodology Analysis of Constraints and Requirements System Specs.. HW/SW Partitioning Hardware Descript. Software Descript. HW Synth. and Interface Synthesis Software Gen. Configuration & Parameterization Configuration Hardware HW/SW Software Modules Components Interfaces Modules HW/SW Integration and Cosimulation Integrated System © IEEE 1994 System Evaluation Design Verification [Rozenblit94] Embedded System Design Process customer/ requirements definition support marketing (CAD, test, ...) specification system architect system architecture development SW development interface design HW design • application SW • SW driver dev. • HW architecture design • compilers etc. • HW interface • HW synthesis • operating syst. synthesis • physical design SW HW developer designer integration and test reused components 9 Key issues during the codesign process z Unified representation – Models – Architectures – Languages z HW/SW partitioning – Partition Algorithm – HW/SW Estimation Methods. z HW/SW co-synthesis – Interface Synthesis – Refinement of Specification 19 Models, Architectures, Languages z Introduction z Models – State, Activity, Structure, Data, Heterogeneous z Architectures – Function-Architecture, Platform-Based z Languages – Hardware: VHDL / Verilog / SystemVerilog – Software: C / C++ / Java – System: SystemC / SLDL / SDL – Verification: PSL (Sugar, OVL) 20 10 Models, Architectures, Languages INTRODUCTION 21 Design Methodologies z Capture-and-Simulate – Schematic Capture – Simulation z Describe-and-Synthesize – Hardware Description Language – Behavioral Synthesis – Logic Synthesis z Specify-Explore-Refine – Executable Specification – Hardware-Software Partitioning – Estimation and Exploration – Specification Refinement 22 11 Motivation 23 Models & Architectures Specification + Models Constraints (Specification) Design Process Implementation Architectures (Implementation) Models are conceptual views of the system’s functionality Architectures are abstract views of the system’s implementation 24 12 Behavior Vs. Architecture Performance models: Emb. SW, comm. and Models of comp. resources Computation 1 System System 2 Behavior Architecture HW/SW partitioning, Behavior Mapping Scheduling Simulation 3 Performance Simulation SW estimation Synthesis Communication Refinement 4 Flow To Implementation 25 Models of an Elevator Controller 26 13 Architectures Implementing the Elevator Controller 27 Current Abstraction Mechanisms in Hardware Systems Abstraction The level of detail contained within the system model z A system can be modeled at – System Level, – Algorithm or Instruction Set Level, – Register-Transfer Level (RTL), – Logic or Gate Level, – Circuit or Schematic Level. z A model can describe a system in the – Behavioral domain, – Structural domain, – Physical domain. 14 Abstractions in Modeling: Hardware Systems Level Behavior Structure Physical Start
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