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Thesis (2.317Mb) MULTICORE SYSTEM ON CHIP ELECTROCARDIOGRAPHY BY ALIU SUNDAY JOHN COMPUTER SCIENCE DEPARTMENT AFRICAN UNIVERSITY OF SCIENCE AND TECHNOLOGY, ABUJA NIGERIA IN PARTIAL FULFILMENT OF THE REQUIREMENTS FOR THE AWARD OF MASTERS OF SCIENCE DEGREE IN COMPUTER SCIENCE AND ENGINEERING December 2010. 1 ABSTRACT Basically electrocardiography is a commonly used, non-invasive procedure for recording electrical changes in the heart. The record, which is called an electrocardiogram (ECG or EKG), shows the series of waves that relate to the electrical impulses which occur during each beat of the heart. The results are printed on paper or displayed on a monitor. The waves in a normal record are named P, Q, R, S, T, U and follow in alphabetical order. This research exploits the technology of parallel processing to process the electrocardiography computational kernels in parallel. The idea we are presenting is to implement the traditional multi lead bulky electrocardiogram on a programmable chip which is small and more efficient. The technology is implemented on an FPGA (Target device is Altera Stratix III EP3SL50F484C2) based on Multicore System on Chip. The Logic Utilization for one-lead system which is scalable to multi lead after compilation was 43%, combinational ALUTs 9669/38000 (25%), Memory ALUTs 16/19000 (<1%), Total registers 11583/38000 (30%) and total thermal power dissipation of 463.86mW . 2 ACKNOWLEDGEMENT I want to most importantly acknowledge God for the grace to have sailed through this journey at the African University of Science and Technology in the last 18 months. To God be all the glory. I must also appreciate those behind the idea of African University of Science and Technology and the general administration of the University. They are the giants on whose shoulders I have been standing in AUST. I must not fail to acknowledge my thesis supervisor Professor Ben Abdallah Abderazek, of the University of Aizu Japan whose encouragement and support have been most helpful in the production of this thesis work. I deeply thank Professor Ben Abdallah Abderazek, for without him this thesis would not have exixted. I know there are better days ahead for us. I want to also appreciate every student of the African University of Science and Technology especially the 2009/2010 session. Its been a journey of a lifetime. Years coming till the end of our sojourn I will continue to remember the great times we had. There has never been such a brotherhood in my history before boarding the AUST flight. 3 TABLE OF CONTENTS Page Title Page …...........................................................................................................................1 Abstract..................................................................................................................................2 Acknowledgement..................................................................................................................3 Table of Contents...................................................................................................................7 List of Figures.........................................................................................................................8 List of Tables...........................................................................................................................9 Chapter One: Introduction..................................................................................................10 1.0 Introduction.........................................................................................................10 1.1 Purpose of the research work...............................................................................11 1.2 Background..........................................................................................................11 1.3 Scope of work.......................................................................................................12. Chapter Two: Literature review..........................................................................................13 2.0 Electrocardiography and heart disease.................................................................13 2.1 Digital signal processing.......................................................................................17 2.1.1 Analog and digital signals......................................................................17 2.1.2 Signal processing....................................................................................18 2.1.3 Analog to digital conversion...................................................................18 2.1.4 Sampling..................................................................................................19 2.1.5 Quantization error...................................................................................20 2.1.6 Sampling rate..........................................................................................20 2.1.7 Oversampling..........................................................................................21 2.1.8 Aliasing...................................................................................................21 4 2.1.9 ADC structures.......................................................................................22 2.1.10 Autocorrelation function.......................................................................27 2.2 Digital filters.....................................................................................................28 2.2.1 Analysis techniques............................................................................29 2.2.2 Impulse response................................................................................30 2.2.3 Difference equation............................................................................30 2.2.4 Filter design.......................................................................................31 2.2.5 Filter realization.................................................................................33 2.2.5.1 Direct form I...................................................................................34 2.2.5.2 Direct form II.................................................................................34 2.3 Programmable Logic Devices..........................................................................35 2.3.1 Programmable Array Logic (PAL)....................................................37 2.3.2 Programmable Logic Array (PLA)....................................................37 2.3.3 Generic Array Logic (GAL)..............................................................38 2.3.4 Complex Programmable Logic devices (CPLD)...............................39 2.4 Field Programmable Gate Array (FPGA).........................................................40 2.4.1 History of FPGA................................................................................41 2.4.2 Modern development.........................................................................42 2.4.3 Architecture........................................................................................43 2.4.4 FPGA design and programming.........................................................45 2.5 Multicore system on chip.................................................................................46 2.5.1 Structure............................................................................................47 2.5.2 Design flow.......................................................................................47 2.6 Electronic design automation (EDA) tools......................................................49 2.6.1 System on programmable chip (SOPC) builder................................50 2.6.2 Nios II processor................................................................................50 5 2.6.3 Hardware description Language (HDL)............................................51 Chapter three: Analysis and Design......................................................................................53 3.0 Peak period detection algorithm.............................................................................53 3.1 Period detection.....................................................................................................53 3.1.1 Reading data............................................................................................54 3.1.2 Derivation................................................................................................55 3.1.3 Autocorrelation........................................................................................60 3.1.4 Finding intervals......................................................................................70 3.2 Digital finite impulse response filter design FIR...................................................70 3.3 System architecture.................................................................................................71 3.3.1 Reading data section................................................................................72 3.3.2 Filtering and data analysis section...........................................................73 3.3.3 Display section.........................................................................................74 Chapter four : Implementation and results..........................................................................75 4.0 SOPC builder system generation and quartus II compilation.................................75 4.1 Quartus II compilation of the entire
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