EE 330 Lecture 16
Devices in Semiconductor Processes
• Capacitors • MOSFETs Review from Last Lecture Diode Models
Diode Characteristics Diode Characteristics 0.01
0.008 0.01 0.008 0.006 0.006 0.004 Id (amps) 0.004
0.002 Id (amps) 0.002 0 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 Vd (volts) Vd (volts)
ID
VD
Which model should be used?
The simplest model that will give acceptable results in the analysis of a circuit Use of Piecewise Models for Nonlinear Devices when Analyzing Electronic Circuits Process: 1. Guess state of the device 2. Analyze circuit 3. Verify State 4. Repeat steps 1 to 3 if verification fails 5. Verify model (if necessary) Observations: o Analysis generally simplified dramatically (particularly if piecewise model is linear) o Approach applicable to wide variety of nonlinear devices o Closed-form solutions give insight into performance of circuit Review from Last Lecture Last from Review o Usually much faster than solving the nonlinear circuit directly o Wrong guesses in the state of the device do not compromise solution (verification will fail) o Helps to guess right the first time o Detailed model is often not necessary with most nonlinear devices o Particularly useful if piecewise model is PWL (but not necessary) o For practical circuits, the simplified approach usually applies Key Concept For Analyzing Circuits with Nonlinear Devices Review from Last Lecture Types of Diodes
pn junction diodes
Id I Id Id d Id Id
Vd Vd Vd Vd Vd Vd
Pin or Light Emitting Signal or Zener Varactor or Rectifier Photo LED Varicap Laser Diode Metal-semiconductor junction diodes
Id Id Id
Vd Vd Vd
Schottky Barrier Basic Devices and Device Models
• Resistor • Diode • Capacitor • MOSFET • BJT Capacitors
• Types – Parallel Plate – Fringe – Junction Parallel Plate Capacitors
A2 C A1 cond1 cond2
d
insulator
A = area of intersection of A1 & A2 One (top) plate intentionally sized smaller to determine C A C d Parallel Plate Capacitors
Cap If C d unit area ε A C d
C CdA where ε C d d Fringe Capacitors C
d
ε A C d
A is the area where the two plates are parallel
Only a single layer is needed to make fringe capacitors Fringe Capacitors
C Capacitance Junction Capacitor
C V p D d d n depletion A region C d is dielectric constant Note: d is voltage dependent -capacitance is voltage dependent C A φ -usually parasitic caps C jo for V B n FB 2 -varicaps or varactor diodes exploit VD 1 voltage dep. of C φB
φB 0.6V n ; 0.5 Capacitance Junction Capacitor C
1.6 CAj0
1.4
1.2
1 0.8 VD 0.6
0.4
0.2 VD 0 -4 -3 -2 -1 0 1 C A φ C jo for V B n FB 2 VD 1 φB Voltage dependence is substantial
φB 0.6V n ; 0.5 Basic Devices and Device Models
• Resistor • Diode • Capacitor • MOSFET • BJT Drain
Summary of Existing Models (for n-channel) Gate
Source 1. Switch-Level model D D
G = 0 G = 1
S S
2. Improved switch-level model
G D
RSW Switch closed for |VGS|= large CGS Switch open for |V |= small VG S GS
S Improved Switch-Level Model Drain Drain
Gate Gate Bulk
Source Source
G D
RSW
CGS
VG Switch closed for VGS=“1”
S Switch-level model including gate capacitance and channel resistance
• Connect the gate capacitance to the source to create lumped model • Still neglect bulk connection Limitations of Existing MOSFET Models B G D V A Y DD RSW
CGS R VGS
S A B For minimum-sized devices in
a 0.5u process with VDD=5V
CGS 1.5fF 2KΩ n channel Rsw 6KΩ p channel
What is RSW if MOSFET is not What is power dissipation if A is What is Y when A=B=VDD minimum sized? stuck at an intermediate voltage?
Better Model of MOSFET is Needed! n-Channel MOSFET
Poly Gate oxide n-active p-sub n-Channel MOSFET Gate Drain Source L
W
LEFF
Bulk n-Channel MOSFET
Poly Gate oxide n-active p-sub depletion region (electrically induced) n-Channel MOSFET Operation and Model
VDS
VGS ID
VBS IG IB
Apply small VGS (VDS and VBS assumed to be small) ID=0 Depletion region electrically induced in channel I =0 Termed “cutoff” region of operation G IB=0 n-Channel MOSFET Operation and Model
VDS
VGS ID
VBS IG IB
Increase VGS (VDS and VBS assumed to be small) ID=0 Depletion region in channel becomes larger IG=0 IB=0 n-Channel MOSFET Operation and Model
VDS
VGS ID
VBS IG IB
ID=0 Model in Cutoff Region IG=0 IB=0 n-Channel MOSFET Operation and Model
VDS
Critical value of VGS ID V that creates GS VBS IG inversion layer IB termed threshold voltage, VT)
(VDS and VBS small)
Increase VGS more Inversion layer forms in channel IDRCH=VDS Inversion layer will support current flow from D to S IG=0 Channel behaves as thin-film resistor IB=0 Triode Region of Operation
ID I G V DS RCH VDS
VGS IB
VBS = 0
For VDS small L 1 RCH W VGS VT COX Behaves as a resistor between drain and source W I D μCOX VGS VT VDS L Model in Deep Triode Region I G I B 0 Triode Region of Operation
ID
IG RCH
VGS IB
VBS = 0
For VDS small L 1 RCH W VGS VT COX
Resistor is controlled by the voltage VGS Termed a “Voltage Controlled Resistor” (VCR) n-Channel MOSFET Operation and Model
VDS
VGS ID
VBS IG IB
(VDS and VBS small)
Increase VGS more Inversion layer in channel thickens IDRCH=VDS I =0 RCH will decrease G Termed “ohmic” or “triode” region of operation IB=0 n-Channel MOSFET Operation and Model
VDS
VGS ID
VBS IG IB
(VBS small)
Increase VDS Inversion layer thins near drain ID=? I =0 ID no longer linearly dependent upon VDS G Still termed “ohmic” or “triode” region of operation IB=0 Triode Region of Operation
ID
IG VDS
VGS IB
VBS = 0
For VDS larger W V L 1 I μC V V DS V R D OX GS T DS CH L 2 W VGS VT COX I G I B 0
Model in Triode Region n-Channel MOSFET Operation and Model
VDS
VGS ID
VBS IG IB
(VBS small)
Increase VDS even more Inversion layer disappears near drain ID=? Termed “saturation”region of operation IG=0 IB=0 Saturation first occurs when VDS=VGS-VT Saturation Region of Operation
ID
IG VDS
VGS IB
VBS = 0
W VDS I D μCOX VGS VT VDS L 2 or equivalently For VDS at onset of saturation W VGS VT ID μCOX VGS VT VGS VT L 2 or equivalently μC W I OX V V 2 D 2L GS T
I G I B 0 n-Channel MOSFET Operation and Model
VDS
VGS ID
VBS IG IB
(VBS small)
Increase VDS even more (beyond VGS-VT) Nothing much changes !! ID=? I =0 Termed “saturation”region of operation G IB=0 Saturation Region of Operation
ID
IG VDS
VGS IB
VBS = 0
For VDS in Saturation
μCOX W 2 ID VGS VT 2L Model in Saturation Region
IG I B 0 Model Summary ID n-channel MOSFET IG VDS
VGS IB V = 0 BS 0V V Cutoff GS T W VDS IDOXGSμCV TDSGSDS VVV GS V T V V V T Triode L2 W 2 μCV VV V V V V Saturation OXGS2L TGS T DS GS T
IGB =I =0 Model Parameters: {µ, VT, COX} Design Parameters : {W, L} This is a piecewise model (not piecewise linear though) L 1 (Deep triode special case of triode where VDS is small R CH ) W VGS VT COX Note: This is the third model we have introduced for the MOSFET Model Summary n-channel MOSFET
ID 0 VGS VT W V IG DS ID μCOX VGS VT VDS VGS VT VDS VGS VT L 2 VDS VBS W 2 VGS IB μCOX VGS VT VGS VT VDS VGS VT 2L VBS = 0
I=I=0GB
Observations about this model (developed for VBS=0):
I=D1GSDS fV,V
I=G2GSDS fV,V
I=B3GSDS fV,V
This is a nonlinear model characterized by the functions f1, f2, and f3 where we have assumed that the port voltages VGS and VDS are the independent variables and the drain currents are the dependent variables General Nonlinear Models
I1 I2 3-terminal I=1112 fV ,V Nonlinear v1 Device v2 I=2212 fV ,V
I1 and I2 are 3-dimensional relationships which are often difficult to visualize
Two-dimensional representation of 3-dimensional relationships Graphical Representation of MOS Model
W V2 ID I=μC DS D OX L2 3 Triode VGS4 2.5
2 VGS3 1.5 Saturation 1 Deep Triode VGS2 RegionRegion 0.5 VGS1 0 0 1 2 3 4 5 VDS VDS 0V V GS T Cutoff W V I μC V VDS V V V V V V D OX GS T DSGS DST GS T L2
W 2 μCOX V GS VV TGS V T V DS V GS V T 2L Parabola separated triode and saturation I =I =0 GB regions and corresponds to VDS=VGS-VT PMOS and NMOS Models
D S
G G
S D
W ID I = μCV 2 DOXDS L 3 Triode VGS4 2.5
2 VGS3 1.5 Saturation 1 Deep Triode VGS2 RegionRegion 0.5 VGS1 0 0 1 2 3 4 5 VDS VDS Cutoff
• Functional form identical, sign changes and parameter values different • Will give details about p-channel model later Example: Determine the output voltage for the following circuit using the square-law model of the MOSFET. Assume VT=1V and -2 μCOX=100μAV 5V
10K ID
VOUT M1 W=10u L=2u 3V
Solution:
Since VGS>VT, M1 is operating in either saturation or triode region Strategy will be to guess region of operation, solve, and then verify region Example: Determine the output voltage for the following circuit using the square-law model of the MOSFET. Assume VT=1V and μC =100μAV-2 OX 5V
10K ID
VOUT M1 W=10u L=2u 3V
Solution:
Guess M1 in saturation
5V=I 10K+V Required verification: V >V -V DOUT DS GS T μC W I3-V OX 2 DT2L
Can eliminate ID between these 2 equations to obtain VOUT Example: Determine the output voltage for the following circuit using the square-law model of the MOSFET. Assume VT=1V and μC =100μAV-2 OX 5V
10K Guess M1 in saturation Required verification: VDS>VGS-VT ID VOUT 5V=I10K+V M1 DOUT μCW W=10u I3-V OX 2 L=2u DT2L 3V
-2 100μAV 10 2 VOUT = 5V-10K 2V 22
VOUT = -5V
Verification: VDS=VOUT -5 >? 2V - - 0 No! So verification fails and Guess of region is invalid Example: Determine the output voltage for the following circuit using the square-law model of the MOSFET. Assume VT=1V and -2 μCOX=100μAV 5V
Required verification: V Solving for VOUT, obtain VOUT = 0.515V Verification: VDS=VOUT 0.515 VOUT = 0.515V Stay Safe and Stay Healthy ! End of Lecture 16