Proceedings of the 5th WSEAS Int. Conf. on Microelectronics, Nanoelectronics, Optoelectronics, Prague, Czech Republic, March 12-14, 2006 (pp64-69)

DESIGN OF BASED CMOS ACTIVE INDUCTANCES

G.SCANDURRA, C.CIOFI Dipartimento di Fisica della Materia e TFA Università degli Studi di Messina Salita Sperone 31, I-98166 Messina ITALY

Abstract: - In this paper the design of a transformer based CMOS active inductance to be used for the realization of fully integrated RF CMOS front ends is discussed. The circuit topology employed aims at taking the maximum advantage of the limited transconductance gain of MOS devices for compensating the losses of the integrated magnetic structures. In this way, even if a 0.35 µm technology has been employed, it has been possible to obtain an equivalent “almost ideal” inductance of 6 nH at a center frequency of 2.4 GHz. The circuit operates with a supply voltage of 3.3 V and drives less than 1 mA. Moreover, two control voltages can be used in order to tune the maximum quality factor of the inductance and to change in a relatively wide range the frequency at which it occurs.

Key-Words: - Active inductance, Integrated transformer, CMOS, Quality factor, RF, Circuit design

1 Introduction approach is the one in which a bi-pole with a Modern RF front ends to be used for mobile negative resistance behaviour is put in series to the communication and wireless networking require a in order to compensate the losses and considerable amount of digital signal elaboration increase the resulting quality factor Q[8]. A third thus making the CMOS technology the mandatory approach exploits the magnetic coupling between choice if one has to design very low cost fully the spirals of an integrated transformer and a current integrated front ends. In the last few years, amplification between primary and secondary progresses in the CMOS technology have made introduced by an active device in order to obtain a MOSFET with sufficient gain in the GHz frequency purely inductive behaviour[9,10]. As a general rule, range available, and therefore the main obstacle inductorless circuits result in a smaller occupied area toward the fully integration of RF systems is with respect to transformer based ones. However, it represented by the difficulties encountered in the is believed that by resorting to a transformer in integration of high quality . Particularly in which the magnetic coupling controlled by an active the case of CMOS processes, integrated passive device acts in such a way as to increase the quality inductors have typical values of Q that are too low factor of an otherwise passive inductive structure, for implementing several fundamental RF functions one can get better noise and linearity performances (for example highly selective filters) [1,2]. Although with respect to impedance transformation circuit the quality factor can be improved by resorting to such as those based on gyrators. In the case of special fabrication steps[3,4], the additional bipolar technologies, transformer based circuits have processing cost and complication resulting from a allowed the design of LNAs with noise modification in the process flow make such an performances quite close to what would have been approach quite unsatisfactory. For this reason, there obtained in the case of passive, high quality is a strong interest in the possibility of realizing high inductors loads[11]. In this paper it will be discussed quality inductances by employing active circuits. A a new topology that can be used for the realization few topologies of active inductors have been of high quality, transformer based, CMOS active proposed in the literature, which can be classified inductances. The design guidelines will be discussed into three main categories. A first approach is the in detail and simulation results will be presented that one in which no actual inductance is used but an confirm the validity of the followed approach. Open inductive effect is obtained exploiting the questions that need to be addressed in order to make impedance transformation capabilities of circuit the actual design feasible will be discussed as well. such as the “gyrator”[5-7]. A second possible Proceedings of the 5th WSEAS Int. Conf. on Microelectronics, Nanoelectronics, Optoelectronics, Prague, Czech Republic, March 12-14, 2006 (pp64-69)

2 Problem Formulation would be resonant with CGS at the design frequency, In a previous work a new topology for the design of it will be still obtained a purely inductive ZIN. transformer based CMOS inductances was Let us define the impedance ZP as: introduced that was proven to have significant 1 (1) Z P ()()s = RR + sLR || advantages with respect to the one that would have sCR been directly derived from the topology employed in It can be written:

the case of bipolar technologies[12]. Here the Vin = VGS = (ZP + R1 + sL1 )iL1 + sMgmVGS (2) properties of the new topology will be discussed in And therefore, in the frequency domain: detail in order to derive guidelines to be used in the ' Z P + R1 + jωL1 design for a specific application. A simplified Z IN = = 1− jωMg diagram of the new topology that has been m (3) developed for the realization of high quality active (Z P + R1 + jωL1 )(1+ jωMg m ) = 2 2 2 inductances is reported in Fig. 1. 1+ ω M g m T C R If now the numerator of Eq.3 is taken into A consideration it may be observed that the term

V DD (1+jωMgm) acts in such a way as to increase the phase of Z’IN and therefore it can allow to reach, at a given frequency, a phase quite close or even exactly equal to π/2. Note, however, that as the frequency L R increases, depending on the behaviour of the other terms at the numerator in Eq. 3, it is possible to end V Z IN R up with a bipole whose phase is larger than π/2, that C R is an equivalent impedance with a negative real part. This situation has to be avoided as negative Fig.1: simplified circuit of the CMOS active inductor proposed equivalent resistances may lead to instability. Therefore, it may be stated that the requirements for The parasitic resistances in series with the coils of an equivalent impedance to be regarded as an ideal the transformer are not shown in the figure. These, inductance at a given angular frequency ωD are: however, are shown in the small signal equivalent • The equivalent resistance R of the circuit reported in Fig. 2 in impedance Z’IN has to be 0 at the design frequency ω . iL1 D L 1 • The equivalent resistance Rin has to be 1 v L2 R1 L1 positive in a neighbourhood of ωD. L In other words, it can be accepted as a “good” C R C v i GS R L2 L2 equivalent of an inductance any impedance with V R g V GS R m GS positive imaginary part provided that the real part R2 has a minimum (close or equal to 0) at the desired 2 Z' IN design frequency. The above conditions translate Fig.2: small-signal equivalent circuit of the analytically to the following set of simultaneous CMOS active inductor equations:  In order to simplify the discussion the equivalent  Rin ()jωD = 0 transconductance (gm) of the cascode stage will be  (4) assumed to be purely real. The coupled inductances  ∂R ()jω L1 and L2 represent the transformer whereas the  in = 0 ∂ω capacitance CR can be realized by means of a MOS  ω =ωD varicap and therefore its value can be changed in a given range by means of a proper control voltage. Solving the above problem in our case is not The equivalent impedance ZIN is the parallel of the difficult in principle, but it may become tedious and impedance Z’IN in Fig. 2 and of the input capacitance complicated because of the several parameters that of the MOSFET (CGS). are involved in the design. In order to extract As long as it can be guaranteed a purely inductive general indications on the actual possibility of Z’IN, whose inductance value is below that which designing an ideal inductor with the proposed topology, we may proceed as follows. Proceedings of the 5th WSEAS Int. Conf. on Microelectronics, Nanoelectronics, Optoelectronics, Prague, Czech Republic, March 12-14, 2006 (pp64-69)

Let us start by rewriting the impedance ZP in the order to obtain a purely inductive equivalent following form: impedance, from the plots in Fig. 3 we have: s 1+ Q R 10,0 ω0R 1 ω0R LR Z P ()s = RR 2 ; ω0R = QR = s s LRCR RR 1+ + 2 Q ω ω ω M g R 0R 0R D m (5) r =0 1 In order not to complicate too much the discussion, 2 1,0 3

let us assume that in any case the inductances L1 and LR is characterized by the very same quality factor, that is: L L 1 = R (6) R R 1 R 0,1 1 2 3 45678910 Now let us define the following quantities: Q D R ω ω 1 D (7) 1,0 r = ; α = ω0R Mg M ; x = ; xD = RR ω0R ω0R With the previous assumptions and position it can be 0,9 ω /ω written: D R ' Z IN 0,8 zn ()x = = 3

R R (8) 2 x 0,7 []r()1− x 2 +1 + jr 1 (1+ jQR x )(1+ jαx ) QR r =0 = 2 2 × 1+α x 2 x 0,6 ()1− x + j QR 0,5 Therefore, finding the conditions for obtaining a 1 2 3 45678910 Q purely inductive impedance at a given design D (angular) frequency ωD, is equivalent to solve the Fig.3: Plots for the design of the active inductance. The values system: of the quantities ωD/ωR and ωDMgm that allow to satisfy Eq. (9)  are reported as a function of QD.  ℜ[]z ()x = 0 n x=xD ω  (9) ω Mg = 33.0 ; ω = D (11)  D M 0R 0.72 d ℜ[]z ()x = 0 and therefore it must result:  n x=xD  x g = 11 mA/V ; C = 880 fF (12) where the relevant design parameters are reduced to M R Once the nominal values of the parameters gm and the quantities QR, α and r only. CR are obtained by means of the simplified approach The system can be solved numerically for different that has been described so far, the designer can sets of parameters and the results are summarized in select the MOS widths and the size of the the graphs in Fig. 3 where the positions CMOS varicap to be used. It must be noted that both ω L D R (10) the bias voltage V and the varicap control voltage QD = xDQR = ; xD α = ωD Mg M R RR can be used as parameters for the fine tuning of the have been used. circuit both at the advanced design level (when As an example of the possible applications of the verifying the circuit by means of a circuit simulator) plots in Fig. 3, let us assume that the design and also as a means for compensating process frequency fD is 2.4 GHz (ωD=2πfD). Let us also parameters variation or for changing the frequency assume that is available an integrated inductance at which a pure inductance is obtained once the LR=2.6 nH with a quality factor at the design circuit is built. This fact is important since it could frequency of 5 (these are realistic parameters as provide the means for designing compensation reported in the AMS C35 process design systems for tracking temperature and process parameters). parameters and for allowing the design of Let us also assume that it can be designed a programmable high quality inductances. Although transformer with L1=L2=LR and R1=R2=RR and the means by which such systems can be designed characterized by a coupling factor k of 0.8 so that and realized have not been investigated yet, it is the mutual inductance can be assumed M=2 nH. In important to understand how each single control Proceedings of the 5th WSEAS Int. Conf. on Microelectronics, Nanoelectronics, Optoelectronics, Prague, Czech Republic, March 12-14, 2006 (pp64-69)

voltage acts on the equivalent impedance π C =0 R parameters. Phase To better understand the role of the varactor (CR in ω ω D 100 fF Fig.1), let’s assume it to be removed (that is CR=0). 'D The expression of the impedance Z’IN then π/2 300 fF becomes: 900 fF ' RR + jωLR + R1 + jωL1 RR + R1 + jω(LR + L1 ) Z IN = = 1− jωMgm 1− jωMgm (13) By setting the values for the various parameters as in 0 0,1 1 ω/ω 10 the example above, it is possible to plot the phase of D Fig.4: Phase of Z’ for different values of the capacitance C . the impedance Z’IN as a function of the frequency as IN R

in Fig. 4 (case CR=0). The other curves in the figure are obtained by The capacitance value thus obtained can be used to select the characteristics of the varicap to be used for plotting the phase of the impedance ZIN for different its implementation. From the above results it can values of the capacitance CR. As it is apparent from also be concluded that it is the value of gm, and the figure, the role of the capacitance CR is that of causing the phase to decrease above a certain therefore of the control voltage VR, that has the most important influence on the operating angular frequency. If the correct value for CR is used frequency ω , while acting on the varicap control (CR=900 fF in the figure, quite close to the value in D Eq. 12), one can obtain the desirable situation of the voltage allows to have the correct phase behaviour phase having a maximum exactly equal to π/2. The in the neighbourhood of the design frequency. These observations can be regarded as the starting point angular frequency ω’D shown in Fig. 4 is the one for which the real part of Z’ is equal to zero, i.e.ω ’ toward the design of possible active compensation IN D circuits. satisfies the equation:

' ' ' ' LR + L1 Q ω D Mg = 1 ; Q = ω D (14) 3 Simulation Results D m D R + R R 1 The approach described above has been employed in It is interesting to note that the angular frequency of order to verify the feasibility of designing a purely operation, ωD, in the case in which the value of CR is inductive impedance above 2 GHz using a low cost such as to have the maximum of the the phase 0.35 µm CMOS process by AMS with a supply of exactly equal to π/2, is quite close to (slightly higher 3.3 V. than) the angular frequency ω'D that can be In order to further reduce the requirements for the calculated from Eq.(14). This situation presents transconductance value (gm) a stacked integrated itself for almost any reasonable combination of transformer has been designed in which the value of circuit parameters, and therefore it can be used for M is increased by increasing the number of turns of an heuristic but effective fast design procedure. the secondary coil L2. This can be done while In fact, if we are willing to design an ideal maintaining the same occupied area by reducing the inductance at a given angular frequency ωD, we can width of the metal path at the cost of an increased start searching for the proper circuit parameters that value of the parasitic resistance R2. This does not allow to satisfy Eq. (14) for an angular frequency significantly impair the performances of the circuit ω'D slightly lower than ωD. Note that higher values as long as a sufficiently high value of the output of gm lead to lower value of ω’D. As the value of gm impedance for the cascode stage is obtained. The can be varied in the actual circuit by changing the designed transformer occupies an area of bias point of the cascode stage, the actual choice of 270x270 µm2. The relevant transformer parameters ω’D is not critical. have been obtained by proper electromagnetic As a first order estimation one can try to obtain simulation using the Office tools and by

ω’D=ω D assuming the lowest value of gm which can carefully reproducing the process stack and the be obtained out of the cascode stage without characteristic electromagnetic parameters derived degrading too much its frequency performances. At from the AMS 0.35 µm process manual for each this point one can estimate the required value for the process layer. A 3D view of the simulated structure capacitance CR by observing that the design angular is reported in Fig. 5. Note that the vertical scale is frequency has to be in any case quite close to 0.7 ωR not linear in order to evidence the stacked (Fig. 3). transformer structure. Proceedings of the 5th WSEAS Int. Conf. on Microelectronics, Nanoelectronics, Optoelectronics, Prague, Czech Republic, March 12-14, 2006 (pp64-69)

450 12

400 10 350

8 300

250 6 Q L(nH) 200 4 150

100 2

50 0

0 1 2 3 4 f(GHz) Fig.6: Q-factor and active inductance

Fig. 5: 3D view of the simulate transformer structure. All dimensions are in microns. The different layers are represented Note that as one end of the varicap control voltage is using different scales in order to evidence the structure of the VR itself, the reported values refer to the difference stacked transformer. between VR and the actual voltage applied to the other control terminal of the varicap. The self resonating frequency of the primary and This result is quite encouraging as it suggests that, secondary inductances were above 8 GHz, while the by designing a proper control system, such a wide lumped model parameters extracted from the results tuning range could be exploited in order to of electromagnetic simulation were: compensate for process and temperature variations. The possibility of designing such a control system,

L1 =65.1 nH R1 = 7ΩΩΩ L2 = 5nH R2 = 50ΩΩΩ M = 1.2 nH (15) together with a detailed analysis of the deviation from the ideal behaviour as can be expected in the By comparing the Z parameters obtained from the actual realization of the circuit does not appear to be lumped simplified model and by means of direct an easy task at present, but further investigations electromagnetic simulation, it has been possible to 500 verify that the simplified model provides a good 450 representation of the transformer behaviour as far as 400 our discussion is concerned. All the other devices, 350

including the inductance LR and the varicap CR, were 300

available as part of the RF AMS 0.35 µm library. 250 Q All the parameters were set at the values used in the 200 previous example. In particular, the CMOS varicap 150 has been chosen in such a way to obtain a central value for the capacitance of about 800 fF. 100 Fig. 6 summarizes the results obtained after 50 0 adjusting the bias voltage VR and the control voltage 1.0 1.5 2.0 2.5 3.0 3.5 4.0 of the varicap in such a way as to approach the f(GHz) condition of ideal inductance at about 2.4 GHz. The Fig.7: Q-factor for several values of the two control voltages value of the inductance results about 5.5 nH. In Fig 7 the different behaviour of Q which can be obtained are being currently performed that are expected to by setting proper values for the two available control provide the correct design guidelines. voltages is shown. It must be noted that the In order to estimate noise performances, it has been condition of quasi-ideal inductance can be reached evaluated the PSD (Power Spectral Density) of the in a significantly wide frequency range, from about equivalent noise current source in parallel to the 2.2 up to 2.8 GHz. In Table 1 all the relevant equivalent inductance. In the case of the maximum parameters are listed that correspond to the three Q occurring at 2.2, 2.4 and 2.8 GHz, the PSD is situations reported in Fig. 7, that is the value of the about 11.5, 11.0 and 10.5 pA/√Hz, respectively. inductance at the maximum Q, the supplied current, Although it is difficult to compare noise results with the values of the bias voltage VR and of the varicap others reported in the literature, because of control voltage. differences in process parameters and in target parameters such as equivalent inductance, power Proceedings of the 5th WSEAS Int. Conf. on Microelectronics, Nanoelectronics, Optoelectronics, Prague, Czech Republic, March 12-14, 2006 (pp64-69)

dissipation or supply voltage, these noise results are Guided Wave Letters, Vol.8, pp. 300- better than those reported in [6] where a differential 301,September 1998 gyrator is used, thus possibly justifying the larger [2] T. Soorapanth, S.S. Wong, “A 0-dB IL 2140 +- employed area with potentially better noise 30MHz Bandpass Filter Utilizing Q-Enhanced performances. Spiral Inductors in Standard CMOS”, IEEE J. TABLE 1 Solid State Circuits, vol.37, pp.579-586, May fQmax L @ fQmax VR ∆V ΙBIAS 2002 (GHz) (nH) (mV) (mV) (mA) [3] A. Elshabini-Riad, W.B. Kuhn, F.W. 2.2 5.46 670 300 0.570 Stephenson, “Centre-Tapped Spiral Inductors for 2.4 5.48 700 0 0.900 Monolithic Bandpass Filter”, Electron. Lett., vol. 2.8 5.71 750 -100 1.3 1, n. 1, pp.625-626, Jan. 1995 [4] C.P. Yue, S.S. Wong, “On-Chip Spiral Inductors Linearity is another important issue in the case of with Patterned Ground Shields for Si-Based RF active inductances. Using typical figures employed IC’s”, IEEE J. Solid State Circuits, vol. 33, pp. for the characterization of linearity in is 743-752, May 1998 not feasible in the case of a bipole. In order to get [5] A. Thanachayanont, “CMOS Transistor-Only information about linearity, a periodic steady state Active Inductor for IF/RF Applications”, IEEE simulation has been performed using a sinusoidal ICIT ’02, Bangkok, Thailand. current source driving the inductance. An equivalent [6] Grozing, M.; Pascht, A.; Berroth, M.; “A 2.5 V impedance ZPSS has been evaluated as the ratio CMOS differential active inductor with tunable between the voltage fundamental harmonic across L and Q for frequencies up to 5 GHz”, Radio the inductance and the input current for increasing Frequency Integrated Circuits (RFIC) amplitudes. The results obtained in the case of the Symposium, 2001. Digest of Papers. 2001 IEEE, maximum Q occurring at 2.4 GHz show that 20-22 May 2001 pp:271 - 274 compression effects (1dB) occur above about 1 mA. [7] Akbari-Dilmaghani, R.; Payne, A.; Toumazou, C.; “A high Q RF CMOS differential active 4 Conclusion inductor”, IEEE International Conference on In this paper the design issues for the realization of , Circuits and Systems, 1998 Volume high quality transformer based active inductances in 3, 7-10 Sept. 1998 pp:157 - 160 vol.3 CMOS technology have been discussed. An original [8] W.B. Kuhn, N.K. Yunduru, A.S. Wyszynski, topology has been presented that, while considerably “Q-Enhanced LC Bandpass Filters for Integrated reducing the requirements in terms of gain, Wireless Applications”, Trans. On Microwave transition frequencies and power consumption with Theory and Techniques, vol. 46, n.12, Dec.1998, respect to other designs, provides for two control pp. 2577-2586; voltages that can be used in order to accurately tune [9] Y.C. Wu, M.F. Chang, “On-Chip High Q the circuit during its actual operation. (>3000) Transformer-Type Spiral Inductors),” A 0.35 µm CMOS technology has been used to Electronics letters, 31st January 2002, Vol. 38, demonstrate the validity of the proposed solution No.3 which allowed to reach the condition of zero series [10] G. D’Angelo, L. Fanucci, A. Monorchio, A. equivalent resistance (that is a virtually infinite Q) Monterastelli, B. Neri,, “High Quality Active for an inductance value of 6 nH at 2.4 GHz by Inductors”, IEE Electronics Letter, N.20, 30th properly acting on the above mentioned control Sept. 1999, pp.1727-1728 voltages. [11] D. Zito, L. Fanucci, B. Neri, S. Di Pascoli, G. By following the proposed approach, almost ideal Scandurra , “Single Chip 1.8GHz Band Pass inductances could be obtained at higher frequencies LNA with Temperature Self-Compensation ”, provided that up to date technologies are employed. SCS 2003, International Symposium on Signals, So, in the future, fully integrated CMOS RF front Circuits and Systems, vol. 1, 10-11 July 2003, ends, for single chip, low cost, WLAN interfaces in pp.121 - 124 the 5-6 GHz frequency range, could be realized. [12] G. Scandurra, C. Ciofi, D. Zito, “A new topology for transformer based CMOS active References: inductances”, Research in Microelectronics and [1] F. Mernyei, F. Darrer, M. Pardoen, A. Sibrai, Electronics, 2005 PhD,Vol. 1, 25-28 July 2005 “Reducing the Substrate Losses for RF pp. 27 - 30 Integrated Inductors”, IEEE Microwave and