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Key Steps to the Integrated Circuit- Autumn 1997 ♦ Key Steps to the Integrated Circuit C. Mark Melliar-Smith, Douglas E. Haggan, and William W. Troutman This paper traces the key steps that led to the invention of the integrated circuit (IC). The first part of this paper reviews the steady improvements in the performance and fabrica- tion of single transistors in the decade after the Bell Labs breakthrough work in 1947. It sketches the various developments needed to produce a practical IC. Some of the discov- eries and developments discussed in the previous paper (“The Foundation of the Silicon Age” by Ian M. Ross) are briefly reviewed here to show how they fit on the critical path to the invention of the IC. In addition, the more advanced processes such as diffusion, oxide masking, photolithography, and epitaxy, which culminated in the planar process, are sum- marized. The early growth of the IC business is touched upon, along with a brief state- ment on the future limits of silicon IC technology. The second part of this paper sketches the various problems associated with the quality and reliability of this technology. The highlights of the semiconductor reliability story are reviewed from the early days of ger- manium and silicon transistors to the current metal-oxide semiconductor IC products. Also described are some of the process, packaging, and alpha particle problems that were encountered and solved before arriving at today’s semiconductor products. Introduction Improvements in the performance and fabrication ical innovations of the late fifties and early sixties. of single transistors occurred steadily in the decade Some of the discoveries discussed in the previous after the Bell Labs breakthrough work in 1947. paper (see “The Foundation of the Silicon Age” by Looking back over the various improvements, it is Ian M. Ross) are briefly mentioned here to show how possible to sketch the development path to the inte- they fit on the critical path to the invention of the IC. grated circuit (IC). The following set of discoveries For example, Pfann’s zone refining process,1,2 as mod- illustrates the pattern of problem-solving progress that ified and adapted for silicon by Theuerer,3,4 provided ultimately led to the first practical, cost-effective ICs. the pure, low-defect, raw material needed for multi- The nurturing environment needed to produce transistor devices. In the same way, the additional these discoveries first existed at Bell Labs. However, processing steps needed to produce an IC were drawn with the growth of the semiconductor industry in mostly from the technology base developed to pro- California, a similar environment grew quickly duce low-cost, high-performance, reliable transistors. there as well. Furthermore, the concept of starting a company to reap the rewards of a new or improved Putting the Key Technologies in Place technology emerged after World War II. That con- The key process steps that led to the development cept was honed to a razor’s edge through the 1950s of the IC are summarized below. and 1960s and continues even to the present. Diffusion of Donor and Acceptor Atoms Entrepreneurial opportunities for creating wealth Early in the evolution of the technology that through company start-ups fueled many technolog- enabled the transistor to be realized, it became clear Copyright 1997. Lucent Technologies Inc. All rights reserved. Bell Labs Technical Journal N Autumn 1997 15 that the base layer had to be thin to achieve acceptable Panel 1. Acronyms, Abbreviations, and Terms speed. A base thickness of about 10 microns was needed to yield a frequency response approaching DRAM—dynamic random access memory DTL—diode transistor logic 10 MHz. For a higher frequency, the base needed to be ECL—emitter coupled logic proportionally thinner. FET—field-effect transistor In 1952, C. S. Fuller published studies5 showing IC—integrated circuit that dopants could be introduced in a controlled man- IEEE—Institute of Electrical and Electronics ner to very shallow depths by diffusion of donor and Engineers acceptor atoms. The method included surrounding the KS—Kearney specification semiconductor with a vapor containing the desired LSI—large scale integration MOS—metal-oxide semiconductor dopants at an elevated temperature, which enhanced MOSFET—metal-oxide semiconductor field- the diffusion of the dopants into the semiconductor effect transistor surface. The temperature could be chosen to create dif- NMOS—MOS with n-type transistors fusion rates that would provide precise control of the p-n—positive-negative (junction) depth of penetration. In 1954, using this diffusion RTL—resistor transistor logic process, C. A. Lee made the first diffused-base germa- SRAM—static random access memory TTL—transistor transistor logic nium mesa transistor.6 This device had a cutoff fre- VLSI—very large scale integration quency of 500 MHz, a factor of ten faster than the best alloy transistors of the time. Furthermore, because the collector contact for the Oxide Masking, Photolithography, and Epitaxy mesa transistor was made through the bottom of the In 1955, C. J. Frosh and L. Derick made an die, the full thickness of the high-resistance wafer important contribution by noting that silicon dioxide was in series with the relatively narrow active col- could act as a diffusion mask.7,8 A few-thousand- lector region. angstrom layer of silicon dioxide on the surface of a The ability to make the wafer thinner to reduce silicon wafer could mask the diffusion of certain the resistance was limited by what could be achieved donor and acceptor atoms into the silicon. Frosh and in manufacturing. The thinnest possible wafer that Derick further demonstrated that diffusion would was not too fragile for manufacturing was on the order occur unimpeded through windows etched in the of 200 microns thick; for an ideal collector resistance, oxide layer. Somewhat later, J. Andrus and W. L. the thickness would need to be one tenth of that. A Bond showed that a specific photoresist deposited on thin, lightly doped, high-resistance collector in series the oxide surface would prevent etching of the with a highly doped, low-resistance substrate was oxide.9,10 Hence, optical exposure of the resist needed. A group led by Ian Ross at Bell Labs initiated through photo masks created precise window patterns the development of epitaxial technology. The work of in the oxide, which in turn provided control over this group built on earlier work by Teal and areas in which diffusion would occur. In 1955, Christensen, who had worked on germanium epitaxy M. Tanenbaum and D. E. Thomas developed the all- in the 1940s.8 diffused silicon transistor11 based on diffusing the Epitaxy comes from the Greek words epi, meaning impurity atoms into the silicon wafer and protecting “upon,” and taxis, meaning “ordered.” The object of the active elements with an oxide barrier. The the epitaxial process was to grow a thin semiconductor announcement of these results created great excite- film with a light impurity concentration on a wafer of ment throughout the infant semiconductor industry. much higher doping concentration. This approach The speed of a diffused-base mesa transistor was allowed the series resistance of the substrate to be limited by the series resistance of the collector region. reduced while maintaining the desired high-resistivity Yet high resistance was known to be essential to pro- characteristics of the collector. At the Solid State vide a suitable breakdown voltage for the transistor. Device Conference in 1960, Theuerer, Kleinack, Loar, 16 Bell Labs Technical Journal ◆ Autumn 1997 RF induction heating coils Vent Si wafers Quartz or SiCl4 + H2 glass reactor Susceptor SiCl4 + 2H2 Si (solid) + 4HCl Note: The reaction in the reverse direction will etch or remove silicon. RF – Radio frequency Figure 1. The epitaxial process. and Christensen described the first practical transistor Armed with this recognition, Shockley led the engi- having an epitaxial layer.8 neers at the new company in the direction of a pet The process was performed in a quartz reactor project—namely, a four-layer silicon diode. However, able to be heated by radio-frequency induction. For the team soon became restless and, in 1957, eight key silicon transistors, a high-temperature gas, such as sili- members, led by Robert Noyce, left Shockley con tetrachloride, was flowed past heated wafers, thus Semiconductors to form Fairchild Semiconductors. causing the atoms to have sufficient mobility to orient Using the diffusion techniques developed at Bell Labs, themselves to the crystal structure of the silicon wafer. Fairchild concentrated on high-performance mesa Hydrides of the impurity atoms were added to the sili- transistors. This small company was fortunate in that it con tetrachloride transport gas to supply the desired landed an order from IBM to produce diffused mesa impurity atoms (see Figure1). Today, this process is transistors for certain computer products. It is interest- called chemical vapor deposition,and is used extensively ing to note that after being in business for only two in device fabrication to achieve abrupt changes in dop- years, Fairchild was a profitable company, with rev- ing concentration. enues over half a million dollars. Shockley Goes West The Planar Process William Shockley and Stanley Morgan led the By the second half of the 1950s, three major solid-state research group formed at Bell Labs in 1945 methods of transistor fabrication existed: the grown by Mervin Kelly. In 1955, Shockley left Bell Labs for junction, the alloy junction,and diffusion(see Figure2). Palo Alto, California, to form Shockley By that time, the grown-junction process was nearly Semiconductors. He quickly assembled a strong group obsolete and was being replaced by the alloy junction of young scientists and engineers and set about devel- and the mesa diffused junction processes. Bell Labs oping silicon-based semiconductor components.
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