绿色计算产业联盟 Green Computing Consortium

盟联 Green Computing Consortium 业 Server Technical Standards Report 产 Consortium 算计色 Computing 绿

GreenGreen Computing Consortium

序

为统一产业对绿色计算发展现状和趋势的认知，阐释开放标准和开放架构对产业和生态的重要意义，推动各方合作共赢，GCC 组织撰写并与 2017 年底在第四届世界互联网大会发布了《绿色计算产业联盟服务器技术标准报告》（以下简称：标准报告）。这份盟报告在绿盟内外、对产业各方都产生了重要且积极的影响。联为进一步推动绿盟成果与外部产业、国际产业的沟通和交流，标准报告编写组安排专家对标准报告进行了英业文翻译。可以用作和外界厂商、国际标准组织、国内外用户进产行沟通和成Consortium果分享，展现绿盟在推动开放标准、促进生态建设中的观点和积极态度，推动各方交流碰撞、分享成果。技术内容的解算读以标准报告中文版为准。

编写组感谢参与英计文翻译的各位专家，特别感谢 ARM 公司魏东老师的贡献！色 Computing 绿《绿色计算产业联盟服务器技术标准报告》编写组 Green

目录 1 Introduction...... 2 1.1 Background...... 2 1.2 Purpose and Significance...... 7 1.3 Green Computing Framework...... 9 2 Green Computing framework: hardware layer...... 11 2.1 CPU Interface...... 11 2.1.1 Memory Interface...... 12 2.1.2 Accelerator Interface...... 盟 14 2.1.3 Network Interface...... 15 2.1.4 Management Interface...... 联 18 2.2 Hardware Architecture...... 20 3 Green computing framework: software layer...... 22 3.1 Firmware...... 业 22 3.2 Basic Software...... 23 3.3 Platform Software...... 25 4 Green computing framework: server system产 ...... Consortium27 4.1 Heterogeneous Computing...... 27 4.2 Extensibility...... 28 4.3 RAS...... 算 29 4.4 Security...... 30 5 Green Computing Standardization Proposal...... 33 6 References...... 计 35 APPENDIX A Acronyms...... 36 APPENDIX B REferenced Standards bodies and open source organizations...... 37 B.1 Hardware色...... 37 B.1.1 CCIX...... Computing 37 B.1.2 PCI-SIG...... 38 B.1.3绿 Gen-Z...... 38 B.1.4 JEDEC...... 39 B.2 Software...... 40 B.2.1 UEFI forum...... 40 B.2.2Green Linaro...... 40 APPENDIX C ARM64 Architecture...... 42 C.1 ARM Architecture Development...... 42 C.2 ARMv8 Architecture...... 43

1 INTRODUCTION

1.1 Background Driven by market demand, modern data centers have entered rapid development.

Emerging applications such as big data, Internet of Things, and artificial intelligence continue to increase in data size and computing scale which puts higher demands盟 on the functionalities, performance, and especially the green computing characteristics of cloud data center infrastructure. The goal of green computing, as the联 name suggests, is to increase the computing performance through innovative system architecture, hardware and software design, energy saving and heat dissipation业 methods, reduce the energy consumption and environmental impact of产 the IT infrastructure.Consortium With the increasing public awareness of energy saving and environmental impact, green computing has become the shared demand of the global算 industry.

In order to support the constantly expanding application scenarios with “ green ” technologies, the server-centric计 computing infrastructure is experiencing exciting innovation and development.色 The industry has realized that relying only on the increase of the transistor number in theComputing CPU (following Moore's Law) or the increase of CPU’s frequency绿 can no longer meet the performance needs of the applications. Computer systems need innovative architectures to meet the calling of green computing. A direction fullGreen of potential is heterogeneous computing which uses dedicated accelerators (FPGA or field programmable logic gate arrays, GPU or graphics processors, even NPU or neural network processors, etc.) to offload CPU's load of specific algorithms (e.g., image

Page 2 of 45 ©2018 Green Computing Consortium Green Computing Consortium Server Technical Standards Report analysis, deep learning, etc.) and perform efficient operations. At the same time, a new generation of memory interface will greatly increase the efficiency of in-memory processing. It opens a broad space for big data applications.

ARM has always been committed to high-efficiency, low-power architecture innovations. From the instruction set, CPU architecture, IP design, to SOC (System-on-a-

Chip) design, all are designed to meet users ’ needs and markets ’ demand盟 on green computing. ARM has been continuously improving CPU computing联 capabilities and optimizing the energy consumption. Through many years of research and development, the ARM64 server is considered to be the most promising业 solution for green computing systems with its multi-core, multi-threaded architecture,产 andConsortium performance. It has been supported by more and more customers through open architecture, open interfaces, support for heterogeneous computing算 of various types of accelerators and CPUs. ARM64 servers have unique advantages in a variety of data center applications:

 Big data analytics.计 Big data is characterized by big volume, diverse types, sparse valid information色 and high requirements on timeliness. The system must perform well in a large numberComputing of complex real-time calculations. The total cost and energy绿 efficiency of completing big data workload are two primary metrics for

evaluating big data processing platforms. High concurrency is a significant feature of big dataGreen processing. The platform based on ARM64 architecture has inherent advantages in terms of high multi-core concurrency. At the same time, as ARM64

single-core performance increases, its overall performance continues to increase. In

the meantime, the innovation of the ARM64 architecture in low-power design

provides ARM64 servers with advantages in energy effiency. Therefore, ARM64

servers have good prospects for big data analytics, particularly suitable for highly

parallel dataflow applications.

 HPC (High Performance Computing). High-performance computing

applications are widely found in modeling and analysis in fields such as

environmental sciences, biological sciences, materials sciencesand astrophysics盟 etc. Unlike other applications, the HPC system is a large system联 with a combination of computing, storage, and networking technologies with tailored optimization for for

different workloads. In the meantime, energy consumption业 is the main expenditure of a supercomputing center, and therefore the returnConsortium is substantial for each one percentage reduction in energy consumption.产 The ARM64 architecture has evolved in recent years. The latest version算 of the instruction set already has features that enable high floating-point computing capabilities and massively parallel systems.

ARM and related communities计 have paid more attention to high-performance computing in色 recent years (http://developer.arm.com/hpc), which has also made the HPC software stack mature.Computing At the same time, various scientific applications, modeling绿 and simulations, and deep learning algorithms have put strong appeal on accelerators and hardware acceleration units. The development of open interconnectionGreen between ARM CPUs and accelerators will further enhance the power efficiency advantages of ARM64 platforms under HPC load.

 Android cloud application. For example, Android cloud games (games are

running on the server side, the client is just an input/output device), mobile office

(enterprise users access mobile software on the cloud through the terminal device), device emulation (using cloud-based simulation technology to provide mobile application testing and emulation) etc. There are several advantages to running an

Android application on an ARM64 server:

1) Improving development efficiency. Only one team is needed to build an application version (ARM-based). 盟 2) High data security, preventing leakage of critical联 data and information through personal devices.

3) Compatible with all Android applications.业 Most Android applications call Android native libraries and can only run on the ARMConsortium platform. In addition, a significant proportion of mobile applications产 are still 32-bit, so the platform is preferrably compatible with both算 32-bit and 64-bit instruction sets. 4) Zero performance loss: Android applications developed based on ARM architecture, when executed计 on non-ARM architecture CPUs, need to go through binary translation,色 which causessignificant performance loss. On an ARM server, Android applications can runComputing with little loss of performance. 绿 Containers. For modern data center applications, there is a trend towards lightweight load containerization, which is more suitable for the ARM architecture. Large-scaleGreen applications are generally composed of multiple service programs. Each service program runs on one container. The container provides the service programs with independence and isolation of resources, context consistency and seamless migration of programs. As an operating system virtualization technology as opposed

to traditional hardware virtualization technologies, containers can provide more

efficient hardware resource utilization, higher program operating densities, smaller

memory footprints, and shorter startup times than virtual machines. Containerized

applications based on the ARM architecture have a very good future.

 NFV (network function virtualization). NFV introduces cloud computing

technology and concepts into traditional telecommunication networks.盟 It significantly increases the flexibility of the network, facilitates the development联 and deployment of services, and improves the efficiency of network management and maintenance.

The low power consumption and single-chip multi-core业 of the ARM server chip can provide a lower total cost of ownership for the NFV cloudConsortium computing platform that requires economic scale. Recently, containerization产 on the NFV platform has progressed rapidly. The multi-core算 ARM architecture can provide higher container density, support more network applications, and achieve lower power consumption

and cost. The NFV software计 ecosystem based on the ARM architecture, such as OPNFV (Open色 Network Virtualization Platform, http://www.opnfv.org/), has made good progress and achievements.Computing The绿 examples above are only a small part of the potential application scenarios of the ARM64 server in the data center. With the development of data center applications, ARM64 serversGreen will also present features and capabilities that meet various requirements and provide support for existing and emerging services and applications.

1.2 Purpose and Significance Standards have always been playing an important role in guiding the the industry and enabling the joint efforts of all parties to promote the commercialization of new technologies. With the continuous increase in the demand for green computing in modern data centers and higher requirements for various new services and performance, server standards, especially the green computing server standards based盟 on ARM64 architecture are called for.

On one hand, the server industry needs open standards to联 keep up with the market demands and users ’ needs. Interface standards for业 CPUs and peripherals (such as memory interfaces, I/O interfaces, etc.) have always followed the industry's mainstream

(international) standards. As application scenarios产 placeConsortium higher demands on the computing architecture (performance,算 power consumption, etc.), existing standards need to be further developed, supplemented, and even innovated to support the enhanced requirements of the interconnection计 and interoperability among various components at different architectural levels, in particularly to support heterogeneous computing and in- memory processing.色 Thee continuousComputing development of the computing architectures and interfaces绿 needs the guidance of open standards, in order to converge the efforts of all parties and develope the server system to meet the needs of a wide range of business scenarios. Green At the same time, in order to meet the requirements of system compatibility and open box consistency, server standards need to be aggregated and unified. If the server vendors have different interfaces between hardware and OS, it will prevent OS vendors

©2018 Green Computing Consortium Page 7 of 45 Green Computing Consortium Server Technical Standards Report to support all severs, resulting in segmentation. The ecosystem for the upper layer softwares and applications would be difficult to be developed. In addition, if the interfaces between the CPU and the peripheral devices have a number of standards which are more or less the same but are not compatible and converged, the industry would easily get segmented, causing more burden on vendor adaptation.

The ARM64 server is based on an open architecture that continuously盟 evolves and innovates, and gradually builds up its advantages on energy联 efficiency, cost, and less environmental impact. Based on the open ARM IP licensing, many vendors have jointly participated in the development of the ARM server architecture业 specification standards. With the continuous improvement of the capabilities产 of ARM64Consortium servers, various levels of standards supporting the ARM64 architecture are emerging. In order to aggregate the strengths of various parties and prevent算 industrial fragmentation and promote the collaborative innovation of new software and hardware technologies, the establishment of a unified open standards计 framework and ecosystem is an important and necessary step. 色 This technical report aimsComputing for this vision. It provides an introduction on the current status and绿 the trends of green computing, especially ARM64 based server system architecture and standards. In order to meet the needs of green computing applications and enhanceGreen system compatibility, systematic analysis of needs on standards and development of system capability is performed on three levels: hardware, software, and the entire server. It also makes proposals on developing green computing standards and ecosystem building.

1.3 Green Computing Framework The ARM64 based green computing server system can be generically divided into hardware layers (CPU system chip, various board-level peripherals) and software

(including firmware, basic software, and platform software), as shown in Figure 1-1:

盟联业产 Consortium

Figure 1-1: ARM64 based Green Computing算 Framework  The hardware layer provides the basic hardware facilities, including the CPU

SoC (memory, accelerator,计 network, and management interface), various peripheral devices, power色 supply and heat dissipation. It is the platform that hosts the hardware resources for computing, storage,Computing and networking.

绿 The software layer provides the management and scheduling of the

hardware layer, including abstracting hardware resources and providing resource utilizationGreen interfaces to the applications , managing various components of the hardware platform, and coordinating shared access by different devices and different

users. The software layer can be roughly divided into firmware, basic software

(operating system kernel, virtualization layer, etc.) and platform software.

The server system in this article refers to a system that contains software and hardware layers and can run general-purpose or specific applications. 盟联业产 Consortium 算计色 Computing 绿 Green

2 GREEN COMPUTING FRAMEWORK: HARDWARE LAYER

The CPU-centric hardware layer continues to develope in performance through innovation and architectural evolution. On one hand, through open interfaces, the CPU is able to support existing peripheral devices and build new interface capabilities(for example, cache coherence with coprocessors) to faciliate heterogeneous computing and in-memory processing. On the other, the CPU hardware architecture needs盟 to provide a unified interface to the operating system for software and hardware联 compatibility. 2.1 CPU Interface In the ARM64 server system, the CPU SoC mainly业 contains the following interfaces (Figure 2-1): 产 Consortium 算计色 Computing 绿

GreenFigure 2-1： Main interfaces of the CPU SoC

2.1.1 Memory Interface

The amount of data center services, rapid changes, and fast growth in scale have made higher demands on the memory system of ARM64 servers：

 High-density and large-capacity: TB (Terabyte)-scale memory databases or hyper-large-scale memory virtualization applications have large memory盟 capacity requirements.  High performance (large bandwidth, low latency):联 Data center services that require real-time processing and analysis of results, such as big data analytics, will

rely more on in-memory computing (the CPU reads业 data directly from memory rather than storage) by using high-performance产 memoryConsortium to improve computing performance.  Low power consumption:算 The system power consumption is considered as a major factor that restricts the data center. The power consumption of the memory

system is an important计 part of the system-level power consumption. The DRAM (Dynamic Random色 Access Memory) in each computing node counts for 30%~50% of the power consumption ofComputing the entire computing node. 绿Non-volatile: For example, critical applications such as key databases and

web services will suffer from substantial business losses during the outage, thus fast and reliableGreen data recovery of the memory system is required. To meet these requirements, many industry players have introduced or are working on new storage technologies, media, and architectures. For example, the memory system

Page 12 of 45 ©2018 Green Computing Consortium Green Computing Consortium Server Technical Standards Report based on Non-Volatile Memory (NVM) has become the emerging trend for next- generation data center servers. NVM combines the features of both DRAM and NAND (a type of flash memory) and has higher density, better scalability, lower power consumption than DRAM, and is non-volatile. It is expected that mass production will take place around 2018 -2020, and will have a major impact on the storage architecture.

Other new storage architectures, such as HMC (Hybrid Memory Cube),盟 HBM (High Bandwidth Memory), etc., all adopt various innovations to increase联 memory density, improve access performance, and significantly reduce power consumption and cost.

In order to take full advantage of new media and业 architectures to improve memory access and server performance, it is urgent to产 build a unifiedConsortium and open interface standard compatible with multiple computing architectures to meet the needs of data center. There are several standards organizations算 that are actively working on the requirements for memory interfaces. For example, JEDEC (B.1.4) is developing a new generation of memory interface standard计 DDR5. In the meantime, the NVDIMM-P working group in JEDEC is preparing色 a new standard NVDIMM-P to support the new NVDIMM (Non- Volatile Dual In-line MemoryComputing Module) RAM. In addition, GEN-Z (B.1.3), CCIX (B.1.1) and other organizations绿 are also working on the development of serial memory interfaces. It is believed that these standards can improve the competitiveness of CPUs' memory interface andGreen help ARM64 servers to meet the needs of future data centers.

2.1.2 Accelerator Interface

With the development of new applications such as big data analytics, video, and image processing, more and more server systems use heterogeneous acceleration units

(such as GPUs, FPGAs, NPUs, etc.) to perform function offloading, acceleration, I/O acceleration, etc., which greatly improves system performance and efficiency.盟 When the ARM64 server platform needs to connect such heterogeneous accelerators, high bandwidth and low latency are required for accelerator联 interfaces. The current accelerator interface follows the industry standard PCIe (as defined by the PCI-SIG organization, see B.1.2). PCIe, as the industry's mainstream业 high-speed I/O interface standard, released 1.0 standard in 2003, and产 4.0 standard inConsortium October 2017, and PCIe 5.0 standard is under development. The existing PCIe standard meets the requirements of current applications on I/O interconnection算 and is supported widely in the industry. However, new application scenarios (such as artificial intelligence, scientific computing, genetic analysis, etc.) impose计 higher requirements (bandwidth, delay, etc.) on the interconnection between色 CPUs and accelerators, including:  InterconnectionComputing among different heterogeneous units: the support of high-

speed绿 interconnection between CPU and accelerators, and between one accelerator

and another.  GreenSupport for cache consistency: Cache coherence simplifies the programming model and reduces CPU and OS overhead. At the same time, it can

reduce the transmission delay and application delay.

 Higher bandwidth and lower latency: The physical link speed is increased to

25 Gbps or 32 Gbps, and even to 56 Gbps.

 Support multiple topology structures: Multiple accelerators in a node can

be organized into an accelerator array. Accelerator arrays can use multiple

interconnection topologies such as tree, ring, star, and mesh.

 Compatibility: Enhanced standards should be fully compatible盟 with existing PCIe standard and its future versions. 联 Some of the international standards under development are already considering these requirements, and are committed to enabling业 better-performance, more competitive heterogeneous interconnect interfaces,产 such as theConsortium CCIX standard (B.1.1). The next generation accelerator interface standards will contribute to the competitiveness of ARM servers and better meet the算 needs of emerging data center services on heterogeneous computing. 计 2.1.3 Network Interface The rapid growth色 of dataComputing center capacity and server cluster size, as well as the fast deployment of multi-tenant and other cloud services, impose higher demands for network绿 interfaces:

 High bandwidth and low latency: Next-generation data center applications,

such asGreen real-time big data analytics, high-performance databases, and HPC, impose

high-bandwidth and low-latency requirements on server network interfaces. With the

development of storage media, the access speed of storage components has

increased by tens of thousands of times. When data is imported to or exported from

the server, the bandwidth and latency performance of the network need to match the

access speed of the storage medium to maximize the server ’ s overall performance.

Moreover, for many high-end applications, even leaving all the configurations

untouched, improving the performance of server network interfaces can yield much

better service performance [1]. Therefore, increasing the bandwidth盟 of the network interface of the ARM server and reducing the communication联 delay can significantly enhance the competitiveness of the server.

 Large scale high-speed interconnection:业 With the fast growth of software workload, a single server can no longer meet the usersConsortium ’ needs. Instead, multiple servers need to be interconnected to a form产 a cluster in order to provide enough computing capability for users. However,算 as the size of the server cluster grows, the communication latency between servers is increasing, which becomes a performance

bottleneck of the cluster计 and makes it impossible to futher improve the cluster performance by色 interconnecting more servers. To alleviate the bottleneck, network protocols need to be improvedComputing to reduce the communication overhead of the cluster and enhance绿 the interconnection network performance of large-scale ARM64 server clusters.  GreenVirtual network acceleration: Cloudization is one of the important attributes of the data center. NFV has been widely deployed in data centers. However, as

100GE/400GE networks are gradually adopted, the processing performance of NFV

servers cannot keep up with the speed of the network interface. To address this

Page 16 of 45 ©2018 Green Computing Consortium Green Computing Consortium Server Technical Standards Report problem, server network interfaces are required to support hardware acceleration to improve NFV service processing performance. In addition, the wide use of server virtualization and data center multi-tenancy pushes the network access point to the server hypervisor (virtual machine monitor) software. But the hypervisor software has limited processing performance and may result in high CPU usage. In order to improve multi-tenant network performance and reduce CPU usage,盟 server network interface is required to offer hardware offload support for联 OVS (Open vSwitch), distributed firewall, distributed load balancing, and other networking related functions. 业  Reduce costs: With the expansion of the dataConsortium center and the increase of network bandwidth, the interconnection cost产 of server networking has also increased significantly. Optimizing the design算 of server network interfaces can reduce the cost of networking. First of all, directly integrating network interfaces into the ARM64 CPU

SoC will help to meet the计 aforementioned requirements of large bandwidth and low latency, large-scale色 efficient interconnection and virtual network acceleration, and reduce the data center's networkingComputing costs. Second, the trends of data center hyper- convergence绿 architecture and multi-service hybrid deployment enable the coexistence of computing, storage, and communication traffic on a single server. By introducingGreen converged network, such mixed traffic can be transmitted via a single network interface, which minimizes the number of network access ports on a server and greatly cuts down the interconnection cost.

The current network standards cannot simultaneously meet the above requirements.

It is necessary to promote the development of network interface standards on the ARM server platform and build tailor-made data center network standards and protocols to support high-performance data center applications. Currently a number of organizations are working on data center network standards including IEEE (Institute of Electrical and

Electronics Engineers) 802.1/3 Working Group, IETF (Internet Engineering盟 Task Force), IBTA (InfiniBand Trade Association), 25G Ethernet Consortium,联 and Docker/Kubernetes Open Source Community. The development progress of the network interface physical bandwidth standard and the server network architecture业 is relatively fast, but the promotion of the network protocol layer standards isConsortium insufficient. The further development of network interface standards产 requires the joint efforts of applications, middleware, silicon vendors, and equipment算 manufacturers. 计 2.1.4 Management Interface The ARM64色 server currentlyComputing uses an out-of-band management solution that is vendor implementation dependent, based on the BMC (Baseboard Management

Controller)绿 that supports IPMI (Intelligent Platform Management Interface) standard. As shown in Figure 2-2. Green

盟

Figure 2-2 Server Management Interface 联 The next-generation data center puts higher requirements on the functionality, versatility, and scalability of servers ’ out-of-band management业 interfaces. The Redfish standard (www.dmtf.org/standards/redfish)产 came into being.Consortium This standard was developed by the SPMF (Scalable Platform Management Forum) working group under the DMTF (Distributed Management算 Task Force; www.dmtf.org). This standard uses a unified hypermedia RESTful interface Redfish API to enable various management functions. Because the Redfish计 standard supports complete out-of-band management function, and provides色 an easy-to-use interface to achieve consistency in heterogeneous multi-vendor environment, itComputing is rapidly adopted by the server industry. The operating system and绿 firmware interact in-band with the BMC through a Redfish-defined network interface.

At theGreen same time, the BMC and SoC interfaces of the ARM64 server also need to be standardized. PMCI (also a working group under DMTF) has defined the management

©2018 Green Computing Consortium Page 19 of 45 Green Computing Consortium Server Technical Standards Report component transport protocol (PLDM/MCTP) as the standard for this interface. The BMC communicates with SoC and platform sensors through this standard protocol.

2.2 Hardware Architecture The server hardware system needs the support and compatibility from the software systems (especially basic software, such as operating systems, etc.) in order盟 to make full use of hardware features. Therefore, the diversity of hardware, such as the introduction of new features in the hardware architecture (such as a different联 number of watchdogs), may increase the cost of software development and maintenance. It is necessary to have an ARM server base hardware architecture specification业 that allows different vendors' hardware to provide flexible implementation产 on the basisConsortium of compliance with the specification and provide a unified hardware interface for software development. The

Server Base System Architecture (SBSA)算 is a specification that meets this requirement. SBSA is the ARM64 server计 hardware architecture specification led by ARM and developed by cloud provider such as Google, Microsoft, software companies such as Canonical, Linaro,色 Microsoft, Red Hat, SUSE, and server vendors including DELL, Fujitsu, HPE, BIOS vendors such asComputing AMI, Byosoft, Insyde, as well as chip vendors (Ampere,

Hisilicon,绿 Cavium, Qualcomm, Phytium, Socionext, etc.). The 1.0 version was released in early 2014. It is updated to version 3.1 [2] in February 2017, ARM has translated it into

Chinese1. ItGreen is expected that OEMs (Original Equipment Manufacturers) and software vendors will require compliance with this specification for maximum software out-of-the- box compatibility and reliability considerations.

1 http://developer.arm.com/products/architecture/system-architecture/server-system-architecture

In order to unify the interfaces of the CPU hardware architecture to the operating system and promote the software and hardware compatibility of the server industry,

SBSA has defined the interfaces of 9 aspects of the ARM64 server chip – Processing

Element architecture, interrupt controller, system address map, power state semantics, I

/O virtualization, clock subsystems, wake-up semantics, watchdogs, and peripheral systems. The SBSA divides the conformance into four Levels (Level 0 ~ Level盟 3). Level 0 is the first level; level 1 adds functionality to Level 0. Unless explicitly联 stated, all specification items belonging to level n apply to levels greater than n. The vendor's implementation can meet any level of specification. At present (mid-2017),业 it is recognized by the industry that Level 3 should be achieved at this stage. SBSA versionConsortium 5.0 (Level 3 ~ Level 5) is expected to be announced by the end of 2017.产 If a system can achieve all functions算 of a certain level, and the performance can meet the target application at that level, then this system implementation is in full compliance with this level of requirements计 of the SBSA specification. This means that all functions at this level can be色 fully utilized by the software without unexpected performance degradation. Computing ARM绿 has officially released the ARM Server Architectural Compliance Suite (ACS) for compliance with SBSA and SBBR (ARM64 server firmware specification, see section 3.1) standards andGreen is establishing a logo service. It is expected to be established in early 2018.

3 GREEN COMPUTING FRAMEWORK: SOFTWARE LAYER

Firmware, basic software (OS kernel, virtualization, etc.), platform software (such as cluster management, cloud computing, big data processing, storage components, etc.) should be built on a standard hardware platform, to support various upper applications.

With the vigorous development of the ARM64 software ecosystem, diverse applications can be seamlessly migrated to ARM64 server. 盟 Since ARM64 server software is commonly based on open source联 solutions (firmware, OS, middleware, etc.), it is essential to use the community (open source) version as the upstream solution for server software . Major server OS业 vendors would only support new software features when these features have already been integratedConsortium in the community version, for long-term maintainability. This issues产 a requirement for ARM server software development: all products (e.g. from算 chip vendors, OS vendors) related to the ARM server software ecosystem should implement various software features in the upstream community in a coordinated计 and effective manner.

3.1 Firmware色 Traditionally, on the mobileComputing side, ARM has achieved win-win cooperation with the industry绿 through instruction set architecture and physical implementation licensing.

Mobile vendors typically have the entire stack (through vertical integration) from hardware toGreen operating system to application. However, in the server domain, horizontal integration is more common. The products designed by chip vendors, OEM/ODMs, OS vendors, and peripheral manufacturers must meet the standards of compatibility and

interoperability to enable the entire solution. In addition to the minimum standards of

hardware, a minimum standard of firmware (such as BIOS, BMC, various types of drivers,

etc.) is also required, based on which vendors can differentiate and innovate on

individual features.

Based on this requirement, ARM and its partners established the SBBR (Server Base

Boot Requirements) and its testing tools. This defines the firmware specifications盟 for the ARM64 server conforming to the SBSA specification. The official联 version of SBBR 1.0 [3] was released in March 2016. The standard is available in Chinese2. The SBBR specification refers to the industry standard UEFI/ACPI (B.2.1) and业 SMBIOS 3. System boot is an important part of server software and hardware产 compatibilityConsortium . To enable different vendors' server chips to be supported by third party OS , in addition to defining a unified hardware interface (SBSA specification),算 the firmware interface standard is also needed, which defines system boot mechanism, error handling methods, and power management interfaces. SBBR has an important计 impact on the hardware and software compatibility and the whole ARM64色 server eosystem, and has been steadily accepted by ARM64 server manufacturers. Computing

3.2绿 Basic Software Basic software is the underlying software that provides cross-platform capabilities,

which includesGreen OS, tool chains (programming languages and development tools),

and cloud infrastructure software (virtualization and containers). As a common software

2 http://developer.arm.com/products/architecture/system-architecture/server-system-architecture 3 http://www.dmtf.org/cn/standards/smbios

©2018 Green Computing Consortium Page 23 of 45 Green Computing Consortium Server Technical Standards Report layer supporting different business scenarios, full support in basic software for ARM servers has been achieved with the efforts of the open-source communities (such as

Linaro) and ARM server vendors.

The mainstream OS distributions (CentOS, OpenSuse, Ubuntu, etc.) all rely on unified and open hardware architecture standards (see Section 2.2). With improved support of SBSA specification by ARM64 servers, mainstream commercial open盟 source OS have announced support for ARM64 servers. Since ARM64 hardware联 architecture is evolving and iterating continuously, building and improving the basic software ecosystem is an important and long-term effort, which requires various业 vendors to invest and work together. 产 Consortium The tool chain is also a key link in the basic software ecosystem. The current mainstream compilers (GCC, LLVM, etc.)算 and programming languages (C, C++, Java, Python, Go, etc.) all provide support for the ARM64 chip architecture and have commercial capabilities in terms计 of performance and stability. In addition, ARM company has been committed色 to developing tool chain products for developers, and optimizing the tools for specific applicationComputing scenarios, which have strong competitiveness in terms of performance.绿

Cloud infrastructure software includes mainly virtualization and containers. Current mainstreamGreen open source virtualization software KVM and XEN provide commercial support for ARM64. As for the container, Docker has provided a commercial version supporting ARM64. As of today there is already a cloud infrastructure software ecosystem for ARM64 server.

Since the basic software originates from the open source community, we need to develop new software functions in the community, and collaborate in our effort to influence the community. We need to use a neutral open source software platform (see

B.2.2) for unified testing and verification in software development.

3.3 Platform Software 盟 There are many types of platform software on top of the basic software, including a large number of open source and commercial software. 联 Open source software innovation and iterations are fast and open to the needs of various stakeholders. Next-generation data center application业 scenarios have led to the vigorous development of open source software产 (especiallyConsortium the software on cloud platforms), for example, the cloud computing platform and resource management

(OpenStack, Kubernetes, etc.), big data/data算 analysis components (Hadoop, Spark, etc.), high performance computing计 components (such as OpenHPC), and database management components (such as MySQL). Linaro is leading the effort of ARM64 open source communities色 in building an ERP (Enterprise Reference Platform) (B.2.2) and has established collaboration withComputing upstream (open source) software. Through continuous iteration绿 and evolution of the platform, full support of these open source software on

ARM64 servers can be achieved. For example, OpenStack (the most widely used cloud computingGreen platform software) announced its support for ARM64 servers in October 2016, which makes ARM64 as one of the two chip architectures officially supported by

OpenStack.

As for commercial software, ARM64 server vendors have been actively collaborating with various commercial software vendors and have obtained commercial software support in various areas. For example, Chinese Tianjin KylinOS cloud platform software supports the ARM architecture (http://www.kylinos.cn/news_detail/newsId=108.html).

Internationally, Microsoft announced in March 2017 that it will use ARM64 servers to support its internal use of Azure cloud services [4]. With continuous collaboration盟 and deepening cooperation, more commercial software will support ARM64联 servers. With further development and improvement of the ARM64 software ecosystem and hardware capabilities, an increasing number of open source业 and commercial software will provide support for ARM64 servers, satisfying产 users’ needs onConsortium application experience. 算计色 Computing 绿 Green

4 GREEN COMPUTING FRAMEWORK: SERVER SYSTEM

As the hardware and software platforms of ARM64 servers develop continuously, they have been used in high-performance computer systems, data centers, and enterprise-class servers. The ARM64 server needs to follow the SBSA and SBBR specifications so that a single OS kernel image can support all server hardware, which prevents fragmentation of the ecosystem. In the meantime, ARM64盟 servers should provide support for heterogeneous computing, scalability, RAS联 and security, in order to meet the requirements of computing efficiency, real-timeness and reliability of particular application areas. 业 4.1 Heterogeneous Computing产 Consortium In a broad sense, heterogeneous computing exists at various levels of computing platforms. Differences in the instruction算 set, interconnection architecture, memory architecture, application binary interface, application program interface, and low-level language feature etc., are also计 heterogeneous from the perspective of upper applications and services. Through色 heterogeneous computing, i.e., enabling diverse types of computing devices to shareComputing the computing processes and results while constantly optimizing绿 and accelerating the computation, will achieve higher performance and efficiency.

With theGreen continuous development of use cases and applications upon the ARM64 computing platform, it is demanded that different types of processing units be integrated into the ARM64 platform to improve system performance. This may include

©2018 Green Computing Consortium Page 27 of 45 Green Computing Consortium Server Technical Standards Report different ARM64 CPU implementations coexisting in a system, or implementations that mix or interconnect with other computing platforms, such as X86, GPU, DSP orFPGA. To support such a heterogeneous computing platform, it is necessary to establish constraints on the cooperative method, communication method, and programming model for the platform with ARM CPU and other types of computing components. Such constraints should be be compatible with existing protocols, in order to盟 reuse existing technologies and avoid eocystem segmentation. By promoting interface联 standards at the hardware level, and adapting or expanding the standards at the firmware and software layers, the server system can support the integration业 of various computing units, and provide enhanced performance and efficiency.产 Consortium 4.2 Extensibility Without changing the platform算 architecture, the ARM64 server platform should be able to extend the storage capacity, various I/O peripherals, storage systems, and have the ability to monitor and manage计 multiple machines. ARM64 servers色 need to support multiple types of storage media, multiple storage interfaces (such as DDR3/4/5Computing and more advanced memory interface standards, new storage interfaces),绿 mixed memory architecture for NVM and DRAM, and high bandwidth high density memory devices.

ARM64Green servers should have the expansion capability of various I/O devices, including mainstream PCIe devices of different types (such as high-performance graphics cards, network communication cards, IO accelerator cards, or SSD-Solid State Drive

Page 28 of 45 ©2018 Green Computing Consortium Green Computing Consortium Server Technical Standards Report storage accelerator cards), support of RAID (Redundant Array of Independent Disks) controllers. When there is a need to increase the storage capacity, RAID storage system with larger storage capacity can be extended through the expansion interface on the motherboard.

When multiple servers are networked into a cluster system, the BMC-centered board management module can support cluster monitoring and management functions.盟 One of the servers is upgraded to the master node, and the single-machine联 BMC monitoring and management mode is switched to the cluster management mode, which constitutes a

“master-salve” system monitoring and management environment.业 In order to improve the system's external产 communication Consortium capabilities, the ARM server system should design a multi-channel network interface for data service communication. It should be able to算 support network interface from SoC (see 2.1.3) and PCIe card based expansion ports, in order to enable higher bandwidth Ethernet,

InfiniBand, and Fibre Channel计 (FC) network ports . This provides effective interconnect scalability to form higher performance server clusters. 色 Computing 4.3 RAS RAS绿 refers to the combination of reliability, availabilityand serviceability. RAS is a comprehensive capability, and the RAS requirements differ in various industries. Next- generationGreen data centers will host a wide range of applications. Among them, applications with strict real-time requirements or uninterruptible services have higher demands on

RAS features in the computing infrastructure.

On ARM64 servers, RAS error handling uses firmware-first model, and the error management depends on the implementation. Firmware-first error handling requires standard interfaces between software, such as the interfaces between the OS and the firmware, and between SoC and BMC. ACPI (see B.2.1) Advanced Platform Error Interface

(APEI) is the standard interface for firmware to pass RAS errors to the OS. In addition,

ARM company defined the Software Delegated Exception Interface (SDEI)盟 specification which uses software methods to define high-priority interrupts联 in a more flexible manner. The specification has been adopted in the latest ACPI version 6.2.

The implementation of the RAS functions on server业 does not have a uniform standard, and is strongly related to each SoC产 vendor ’ s hardware.Consortium Several mainstream vendors have relatively complete RAS features, which can meet the needs of application scenarios in large-scale data centers.算 In order to facilitate every vendor to implement basic RAS features, ARM company is working on the software architecture and the reference code in its Trusted计 Firmware 4.

4.4 Security色 Servers based on ARM64Computing architecture should standardize the security mechanism of the platform绿 from at least two aspects, that is, secure boot and runtime security. Creating the trust of the entire hardware and software system is the most basic requirement for security. Green

4 http://github.com/ARM-software/arm-trusted-firmware/tree/prototypes/secure_partitions/rfc_v1

The core design philosophy of secure boot is to ensure that all the code during the boot process are completely trustworthy from the first instruction until the operating system is ready. The secure boot process is a sequence of cryptographic verification of signed binary files. The roles of these execution files during loading and execution vary, and public key signatures for integrity follow a uniform format. The standard (X.509 certificate) is stored and associated with the original root of trust stored盟 in the OTP (One Time Programmable) or ROM (Read-Only Memory) of the chip.联 During the boot process, standard cryptographic algorithms are used to establish a verifiable chain of trust for the firmware execution code that is called in different phases.业 That is, each step of the trusted metric is a necessary condition for proceeding产 to theConsortium next step. The fundamental principle of runtime security is to implement confidentiality closure on tangible or intangible resources算 that need protection in the entire platform, prevent malicious attacks from tampering, and identify and troubleshoot modified resources, that is, the confidentiality and integrity计 of sensitive resources. On the one hand, ARM servers need to provide色 hardware virtualization capabilities to support sufficient isolation between different user applicationsComputing running on the same server. On the other hand, vendors绿 can further provide fine-grained data security capabilities by supporting the chip Enclave capabilities. The system operation security of the ARM-based server platform can be based onGreen geographical areas, system manufacturers, and flexible use of different security chips to provide the above two capabilities.

In terms of standards , the ARM server should follow the UEFI secure boot and the trusted boot standards of Trusted Computing Group

(http://trustedcomputinggroup.org/).

盟联业产 Consortium 算计色 Computing 绿 Green

5 GREEN COMPUTING STANDARDIZATION PROPOSAL

In the computing revolution initiated by new technologies such as cloud computing, big data, and high-performance computing, the ecosystem of data center is evolving from being led by a a few vendors, HW and SW binding proprietary architecture towards a user-driven, multi-vendor, multi-architecture open ecosystem. The features of ARM64 processor- multi-core, high parallelism, low power consumption etc., can盟 better meet the needs of green computing on high computing efficiency,联 low power and energy consumption, and high scalability.

In order to promote the green computing technologies业 and industry, we need to build an open and unified standards system to guide the industryConsortium direction, aggregrate the resources and effort, coordinate industrial产 innovation, and improve the performance and efficiency of ARM64 servers: 算 1) Contribute to open and unified standards on the foundational level such as

CPU interfaces, hardware计 architecture and firmware, and take full advantage of architectural色 innovations which improve the server performance and efficiency. When there are alreadyComputing industrial consensus on particular standards, we should follow绿 and contribute to these standards for better integration into the global industry and ecosystem. When existing standards can not fully cover user needs, the standardsGreen should be updated and further developed based on the emerging demand, or new standards could be developed.

2) Follow standards on server system compatibility and open-box readiness

and consistency , to offer users a consistent deployment experience.

3) Promote basic and platform software (such as cloud computing, big data

analysis, Android application framework), port and optimize various algorithms,

toolsand libraries based on standard hardware and firmware, to facilitate the

migration of user applications to the ARM64 platform.

To advocate the deployment and industry compliance of green computing standards, we can use test, verification or certification mechanisms, for example: 盟  System compatibility certification: establish compliance联 test platform for green computing, formulate test specifications and procedures, and carry out

standards compliance test and certification. 业  Reliability test (including software产 and hardwareConsortium reliability test): develop test specifications and procedures, reliability metrics etc., to enable standard evaluation of the reliability of green算 computing servers.  Performance and power consumption test: formulate objective and fair test

indicators and procedures计 based on use cases, quantitatively compare the performance色 and power consumption between ARM64 servers and servers of other architectures, as well asComputing between different ARM64 servers, quantitatively compare the绿 performance and power consumption of cloud computing and big data platforms with ARM64 servers and servers of other architectures. These studies could provideGreen reference or baseline figures to the industry.

6 REFERENCES

[1] Yuval Degani. Accelerating Apache Spark with RDMA. 13th OpenFabrics Alliance annual workshop, March, 2017. Available at www.openfabrics.org/images/eventpresos/2017presentations/108_Apache_YDegani.pdf

[2] ARM. ARM server base system architecture, Version 3.1.盟 Feb, 27, 2017. http://static.docs.arm.com/den0029/a/Server_Base_System_Architecture_v3_1_ARM_DEN_联 0029A.pdf

[3] ARM. Server base boot requirements, system software业 on ARM platform. Version 1.0, March, 2016.产 ConsortiumAvailable at http://static.docs.arm.com/den0044/b/DEN0044B_Server_Base_Boot_Requirements.pdf

[4] Leendert von Doorn. Enabling算 cloud workloads through innovations in Silicon. http://azure.microsoft.com/en-us/blog/enabling-cloud-workloads-through-innovations- in-silicon/. Accessed Sep, 10,计 2017. [5] ARM. Software色 Delegated Exception Interface (SDEI).Issue A, First release. May, 2017. ComputingAvailable at http://infocenter.arm.com/help/topic/com.arm.doc.den0054a/ARM_DEN0054A_Software绿

_Delegated_Exception_Interface.pdf Green

APPENDIXAACRONYMS

 ARM ： Broadly refers to the ARM instruction set architecture. See

AppendixC

 ARM64：Refers to 64-bit ARM instruction setarchitecture  BIOS: Basic Input/Output System 盟  BMC: Baseboard Management Controller

 DDR: DDR SDRAM 联  DSP: Digital Signal Processor 业  FPGA：Field Programmable Gate Array

 GPU：Graphic Processing Unit 产 Consortium

 HPC：High-Performance Computing

 NFV: Network Function算 Virtualization  NPU: Neural Processing计 Unit  NVM：Non-Volatile Memory  OS: Operating色 SystemComputing 绿 RAS: Reliability、Availability、Serviceability  SoC：System-on-Chip。 Green

APPENDIXBREFERENCEDSTANDARDSBODIESANDOPENSOURCE ORGANIZATIONS

B.1 Hardware

B.1.1 CCIX

CCIX Consortium Inc. （ www.ccixconsortium.com ） was founded盟 by six vendors including AMD, ARM, Huawei, Mellanox, Qualcomm, Xilinx. It is dedicated to the development of open interface standards for the cache-coherent联 CPU and heterogeneous accelerators (FPGA, GPU, DSP). As业 the requirements for computing performance of the new generation of cloud data center applications continue to increase, accelerating the CPU is not sufficient产 to meet theConsortium performance requirements.

Computer systems increasingly rely on high-speed, parallel accelerators to improve system performance. The CCIX-defined算 interface standard has higher bandwidth, lower latency, better performance,计 and compatibility with different instruction sets than traditional I/O interfaces, and is of great value to the development of cloud data centers. The CCIX Consortium色 hasComputing grown rapidly, covering major players in the industry, including绿 vendors for CPU, accelerator, memory, system hardware, system interconnects, OS, driver, switch, and testing. In October 2016, the first draft of the interface specifications (including the physical layer, data link layer, and protocol layer specifications)Green was issued to the members. It is expected that the CCIX Revision 1 specifications will be officially released in 2017.

B.1.2 PCI-SIG

PCI-SIG （peripheral component interface special interest group; www.pcisig.com） is a standard organization that was established since 1992 and has a history of 25 years. It mainly develops interfaces between CPU and I/O devices (storage, network cards, graphics cards, etc.). It mainly develops PCI (peripheral component interface), PCI-X (PCI extended) and PCIe (PCI express) interface standards. Currently there盟 are nearly 800 members and it is the most influential international standards联 organization for CPU I/O interfaces. PCIe has been developing slowly since version 3.0 (released in 2010, 8G rate), and version 1.0 of PCIe 4.0 (16GT/s) was released in October业 of 2017. The next version of PCIe 5.0 (32GT/s) is expected to be completed产 in 2019. Consortium B.1.3 Gen-Z

Gen-Z consortium (http://genzconsortium.org/)算 is an open standards organization initiated by AMD, ARM, Cray,计 Dell, HPE, Huawei, IDT, Micron, Samsung, SK Hynix, Xilinx, and others. The main goal of the GEN-Z consortium is to develop a scalable high- performance interconnect色 technologyComputing with memory load/store semantics. Can be used for CPU绿 interface to different memory, especially the interface to SCM-storage class memory. GEN-Z was established in August 2016 and has 41 members covering the chip, server system, (new media) memory, and FPGA vendors. Compared with the existing memory interfaceGreen standards, the GEN-Z standard focuses on improving performance

(high bandwidth, low latency), and low power consumption. Currently the GEN-Z

Consortium is developing a core spec, which is expected to be officially released in 2017.

B.1.4 JEDEC

JEDEC (www.jedec.org) is the industry's most influential industry organization that sets open standards for solid-state electronics and semiconductor industries. JEDEC consists of many committees (50+) and more than 300 members. The盟 memory-related standards developed by JEDEC DDR4, DDR5 (in research), NVDIMM-P, etc. have important value for green computing. 联 DDR4 SDRAM (Double Data Rate Fourth-Generation业 Synchronous Dynamic Random- Access Memory) is the latest generation of DRAM standards and was released in 2014. Compared with the previous generation (DDR3)产 standard,Consortium DDR4 memory density is higher, voltage is lower, and transmission speed is faster. The DDR5 standard under development will achieve twice the算 bandwidth and memory density of DDR4, providing higher performance and energy计 efficiency, and is expected to be released in 2018. NVDIMM-P (Non-Volatile Dual In-line Memory Module - P) is a new serial standard jointly promoted色 by JEDEC andComputing SNIA organizations and supports new NVDIMM memory modules.绿 NVDIMM is a type of memory module integrated with DRAM + NVM chip. It is mainly applied to server core dynamic data protection, virtual machine snapshot recovery, disk cache, storage chain and so on. Compared to the current standard

NVDIMM-FGreen and NVDIMM-N, NVDIMM-P is more energy-efficient, lower cost, and capable of supporting more memory capacity.

B.2 Software

B.2.1 UEFI forum

UEFI forum（http://www.uefi.org/）was established in 2005 and is dedicated to the development of interface standards for computer system firmware to operating systems. The UEFI forum mainly defines UEFI (unified extensible firmware interface),盟 PI (platform initialization) specification (interfaces of different components within the firmware), and

ACPI (advanced configuration and power interface, system联 configuration, power management, and reliability related firmware interface业 standard). The unified firmware interface standard has important significance for promoting the operating systems to support different server hardware and promoting产 the compatibilityConsortium of software and hardware. Currently the UEFI forum has 13 Board members (AMD, AMI, Apple, ARM, DELL,

HPE, HP, IBM, Insyde, Intel, Lenovo,算 Microsoft, and Phoenix) and has more than 330 members. 计 B.2.2 Linaro色 Internationally, Linaro, asComputing a non-profit global neutral collaborative organization for open source绿 software, builds basic and common software stacks and enablement platforms for various ARM application areas and scenarios. Linaro operates multiple segment groups,Green among which LEG (Linaro Enterprse Group) focuses on building and promoting the open source software ecosystem of ARM64 servers. One of the key projects is to build a unified, commercially-neutral, software reference implementation

ERP (Enterprise Reference Platform) 5 for the ARM architecture that provides a vendor- neutral set of products to support all chips, and contains the latest versions of the open source software that complies with the upstream community operating procedures. It is used for software development and testing. This platform integrates firmware, Linux kernel, various virtual machine technologies (KVM, QEMU) and many other software modules (including OpenStack, Ceph, Hadoop, Spark, etc.). In the future,盟 there will be integration of typical application libraries such as high-performance联 computing libraries. 业产 Consortium 算计色 Computing 绿 Green

5 http://platforms.linaro.org/documentation/Reference- Platform/Platforms/Enterprise/README.md/

APPENDIX C ARM64 ARCHITECTURE

C.1 ARM Architecture Development

The ARM architecture is the foundation for building each ARM processor. The ARM architecture continues to evolve over time and includes architectural features that meet the growing number of new features, high-performance needs, and盟 the needs of emerging markets (Figure C-1). 联业产 Consortium 算计 Figure色 C-1 ARM Architecture Evolution The ARM architecture supportsComputing implementation across multiple performance points and has绿 become the dominant architecture in many market segments. The ARM architecture supports a very wide range of performance points so that you can take advantageGreen of the latest microarchitecture technologies to achieve a very small ARM processor implementation and an extremely effective advanced design implementation.

Achieving scale, performance, and low power consumption are key features of the ARM architecture.

ARM has developed an architecture extension to provide support for Java

Acceleration (Jazelle®), Security (TrustZone®), SIMD, and Advanced SIMD (NEONTM) technologies. The ARMv8-A architecture adds encryption extension as an optional feature.

The ARM architecture is similar to a Reduced Instruction Set Computing (RISC) architecture because it includes the following typical RISC architecture features:盟  Unified register file load/store architecture, where联 the data processing operations are only for register contents and do not directly address memory

contents. 业  Simple Addressing Mode, where产 all load/store Consortium addresses are determined only by register contents and instruction fields.

The enhancements to the basic算 RISC architecture enable ARM processors to achieve a good balance of higher performance, smaller code size, lower power consumption, and smaller silicon area. 计色 C.2 ARMv8 ArchitectureComputing In October绿 2011, ARM Corporation disclosed the technical details6 、 7 of the new ARMv8 architecture, which is the first ARM architecture that includes a 64-bit instruction set. ARMv8Green extends the existing 32-bit ARMv7 architecture, introduces 64-bit processing technology, and extends virtual addressing.

6 http://silver.arm.com/download/ARM_and_AMBA_Architecture/AR150-DA-70000-r0p0- 02eac0/DDI0487B_a_armv8_arm.pdf 7 http://silver.arm.com/download/ARM_and_AMBA_Architecture/AR150-DA-78000-r0p0- 02eac0/DDI0553A_e_armv8m_arm.pdf

The uniqueness of the ARM architecture lies in its ability to span the entire field of electronics equipment, from tiny sensors to large infrastructure equipment. ARMv8 is developed on the industry-standard 32-bit ARM architecture, extending the ARM processor-based solution to consumer and enterprise-oriented applications that require more extensive virtual address and 64-bit data processing technology.

The ARMv8 architecture contains two execution states, AArch64 and盟 AArch32. The AArch64 execution state introduces a new instruction set A64联 for 64-bit processing technology. The AArch32 execution state will support the existing ARM instruction set.

The main features of the current ARMv7 architecture,业 including TrustZone® technology, virtualization technology, and NEONTM advanced产 SIMD technology,Consortium will all be retained or further expanded in the ARMv8 architecture. The ARM instruction set continues算 to evolve to meet the growing demands of leading-edge application developers, while retaining the necessary backward compatibility to protect software计 development investments. In ARMv8-A, some additions were made to A32色 and T32 to maintain consistency with the A64 instruction set. With the introduction of theComputing ARMv8 architecture, ARM is making a vigorous effort to ensure a绿 robust design ecosystem to support 64-bit instruction sets. ARM's major ecosystem partners have been able to obtain ARM compilers and Fast Models that support theGreen ARMv8 architecture. With the support of the new architecture, initial development of a series of open source operating systems, applications, and third-party tools is already underway. Through cooperation, ARM partners jointly accelerate the development of the 64-bit ecosystem.

The ARMv8 architecture enables the development of related devices that are compatible with the ARM architecture to achieve maximum benefits in both 32-bit and

64-bit applications. The ARMv8 architecture not only introduces the advantages of high- efficiency 64-bit computing into new application areas such as high-end servers and computing, but also provides backward compatibility and portability to existing software through its consistent architecture. 盟联业产 Consortium 算计色 Computing 绿 Green