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CO-SIMULATION of HDL USING PYTHON and MATLAB OVER Tcl TCP/IP SOCKET in XILINX VIVADO and MODELSIM TOOLS Ł

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CO-SIMULATION of HDL USING PYTHON and MATLAB OVER Tcl TCP/IP SOCKET in XILINX VIVADO and MODELSIM TOOLS Ł 17th Int. Conf. on Acc. and Large Exp. Physics Control Systems ICALEPCS2019, New York, NY, USA JACoW Publishing ISBN: 978-3-95450-209-7 ISSN: 2226-0358 doi:10.18429/JACoW-ICALEPCS2019-WEPHA023 CO-SIMULATION OF HDL USING PYTHON AND MATLAB OVER Tcl TCP/IP SOCKET IN XILINX VIVADO AND MODELSIM TOOLS Ł. Butkowski*, B. Dursun, C. Gumus, M. K. Karakurt Deutsches Elektronen-Synchrotron DESY, Hamburg, Germany Abstract level design in a co-simulation process. This can improve significantly verification [3]. This paper presents the solution, which helps in the simu- lation and verification of the implementation of the Digital There are already available methods of HDL co- Signal Processing (DSP) algorithms written in hardware de- simulation with the use of high level programming languages. scription language (HDL). Many vendor tools such as Xilinx One of the way to use high level programming languages like ISE/Vivado or Mentor Graphics ModelSim are using Tcl as C in a verification process is to use Direct Programming Lan- an application programming interface. The main idea of the guage Interface (DPI) of the System Verilog [4] or Foreign co-simulation is to use the Tcl TCP/IP socket, which is Tcl Language Interface (FLI) [5] of the simulation tool. The build in feature, as the interface to the simulation tool. Over simulation is fast but this method is not so straight forward this interface the simulation is driven by the external tool. and easy to use. It is platform depended or tool depended The stimulus vectors as well as the model and verification and requires recompilation of the code every change. One of are implemented in Python or MATLAB and the data with the another way is to use Programming Language Interface simulator is exchanged over dedicated protocol. The tool, (PLI) like the file input/output interface using the VHDL which was called cosimtcp, was developed in Deutsches textio library [6]. This method has limitation in interactive Elektronen-Synchrotron (DESY). The tool is a set of scripts simulations and reuseability. that provide a set of functions. This tool has been success- We came with and another idea. Almost all of the HDL fully used to verify many DSP algorithms implemented in simulator tools support Tcl script language as an application the FPGA chips of the Low Level Radio Frequency (LLRF) programming interface, enabling control of the simulation and synchronization systems of the European X-Ray Free using TCL commands. It also means that all the default Tcl Electron Laser (E-XFEL) accelerator. Cosimtcp is an open features are available in the tool. The idea proposed was to source available tool. use these features as the communication layer between HDL simulation tool and an external tool. The Tcl socket function INTRODUCTION has been found as a perfect candidate for this role. It is a build in command which opens a TCP network connection. The correct operation of the Low Level Radio Frequency The communication between simulation tool and high level (LLRF) [1] and synchronization systems of the European X- language is done over TCP/IP socket. This is a good separa- 2019). Any distribution of this work must maintain attribution to the author(s), title of the work, publisher, and DOI. Ray Free Electron Laser (E-XFEL) [2] accelerator requires a tion between these two. The solution gives a good balance © huge amount of Digital Signal Processing (DSP) calculations between reuseability, easy to use and simulation speed. The in real time. This task is mainly handled by FPGAs. In TCP/IP socket protocol is well-know, widely used and has a the high level design stage, the first step is to determine the build-in support in many tools. exact algorithms that has to be implemented in FPGAs so the The solution we came up with has been called cosimtcp machine can operate. This work is executed with the help of [7]. It is a set of script in the form of libraries, which can be tools such as MATLAB with Simulink or Python. Solutions easily added to current or new simulation flow. Currently are simulated and the exact formula is derived. Next the the solution is used with Xilinx Vivado, ModelSim, Matlab implementation process starts in which the code written in and Python tools. hardware description language (HDL) is developed. During In the following chapters the steps that has to be done to this process the following problem always appear: how to run simulation using cosimtcp libraries will be presented. verify functionality of written HDL code. Also the examples of the usage will be given. In the end There are a few ways we can solve this problem. There prons and cons of this solution will be discussed. are available methodologies and libraries which can help go trough this process. It is very common to write the testbench using HDL first. Next phase is to write the model of the CO-SIMULATION ARCHITECTURE component under test in order to go through the verification process. However, writing the DSP algorithm model in HDL The block diagram of the co-simulation is presented in is really difficult and time consuming. Additionally there Figure 1. The simulation is divided into two main blocks. is risk of introducing new errors in the model, which fail The server side: responsible for the HDL simulation of Unit our verification. Most wanted in the verification process Under Test (UUT) and the client side: responsible for the would be to use directly the same tools as the one in the high generation of stimulus and verification. Between them the data are exchanged using a dedicated protocol over a socket ∗ [email protected] connection. There is one protocol used among all the tools. WEPHA023 Content from this work may be used under the terms of the CC BY 3.0 licence ( Hardware Technology 1127 17th Int. Conf. on Acc. and Large Exp. Physics Control Systems ICALEPCS2019, New York, NY, USA JACoW Publishing ISBN: 978-3-95450-209-7 ISSN: 2226-0358 doi:10.18429/JACoW-ICALEPCS2019-WEPHA023 Slave HDL simulation tool (Vivado/ModelSim) Master testbench Python/Matlab/.. tcl HDL testbench entity signal aliases simulator stimulus definitions control clock unit generation TCP/IP under driver buf socket tests data Client Server analyzer protocol recv buf (UUT) cosimtcp libraries Figure 1: VHDL Co-Simulation block diagram using cosimtcp. The server is a slave that executes the instructions of the The flow diagram of the server operation is presented in master, which is the client. Figure 2. After accepting connection, the server goes to the idle state where it waits for incoming commands. The server Protocol has two buffers. The first one is used to store the value ofthe The communication protocol between the client and the input objects. This buffer is filled with data by the client. The server is based on string commands, which are send over second one is used to store the value of the output objects. established TCP/IP socket connection. There are a few main This buffer is filled with the values during the simulation. commands: The simulation is executed in steps. In each step, the values from the input buffer are set to input objects, and the values • set <object name> <buffer offset> <data vector> of output objects are saved in output buffers. Next the pointer client request: fill the input buffer with the data vector of the data buffers is incremented and the simulation run for of the specified object starting with the given buffer one step. Only the values of the objects defined in the list are offset set or examined. The simulation is controlled with the Tcl server response: buffer fill done commands available in the tool. In the case of ModelSim these are: force to set object value, examine to read object • get <object name> <buffer offset> value and run to run simulation step. In the case of Vivado client request: send the data from the output buffer of they are respectively: add_force, get_value, run. the specified object server response: returns data vector from the buffer Wait for • sim run <steps> <step time> <time unit> <mode> 2019). Any distribution of this work must maintain attribution to the author(s), title of the work, publisher, and DOI. connection close restart simulation © client request: run simulation in the number of steps close connection reset pointer with the specified time step, cmd IDLE restart simulation can be run in various modes: do not record get <> set <> data in buffers, start from the beginning, continue get buffer set buffer server response: simulation steps done sim run <> simulate • cmd <command> set object value output input client request: execute system command like restart or from buffers buffers buffers quit simulation put object value in buffers server response: command executed input output run simmulation objects list Server objects list step The server side is implemented on the HDL simulator tool. increment pointer The tool executes a Tcl script in which the server function is no run. The main task of the server is to: all steps? yes • listen for and accept incoming connections on socket, server can accept only one client at a time Figure 2: Server side flow diagram. • translation of incoming commands into executable func- tions of HDL simulator Client • run and control simulation Cosimtcp client run on MATLAB or Python using sim- ulation scripts which can be added as a library. The main • send back requested data responsibilities of the client are: Content fromWEPHA023 this work may be used under the terms of the CC BY 3.0 licence ( 1128 Hardware Technology 17th Int. Conf. on Acc.
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